From patchwork Tue Oct 5 17:18:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naveen Naidu X-Patchwork-Id: 12537367 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95D15C433EF for ; Tue, 5 Oct 2021 17:19:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 785C061506 for ; Tue, 5 Oct 2021 17:19:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234938AbhJERV2 (ORCPT ); Tue, 5 Oct 2021 13:21:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58122 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233961AbhJERV1 (ORCPT ); Tue, 5 Oct 2021 13:21:27 -0400 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 806E3C061749; Tue, 5 Oct 2021 10:19:36 -0700 (PDT) Received: by mail-pj1-x1031.google.com with SMTP id oa6-20020a17090b1bc600b0019ffc4b9c51so2495868pjb.2; Tue, 05 Oct 2021 10:19:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IjHgR4yuS2vTaKg7fKfhOjl8nNl87X4AMEmWTqe3CAo=; b=UvpRegiHO4NAWwEm0An/S746HVyraL1+IKlEUHsK7b4F732ko1nh7S4XAi2+ZFi0b6 bj5GWF90SjpxzdpcbIVIimMhy10JdsL4iUHsdJGc7jTOfFL5A/B863nlU7PLVeyVe86m ttiIP1ALgJkzIYlfgAGNKSIlvlHYsd1kA3M1Rs2Ot3MNkOwV8KjIalam0TrlZODMnqkM dwaQ6z9hB42hc5w5gQom8SeKIt/CGM5sRwLYouk6LtfJmwRoxXlZAZp9uFb3M2XuSv9o 5Yf9C/0A8wDenXF5AwdJW1tVNKkVNrkT7LdOXxhF+wmBMKU+ZmbfNqmGwS664+mwVcrP 8R0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IjHgR4yuS2vTaKg7fKfhOjl8nNl87X4AMEmWTqe3CAo=; b=yoXM4yLtWPcdDousUlY8livvRW4kPLGhqJ8xODljNwriCLwVIksF3PuxyPI/pDFI36 lp0KUZVIRK0WA+gt6YB3RjX+PCcbB5slzOP27YPBwcPZ0xp9mpnEatDMXYZjCdT+4fN7 HZWkn3QiIGK19cNZcdb0+VynJU0cXiCmMl4zHYjtZ3qJSpLmtjZlUJgp3z+RZfHkbVtk wC18xRB4qAkMe16FJLqFQSuxrNSoR68QQC0+cR86yjtAYRYt4dw2jrSaNiZjLpe2/cd2 2S1S9bhHsNUq7UV0wfqb+zyKSU82ma/aRbi8ZYkzf7e/9ImcBJRsbmEAO1b/UD6CwZey XOBw== X-Gm-Message-State: AOAM531jJa5yuvgIcypv9KGlhQtJXbIBWTBI9xYw+w89jxUr8P36HS5O 1V4BORkBrC4/6MQR8LcK4rPeRPd4lutI27zoZ6w= X-Google-Smtp-Source: ABdhPJxzVl2CYXY1+jXkMgxI7lgjA4Vhcp7jsudKPrO1RBAfCZVLiTcwITS9ttdeflkxxCh6kEfNHQ== X-Received: by 2002:a17:90b:3e8d:: with SMTP id rj13mr5241539pjb.183.1633454375892; Tue, 05 Oct 2021 10:19:35 -0700 (PDT) Received: from localhost.localdomain ([2406:7400:63:f69:1127:b4ce:ef67:b718]) by smtp.gmail.com with ESMTPSA id f25sm18476722pge.7.2021.10.05.10.19.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Oct 2021 10:19:35 -0700 (PDT) From: Naveen Naidu To: bhelgaas@google.com, ruscur@russell.cc, oohall@gmail.com Cc: Naveen Naidu , linux-kernel-mentees@lists.linuxfoundation.org, skhan@linuxfoundation.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v4 1/8] PCI/AER: Remove ID from aer_agent_string[] Date: Tue, 5 Oct 2021 22:48:08 +0530 Message-Id: <22b2dae2a6ac340d9d45c28481d746ec1064cd6c.1633453452.git.naveennaidu479@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Currently, we do not print the "id" field in the AER error logs. Yet the aer_agent_string[] has the word "id" in it. The AER error log looks like: pcieport 0000:00:03.0: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Receiver ID) Without the "id" field in the error log, The aer_agent_string[] (eg: "Receiver ID") does not make sense. A user reading the aer_agent_string[] in the log, might inadvertently look for an "id" field and not finding it might lead to confusion. Remove the "ID" from the aer_agent_string[]. The following are sample dummy errors inject via aer-inject. Before ======= In 010caed4ccb6 ("PCI/AER: Decode Error Source Requester ID"), the "id" field was removed from the AER error logs, so currently AER logs look like: pcieport 0000:00:03.0: AER: Corrected error received: 0000:00:03:0 pcieport 0000:00:03.0: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Receiver ID) <--- no id field pcieport 0000:00:03.0: device [1b36:000c] error status/mask=00000040/0000e000 pcieport 0000:00:03.0: [ 6] BadTLP After ====== pcieport 0000:00:03.0: AER: Corrected error received: 0000:00:03.0 pcieport 0000:00:03.0: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Receiver) pcieport 0000:00:03.0: device [1b36:000c] error status/mask=00000040/0000e000 pcieport 0000:00:03.0: [ 6] BadTLP Signed-off-by: Naveen Naidu --- drivers/pci/pcie/aer.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index 9784fdcf3006..241ff361b43c 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -516,10 +516,10 @@ static const char *aer_uncorrectable_error_string[] = { }; static const char *aer_agent_string[] = { - "Receiver ID", - "Requester ID", - "Completer ID", - "Transmitter ID" + "Receiver", + "Requester", + "Completer", + "Transmitter" }; #define aer_stats_dev_attr(name, stats_array, strings_array, \ @@ -703,7 +703,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info) const char *level; if (!info->status) { - pci_err(dev, "PCIe Bus Error: severity=%s, type=Inaccessible, (Unregistered Agent ID)\n", + pci_err(dev, "PCIe Bus Error: severity=%s, type=Inaccessible, (Unregistered Agent)\n", aer_error_severity_string[info->severity]); goto out; } From patchwork Tue Oct 5 17:18:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naveen Naidu X-Patchwork-Id: 12537369 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC55CC433F5 for ; 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Tue, 05 Oct 2021 10:20:01 -0700 (PDT) Received: from localhost.localdomain ([2406:7400:63:f69:1127:b4ce:ef67:b718]) by smtp.gmail.com with ESMTPSA id f25sm18476722pge.7.2021.10.05.10.19.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Oct 2021 10:20:00 -0700 (PDT) From: Naveen Naidu To: bhelgaas@google.com, ruscur@russell.cc, oohall@gmail.com Cc: Naveen Naidu , linux-kernel-mentees@lists.linuxfoundation.org, skhan@linuxfoundation.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v4 2/8] PCI: Cleanup struct aer_err_info Date: Tue, 5 Oct 2021 22:48:09 +0530 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The id, status and the mask fields of the struct aer_err_info comes directly from the registers, hence their sizes should be explicit. The length of these registers are: - id: 16 bits - Represents the Error Source Requester ID - status: 32 bits - COR/UNCOR Error Status - mask: 32 bits - COR/UNCOR Error Mask Since the length of the above registers are even, use u16 and u32 to represent their values. Also remove the __pad fields. "pahole" was run on the modified struct aer_err_info and the size remains unchanged. Signed-off-by: Naveen Naidu --- drivers/pci/pci.h | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 1cce56c2aea0..9be7a966fda7 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -427,18 +427,16 @@ struct aer_err_info { struct pci_dev *dev[AER_MAX_MULTI_ERR_DEVICES]; int error_dev_num; - unsigned int id:16; + u16 id; unsigned int severity:2; /* 0:NONFATAL | 1:FATAL | 2:COR */ - unsigned int __pad1:5; unsigned int multi_error_valid:1; unsigned int first_error:5; - unsigned int __pad2:2; unsigned int tlp_header_valid:1; - unsigned int status; /* COR/UNCOR Error Status */ - unsigned int mask; /* COR/UNCOR Error Mask */ + u32 status; /* COR/UNCOR Error Status */ + u32 mask; /* COR/UNCOR Error Mask */ struct aer_header_log_regs tlp; /* TLP Header */ }; From patchwork Tue Oct 5 17:18:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naveen Naidu X-Patchwork-Id: 12537371 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73461C433EF for ; Tue, 5 Oct 2021 17:20:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5830E61506 for ; Tue, 5 Oct 2021 17:20:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235238AbhJERWC (ORCPT ); Tue, 5 Oct 2021 13:22:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236738AbhJERV5 (ORCPT ); Tue, 5 Oct 2021 13:21:57 -0400 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA514C061749; Tue, 5 Oct 2021 10:20:06 -0700 (PDT) Received: by mail-pj1-x1035.google.com with SMTP id rm6-20020a17090b3ec600b0019ece2bdd20so150385pjb.1; Tue, 05 Oct 2021 10:20:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0szOl/Q5keJYQjPtxy9YApfb7ftHWXnTXQ4eoRdC7oM=; b=EqpIK1vTXdHM2T3qpKt7B5M72W9yNHp47Ooa5AzhsBqv/LSEr3GylhgEQKGtBbz8aF ISkGnHZ77zRoof4FGCAdApmHRV4hxmhkzizSs9NOl/xyHgjEVdTwam86QBgOsUuIcb+J MRHmgyoMWSbW56wDErgWeTtD9EB7ErJcD/LDcXR+l+fKPPqx6LUqgKtZ1BGRPPxEfttB kQrD7xtiMRRpIOJPGyXtAAcyb0Dvj+ucWvAf6Q9eOTvEiUobNqdLsz4r2NvwflOVZ198 NleQppPNm4L6lTW5T4nON1Qwp7V7Q6OaU8CaF6s1ggbc5qjIvX2Jv1y2Vhsnc9PenK3Y 6EYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0szOl/Q5keJYQjPtxy9YApfb7ftHWXnTXQ4eoRdC7oM=; b=jwLhFU1ctaJH/ZZeFIH+XUE2EpzES0z2H9urf/qE9wVXUscPPMAUnSYW6vu660TNDz TIVXilQ6zhIIBFtCArs1AF+xe6jBKQ75S8y/B7+9m2UJNULncEPY/dXLfxRjQUaf6F0R ++NK+9KvkCMMpOEPufOjRNp/ndOOSMZOVvLtZQfk5L9+X8JvaejrYgqH9yGb2X24lc+Q TaEOgvvqKwm5WWqd/2Vdcb9zxS7hQVHNyXBKL6crHtbgt3aMv2GOD9MiL7AkZJUv24in 9KsumNANXHVyL/yGybqHDlU1hJWnqsoFTonLUmtiE2PLDsf4+vy5Wsv/t0cKqjEgH87H rMEA== X-Gm-Message-State: AOAM531SzhfjKACb8XTg6UOOVy7Jg5u6xqgfJad9NzgPenvXNHD6UmfK +9lSeoTfkrPIkqypko/JF8U= X-Google-Smtp-Source: ABdhPJzQlgbJ2vipxR8pOXATO00s5SdfAkVzILUymzDybhDIw7JfAUJP3lpRvmIhgSc/zwSufi+TBw== X-Received: by 2002:a17:90a:19d2:: with SMTP id 18mr5145011pjj.27.1633454406293; Tue, 05 Oct 2021 10:20:06 -0700 (PDT) Received: from localhost.localdomain ([2406:7400:63:f69:1127:b4ce:ef67:b718]) by smtp.gmail.com with ESMTPSA id f25sm18476722pge.7.2021.10.05.10.20.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Oct 2021 10:20:05 -0700 (PDT) From: Naveen Naidu To: bhelgaas@google.com, ruscur@russell.cc, oohall@gmail.com Cc: Naveen Naidu , linux-kernel-mentees@lists.linuxfoundation.org, skhan@linuxfoundation.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v4 3/8] PCI/DPC: Initialize info->id in dpc_process_error() Date: Tue, 5 Oct 2021 22:48:10 +0530 Message-Id: <5ebe87f18339d7567c1d91203e7c5d31f4e65c52.1633453452.git.naveennaidu479@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org In the dpc_process_error() path, info->id isn't initialized before being passed to aer_print_error(). In the corresponding AER path, it is initialized in aer_isr_one_error(). The error message shown during Coverity Scan is: Coverity #1461602 CID 1461602 (#1 of 1): Uninitialized scalar variable (UNINIT) 8. uninit_use_in_call: Using uninitialized value info.id when calling aer_print_error. Initialize the "info->id" before passing it to aer_print_error() Fixes: 8aefa9b0d910 ("PCI/DPC: Print AER status in DPC event handling") Signed-off-by: Naveen Naidu --- drivers/pci/pcie/dpc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c index c556e7beafe3..df3f3a10f8bc 100644 --- a/drivers/pci/pcie/dpc.c +++ b/drivers/pci/pcie/dpc.c @@ -262,14 +262,14 @@ static int dpc_get_aer_uncorrect_severity(struct pci_dev *dev, void dpc_process_error(struct pci_dev *pdev) { - u16 cap = pdev->dpc_cap, status, source, reason, ext_reason; + u16 cap = pdev->dpc_cap, status, reason, ext_reason; struct aer_err_info info; pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status); - pci_read_config_word(pdev, cap + PCI_EXP_DPC_SOURCE_ID, &source); + pci_read_config_word(pdev, cap + PCI_EXP_DPC_SOURCE_ID, &info.id); pci_info(pdev, "containment event, status:%#06x source:%#06x\n", - status, source); + status, info.id); reason = (status & PCI_EXP_DPC_STATUS_TRIGGER_RSN) >> 1; ext_reason = (status & PCI_EXP_DPC_STATUS_TRIGGER_RSN_EXT) >> 5; From patchwork Tue Oct 5 17:18:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naveen Naidu X-Patchwork-Id: 12537373 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7BD24C4332F for ; Tue, 5 Oct 2021 17:20:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6980B61506 for ; Tue, 5 Oct 2021 17:20:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236749AbhJERWL (ORCPT ); Tue, 5 Oct 2021 13:22:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58314 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236755AbhJERWK (ORCPT ); Tue, 5 Oct 2021 13:22:10 -0400 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 91481C061755; Tue, 5 Oct 2021 10:20:19 -0700 (PDT) Received: by mail-pj1-x102a.google.com with SMTP id ls14-20020a17090b350e00b001a00e2251c8so123640pjb.4; Tue, 05 Oct 2021 10:20:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WgoZ9+KpQrZR7tDkQXfhNUVljLBFuOfZzG3U49+7PlA=; b=P+WtH3IMZqtUvBm5H9fMw9DkmxTpj9xDSJjyGL7A64Uyef7vOxtT1+71U5DwpJz9BF tFNkTjq14XrRxR35pQ2LG8xelzcnyqJOZeCllFYuLfBuYSQrS2XM5vb+amlwWQYvXML+ bMoFMOoM+fQocWCzlMqISl30VSZGX7i4dvK2GZRUEVWmdwsjVZz9QkBz1ndtcGtG0QVm YqclJ9Y4OH1rQdMR2h4DfHgPPebH6E5VXsAg7UtWi17GKtsxNGIN3pu3NWgtOXbyMl8d Nqf8reqqrkiaDwGYfIyNTSfJ8gZcGkMYY6WUcBdrDnt62jpRuPfzrn7MrifNHc4tfwtx 8O+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WgoZ9+KpQrZR7tDkQXfhNUVljLBFuOfZzG3U49+7PlA=; b=SQSgfdoVXhgANMacZKBKZe07MGVry555XkkD800w5jNivx8JcrNeIayctON3sCWHIi OKgZwQED81/hjP1FnqxtVye4hHmHt7GIqEoPbAquuQw5sU85VUzoBYPq7uTMCMw26WnW sI8UKyWBZq0ZY9bebeLrJKmaweREYHsxVJl/EO6QCRlTSzUQWzpr17TZVDWFwU352027 QgvA6kA3SiBgfuMxxvu91K1v4G1HujR4uY63fOwHv5OkscVMwzYtR9qa5ZL8vEv8BPV+ PjwQ5VmbRXw+dCXpX3RW3x/KliTiXS8qEHRu3pEEd4GgSCfw2VrjgEm6AGNchdyY6wA/ ZmtQ== X-Gm-Message-State: AOAM530CbY21yvhdmlUcCn/wqMwWG8VjKg7hVbL6XGhXUpKTO9/e2sW8 j/P2aCxqZFC5AEj1P3geAao= X-Google-Smtp-Source: ABdhPJzxqc2t34kz5KgXjU7wEFsOAyUW6poe2t4eqVtMHyzkzQNDJDQfNcauVu19XLiaFPM/+9zQJw== X-Received: by 2002:a17:902:b7c9:b0:13e:e094:e24c with SMTP id v9-20020a170902b7c900b0013ee094e24cmr5196351plz.3.1633454419116; Tue, 05 Oct 2021 10:20:19 -0700 (PDT) Received: from localhost.localdomain ([2406:7400:63:f69:1127:b4ce:ef67:b718]) by smtp.gmail.com with ESMTPSA id f25sm18476722pge.7.2021.10.05.10.20.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Oct 2021 10:20:18 -0700 (PDT) From: Naveen Naidu To: bhelgaas@google.com, ruscur@russell.cc, oohall@gmail.com Cc: Naveen Naidu , linux-kernel-mentees@lists.linuxfoundation.org, skhan@linuxfoundation.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v4 4/8] PCI/DPC: Use pci_aer_clear_status() in dpc_process_error() Date: Tue, 5 Oct 2021 22:48:11 +0530 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org dpc_process_error() clears both AER fatal and non fatal status registers. Instead of clearing each status registers via a different function call use pci_aer_clear_status(). This helps clean up the code a bit. Signed-off-by: Naveen Naidu --- drivers/pci/pcie/dpc.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c index df3f3a10f8bc..faf4a1e77fab 100644 --- a/drivers/pci/pcie/dpc.c +++ b/drivers/pci/pcie/dpc.c @@ -288,8 +288,7 @@ void dpc_process_error(struct pci_dev *pdev) dpc_get_aer_uncorrect_severity(pdev, &info) && aer_get_device_error_info(pdev, &info)) { aer_print_error(pdev, &info); - pci_aer_clear_nonfatal_status(pdev); - pci_aer_clear_fatal_status(pdev); + pci_aer_clear_status(pdev); } } From patchwork Tue Oct 5 17:18:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naveen Naidu X-Patchwork-Id: 12537375 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 210A9C433EF for ; Tue, 5 Oct 2021 17:20:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 090CF61502 for ; Tue, 5 Oct 2021 17:20:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236719AbhJERWR (ORCPT ); Tue, 5 Oct 2021 13:22:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58342 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236793AbhJERWP (ORCPT ); Tue, 5 Oct 2021 13:22:15 -0400 Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A170AC061755; Tue, 5 Oct 2021 10:20:24 -0700 (PDT) Received: by mail-pf1-x42e.google.com with SMTP id c29so137216pfp.2; Tue, 05 Oct 2021 10:20:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=w+NqgXClATM2+U/6pmcAe6ttC1b34HIq6gozyTG/Fag=; b=GlH/iBtQPycG2+vBjfYb9YFZT0YC56AKQ1tVIynYkTBrvjpWGLWo08OltcrmtvYqIB 0jMRr3FkNUcmMQxd2pt/9uCc0CqGkPvYMwM0XNwKaTsh9ExY6AmpD7hjpNw6QuKFq5cS zwT6QC2ioPW/E4YzbKYad5iLMiCdSaCTyvyZqrFOz46tnl2GRqON1GXP/f3PnTd4TO7c 1fj1xkFehbw0B1+H3i4vdBlg6AuCcyBAjoVxIo2XgxE7U5Yz867IPV3RNkAMknj9Hmyd ltNU6p9WNhu0nxcT7+cZlG/vUiVw2am4cK9x7rGAryS1t+2vkwdoy73GxJXeLNjNsBfo E1QA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=w+NqgXClATM2+U/6pmcAe6ttC1b34HIq6gozyTG/Fag=; b=YZYGnnigql2E08tKaENCPRAzeUnmLrHPEHLa77Ohpa1cTdPjvzwZtmrEWyDoDpvGtg wqWQkqiO74K1dzr+d7qN5yVQTbB+3oVnpVEiQYsBeVQ8W0Q3loL68MvCXKBs8IUN2YYX RnOa0OQx2Fd0sxXGgshoAm7dZCyXPj64lL0SFPpc/CGrK4mdnmrLp0Lv9Ob5CdYTAdpf xhB4v08I4aXOr31HXEdbOOIN9dC0wzH7glfpNE5HkmHmRbotjpLZ5djFHx4d1K2T83Ql GhohRMPJAZ9fi3Fx72cEn/zAcDwOcPqjhb2qWJejkV5iG0EkLNI2Swf7wT84ib73TuSH NVNg== X-Gm-Message-State: AOAM530PaweOB5yg83w3ikwmnZxSn6/rkkBEgAKBkHAhYfcC4UGP+XX5 yoAqskp2ajFo8ZYUDaRS0nM= X-Google-Smtp-Source: ABdhPJxWGXtU11U8vgjFgtp/AwHRz21P2apHXPFWNX+czZ73dNSiwz+WnMvQIpDfwIBfgeFjid5dvA== X-Received: by 2002:a62:3802:0:b0:44c:776b:f555 with SMTP id f2-20020a623802000000b0044c776bf555mr6250036pfa.82.1633454424124; Tue, 05 Oct 2021 10:20:24 -0700 (PDT) Received: from localhost.localdomain ([2406:7400:63:f69:1127:b4ce:ef67:b718]) by smtp.gmail.com with ESMTPSA id f25sm18476722pge.7.2021.10.05.10.20.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Oct 2021 10:20:23 -0700 (PDT) From: Naveen Naidu To: bhelgaas@google.com, ruscur@russell.cc, oohall@gmail.com Cc: Naveen Naidu , linux-kernel-mentees@lists.linuxfoundation.org, skhan@linuxfoundation.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v4 5/8] PCI/DPC: Converge EDR and DPC Path of clearing AER registers Date: Tue, 5 Oct 2021 22:48:12 +0530 Message-Id: <0a443323ab64ba8c0fc6caa03ca56ecd4d038ea3.1633453452.git.naveennaidu479@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org In the EDR path, AER registers are cleared *after* DPC error event is processed. The process stack in EDR is: edr_handle_event() dpc_process_error() pci_aer_raw_clear_status() pcie_do_recovery() But in DPC path, AER status registers are cleared *while* processing the error. The process stack in DPC is: dpc_handler() dpc_process_error() pci_aer_clear_status() pcie_do_recovery() In EDR path, AER status registers are cleared irrespective of whether the error was an RP PIO or unmasked uncorrectable error. But in DPC, the AER status registers are cleared only when it's an unmasked uncorrectable error. This leads to two different behaviours for the same task (handling of DPC errors) in FFS systems and when native OS has control. Bring the same semantics for clearing the AER status register in EDR path and DPC path. Signed-off-by: Naveen Naidu --- drivers/pci/pcie/dpc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c index faf4a1e77fab..68899a3db126 100644 --- a/drivers/pci/pcie/dpc.c +++ b/drivers/pci/pcie/dpc.c @@ -288,7 +288,6 @@ void dpc_process_error(struct pci_dev *pdev) dpc_get_aer_uncorrect_severity(pdev, &info) && aer_get_device_error_info(pdev, &info)) { aer_print_error(pdev, &info); - pci_aer_clear_status(pdev); } } @@ -297,6 +296,7 @@ static irqreturn_t dpc_handler(int irq, void *context) struct pci_dev *pdev = context; dpc_process_error(pdev); + pci_aer_clear_status(pdev); /* We configure DPC so it only triggers on ERR_FATAL */ pcie_do_recovery(pdev, pci_channel_io_frozen, dpc_reset_link); From patchwork Tue Oct 5 17:18:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naveen Naidu X-Patchwork-Id: 12537377 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75362C433EF for ; Tue, 5 Oct 2021 17:21:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 50C8E61502 for ; Tue, 5 Oct 2021 17:21:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234938AbhJERXP (ORCPT ); Tue, 5 Oct 2021 13:23:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58592 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229936AbhJERXP (ORCPT ); Tue, 5 Oct 2021 13:23:15 -0400 Received: from mail-pg1-x52b.google.com (mail-pg1-x52b.google.com [IPv6:2607:f8b0:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A52AC061749; Tue, 5 Oct 2021 10:21:24 -0700 (PDT) Received: by mail-pg1-x52b.google.com with SMTP id a73so53751pge.0; Tue, 05 Oct 2021 10:21:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=CbcvGhiCynD7mHKxH0tIRuOHs7YtG8M/upRN3Jxhw2Y=; b=RM+c2HF83Fhr/m0gyoROb1iH08yBxt7kHrSWksmEaoetwFHtPSC1nLYL+fFddB02E9 4o/nA5lHj/sLhya6h2l9W2bq+Kb9fkgoT9SoTvO92zgraHZ8MemIMfbuFuGCBKsrBzHX rlK7QY75f1Rzk+VzWLf4PEG9Wn0I+oJlL4faGm8YMBHl5v/r12B7MeXwg/ERFQl+w4Pu ZtoRn7etk0fkfbqrywCoa6fQHFGpdkJSPLA+eQxahihdKMPwawJr2RIr3X4j0eIjQuKP 2Z16Luj9x2KPFy3eiFXu1bUqTT6VrpeJsIYG9iWpOFJzTiAgN5ywsePuUQ6rfQqIi1Ug OqGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CbcvGhiCynD7mHKxH0tIRuOHs7YtG8M/upRN3Jxhw2Y=; b=4cvX/oGgCK63eRsTj8gY6n6IvbafYJfgnw2IcIBs6NQ5+jfE9GyN8MBCeQyu4zHL88 XmJt5EhI2nCyTqVvo1O2dkHPbHbgNLkdECskEISrpNyOJt0YLCg/mk5rL4aSz+VCokmE e/Un1NCB9Y4dVjOeV7O+E//ZDnGtVh19L0MW5M11DwPA1WU1KQcegezaiaW8GnChtdQC hcGSV9D0kGHA+qWvE2dwTQfTJSA/GZ0uJKi5KvD2r/PK290OCgKiC+RjQTNKv8cdK4Og KflpoC4kThH9FNtuU+H8tapDYh6HKhPG6H7PKr7bH2H8lhNSzOFWwKg4aCym4M2RQFb5 tvyQ== X-Gm-Message-State: AOAM533tuDUFxQdVTUBVl9LCtHhWrRTAUfzXDX4Mw8XI06jpXbhJwd0L OqH0hPP5QXBG7JGVBiQYw/U= X-Google-Smtp-Source: ABdhPJy/ceGaGVek5/wXMk+/U4myUVApR2/O3OmqD7kGm3/0DyXcBtc+rTKSLVoWlM87QcZcfiJC5w== X-Received: by 2002:a63:a804:: with SMTP id o4mr16529137pgf.309.1633454483691; Tue, 05 Oct 2021 10:21:23 -0700 (PDT) Received: from localhost.localdomain ([2406:7400:63:f69:1127:b4ce:ef67:b718]) by smtp.gmail.com with ESMTPSA id f25sm18476722pge.7.2021.10.05.10.21.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Oct 2021 10:21:23 -0700 (PDT) From: Naveen Naidu To: bhelgaas@google.com, ruscur@russell.cc, oohall@gmail.com Cc: Naveen Naidu , linux-kernel-mentees@lists.linuxfoundation.org, skhan@linuxfoundation.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v4 6/8] PCI/AER: Clear error device AER registers in aer_irq() Date: Tue, 5 Oct 2021 22:48:14 +0530 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Converge the APEI path and native AER path of clearing the AER registers of the error device. In APEI path, the system firmware clears the AER registers before handing off the record to OS. But in "native AER" path, the execution path of clearing the AER register is as follows: aer_isr_one_error aer_print_port_info if (find_source_device()) aer_process_err_devices handle_error_source pci_write_config_dword(dev, PCI_ERR_COR_STATUS, ...) The above path has a bug, if the find_source_device() fails, AER registers are not cleared from the error device. This means, the error device will keep reporting the error again and again and would lead to message spew. Related Bug Report: https://lore.kernel.org/linux-pci/20151229155822.GA17321@localhost/ https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1521173 The above bug could be avoided, if the AER registers are cleared during the AER IRQ handler aer_irq(), which would provide guarantee that the AER error registers are always cleared. This is similar to how APEI handles these errors. The main aim is that: When an interrupt handler deals with a interrupt, it must *always* clear the source of the interrupt. Signed-off-by: Naveen Naidu --- drivers/pci/pci.h | 13 ++- drivers/pci/pcie/aer.c | 249 ++++++++++++++++++++++++++++------------- 2 files changed, 184 insertions(+), 78 deletions(-) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 9be7a966fda7..eb88d8bfeaf7 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -424,7 +424,6 @@ static inline bool pci_dev_is_added(const struct pci_dev *dev) #define AER_MAX_MULTI_ERR_DEVICES 5 /* Not likely to have more */ struct aer_err_info { - struct pci_dev *dev[AER_MAX_MULTI_ERR_DEVICES]; int error_dev_num; u16 id; @@ -440,6 +439,18 @@ struct aer_err_info { struct aer_header_log_regs tlp; /* TLP Header */ }; +/* Preliminary AER error information processed from Root port */ +struct aer_devices_err_info { + struct pci_dev *dev[AER_MAX_MULTI_ERR_DEVICES]; + struct aer_err_info err_info; +}; + +/* AER information associated with each error device */ +struct aer_dev_err_info { + struct pci_dev *dev; + struct aer_err_info err_info; +}; + int aer_get_device_error_info(struct pci_dev *dev, struct aer_err_info *info); void aer_print_error(struct pci_dev *dev, struct aer_err_info *info); #endif /* CONFIG_PCIEAER */ diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index 241ff361b43c..d3937f5384e4 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -36,6 +36,18 @@ #define AER_ERROR_SOURCES_MAX 128 +/* + * There can be 128 maximum error sources (AER_ERROR_SOURCES_MAX) and each + * error source can have maximum of 5 error devices (AER_MAX_MULTI_ERR_DEVICES) + * so the maximum error devices we can report is: + * + * AER_ERROR_DEVICES_MAX = AER_ERROR_SOURCES_MAX * AER_MAX_MULTI_ERR_DEVICES == (128 * 5) == 640 + * + * But since, the size in KFIFO should be a power of two, the closest value + * to 640 is 1024 + */ +# define AER_ERROR_DEVICES_MAX 1024 + #define AER_MAX_TYPEOF_COR_ERRS 16 /* as per PCI_ERR_COR_STATUS */ #define AER_MAX_TYPEOF_UNCOR_ERRS 27 /* as per PCI_ERR_UNCOR_STATUS*/ @@ -46,7 +58,7 @@ struct aer_err_source { struct aer_rpc { struct pci_dev *rpd; /* Root Port device */ - DECLARE_KFIFO(aer_fifo, struct aer_err_source, AER_ERROR_SOURCES_MAX); + DECLARE_KFIFO(aer_fifo, struct aer_dev_err_info, AER_ERROR_DEVICES_MAX); }; /* AER stats for the device */ @@ -803,14 +815,14 @@ void cper_print_aer(struct pci_dev *dev, int aer_severity, /** * add_error_device - list device to be handled - * @e_info: pointer to error info + * @e_dev: pointer to error info * @dev: pointer to pci_dev to be added */ -static int add_error_device(struct aer_err_info *e_info, struct pci_dev *dev) +static int add_error_device(struct aer_devices_err_info *e_dev, struct pci_dev *dev) { - if (e_info->error_dev_num < AER_MAX_MULTI_ERR_DEVICES) { - e_info->dev[e_info->error_dev_num] = pci_dev_get(dev); - e_info->error_dev_num++; + if (e_dev->err_info.error_dev_num < AER_MAX_MULTI_ERR_DEVICES) { + e_dev->dev[e_dev->err_info.error_dev_num] = pci_dev_get(dev); + e_dev->err_info.error_dev_num++; return 0; } return -ENOSPC; @@ -877,18 +889,18 @@ static bool is_error_source(struct pci_dev *dev, struct aer_err_info *e_info) static int find_device_iter(struct pci_dev *dev, void *data) { - struct aer_err_info *e_info = (struct aer_err_info *)data; + struct aer_devices_err_info *e_dev = (struct aer_devices_err_info *)data; - if (is_error_source(dev, e_info)) { + if (is_error_source(dev, &e_dev->err_info)) { /* List this device */ - if (add_error_device(e_info, dev)) { + if (add_error_device(e_dev, dev)) { /* We cannot handle more... Stop iteration */ /* TODO: Should print error message here? */ return 1; } /* If there is only a single error, stop iteration */ - if (!e_info->multi_error_valid) + if (!e_dev->err_info.multi_error_valid) return 1; } return 0; @@ -897,7 +909,7 @@ static int find_device_iter(struct pci_dev *dev, void *data) /** * find_source_device - search through device hierarchy for source device * @parent: pointer to Root Port pci_dev data structure - * @e_info: including detailed error information such like id + * @e_dev: including detailed error information such like id * * Return true if found. * @@ -907,26 +919,26 @@ static int find_device_iter(struct pci_dev *dev, void *data) * e_info->error_dev_num and e_info->dev[], based on the given information. */ static bool find_source_device(struct pci_dev *parent, - struct aer_err_info *e_info) + struct aer_devices_err_info *e_dev) { struct pci_dev *dev = parent; int result; /* Must reset in this function */ - e_info->error_dev_num = 0; + e_dev->err_info.error_dev_num = 0; /* Is Root Port an agent that sends error message? */ - result = find_device_iter(dev, e_info); + result = find_device_iter(dev, e_dev); if (result) return true; if (pci_pcie_type(parent) == PCI_EXP_TYPE_RC_EC) - pcie_walk_rcec(parent, find_device_iter, e_info); + pcie_walk_rcec(parent, find_device_iter, e_dev); else - pci_walk_bus(parent->subordinate, find_device_iter, e_info); + pci_walk_bus(parent->subordinate, find_device_iter, e_dev); - if (!e_info->error_dev_num) { - pci_info(parent, "can't find device of ID%04x\n", e_info->id); + if (!e_dev->err_info.error_dev_num) { + pci_info(parent, "can't find device of ID%04x\n", e_dev->err_info.id); return false; } return true; @@ -940,24 +952,42 @@ static bool find_source_device(struct pci_dev *parent, * Invoked when an error being detected by Root Port. */ static void handle_error_source(struct pci_dev *dev, struct aer_err_info *info) +{ + /* + * Correctable error does not need software intervention. + * No need to go through error recovery process. + */ + if (info->severity == AER_NONFATAL) + pcie_do_recovery(dev, pci_channel_io_normal, aer_root_reset); + else if (info->severity == AER_FATAL) + pcie_do_recovery(dev, pci_channel_io_frozen, aer_root_reset); + pci_dev_put(dev); +} + +/** + * clear_error_source_aer_registers - clear AER registers of the error source device + * @dev: pointer to pci_dev data structure of error source device + * @info: comprehensive error information + * + * Invoked when an error being detected by Root Port but before we handle the + * error. + */ +static void clear_error_source_aer_registers(struct pci_dev *dev, struct aer_err_info info) { int aer = dev->aer_cap; - if (info->severity == AER_CORRECTABLE) { - /* - * Correctable error does not need software intervention. - * No need to go through error recovery process. - */ + if (info.severity == AER_CORRECTABLE) { if (aer) pci_write_config_dword(dev, aer + PCI_ERR_COR_STATUS, - info->status); + info.status); if (pcie_aer_is_native(dev)) pcie_clear_device_status(dev); - } else if (info->severity == AER_NONFATAL) - pcie_do_recovery(dev, pci_channel_io_normal, aer_root_reset); - else if (info->severity == AER_FATAL) - pcie_do_recovery(dev, pci_channel_io_frozen, aer_root_reset); - pci_dev_put(dev); + } else if (info.severity == AER_NONFATAL) { + pci_aer_clear_nonfatal_status(dev); + } else if (info.severity == AER_FATAL) { + pci_aer_clear_fatal_status(dev); + } + } #ifdef CONFIG_ACPI_APEI_PCIEAER @@ -1093,70 +1123,112 @@ int aer_get_device_error_info(struct pci_dev *dev, struct aer_err_info *info) return 1; } -static inline void aer_process_err_devices(struct aer_err_info *e_info) -{ - int i; - - /* Report all before handle them, not to lost records by reset etc. */ - for (i = 0; i < e_info->error_dev_num && e_info->dev[i]; i++) { - if (aer_get_device_error_info(e_info->dev[i], e_info)) - aer_print_error(e_info->dev[i], e_info); - } - for (i = 0; i < e_info->error_dev_num && e_info->dev[i]; i++) { - if (aer_get_device_error_info(e_info->dev[i], e_info)) - handle_error_source(e_info->dev[i], e_info); - } -} - /** - * aer_isr_one_error - consume an error detected by root port - * @rpc: pointer to the root port which holds an error + * aer_find_corr_error_source_device - find the error source which detected the corrected error + * @rp: pointer to Root Port pci_dev data structure * @e_src: pointer to an error source + * @e_info: including detailed error information such like id + * + * Return true if found. + * + * Process the error information received at the Root Port, set these values + * in the aer_devices_err_info and find all the devices that are related to + * the error. */ -static void aer_isr_one_error(struct aer_rpc *rpc, - struct aer_err_source *e_src) +static bool aer_find_corr_error_source_device(struct pci_dev *rp, + struct aer_err_source *e_src, + struct aer_devices_err_info *e_info) { - struct pci_dev *pdev = rpc->rpd; - struct aer_err_info e_info; - - pci_rootport_aer_stats_incr(pdev, e_src); - - /* - * There is a possibility that both correctable error and - * uncorrectable error being logged. Report correctable error first. - */ if (e_src->status & PCI_ERR_ROOT_COR_RCV) { - e_info.id = ERR_COR_ID(e_src->id); - e_info.severity = AER_CORRECTABLE; + e_info->err_info.id = ERR_COR_ID(e_src->id); + e_info->err_info.severity = AER_CORRECTABLE; if (e_src->status & PCI_ERR_ROOT_MULTI_COR_RCV) - e_info.multi_error_valid = 1; + e_info->err_info.multi_error_valid = 1; else - e_info.multi_error_valid = 0; - aer_print_port_info(pdev, &e_info); + e_info->err_info.multi_error_valid = 0; - if (find_source_device(pdev, &e_info)) - aer_process_err_devices(&e_info); + if (!find_source_device(rp, e_info)) + return false; } + return true; +} +/** + * aer_find_uncorr_error_source_device - find the error source which detected the uncorrected error + * @rp: pointer to Root Port pci_dev data structure + * @e_src: pointer to an error source + * @e_info: including detailed error information such like id + * + * Return true if found. + * + * Process the error information received at the Root Port, set these values + * in the aer_devices_err_info and find all the devices that are related to + * the error. + */ +static bool aer_find_uncorr_error_source_device(struct pci_dev *rp, + struct aer_err_source *e_src, + struct aer_devices_err_info *e_info) +{ if (e_src->status & PCI_ERR_ROOT_UNCOR_RCV) { - e_info.id = ERR_UNCOR_ID(e_src->id); + e_info->err_info.id = ERR_UNCOR_ID(e_src->id); if (e_src->status & PCI_ERR_ROOT_FATAL_RCV) - e_info.severity = AER_FATAL; + e_info->err_info.severity = AER_FATAL; else - e_info.severity = AER_NONFATAL; + e_info->err_info.severity = AER_NONFATAL; if (e_src->status & PCI_ERR_ROOT_MULTI_UNCOR_RCV) - e_info.multi_error_valid = 1; + e_info->err_info.multi_error_valid = 1; else - e_info.multi_error_valid = 0; + e_info->err_info.multi_error_valid = 0; + + if (!find_source_device(rp, e_info)) + return false; + } - aer_print_port_info(pdev, &e_info); + return true; +} - if (find_source_device(pdev, &e_info)) - aer_process_err_devices(&e_info); +/** + * aer_isr_one_error - consume an error detected by root port + * @rp: pointer to Root Port pci_dev data structure + * @e_dev: pointer to an error device + */ +static void aer_isr_one_error(struct pci_dev *rp, struct aer_dev_err_info *e_dev) +{ + aer_print_port_info(rp, &e_dev->err_info); + aer_print_error(e_dev->dev, &e_dev->err_info); + handle_error_source(e_dev->dev, &e_dev->err_info); +} + +static bool aer_add_err_devices_to_queue(struct aer_rpc *rpc, + struct aer_devices_err_info *e_info) +{ + int i; + struct aer_dev_err_info *e_dev; + + e_dev = kzalloc(sizeof(*e_dev), GFP_ATOMIC); + if (!e_dev) + return false; + + for (i = 0; i < e_info->err_info.error_dev_num && e_info->dev[i]; i++) { + e_dev->err_info = e_info->err_info; + e_dev->dev = e_info->dev[i]; + + /* + * Store the AER register information for each error device on + * the queue + */ + if (aer_get_device_error_info(e_dev->dev, &e_dev->err_info)) { + if (!kfifo_put(&rpc->aer_fifo, *e_dev)) + return false; + + clear_error_source_aer_registers(e_dev->dev, e_dev->err_info); + } } + + return true; } /** @@ -1170,13 +1242,13 @@ static irqreturn_t aer_isr(int irq, void *context) { struct pcie_device *dev = (struct pcie_device *)context; struct aer_rpc *rpc = get_service_data(dev); - struct aer_err_source e_src; + struct aer_dev_err_info e_dev; if (kfifo_is_empty(&rpc->aer_fifo)) return IRQ_NONE; - while (kfifo_get(&rpc->aer_fifo, &e_src)) - aer_isr_one_error(rpc, &e_src); + while (kfifo_get(&rpc->aer_fifo, &e_dev)) + aer_isr_one_error(rpc->rpd, &e_dev); return IRQ_HANDLED; } @@ -1194,6 +1266,11 @@ static irqreturn_t aer_irq(int irq, void *context) struct pci_dev *rp = rpc->rpd; int aer = rp->aer_cap; struct aer_err_source e_src = {}; + struct aer_devices_err_info *e_info; + + e_info = kzalloc(sizeof(*e_info), GFP_ATOMIC); + if (!e_info) + return IRQ_NONE; pci_read_config_dword(rp, aer + PCI_ERR_ROOT_STATUS, &e_src.status); if (!(e_src.status & (PCI_ERR_ROOT_UNCOR_RCV|PCI_ERR_ROOT_COR_RCV))) @@ -1202,8 +1279,26 @@ static irqreturn_t aer_irq(int irq, void *context) pci_read_config_dword(rp, aer + PCI_ERR_ROOT_ERR_SRC, &e_src.id); pci_write_config_dword(rp, aer + PCI_ERR_ROOT_STATUS, e_src.status); - if (!kfifo_put(&rpc->aer_fifo, e_src)) - return IRQ_HANDLED; + pci_rootport_aer_stats_incr(rp, &e_src); + + /* + * There is a possibility that both correctable error and + * uncorrectable error are being logged. Find the devices which caused + * correctable errors first so that they can be added to the queue first + * and will be reported first. + * + * Before adding the error device to the queue to be handled, clear the + * AER status registers. + */ + if (aer_find_corr_error_source_device(rp, &e_src, e_info)) { + if (!aer_add_err_devices_to_queue(rpc, e_info)) + return IRQ_NONE; + } + + if (aer_find_uncorr_error_source_device(rp, &e_src, e_info)) { + if (!aer_add_err_devices_to_queue(rpc, e_info)) + return IRQ_NONE; + } return IRQ_WAKE_THREAD; } From patchwork Tue Oct 5 17:18:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naveen Naidu X-Patchwork-Id: 12537381 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E736C433EF for ; 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Tue, 05 Oct 2021 10:21:28 -0700 (PDT) Received: from localhost.localdomain ([2406:7400:63:f69:1127:b4ce:ef67:b718]) by smtp.gmail.com with ESMTPSA id f25sm18476722pge.7.2021.10.05.10.21.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Oct 2021 10:21:27 -0700 (PDT) From: Naveen Naidu To: bhelgaas@google.com, ruscur@russell.cc, oohall@gmail.com Cc: Naveen Naidu , linux-kernel-mentees@lists.linuxfoundation.org, skhan@linuxfoundation.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v4 7/8] PCI/ERR: Remove redundant clearing of AER register in pcie_do_recovery() Date: Tue, 5 Oct 2021 22:48:15 +0530 Message-Id: <326a608cf8ca983442849045c8c7bf95fc2ba084.1633453452.git.naveennaidu479@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org pcie_do_recovery() is shared across the following paths: - ACPI APEI - Native AER path - EDR - DPC ACPI APEI ========== ghes_handle_aer() aer_recover_queue() kfifo_in_spinlocked(aer_recover_ring) aer_recover_work_func() while (kfifo_get(aer_recover_ring)) pcie_do_recovery() In this path the system firmware clears the AER registers before handing off the record to the OS in ghes_handle_aer() Native AER ========== aer_irq() aer_add_err_devices_to_queue() kfifo_put(&rpc->aer_fifo, *e_dev) clear_error_source_aer_registers() <---- AER registers are cleard aer_isr() aer_isr_one_error() handle_error_source() pcie_do_recovery() The AER registers are cleared during the handling of IRQ, i.e before we the recovery starts. DPC ===== dpc_handler() dpc_process_error() pci_aer_clear_status() <---- AER registers are cleared pcie_do_recovery() EDR ==== edr_handle_event() dpc_process_error() pci_aer_raw_clear_status() <---- AER registers are cleared pcie_do_recovery() In all the above paths, the AER registers are cleared before pcie_do_recovery(). The non fatal status AER registers are again cleared in pcie_do_recovery(). This is redundant. Remove redundant clearing of AER register in pcie_do_recovery() Signed-off-by: Naveen Naidu --- drivers/pci/pcie/err.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c index b576aa890c76..fe04b0ae22f4 100644 --- a/drivers/pci/pcie/err.c +++ b/drivers/pci/pcie/err.c @@ -231,14 +231,11 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, /* * If we have native control of AER, clear error status in the device - * that detected the error. If the platform retained control of AER, - * it is responsible for clearing this status. In that case, the - * signaling device may not even be visible to the OS. + * that detected the error. */ - if (host->native_aer || pcie_ports_native) { + if (host->native_aer || pcie_ports_native) pcie_clear_device_status(dev); - pci_aer_clear_nonfatal_status(dev); - } + pci_info(bridge, "device recovery successful\n"); return status; From patchwork Tue Oct 5 17:18:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naveen Naidu X-Patchwork-Id: 12537379 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC913C433FE for ; Tue, 5 Oct 2021 17:21:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B7832611CA for ; Tue, 5 Oct 2021 17:21:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235954AbhJERX1 (ORCPT ); Tue, 5 Oct 2021 13:23:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58630 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236814AbhJERXY (ORCPT ); Tue, 5 Oct 2021 13:23:24 -0400 Received: from mail-pg1-x532.google.com (mail-pg1-x532.google.com [IPv6:2607:f8b0:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 024A0C061749; Tue, 5 Oct 2021 10:21:33 -0700 (PDT) Received: by mail-pg1-x532.google.com with SMTP id q201so7757707pgq.12; Tue, 05 Oct 2021 10:21:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8KHMqaM1V3DuTRnE2HWYRtLECuoot+YO1EBfUwWqTQQ=; b=psgJCp6X1yB83VVSO7eBoBiGgR2hLAh9hXsh/pvHeYNpO9ILUMqx8zmygPefPR++LN 37nY1zg6A1xjUPlJ4ST/RxSfmI6+pYI1rVL23SNpOWJ8ThgLh+AiKfCRzcmNb/5SEFMx nSe55aFdaSygqdPMdu6mDZHknajlF/MtETA9yH6qhuAcmxm36cLFcFxVIOjmAs9lKvkb XdzLP5cPIFdFqOdbM+QP4834U/fjH2M0vu9VcBmH/8OHg7Ut4gsuW9gxQrWE55B5C41D LeKDmyRn1H3w/vD45HFVJRREhj+Rjv1xDZuqXwzx9K8xKV8DvlIMt+PrL2yhw8rmApiH LqWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8KHMqaM1V3DuTRnE2HWYRtLECuoot+YO1EBfUwWqTQQ=; b=j/+7EcKKYus58UEz4DTWY4Ti/03pLGdwZW5EGZ+OmXOZcff11f+js5cmSxyXHKFE1a tFbh6Zc+agbvnV/qtHF8Elb4ATp1Y0fMxyR84KKMXyoU9zBvPtT+oXl9bbsjWNfKy4Od YaobIP36Isew6dbbcpPfh+xwjMUxZdFiTkWdi5Fao4IhYANIf/AFNQg2/GQFeA8KN32M GdQm2RFn+YrlporVcq7l34fIe6PagR7ApvRayZtcy1b2udUJIGd/CSDduK6ia9hUNoe2 DXLiFjRGlJ1jLGYH0RpzeUBKdMmLjJ3+tBGm81S37djUsI65qvWLvjXnnx+I48wiuQzw crAQ== X-Gm-Message-State: AOAM530GZDYzAtFcHS1a9rs55kRvLUoa0OgcbZUP8MOvfeuir/prDHTn JogOYja8injXuwuW97Ouv48= X-Google-Smtp-Source: ABdhPJyXbn7O+swbM9D8yH4827BLXqU74mQatvY986DG0V0KKiyfLQiRw50GqimEA4wIGTeafWQ/3g== X-Received: by 2002:aa7:9e9a:0:b0:447:a1be:ee48 with SMTP id p26-20020aa79e9a000000b00447a1beee48mr32003271pfq.48.1633454492516; Tue, 05 Oct 2021 10:21:32 -0700 (PDT) Received: from localhost.localdomain ([2406:7400:63:f69:1127:b4ce:ef67:b718]) by smtp.gmail.com with ESMTPSA id f25sm18476722pge.7.2021.10.05.10.21.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Oct 2021 10:21:32 -0700 (PDT) From: Naveen Naidu To: bhelgaas@google.com, ruscur@russell.cc, oohall@gmail.com Cc: Naveen Naidu , linux-kernel-mentees@lists.linuxfoundation.org, skhan@linuxfoundation.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v4 8/8] PCI/AER: Include DEVCTL in aer_print_error() Date: Tue, 5 Oct 2021 22:48:16 +0530 Message-Id: <18cad894ac3210af806104b3b4fa6a8cf1554ac8.1633453452.git.naveennaidu479@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Print the contents of Device Control Register of the device which detected the error. This might help in faster error diagnosis. Sample output from dummy error injected by aer-inject: pcieport 0000:00:03.0: AER: Corrected error received: 0000:00:03.0 pcieport 0000:00:03.0: PCIe Bus Error: severity=Corrected, type=Data Link Layer, (Receiver) pcieport 0000:00:03.0: device [1b36:000c] error status/mask=00000040/0000e000, devctl=0x000f <-- devctl added to the error log pcieport 0000:00:03.0: [ 6] BadTLP Signed-off-by: Naveen Naidu --- drivers/pci/pci.h | 2 ++ drivers/pci/pcie/aer.c | 10 ++++++++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index eb88d8bfeaf7..48ed7f91113b 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -437,6 +437,8 @@ struct aer_err_info { u32 status; /* COR/UNCOR Error Status */ u32 mask; /* COR/UNCOR Error Mask */ struct aer_header_log_regs tlp; /* TLP Header */ + + u16 devctl; }; /* Preliminary AER error information processed from Root port */ diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index d3937f5384e4..fdeef9deb016 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -729,8 +729,8 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info) aer_error_severity_string[info->severity], aer_error_layer[layer], aer_agent_string[agent]); - pci_printk(level, dev, " device [%04x:%04x] error status/mask=%08x/%08x\n", - dev->vendor, dev->device, info->status, info->mask); + pci_printk(level, dev, " device [%04x:%04x] error status/mask=%08x/%08x, devctl=%#06x\n", + dev->vendor, dev->device, info->status, info->mask, info->devctl); __aer_print_error(dev, info); @@ -1083,6 +1083,12 @@ int aer_get_device_error_info(struct pci_dev *dev, struct aer_err_info *info) if (!aer) return 0; + /* + * Cache the value of Device Control Register now, because later the + * device might not be available + */ + pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &info->devctl); + if (info->severity == AER_CORRECTABLE) { pci_read_config_dword(dev, aer + PCI_ERR_COR_STATUS, &info->status);