From patchwork Wed Oct 6 22:35:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12540715 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63405C433FE for ; Wed, 6 Oct 2021 22:36:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4F7D560232 for ; Wed, 6 Oct 2021 22:36:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239841AbhJFWid (ORCPT ); Wed, 6 Oct 2021 18:38:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38282 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239500AbhJFWiY (ORCPT ); Wed, 6 Oct 2021 18:38:24 -0400 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [IPv6:2a00:1450:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5874AC061755; Wed, 6 Oct 2021 15:36:31 -0700 (PDT) Received: by mail-ed1-x52d.google.com with SMTP id z20so15407934edc.13; Wed, 06 Oct 2021 15:36:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=HISJKp5s6i0STFRR4xQ5zmfLE/DXCkjj2PuSFsQHH2w=; b=UoGexV3EpRH+e/p7azhBHSe7XKtaojtvjpgV3trJCJZfRlMBAfTH8tp6S3c7kUEO18 IQ90nWGab5GvHRjXDLPcrQqymi4DTb44aMFix+oG2R/PZJl0UB7jjqGQSxyUQ30++gQR PqoH46N2t2At3JfFlxEnRHZe2wwe9ZR5Kq0fUQaeVFjuB/GblTOg/dUvgC3PIvAfjmx5 RcIMi9JeP0rw2xG/qtBeQHQSFKHsKjrOR7p0olo/N8mjX77soXtAMRArM4BMRk3gs2aV JK/nImWjYuCbaznu5lGk5RpGSIWtKaOkXgdNvkr2IX02vqnvJrRBz0G0PLQEQ8o/4CF5 Uqbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HISJKp5s6i0STFRR4xQ5zmfLE/DXCkjj2PuSFsQHH2w=; b=DudD9FBVg1FL5Ccdn67f/joEnoNG6YVesQ9sQQxB7Gvy3sp5joczG3MsMf7R4XCQI0 48xfM7Jt8snkzDaQ3Kt0+xNb3AlJFNtcjNv17NoX/oV+CGIYaQVL5BMXHzisAazBg2TT 2CGeY0efhqXoQ97ngecw9zy5IpT4AhdmZn10qhZPZPglrqAlktoiC4kmFTP2DAAfbwVR Vqy6b/s2sGogTrdf6Tq1sP9Gp1k6wJl996cLGAiF/AoNCEbBlwenegrsZgPrade6y1MP vV1o6wPC4d8huOV/1MZDRUWnXuQ2Vuj4MVv1Gr6Xl4Wfhlr9MuvydEF472NMIciaLKXC HAmw== X-Gm-Message-State: AOAM532yPCn8m1XL0KBA128WZBDPoC42rNzBXIoBS5rV5R0LgdMBxeHd 3lh+lovqfBaJ1DI3DhR2g1s= X-Google-Smtp-Source: ABdhPJyzvsPPxKzaneQtINyXjNafdWHFssPu2i3PYXI+QwNuqpfSgK63Mlx4BoooxMb71yneV5tn6A== X-Received: by 2002:a05:6402:2906:: with SMTP id ee6mr1250781edb.170.1633559789771; Wed, 06 Oct 2021 15:36:29 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id z8sm9462678ejd.94.2021.10.06.15.36.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 15:36:29 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , Ansuel Smith , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH 01/13] drivers: net: phy: at803x: fix resume for QCA8327 phy Date: Thu, 7 Oct 2021 00:35:51 +0200 Message-Id: <20211006223603.18858-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211006223603.18858-1-ansuelsmth@gmail.com> References: <20211006223603.18858-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From Documentation phy resume triggers phy reset and restart auto-negotiation. Add a dedicated function to wait reset to finish as it was notice a regression where port sometime are not reliable after a suspend/resume session. The reset wait logic is copied from phy_poll_reset. Add dedicated suspend function to use genphy_suspend only with QCA8337 phy and set only additional debug settings for QCA8327. With more test it was reported that QCA8327 doesn't proprely support this mode and using this cause the unreliability of the switch ports, especially the malfunction of the port0. Fixes: 52a6cdbe43a3 ("net: phy: at803x: add resume/suspend function to qca83xx phy") Signed-off-by: Ansuel Smith --- drivers/net/phy/at803x.c | 75 +++++++++++++++++++++++++++++++++++----- 1 file changed, 66 insertions(+), 9 deletions(-) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index 3feee4d59030..9090f384c29e 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -92,9 +92,14 @@ #define AT803X_DEBUG_REG_5 0x05 #define AT803X_DEBUG_TX_CLK_DLY_EN BIT(8) +#define AT803X_DEBUG_REG_HIB_CTRL 0x0b +#define AT803X_DEBUG_HIB_CTRL_SEL_RST_80U BIT(10) +#define AT803X_DEBUG_HIB_CTRL_EN_ANY_CHANGE BIT(13) + #define AT803X_DEBUG_REG_3C 0x3C -#define AT803X_DEBUG_REG_3D 0x3D +#define AT803X_DEBUG_REG_GREEN 0x3D +#define AT803X_DEBUG_GATE_CLK_IN1000 BIT(6) #define AT803X_DEBUG_REG_1F 0x1F #define AT803X_DEBUG_PLL_ON BIT(2) @@ -1295,7 +1300,7 @@ static int qca83xx_config_init(struct phy_device *phydev) /* For 100M waveform */ at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_0, 0x02ea); /* Turn on Gigabit clock */ - at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_3D, 0x68a0); + at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_GREEN, 0x68a0); break; case 2: @@ -1303,7 +1308,7 @@ static int qca83xx_config_init(struct phy_device *phydev) fallthrough; case 4: phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_AZ_DEBUG, 0x803f); - at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_3D, 0x6860); + at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_GREEN, 0x6860); at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_5, 0x2c46); at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_3C, 0x6000); break; @@ -1312,6 +1317,58 @@ static int qca83xx_config_init(struct phy_device *phydev) return 0; } +static int qca83xx_resume(struct phy_device *phydev) +{ + int ret, val; + + /* Skip reset if not suspended */ + if (!phydev->suspended) + return 0; + + /* Reinit the port, reset values set by suspend */ + qca83xx_config_init(phydev); + + /* Reset the port on port resume */ + phy_set_bits(phydev, MII_BMCR, BMCR_RESET | BMCR_ANENABLE); + + /* On resume from suspend the switch execute a reset and + * restart auto-negotiation. Wait for reset to complete. + */ + ret = phy_read_poll_timeout(phydev, MII_BMCR, val, !(val & BMCR_RESET), + 50000, 600000, true); + if (ret) + return ret; + + msleep(1); + + return 0; +} + +static int qca83xx_suspend(struct phy_device *phydev) +{ + u16 mask = 0; + + /* Only QCA8337 support actual suspend. + * QCA8327 cause port unreliability when phy suspend + * is set. + */ + if (phydev->drv->phy_id == QCA8337_PHY_ID) { + genphy_suspend(phydev); + } else { + mask |= ~(BMCR_SPEED1000 | BMCR_FULLDPLX); + phy_modify(phydev, MII_BMCR, mask, 0); + } + + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_GREEN, + AT803X_DEBUG_GATE_CLK_IN1000, 0); + + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_HIB_CTRL, + AT803X_DEBUG_HIB_CTRL_EN_ANY_CHANGE | + AT803X_DEBUG_HIB_CTRL_SEL_RST_80U, 0); + + return 0; +} + static struct phy_driver at803x_driver[] = { { /* Qualcomm Atheros AR8035 */ @@ -1421,8 +1478,8 @@ static struct phy_driver at803x_driver[] = { .get_sset_count = at803x_get_sset_count, .get_strings = at803x_get_strings, .get_stats = at803x_get_stats, - .suspend = genphy_suspend, - .resume = genphy_resume, + .suspend = qca83xx_suspend, + .resume = qca83xx_resume, }, { /* QCA8327-A from switch QCA8327-AL1A */ .phy_id = QCA8327_A_PHY_ID, @@ -1436,8 +1493,8 @@ static struct phy_driver at803x_driver[] = { .get_sset_count = at803x_get_sset_count, .get_strings = at803x_get_strings, .get_stats = at803x_get_stats, - .suspend = genphy_suspend, - .resume = genphy_resume, + .suspend = qca83xx_suspend, + .resume = qca83xx_resume, }, { /* QCA8327-B from switch QCA8327-BL1A */ .phy_id = QCA8327_B_PHY_ID, @@ -1451,8 +1508,8 @@ static struct phy_driver at803x_driver[] = { .get_sset_count = at803x_get_sset_count, .get_strings = at803x_get_strings, .get_stats = at803x_get_stats, - .suspend = genphy_suspend, - .resume = genphy_resume, + .suspend = qca83xx_suspend, + .resume = qca83xx_resume, }, }; module_phy_driver(at803x_driver); From patchwork Wed Oct 6 22:35:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12540713 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAE19C433EF for ; Wed, 6 Oct 2021 22:36:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B85CA60232 for ; Wed, 6 Oct 2021 22:36:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239819AbhJFWic (ORCPT ); Wed, 6 Oct 2021 18:38:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38290 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239578AbhJFWiZ (ORCPT ); Wed, 6 Oct 2021 18:38:25 -0400 Received: from mail-ed1-x530.google.com (mail-ed1-x530.google.com [IPv6:2a00:1450:4864:20::530]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 64E09C061760; Wed, 6 Oct 2021 15:36:32 -0700 (PDT) Received: by mail-ed1-x530.google.com with SMTP id d8so15483094edx.9; Wed, 06 Oct 2021 15:36:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=g41bRmxOJzxf37gujF+dBsiTfsshpCuEfZ9knc9cRxk=; b=fWiMxU135ypyIHCoKloamcCrc7xBoYEkCOh3A+m98rem6oZVeMyzh0v9jiRYdgpdK8 G46e5b24NyvOsIi7BI5NWpzohxOt3jJooNA4uVIzdKMm8W0S7fmGTD794q8SDzovTyYM eocQwZg+gOhIodwyKpzgtBWZoDNhI+2vrub8C6UilW0Sd2b/U6ox5/Kr0CHC0Z9BpWvB 2QDFjgBN0Emj0yK8Dp/fdIKwIccJmjGej1ENilD30L2WgM+ij35g4xrs/pOsv1OpWYAK a6tpPo0AGwpcDnQeFNh+1clpOnrq08IZMOaN1zBUGFKYyY3rkKSJnz4X+279kvuyZCZ4 Ly5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=g41bRmxOJzxf37gujF+dBsiTfsshpCuEfZ9knc9cRxk=; b=fXNGZ0CX7JoDYeLEbX86EMW33vZlS00TLu930jpUHrdg3CVBuzgaTYkORRvND3L4NV koDT5hVz5/EseDBDketdTo82hwBagTbXJD+I7AvZ/O1HV3N8j8yCQjijhUWqkgfg401a YSfTclO18EFJ9oIUjocnQJfGZodfmXSKj2bqEwEAz3d/97yuPI/LDcD7gVV+z3S2ncml O3jgVu41zWFM1aHBieCXnTjW92Jg86Y2tgCM0pyas/TFtKBH4cc1MGE2f9FrQSWvmMhj 1EqiMoZvAWRciBFwEC8cpR7jxecrNqgVJloRz2vE7BABGf45GfEPK/4sF7sLZg9Gt0rZ ZoVg== X-Gm-Message-State: AOAM532aciFwKtRBHhdd0dt/oaFfzChhE3ubovce3Z1M9QIBNJ0q+SxE OirmTaldhQYmQbT+uGhp09A= X-Google-Smtp-Source: ABdhPJxx8sQ8zC+dTpr97zG/jYinMkxeaMUyk3vFYKHfjuz+JXxEbJNUvthFKsJ1UOkTg2OieHMrIQ== X-Received: by 2002:a17:906:c246:: with SMTP id bl6mr1169200ejb.80.1633559790862; Wed, 06 Oct 2021 15:36:30 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id z8sm9462678ejd.94.2021.10.06.15.36.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 15:36:30 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , Ansuel Smith , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH 02/13] drivers: net: phy: at803x: add DAC amplitude fix for 8327 phy Date: Thu, 7 Oct 2021 00:35:52 +0200 Message-Id: <20211006223603.18858-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211006223603.18858-1-ansuelsmth@gmail.com> References: <20211006223603.18858-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org QCA8327 internal phy require DAC amplitude adjustement set to +6% with 100m speed. Also add additional define to report a change of the same reg in QCA8337. (different scope it does set 1000m voltage) Add link_change_notify function to set the proper amplitude adjustement on PHY_RUNNING state and disable on any other state. Fixes: c6bcec0d6928 ("net: phy: at803x: add support for qca 8327 A variant internal phy") Signed-off-by: Ansuel Smith --- drivers/net/phy/at803x.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index 9090f384c29e..71237a4e85a3 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -87,6 +87,8 @@ #define AT803X_PSSR_MR_AN_COMPLETE 0x0200 #define AT803X_DEBUG_REG_0 0x00 +#define QCA8327_DEBUG_MANU_CTRL_EN BIT(2) +#define QCA8337_DEBUG_MANU_CTRL_EN GENMASK(3, 2) #define AT803X_DEBUG_RX_CLK_DLY_EN BIT(15) #define AT803X_DEBUG_REG_5 0x05 @@ -1314,9 +1316,37 @@ static int qca83xx_config_init(struct phy_device *phydev) break; } + /* QCA8327 require DAC amplitude adjustment for 100m set to +6%. + * Disable on init and enable only with 100m speed following + * qca original source code. + */ + if (phydev->drv->phy_id == QCA8327_A_PHY_ID || + phydev->drv->phy_id == QCA8327_B_PHY_ID) + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, + QCA8327_DEBUG_MANU_CTRL_EN, 0); + return 0; } +static void qca83xx_link_change_notify(struct phy_device *phydev) +{ + /* QCA8337 doesn't require DAC Amplitude adjustement */ + if (phydev->drv->phy_id == QCA8337_PHY_ID) + return; + + /* Set DAC Amplitude adjustment to +6% for 100m on link running */ + if (phydev->state == PHY_RUNNING) { + if (phydev->speed == SPEED_100) + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, + QCA8327_DEBUG_MANU_CTRL_EN, + QCA8327_DEBUG_MANU_CTRL_EN); + } else { + /* Reset DAC Amplitude adjustment */ + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, + QCA8327_DEBUG_MANU_CTRL_EN, 0); + } +} + static int qca83xx_resume(struct phy_device *phydev) { int ret, val; @@ -1471,6 +1501,7 @@ static struct phy_driver at803x_driver[] = { .phy_id_mask = QCA8K_PHY_ID_MASK, .name = "Qualcomm Atheros 8337 internal PHY", /* PHY_GBIT_FEATURES */ + .link_change_notify = qca83xx_link_change_notify, .probe = at803x_probe, .flags = PHY_IS_INTERNAL, .config_init = qca83xx_config_init, @@ -1486,6 +1517,7 @@ static struct phy_driver at803x_driver[] = { .phy_id_mask = QCA8K_PHY_ID_MASK, .name = "Qualcomm Atheros 8327-A internal PHY", /* PHY_GBIT_FEATURES */ + .link_change_notify = qca83xx_link_change_notify, .probe = at803x_probe, .flags = PHY_IS_INTERNAL, .config_init = qca83xx_config_init, @@ -1501,6 +1533,7 @@ static struct phy_driver at803x_driver[] = { .phy_id_mask = QCA8K_PHY_ID_MASK, .name = "Qualcomm Atheros 8327-B internal PHY", /* PHY_GBIT_FEATURES */ + .link_change_notify = qca83xx_link_change_notify, .probe = at803x_probe, .flags = PHY_IS_INTERNAL, .config_init = qca83xx_config_init, From patchwork Wed Oct 6 22:35:53 2021 Content-Type: text/plain; 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id z8sm9462678ejd.94.2021.10.06.15.36.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 15:36:31 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , Ansuel Smith , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH 03/13] drivers: net: phy: at803x: enable prefer master for 83xx internal phy Date: Thu, 7 Oct 2021 00:35:53 +0200 Message-Id: <20211006223603.18858-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211006223603.18858-1-ansuelsmth@gmail.com> References: <20211006223603.18858-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From original QCA source code the port was set to prefer master as port type in 1000BASE-T mode. Apply the same settings also here. Signed-off-by: Ansuel Smith Reviewed-by: Andrew Lunn --- drivers/net/phy/at803x.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index 71237a4e85a3..851d47b8a331 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -1325,6 +1325,9 @@ static int qca83xx_config_init(struct phy_device *phydev) at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, QCA8327_DEBUG_MANU_CTRL_EN, 0); + /* Following original QCA sourcecode set port to prefer master */ + phy_set_bits(phydev, MII_CTRL1000, CTL1000_PREFER_MASTER); + return 0; } From patchwork Wed Oct 6 22:35:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12540717 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7ED6AC433F5 for ; Wed, 6 Oct 2021 22:36:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 676CB60C4C for ; Wed, 6 Oct 2021 22:36:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239869AbhJFWif (ORCPT ); Wed, 6 Oct 2021 18:38:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38302 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239686AbhJFWi1 (ORCPT ); Wed, 6 Oct 2021 18:38:27 -0400 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4773FC061753; Wed, 6 Oct 2021 15:36:34 -0700 (PDT) Received: by mail-ed1-x52a.google.com with SMTP id v18so15528432edc.11; Wed, 06 Oct 2021 15:36:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=/CIPRmzb6ZyUl4M4QyOCrm9NUv5uQgk5oWps89iR9OQ=; b=pBAp5caXt4AsK/X9WuW1cSfkRaPGh0pBBt65aiFHBonTqDZrduanp1t4K2sJzrn+Df qhqLiRXdViUy6gnWBPzl13Fi8IaTeNzAFQtRvxbjC5ZFD2xqk0c7XYFfYqUAUxT5s/ts +GwqwLLkldYZvidSpNT46cl1jm0rPHFIKa0RFcuhyY3rsivqfWCus0/CJne891Yd6FfY lELEnNkfBjXI+fdvJkBaBYfg0FlXm0PJOgt1bkknPQgOeqvow7GBtVEpUh9zE4mUfFzq ZihLYHCgrcKOsnEvWYwe2xVGE7Izngc7VhugXTk2a3YFGmrly74JgIRROXnGGvO4MGSi nhjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/CIPRmzb6ZyUl4M4QyOCrm9NUv5uQgk5oWps89iR9OQ=; b=IVWoGzwJUOK8VPH7fWDF0STTto5xi67NgsMoTXvLdtC/PCSbvp5KolDHtnkRWsvvRn 9waXHQM+H0w2r5jdpamc2e55r3qjl/bakSXze9ZSmufy0FNCF/EMyvnM2p1wLq7WYpJ3 cqQnRMXsoCO6JbNxR6NWjPKOvl1Jmb9RkOmfljGFCAB0UrKMq8hnv1+38AB0lfCFiqKn Clx+wM/MPjaU0WHRQE+fgGOJ2Ba69tjpKpI7PKVVCRwcO2vbdzqy1DT0kY8TWWhd7+yX MxEp3wMcl1DMqLROd5f2H3DSvWs5Isy25QYt+ggu144XcYObj/7YYBz6z2QxZedb2hFP RRow== X-Gm-Message-State: AOAM532ze36cjPxNeE4KJepaDUyTDABgJoUJkNhbLIY0LxfaGtwUoCnR dHIud//Htq8M2JO1xP7ib30= X-Google-Smtp-Source: ABdhPJyaXa8l7MGQdSa2wKvjGkXdp5iSzOPp0HiTMRas5ukG2uqEeGp/EFlJf48DG4gHxEfTUyjCtw== X-Received: by 2002:a50:fc8e:: with SMTP id f14mr1212078edq.87.1633559792785; Wed, 06 Oct 2021 15:36:32 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id z8sm9462678ejd.94.2021.10.06.15.36.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 15:36:32 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , Ansuel Smith , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH 04/13] drivers: net: phy: at803x: better describe debug regs Date: Thu, 7 Oct 2021 00:35:54 +0200 Message-Id: <20211006223603.18858-5-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211006223603.18858-1-ansuelsmth@gmail.com> References: <20211006223603.18858-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Give a name to known debug regs from Documentation instead of using unknown hex values. Signed-off-by: Ansuel Smith Reviewed-by: Andrew Lunn --- drivers/net/phy/at803x.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index 851d47b8a331..f40f17a632ad 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -86,12 +86,12 @@ #define AT803X_PSSR 0x11 /*PHY-Specific Status Register*/ #define AT803X_PSSR_MR_AN_COMPLETE 0x0200 -#define AT803X_DEBUG_REG_0 0x00 +#define AT803X_DEBUG_ANALOG_TEST_CTRL 0x00 #define QCA8327_DEBUG_MANU_CTRL_EN BIT(2) #define QCA8337_DEBUG_MANU_CTRL_EN GENMASK(3, 2) #define AT803X_DEBUG_RX_CLK_DLY_EN BIT(15) -#define AT803X_DEBUG_REG_5 0x05 +#define AT803X_DEBUG_SYSTEM_CTRL_MODE 0x05 #define AT803X_DEBUG_TX_CLK_DLY_EN BIT(8) #define AT803X_DEBUG_REG_HIB_CTRL 0x0b @@ -284,25 +284,25 @@ static int at803x_read_page(struct phy_device *phydev) static int at803x_enable_rx_delay(struct phy_device *phydev) { - return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, 0, + return at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, 0, AT803X_DEBUG_RX_CLK_DLY_EN); } static int at803x_enable_tx_delay(struct phy_device *phydev) { - return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5, 0, + return at803x_debug_reg_mask(phydev, AT803X_DEBUG_SYSTEM_CTRL_MODE, 0, AT803X_DEBUG_TX_CLK_DLY_EN); } static int at803x_disable_rx_delay(struct phy_device *phydev) { - return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, + return at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, AT803X_DEBUG_RX_CLK_DLY_EN, 0); } static int at803x_disable_tx_delay(struct phy_device *phydev) { - return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5, + return at803x_debug_reg_mask(phydev, AT803X_DEBUG_SYSTEM_CTRL_MODE, AT803X_DEBUG_TX_CLK_DLY_EN, 0); } @@ -1300,7 +1300,7 @@ static int qca83xx_config_init(struct phy_device *phydev) switch (switch_revision) { case 1: /* For 100M waveform */ - at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_0, 0x02ea); + at803x_debug_reg_write(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, 0x02ea); /* Turn on Gigabit clock */ at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_GREEN, 0x68a0); break; @@ -1311,7 +1311,7 @@ static int qca83xx_config_init(struct phy_device *phydev) case 4: phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_AZ_DEBUG, 0x803f); at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_GREEN, 0x6860); - at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_5, 0x2c46); + at803x_debug_reg_write(phydev, AT803X_DEBUG_SYSTEM_CTRL_MODE, 0x2c46); at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_3C, 0x6000); break; } @@ -1322,7 +1322,7 @@ static int qca83xx_config_init(struct phy_device *phydev) */ if (phydev->drv->phy_id == QCA8327_A_PHY_ID || phydev->drv->phy_id == QCA8327_B_PHY_ID) - at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, + at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, QCA8327_DEBUG_MANU_CTRL_EN, 0); /* Following original QCA sourcecode set port to prefer master */ @@ -1340,12 +1340,12 @@ static void qca83xx_link_change_notify(struct phy_device *phydev) /* Set DAC Amplitude adjustment to +6% for 100m on link running */ if (phydev->state == PHY_RUNNING) { if (phydev->speed == SPEED_100) - at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, + at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, QCA8327_DEBUG_MANU_CTRL_EN, QCA8327_DEBUG_MANU_CTRL_EN); } else { /* Reset DAC Amplitude adjustment */ - at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, + at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, QCA8327_DEBUG_MANU_CTRL_EN, 0); } } From patchwork Wed Oct 6 22:35:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12540733 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2367FC433F5 for ; Wed, 6 Oct 2021 22:37:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0C5F960232 for ; Wed, 6 Oct 2021 22:37:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240083AbhJFWjN (ORCPT ); Wed, 6 Oct 2021 18:39:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38314 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239692AbhJFWi2 (ORCPT ); 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id z8sm9462678ejd.94.2021.10.06.15.36.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 15:36:33 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , Ansuel Smith , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH 05/13] net: dsa: qca8k: add mac_power_sel support Date: Thu, 7 Oct 2021 00:35:55 +0200 Message-Id: <20211006223603.18858-6-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211006223603.18858-1-ansuelsmth@gmail.com> References: <20211006223603.18858-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Add missing mac power sel support needed for some switch that requires additional setup. ar8327 have a different setup than 8337. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 27 +++++++++++++++++++++++++++ drivers/net/dsa/qca8k.h | 5 +++++ 2 files changed, 32 insertions(+) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index bda5a9bf4f52..5bce7ac4dea7 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -950,6 +950,29 @@ qca8k_setup_of_rgmii_delay(struct qca8k_priv *priv) return 0; } +static int +qca8k_setup_mac_pwr_sel(struct qca8k_priv *priv) +{ + struct device_node *node = priv->dev->of_node; + u32 mask = 0; + int ret = 0; + + if (of_property_read_bool(node, "qca,rgmii0-1-8v")) + mask |= QCA8K_MAC_PWR_RGMII0_1_8V; + + if (of_property_read_bool(node, "qca,rgmii56-1-8v")) + mask |= QCA8K_MAC_PWR_RGMII1_1_8V; + + if (mask) { + ret = qca8k_rmw(priv, QCA8K_REG_MAC_PWR_SEL, + QCA8K_MAC_PWR_RGMII0_1_8V | + QCA8K_MAC_PWR_RGMII1_1_8V, + mask); + } + + return ret; +} + static int qca8k_setup(struct dsa_switch *ds) { @@ -979,6 +1002,10 @@ qca8k_setup(struct dsa_switch *ds) if (ret) return ret; + ret = qca8k_setup_mac_pwr_sel(priv); + if (ret) + return ret; + /* Enable CPU Port */ ret = qca8k_reg_set(priv, QCA8K_REG_GLOBAL_FW_CTRL0, QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN); diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h index ed3b05ad6745..fc7db94cc0c9 100644 --- a/drivers/net/dsa/qca8k.h +++ b/drivers/net/dsa/qca8k.h @@ -100,6 +100,11 @@ #define QCA8K_SGMII_MODE_CTRL_PHY (1 << 22) #define QCA8K_SGMII_MODE_CTRL_MAC (2 << 22) +/* MAC_PWR_SEL registers */ +#define QCA8K_REG_MAC_PWR_SEL 0x0e4 +#define QCA8K_MAC_PWR_RGMII1_1_8V BIT(18) +#define QCA8K_MAC_PWR_RGMII0_1_8V BIT(19) + /* EEE control registers */ #define QCA8K_REG_EEE_CTRL 0x100 #define QCA8K_REG_EEE_CTRL_LPI_EN(_i) ((_i + 1) * 2) From patchwork Wed Oct 6 22:35:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12540723 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11B48C433F5 for ; Wed, 6 Oct 2021 22:36:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F0A25603E5 for ; Wed, 6 Oct 2021 22:36:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239974AbhJFWir (ORCPT ); Wed, 6 Oct 2021 18:38:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239771AbhJFWia (ORCPT ); Wed, 6 Oct 2021 18:38:30 -0400 Received: from mail-ed1-x531.google.com (mail-ed1-x531.google.com [IPv6:2a00:1450:4864:20::531]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D248C061766; Wed, 6 Oct 2021 15:36:36 -0700 (PDT) Received: by mail-ed1-x531.google.com with SMTP id x7so14800717edd.6; Wed, 06 Oct 2021 15:36:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=vzVlobWW8Uyng6cC2eO6ydPjsxlzKVvWal8zjQElWKE=; b=ClzuQJRJG6IgSZoLKmj7SNZLvhm8KDgLB+7pS/BKRS9+pJoE/8oDa4blyLXTvYSQBw cBc0gEajyg6tBpFeg71VJpKpnbdAPvYbKMuPPzOfsedV62nEjn4SDW4ycu7Akdofks5c wEo3BTA+bjniFTwy3cVWvJdsx6W3xkwfbtsyo+sEk//pXOe556TAGdcOrtBX3dnGiIN5 43wYMVamHZbnYMPnJ3GZ/M545oNhKPqw8/ccMgmrF8tN+MXe/BbeNvzTrW2AMPWLHxyZ o7si2d52uT2LBbzmZPmEr/Gr3fld+MdxUFhGbjbWXzJsVZ8C1RQu8ZSsCVouO1I+QEe9 lO4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vzVlobWW8Uyng6cC2eO6ydPjsxlzKVvWal8zjQElWKE=; b=fcOrR4Ox83BmaFodPHR38iOJrfGGy1I7ZUpxouWCDKotBrNL/MJPo4awivKqknfX7y e/JoKEQoPuOmAj7/1xub6exC0+uKw0ABYsXxhx9ndYk+j+81X6Nha556Ne0Io5iUYFDl 4USryBtjW1M+zdyLV0GJ1ZeWOg4o617aQUp/OZcd2zBeQl48ib3bFtMqts7Z2hpbjz97 PSurpaACIgyM2NcdHQh34E+p1MD/4B7eVqWpbbssHEoS7s4FA5iE6gzfL5vAJO6wVrs6 FKW4vB58ge87EUwkEck4VlliexbkaxgEizgAX9pNZlSJQ0ko1Ar9sro5+xawoc7/hWdX 2Mrg== X-Gm-Message-State: AOAM533ulN1bJSFyeYBXS5IyuysNO50Ksb9bkavJ0WUNitKZXTnKXV2J MeBFFsBs9Y5WhJpCV1sDqNc= X-Google-Smtp-Source: ABdhPJzbMV+SDzjotsyJWQk4BeC8xZ9HamgBbVySJIaN+Cedd3YvHdJaFXWWKV8dh+83S2xYJ27GfA== X-Received: by 2002:a17:906:1f09:: with SMTP id w9mr1176303ejj.472.1633559794785; Wed, 06 Oct 2021 15:36:34 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id z8sm9462678ejd.94.2021.10.06.15.36.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 15:36:34 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , Ansuel Smith , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH 06/13] Documentation: devicetree: net: dsa: qca8k: document rgmii_1_8v bindings Date: Thu, 7 Oct 2021 00:35:56 +0200 Message-Id: <20211006223603.18858-7-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211006223603.18858-1-ansuelsmth@gmail.com> References: <20211006223603.18858-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Document new qca,rgmii0_1_8v and qca,rgmii56_1_8v needed to setup mac_pwr_sel register for ar8327 switch. Signed-off-by: Ansuel Smith --- Documentation/devicetree/bindings/net/dsa/qca8k.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.txt b/Documentation/devicetree/bindings/net/dsa/qca8k.txt index 8c73f67c43ca..1f6b7d2f609e 100644 --- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt @@ -13,6 +13,8 @@ Required properties: Optional properties: - reset-gpios: GPIO to be used to reset the whole device +- qca,rgmii0-1-8v: Set the internal regulator to supply 1.8v for MAC0 port +- qca,rgmii56-1-8v: Set the internal regulator to supply 1.8v for MAC5/6 port Subnodes: From patchwork Wed Oct 6 22:35:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12540721 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FEFCC4332F for ; Wed, 6 Oct 2021 22:36:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2A8B7600D4 for ; Wed, 6 Oct 2021 22:36:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239956AbhJFWip (ORCPT ); Wed, 6 Oct 2021 18:38:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239571AbhJFWia (ORCPT ); Wed, 6 Oct 2021 18:38:30 -0400 Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [IPv6:2a00:1450:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 542A2C06176C; Wed, 6 Oct 2021 15:36:37 -0700 (PDT) Received: by mail-ed1-x52b.google.com with SMTP id f4so10386399edr.8; Wed, 06 Oct 2021 15:36:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lh3n5gNNkOfmSIQB5C0BpnciYQhDQm9z56p74RkS9X0=; b=Kw70yq7T/64yWgpBt5j/Lh4pR0CnZXJNHV+7LGmX23TKiz6RFKS787QvWuF84243gh 2J+7Fy4U22OVHPITC/7RLCqdvibM71/o9pUwuO95iOfjU8bA3solEzvoX422XEgSf5Ah apaxpNTrqpU+Fu+hmRxtU7dpzWu7a990VyUTm56okroGC2FUGibttKxKnHIVTrOvu7j2 y8LE3cVEBhbQ/Djx1IbWHTQNqTUUiVLSuINpFc6wBvCvcrj/dvJoy9nKhRKuyiVJQGxY MQuvqwWWTugFB21MHEEgI+dpjv5NgMfkt2yQCQviZQCiSnTsqyJgHLCOyWbUAf5A4BWi cEkg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lh3n5gNNkOfmSIQB5C0BpnciYQhDQm9z56p74RkS9X0=; b=UYYrW0sa+rlp+2lznomNjc78ezEwKShaWUxkjrLJWSJHBxPxpj1zhqED2HowdRFI4R IWF+y8JMTzW6Tjdy3UX8IkA6SEI2Je8fxaAP0gF1gW3LY2DzQYqZimkSU6sTl1JwOVfP KWFDrjF7MA71xEqlYHHQaoNfkZpk4pFQ7nN6iPuh5Zl6zueyu3bJZYXyAxYQb0woyCvg 1RD4roSU/m5xtjREdY4e0LhiJeIARn2ZRzt8YJcaMcZtdGkVWr2ntSW/9fzUkIhYOBLz 81bbX3KAMvag7suGqsyvWazHTDi+x/xQpZDGpWd5hAFfad71OHUL30ZkT5flxtO7FUOj Fdpg== X-Gm-Message-State: AOAM533M0/ZIa6ASLVihKiKz/KOvcoQd+lq5UvOqDYe4lq1g+p/JItjE AqxSQ/fvz0ZhEsW1d2v7284= X-Google-Smtp-Source: ABdhPJxFDskmT1ltMkLrdJEH9hN+cvIhli/FGUt9xF+TBz1rcBuIr662DlQ3KMjw0BHUocPrs4+83Q== X-Received: by 2002:aa7:d890:: with SMTP id u16mr1187909edq.367.1633559795826; Wed, 06 Oct 2021 15:36:35 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id z8sm9462678ejd.94.2021.10.06.15.36.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 15:36:35 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , Ansuel Smith , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Matthew Hagan Subject: [net-next PATCH 07/13] net: dsa: qca8k: add support for mac6_exchange, sgmii falling edge Date: Thu, 7 Oct 2021 00:35:57 +0200 Message-Id: <20211006223603.18858-8-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211006223603.18858-1-ansuelsmth@gmail.com> References: <20211006223603.18858-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Some device set the switch to exchange the mac0 port with mac6 port. Add support for this in the qca8k driver. Also add support for SGMII rx/tx clock falling edge. This is only present for pad0, pad5 and pad6 have these bit reserved from Documentation. Signed-off-by: Ansuel Smith Signed-off-by: Matthew Hagan --- drivers/net/dsa/qca8k.c | 33 +++++++++++++++++++++++++++++++++ drivers/net/dsa/qca8k.h | 3 +++ 2 files changed, 36 insertions(+) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 5bce7ac4dea7..3a040a3ed58e 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -973,6 +973,34 @@ qca8k_setup_mac_pwr_sel(struct qca8k_priv *priv) return ret; } +static int +qca8k_setup_port0_pad_ctrl_reg(struct qca8k_priv *priv) +{ + struct device_node *node = priv->dev->of_node; + u32 mask = 0; + int ret = 0; + + /* Swap MAC0-MAC6 */ + if (of_property_read_bool(node, "qca,mac6-exchange")) + mask |= QCA8K_PORT0_PAD_CTRL_MAC06_EXCHG; + + /* SGMII Clock phase configuration */ + if (of_property_read_bool(node, "qca,sgmii-rxclk-falling-edge")) + mask |= QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE; + + if (of_property_read_bool(node, "qca,sgmii-txclk-falling-edge")) + mask |= QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE; + + if (mask) + ret = qca8k_rmw(priv, QCA8K_REG_PORT0_PAD_CTRL, + QCA8K_PORT0_PAD_CTRL_MAC06_EXCHG | + QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE | + QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE, + mask); + + return ret; +} + static int qca8k_setup(struct dsa_switch *ds) { @@ -1006,6 +1034,11 @@ qca8k_setup(struct dsa_switch *ds) if (ret) return ret; + /* Configure additional PORT0_PAD_CTRL properties */ + ret = qca8k_setup_port0_pad_ctrl_reg(priv); + if (ret) + return ret; + /* Enable CPU Port */ ret = qca8k_reg_set(priv, QCA8K_REG_GLOBAL_FW_CTRL0, QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN); diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h index fc7db94cc0c9..3fded69a6839 100644 --- a/drivers/net/dsa/qca8k.h +++ b/drivers/net/dsa/qca8k.h @@ -35,6 +35,9 @@ #define QCA8K_MASK_CTRL_DEVICE_ID_MASK GENMASK(15, 8) #define QCA8K_MASK_CTRL_DEVICE_ID(x) ((x) >> 8) #define QCA8K_REG_PORT0_PAD_CTRL 0x004 +#define QCA8K_PORT0_PAD_CTRL_MAC06_EXCHG BIT(31) +#define QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE BIT(19) +#define QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE BIT(18) #define QCA8K_REG_PORT5_PAD_CTRL 0x008 #define QCA8K_REG_PORT6_PAD_CTRL 0x00c #define QCA8K_PORT_PAD_RGMII_EN BIT(26) From patchwork Wed Oct 6 22:35:58 2021 Content-Type: text/plain; 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id z8sm9462678ejd.94.2021.10.06.15.36.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 15:36:36 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , Ansuel Smith , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Matthew Hagan Subject: [net-next PATCH 08/13] dt-bindings: net: dsa: qca8k: Add MAC swap and clock phase properties Date: Thu, 7 Oct 2021 00:35:58 +0200 Message-Id: <20211006223603.18858-9-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211006223603.18858-1-ansuelsmth@gmail.com> References: <20211006223603.18858-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Add names and decriptions of additional PORT0_PAD_CTRL properties. Document new binding qca,mac6_exchange that exchange the mac0 port with mac6. qca,sgmii-(rx|tx)clk-falling-edge are for setting the respective clock phase to failling edge. Signed-off-by: Ansuel Smith Signed-off-by: Matthew Hagan --- Documentation/devicetree/bindings/net/dsa/qca8k.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.txt b/Documentation/devicetree/bindings/net/dsa/qca8k.txt index 1f6b7d2f609e..780d1e60c425 100644 --- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt @@ -13,6 +13,9 @@ Required properties: Optional properties: - reset-gpios: GPIO to be used to reset the whole device +- qca,mac6-exchange: Internally swap MAC0 and MAC6. +- qca,sgmii-rxclk-falling-edge: Set the receive clock phase to falling edge. +- qca,sgmii-txclk-falling-edge: Set the transmit clock phase to falling edge. - qca,rgmii0-1-8v: Set the internal regulator to supply 1.8v for MAC0 port - qca,rgmii56-1-8v: Set the internal regulator to supply 1.8v for MAC5/6 port From patchwork Wed Oct 6 22:35:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12540727 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39ED8C433F5 for ; Wed, 6 Oct 2021 22:37:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 256EF61212 for ; Wed, 6 Oct 2021 22:37:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240025AbhJFWi5 (ORCPT ); Wed, 6 Oct 2021 18:38:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38322 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239850AbhJFWie (ORCPT ); Wed, 6 Oct 2021 18:38:34 -0400 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C0CB9C061746; Wed, 6 Oct 2021 15:36:39 -0700 (PDT) Received: by mail-ed1-x534.google.com with SMTP id g10so15087217edj.1; Wed, 06 Oct 2021 15:36:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=NMygWhMGOdBsZewnkOPqt2RNdLzU8nJnCYHfvZ5KPeY=; b=THL14kk0eVmez+8yo4Xrf7qDsp6CoNBg9wIYZ9f0QEq9szSgGasHFNiHujdUO8kVRJ Z53bjct0sSUquxNfjzPujYCQ2AW20E20SzmxLeD4Y2dK+CtQEhwWfiu+dsB869tJ9b0i qwUjDNFi1ervb98jn5Ue1249vwLPutNOgX8lDGVbUqEw/59Xwc0oQGZgVGNRf964FeXQ VcV6rRYEI+bOiPfwQZjbP6+CvXjmGmIWNamMXy5YWGdwMUX805IfgCNjGmHWoZehGM5y Z6NOlpylFuz4KGxqMtwDJt4+4o0Fgq/eTpdzee5hp6TdsZml1tnVLc1ZnQRljZDoLpbD LczQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NMygWhMGOdBsZewnkOPqt2RNdLzU8nJnCYHfvZ5KPeY=; b=ouz3NBbwOJty5tt5nKr/viFxuu3nNwEs6nTT4m7eQVynSJq5aFc03+EFlxTvURkXby 55rnjMqFI2IAn+bZXb/ffR0/uod8opIVzWS7q3MiGdMByKNhVXwI+4UZAvlXg4+We2EM bcaGS3r3FJiW9T5qu8Olaf1zfaFqf5C8HVktUYf4Y+wx0TWOmOwqAtbn0gPDx8/drswc 1MHo953pT5NJuopnNQ1YvbmswW2D6vqeMZ5qBsR6gDUnrfV2h4itjQqM0youlUOolb2+ ZC+TQhwiPNtfMkUN49ptuR2BbtqVlS+RuzxsA08MeLvGwqnKLj+6S+VkbZa/n6Cm0cqH 7cvg== X-Gm-Message-State: AOAM531rnFYSiTtyHrxlb8gaSOivyhuTGg2A/JbWkrirRA+V5YvS3us6 BmDeQqFEXhM/aUHQp7I9XZk= X-Google-Smtp-Source: ABdhPJyd1PSfFQmV2wnun91d0QauAV+KN2UGncQtHGp3UbJJbMl2aiRW22A2GWjOrcUoQ59f6Ln03Q== X-Received: by 2002:a05:6402:1d2b:: with SMTP id dh11mr1227240edb.276.1633559798251; Wed, 06 Oct 2021 15:36:38 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id z8sm9462678ejd.94.2021.10.06.15.36.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 15:36:37 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , Ansuel Smith , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH 09/13] net: dsa: qca8k: check rgmii also on port 6 if exchanged Date: Thu, 7 Oct 2021 00:35:59 +0200 Message-Id: <20211006223603.18858-10-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211006223603.18858-1-ansuelsmth@gmail.com> References: <20211006223603.18858-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Port 0 can be exchanged with port6. Handle this special case by also checking the port6 if present. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 3a040a3ed58e..4d4f23f7f948 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -906,7 +906,20 @@ qca8k_setup_of_rgmii_delay(struct qca8k_priv *priv) if (mode != PHY_INTERFACE_MODE_RGMII_ID && mode != PHY_INTERFACE_MODE_RGMII_RXID && mode != PHY_INTERFACE_MODE_RGMII_TXID) { - return 0; + /* Port 0 can be exchanged with port 6 */ + dp = dsa_to_port(priv->ds, 6); + if (!dp) + return 0; + + port_dn = dp->dn; + + /* Check if port 6 is set to the correct type */ + of_get_phy_mode(port_dn, &mode); + if (mode != PHY_INTERFACE_MODE_RGMII_ID && + mode != PHY_INTERFACE_MODE_RGMII_RXID && + mode != PHY_INTERFACE_MODE_RGMII_TXID) { + return 0; + } } switch (mode) { From patchwork Wed Oct 6 22:36:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12540729 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E6BEC433F5 for ; Wed, 6 Oct 2021 22:37:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EB681603E5 for ; Wed, 6 Oct 2021 22:37:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239888AbhJFWjI (ORCPT ); Wed, 6 Oct 2021 18:39:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38324 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239854AbhJFWie (ORCPT ); Wed, 6 Oct 2021 18:38:34 -0400 Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [IPv6:2a00:1450:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A7A3BC061762; Wed, 6 Oct 2021 15:36:40 -0700 (PDT) Received: by mail-ed1-x52b.google.com with SMTP id p13so15925371edw.0; Wed, 06 Oct 2021 15:36:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=UaCfwxQyICFRn47sKu0NVRcgx1lpcpn3rb9dZlWLRD8=; b=CCo9cWeWzx6GV6U42mzvdQdVC5sHWp59WNt8hidlY930qVEGjwtwcLNgJ+lnfPW1yF i/HZrFFNv8m6OYeeT8EWNWkFZ6OqgiEtt19hpAAyHshCJddwPluinw7zBi1i/Llt+CbO 0OqcV8fLAnI3zOtwWrn2eVBs0GnQb9pgQRY4EOlQtI3uaeoZzzlXWWfSHn6O9uaI8XJb HMGPI6b3LR+oxI0qwFYLeUaq+pmRIL4qr9CaDkEuGmgLKi8fmksewcjwjeYfrXvnMibX cge5QiQa2TKIxBIVK5zAcKaUiycLmrmkHoCOjkkUmYTv4T4drUCyark1SRmzrwJ0D/y5 ns8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UaCfwxQyICFRn47sKu0NVRcgx1lpcpn3rb9dZlWLRD8=; b=ysFK1a+OmXIG/SWHf+D0unAyXCa6m3xfwjK97rZMdAHzCL8kbzhPMHwqs34HMcha92 BIBKamFKUOfBE4Z99+a7UlS7RQt1H0tw5+5ZI+TGiwogB+bT5iV8dmeWIe6oDOZnmn2Q clfGioWy2a8HVDX5ZZeaDP+8NeXu0icYxrpbbcFGiLNaBnSNcRkfWjsikqBWnVQuR4TN bh4ACM1IWFzBqWrVVlilbh3K3n6TYQx0vuk43aQ89Bzy+RUPyDCdL35l73srDWiftH65 5eTi++U/7XIlZiWssi+iA9hrSM5eD7IgS/I4SHqCqZsVe9jz1JgV0jIYFNAUTp2MrF6i ++2A== X-Gm-Message-State: AOAM530yNTMOo+qbXcCRz5bMZDf/bHXsx/wh2ZO0bgFctSF7pyUY6Yq/ ntEC6eY4HKpieJm+VLx0t7Q= X-Google-Smtp-Source: ABdhPJxo5N1dTabx47/CHGgr3P+HACEEA3b++bX9WFK4JgDL6xME8VnHXly4wnczboCACQ0dsoxzdA== X-Received: by 2002:a05:6402:2682:: with SMTP id w2mr1194519edd.185.1633559799179; Wed, 06 Oct 2021 15:36:39 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id z8sm9462678ejd.94.2021.10.06.15.36.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 15:36:38 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , Ansuel Smith , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH 10/13] net: dsa: qca8k: add explicit SGMII PLL enable Date: Thu, 7 Oct 2021 00:36:00 +0200 Message-Id: <20211006223603.18858-11-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211006223603.18858-1-ansuelsmth@gmail.com> References: <20211006223603.18858-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Support enabling PLL on the SGMII CPU port. Some device require this special configuration or no traffic is transmitted and the switch doesn't work at all. A dedicated binding is added to the CPU node port to apply the correct reg on mac config. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 4d4f23f7f948..01b05dfeae2b 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -1214,6 +1214,7 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, const struct phylink_link_state *state) { struct qca8k_priv *priv = ds->priv; + struct dsa_port *dp; u32 reg, val; int ret; @@ -1282,6 +1283,8 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, break; case PHY_INTERFACE_MODE_SGMII: case PHY_INTERFACE_MODE_1000BASEX: + dp = dsa_to_port(ds, port); + /* Enable SGMII on the port */ qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN); @@ -1300,8 +1303,11 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, if (ret) return; - val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX | - QCA8K_SGMII_EN_TX | QCA8K_SGMII_EN_SD; + val |= QCA8K_SGMII_EN_SD; + + if (of_property_read_bool(dp->dn, "qca,sgmii-enable-pll")) + val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX | + QCA8K_SGMII_EN_TX; if (dsa_is_cpu_port(ds, port)) { /* CPU port, we're talking to the CPU MAC, be a PHY */ From patchwork Wed Oct 6 22:36:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12540725 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62776C433EF for ; Wed, 6 Oct 2021 22:37:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4D1BC60232 for ; Wed, 6 Oct 2021 22:37:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240000AbhJFWix (ORCPT ); Wed, 6 Oct 2021 18:38:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239864AbhJFWif (ORCPT ); Wed, 6 Oct 2021 18:38:35 -0400 Received: from mail-ed1-x532.google.com (mail-ed1-x532.google.com [IPv6:2a00:1450:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A02B2C061771; Wed, 6 Oct 2021 15:36:41 -0700 (PDT) Received: by mail-ed1-x532.google.com with SMTP id z20so15409189edc.13; Wed, 06 Oct 2021 15:36:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=ZCaNobBwRDoHpwFarZH3ixrL5LCb9D8Eryar/KUu2HM=; b=mICIRycRdLZG+Tk5RQLSYC3PWRLzHO2L8lfQ8b7uGIB/9UMehNy5+aiGcFrk3zd9Ng URW18Ku9aYwhQcG5uDFQDhGY/i+OpvVZfLid6fNt9tMsau1wJrBnDC8LB6Ef6wyemDM2 snJ+DcrNypmSRc8rUsCcBu9L1JYa0Qcn4y4xmgJDR6zGDgKrgJMPhTL/IwCINcQpH+hj ni5SB7IEGlIaX/ng/VaiA9DiTu0esHk2H+P7IewnXd++kQFsogqVhoIiO+I7Uh13hJma 6NK3B7GIf4oWmH9dLJuBKtuEmqdCFjdqUDh9cVbLeQoUBtyLS7UApChvqjwIkwIh2sIZ sAlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZCaNobBwRDoHpwFarZH3ixrL5LCb9D8Eryar/KUu2HM=; b=qYWq2v/IBlO/P+XnMD+8aj4FiJvjp0SHZM+DOoD0W0X4QpFRBs+ORoWhQ65rqA2yfO C3oAxWx7qBjIQdI47mGOGfICjtL6gF+S+TzwPA8MBZ6amZ9CwGCPSMS+xQJ0h43Gtz5h +7ADnoIbBRwo4nZncCvEdgThZQihDhX/bYOvH8UcuZu8ivrSHOpuGdtNz62l0C8x4Vl7 gxNQsRVdQCHtS/Mu+3FQuYk7sXumPqlt2LO6kRjCJD1tRaBjEXf2L2JcocwHynTaIY0n YslnPChP6Qg3OWoImGsWSQiH6qxPs3XNVKVLrqJE0fIQqczicIrqoM9uiQW/bcWU6KYn pK0A== X-Gm-Message-State: AOAM530+QSrNtjOHRNSC3Bfk8Nb958G3hYOcmeIQJ+mliwNAcHCchIiP DslLmMxkyxeImgD/S+cQBHo= X-Google-Smtp-Source: ABdhPJzcXi1kyzLXUSJNcRwS31p9lRnRqQk1c0r/RNJq3CGHIWEmCm+iW90GwPMtbGm5SRt4ZhyF1w== X-Received: by 2002:a17:906:1553:: with SMTP id c19mr1141217ejd.266.1633559800139; Wed, 06 Oct 2021 15:36:40 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id z8sm9462678ejd.94.2021.10.06.15.36.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 15:36:39 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , Ansuel Smith , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH 11/13] devicetree: net: dsa: qca8k: Document qca,sgmii-enable-pll Date: Thu, 7 Oct 2021 00:36:01 +0200 Message-Id: <20211006223603.18858-12-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211006223603.18858-1-ansuelsmth@gmail.com> References: <20211006223603.18858-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Document qca,sgmii-enable-pll binding used in the CPU nodes to enable SGMII PLL on MAC config. Signed-off-by: Ansuel Smith --- Documentation/devicetree/bindings/net/dsa/qca8k.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.txt b/Documentation/devicetree/bindings/net/dsa/qca8k.txt index 780d1e60c425..550f4313c6e0 100644 --- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt @@ -42,6 +42,8 @@ A CPU port node has the following optional node: managed entity. See Documentation/devicetree/bindings/net/fixed-link.txt for details. +- qca,sgmii-enable-pll : For SGMII CPU port, explicitly enable PLL, TX and RX + chain along with Signal Detection. For QCA8K the 'fixed-link' sub-node supports only the following properties: From patchwork Wed Oct 6 22:36:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12540731 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3318EC433F5 for ; Wed, 6 Oct 2021 22:37:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1D9E860232 for ; Wed, 6 Oct 2021 22:37:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229926AbhJFWjM (ORCPT ); Wed, 6 Oct 2021 18:39:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38338 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239871AbhJFWif (ORCPT ); Wed, 6 Oct 2021 18:38:35 -0400 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9646EC061766; Wed, 6 Oct 2021 15:36:42 -0700 (PDT) Received: by mail-ed1-x534.google.com with SMTP id r18so15509211edv.12; Wed, 06 Oct 2021 15:36:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=FFCx313Z9GQlAP/ahwXmpC+e4yyEdzEZEyW2K6sJHgk=; b=pgfCgl+D8v3YEFhQJfFu8XQNcfjqUQ4lpgNNe8bctg2GCbLgLpSKe1UuSIKOLe/mdt BasASX5sOVgAfmtZL05MF7/NiM/UrPV8vPJ1wNhikpY/NQP3Mn8nHHbXmaIWJRVQ3maO 4svU/JWBRj0+XgMJtncjYhTZq0WOYe3S4uO5UwdFt/7mx22onvbkeMczUU8nwmyeAyrk KYj+pfwxL5YmjCEiZMjZGgBL2oiU3xiDJze92w5LhIQD7RetprNLvZtgMdZCa6kgXdkW 6AZ3Sr87VaNxSQA7YGg8nuiN7D7mOzWC+49jv2n8AXj08+V+022tHMl160ZHeM3zggsH 7ygw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FFCx313Z9GQlAP/ahwXmpC+e4yyEdzEZEyW2K6sJHgk=; b=QhV5rWDsnuecLOwLVBVJsSAyU9F5ddpfU1cd2Ni2HdRV5WVRety0BfE+vjI5w7pRQp h4pYF5lCAdiB+Dy5rVt7+ZEU4hGH6fZe6/NYy1wMWPcNzuIQgtk3WbYlxOID4higFIPD PWKhSDOdqVHmp/V+3177+D6L8+RpFXScFpFvXdUNHFRSt1kKt+l1hdOczIfY8noPBfCe AcK+U4/iaZl17ES6MidaKdonkFZPiCPPFaotxjvYS/fyR85bq5GALL/OnsQtMmJmZ5/7 OKamCZ6bHAfeDvXmBcCJwzvlPBvmqHIoOHPMtihPVjfgoya+0SjxHFN2gFFsnhPKfN45 mCfw== X-Gm-Message-State: AOAM530tKsqLtqqnRUE88RYws8VAY/rngK5fORUoxCAZqhSPsxWrBciI 0mX4dQQzWh24N8GnqvQc8sQ= X-Google-Smtp-Source: ABdhPJxRg5/r7Om3l3xHIc+HYBoftXVTx1yB58E/sRzig1RImYRleVizeX1mngJxOAUSCSMZxrf7lg== X-Received: by 2002:a05:6402:34cb:: with SMTP id w11mr1157255edc.263.1633559801090; Wed, 06 Oct 2021 15:36:41 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id z8sm9462678ejd.94.2021.10.06.15.36.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 15:36:40 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , Ansuel Smith , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH 12/13] drivers: net: dsa: qca8k: add support for pws config reg Date: Thu, 7 Oct 2021 00:36:02 +0200 Message-Id: <20211006223603.18858-13-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211006223603.18858-1-ansuelsmth@gmail.com> References: <20211006223603.18858-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Some qca8327 switch require the power_on_sel enabled for the pws_reg or sets the led to open drain. Also qca8327 switch have a special mode to declare reduced 48pin layout. This special mode is only present in qca8327 as qca8337 have a different pws_reg table. Introduce a new binding and support these special configuration. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 26 ++++++++++++++++++++++++++ drivers/net/dsa/qca8k.h | 3 +++ 2 files changed, 29 insertions(+) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 01b05dfeae2b..209f8d3c9ea8 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -1014,6 +1014,28 @@ qca8k_setup_port0_pad_ctrl_reg(struct qca8k_priv *priv) return ret; } +static int +qca8k_setup_of_pws_reg(struct qca8k_priv *priv) +{ + struct device_node *node = priv->dev->of_node; + u32 val = 0; + + if (priv->switch_id == QCA8K_ID_QCA8327) + if (of_property_read_bool(node, "qca,package48")) + val |= QCA8327_PWS_PACKAGE48_EN; + + if (of_property_read_bool(node, "qca,power-on-sel")) + val |= QCA8K_PWS_POWER_ON_SEL; + + if (of_property_read_bool(node, "qca,led-open-drain")) + /* POWER_ON_SEL needs to be set when configuring led to open drain */ + val |= QCA8K_PWS_LED_OPEN_EN_CSR | QCA8K_PWS_POWER_ON_SEL; + + return qca8k_rmw(priv, QCA8K_REG_PWS, + QCA8K_PWS_LED_OPEN_EN_CSR | QCA8K_PWS_POWER_ON_SEL, + val); +} + static int qca8k_setup(struct dsa_switch *ds) { @@ -1039,6 +1061,10 @@ qca8k_setup(struct dsa_switch *ds) if (ret) return ret; + ret = qca8k_setup_of_pws_reg(priv); + if (ret) + return ret; + ret = qca8k_setup_of_rgmii_delay(priv); if (ret) return ret; diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h index 3fded69a6839..90f4616c33f1 100644 --- a/drivers/net/dsa/qca8k.h +++ b/drivers/net/dsa/qca8k.h @@ -48,6 +48,9 @@ #define QCA8K_MAX_DELAY 3 #define QCA8K_PORT_PAD_SGMII_EN BIT(7) #define QCA8K_REG_PWS 0x010 +#define QCA8K_PWS_POWER_ON_SEL BIT(31) +#define QCA8327_PWS_PACKAGE48_EN BIT(30) +#define QCA8K_PWS_LED_OPEN_EN_CSR BIT(24) #define QCA8K_PWS_SERDES_AEN_DIS BIT(7) #define QCA8K_REG_MODULE_EN 0x030 #define QCA8K_MODULE_EN_MIB BIT(0) From patchwork Wed Oct 6 22:36:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12540735 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC5ADC433EF for ; Wed, 6 Oct 2021 22:37:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D8C33603E5 for ; Wed, 6 Oct 2021 22:37:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240109AbhJFWj2 (ORCPT ); Wed, 6 Oct 2021 18:39:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38324 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239947AbhJFWio (ORCPT ); Wed, 6 Oct 2021 18:38:44 -0400 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 95604C06176C; Wed, 6 Oct 2021 15:36:43 -0700 (PDT) Received: by mail-ed1-x52a.google.com with SMTP id l7so15717740edq.3; Wed, 06 Oct 2021 15:36:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=aJj/1qPNuaVQFK3OzLpENkQJhnzkYtyy78uh6Vh8QNI=; b=L0TlaMBtITBxzhR1lZHviuIP/bQA5HOgoY9MF28mg2zKUsEhBR0OBg4qyBDW6UYQFK h3WVON6cCNud1Cat7h9vWBUhP2OwOOTj6xm9TWzuu9tZod7rsVDqmrRY0RPRnVU333mk oldpmbXnjLKEsaIdHF1YcdCctASMZd3pvTXT37JGjY5+rdi0NnHi+rJ9f+AeI1gw3JFa qiIcUMnMv+xTOZQ4DNtcjCAi+W8jOcJbWj6sai7XgeGvNd6zCqvmd7/lRSd7ZrzlwqYZ M3Lk762vdJfnD2xMzfpvljpuguIGED4unT/+FAEVPfZ7YAof8/HNMgpWgLp5APmJgovQ Uqtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aJj/1qPNuaVQFK3OzLpENkQJhnzkYtyy78uh6Vh8QNI=; b=bplOCCeguD+DvJlfIzKzSUhOSiAxcE/+wdEdAznjmAKoqiVp9pl799bgNHMGGk3Z2u fc/rEqu2IItiOd4lTdeewcHkEAj9A9MOZ0qRtAjTEOBQMleH6WrvH3qRWVeCQjT2JLhu O3AlojWeaf/mb4HOhZHncwvwgiwZCLPJV+91kr3e+7gm+G1Vf9o7jJf2EWPwPMHtlYZM NEGsEO2clCEOPkGRXL/rZgPHxJIBj4qsy30laT5reTVlv0tmmoOt0WobjDEVycZs5wTH hElK8E+c4MUUCT56oZGPYfAERSMTwkZ4uAObN8s4LyBND6BP7cTltGWNgBKx9hMothIu khHg== X-Gm-Message-State: AOAM532hApELI7cfOVwMASapc74Pi67ieowbfp82rkb4KMEH72PytiAR qWU+jGIshegQMN9buAxStYA= X-Google-Smtp-Source: ABdhPJxkBNOH1aDqAS8750346rUpHDVKyJa1T5CfAuP5cz9uFbjkqTzrTsIXoRI8jkACY8ggS6wWdA== X-Received: by 2002:a17:906:7d42:: with SMTP id l2mr1130949ejp.467.1633559802038; Wed, 06 Oct 2021 15:36:42 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id z8sm9462678ejd.94.2021.10.06.15.36.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 15:36:41 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , Ansuel Smith , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next PATCH 13/13] Documentation: devicetree: net: dsa: qca8k: document open drain binding Date: Thu, 7 Oct 2021 00:36:03 +0200 Message-Id: <20211006223603.18858-14-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211006223603.18858-1-ansuelsmth@gmail.com> References: <20211006223603.18858-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Document new binding qca,power_on_sel used to enable Power-on-strapping select reg and qca,led_open_drain to set led to open drain mode. Signed-off-by: Ansuel Smith --- Documentation/devicetree/bindings/net/dsa/qca8k.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.txt b/Documentation/devicetree/bindings/net/dsa/qca8k.txt index 550f4313c6e0..4f6ef9f9e024 100644 --- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt @@ -13,6 +13,10 @@ Required properties: Optional properties: - reset-gpios: GPIO to be used to reset the whole device +- qca,package48: Set to 48-pin mode required in some QCA8327 switches. +- qca,power-on-sel: Enable Power-on-strapping select required in some QCA8327 + switches. +- qca,led-open-drain: Set leds to open-drain mode. - qca,mac6-exchange: Internally swap MAC0 and MAC6. - qca,sgmii-rxclk-falling-edge: Set the receive clock phase to falling edge. - qca,sgmii-txclk-falling-edge: Set the transmit clock phase to falling edge.