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[76.210.143.223]) by smtp.gmail.com with ESMTPSA id e14sm914125pga.23.2021.10.08.21.38.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Oct 2021 21:38:14 -0700 (PDT) Date: Fri, 08 Oct 2021 21:38:14 -0700 (PDT) X-Google-Original-Date: Fri, 08 Oct 2021 21:37:58 PDT (-0700) Subject: [GIT PULL] RISC-V Fixes for 5.15-rc5 CC: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org From: Palmer Dabbelt To: Linus Torvalds Message-ID: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211008_213817_310442_ECE03BE0 X-CRM114-Status: UNSURE ( 8.53 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The following changes since commit 6880fa6c56601bb8ed59df6c30fd390cc5f6dd8f: Linux 5.15-rc1 (2021-09-12 16:28:37 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-5.15-rc5 for you to fetch changes up to 3ef6ca4f354c53abf263cbeb51e7272523c294d8: checksyscalls: Unconditionally ignore fstat{,at}64 (2021-10-07 17:16:28 -0700) ---------------------------------------------------------------- RISC-V Fixes for 5.15-rc5 * A pair of fixes (along with the necessary cleanup) to our VDSO, to avoid * A fix to checksyscalls to teach it about our rv32 UABI. * A fix to add clone3() to the rv32 UABI, which was pointed out by checksyscalls. * A fix to properly flush the icache on the local CPU in addition to the remote CPUs. ---------------------------------------------------------------- Alexandre Ghiti (1): riscv: Flush current cpu icache before other cpus Palmer Dabbelt (4): Merge remote-tracking branch 'palmer/riscv-vdso-cleanup' into fixes RISC-V: Include clone3() on rv32 Merge remote-tracking branch 'palmer/riscv-clone3' into fixes checksyscalls: Unconditionally ignore fstat{,at}64 Tong Tiangen (3): riscv/vdso: Refactor asm/vdso.h riscv/vdso: Move vdso data page up front riscv/vdso: make arch_setup_additional_pages wait for mmap_sem for write killable arch/riscv/include/asm/syscall.h | 1 + arch/riscv/include/asm/vdso.h | 18 ++++++++---- arch/riscv/include/uapi/asm/unistd.h | 3 +- arch/riscv/kernel/syscall_table.c | 1 - arch/riscv/kernel/vdso.c | 53 ++++++++++++++++++++++-------------- arch/riscv/kernel/vdso/vdso.lds.S | 3 +- arch/riscv/mm/cacheflush.c | 2 ++ scripts/checksyscalls.sh | 6 ++-- 8 files changed, 56 insertions(+), 31 deletions(-)