From patchwork Sat Oct 9 22:46:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12548187 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68FB4C433EF for ; Sat, 9 Oct 2021 22:46:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 450AF60F6C for ; Sat, 9 Oct 2021 22:46:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231418AbhJIWs2 (ORCPT ); Sat, 9 Oct 2021 18:48:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231235AbhJIWs1 (ORCPT ); Sat, 9 Oct 2021 18:48:27 -0400 Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4EEC0C061764; Sat, 9 Oct 2021 15:46:30 -0700 (PDT) Received: by mail-ed1-x536.google.com with SMTP id d3so23393573edp.3; Sat, 09 Oct 2021 15:46:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=BbqqoyYUIZZYbznL3kKosmLxfC3pf231vxrIrzT+TdU=; b=Mh6NBkQ5xOIisgMZnKVvx9JhVjo8znS7SRWC8Grjw/EUMNM7CtarhuRHm3wrAoa3wj BQdpGJAojvPy/kqYzcWVTUunI0HltwKIazIpzIQcdOdG7UvDHdg/YIkpSCAGPsK42jkI NWyzPRJbvq+CnoV87LFdeirz3NW5uOCoB3EU9/xpPpu95pvK0uhujmXTeaMnivWA2H5I amHwGWGxPMgyaMQrxTNXzyjW3LQjcYraCP95qF+7FiqPA9hrO0qJ1yeGcn5SDm+87RiL dCd/XNJtobPcayeO3nN8uKV2Y5C10K+5PLocRjQMfXufUqA3GFxrz+VpFDBw6izPXRPB uG/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=BbqqoyYUIZZYbznL3kKosmLxfC3pf231vxrIrzT+TdU=; b=EMx3AVsaocaA6e7WrLW2BV6A3NtkfvmL1a6UlXgS4zwwH4u3zp0GvJ9xKmvsd4BuPp atrPL9jgm101rHkMk0wyba9prpMqG4AV+Qmhrh5QY4TyR/x5Z/RyeqYY/D9wRgLLGIAG GD6f2mdv4gXvREI25p4mnGeViIPQBHMLmFbj+CvY8Zuy5JlnX9RLHOta/UjWyFo3Cwvp cwCMlG2tIEzzEfY5wYUHFuLQsmMGNFi6F5tb2JuCxH3mzbTsFzx0FvCEG2iOce1JRFTE ogh/07aQZhiaYxKn3PDnjSl7KJ+0/fvFn5ZfsDmy1QJMK3cdZwQ28v/Sxfuqnt91+Dxz mtkQ== X-Gm-Message-State: AOAM5310E+D7KW2y2Ny2bP3+nm7C2drFxtXshKnrPb0+pnBwNClB5YXm e6b/80wiRa3hhhAkHEQNU8k= X-Google-Smtp-Source: ABdhPJwZ2AwyoInOODIFquLetzyOhNYCtxW/gMphHPQIrTsWH+KkHoGwVvW/rH4FEdNhmeyFmu41Ow== X-Received: by 2002:a50:d98d:: with SMTP id w13mr27941169edj.51.1633819588680; Sat, 09 Oct 2021 15:46:28 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id l13sm1727115eds.92.2021.10.09.15.46.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 09 Oct 2021 15:46:28 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Jakub Kicinski , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith Subject: [net-next PATCH 1/4] net: phy: at803x: fix resume for QCA8327 phy Date: Sun, 10 Oct 2021 00:46:15 +0200 Message-Id: <20211009224618.4988-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From Documentation phy resume triggers phy reset and restart auto-negotiation. Add a dedicated function to wait reset to finish as it was notice a regression where port sometime are not reliable after a suspend/resume session. The reset wait logic is copied from phy_poll_reset. Add dedicated suspend function to use genphy_suspend only with QCA8337 phy and set only additional debug settings for QCA8327. With more test it was reported that QCA8327 doesn't proprely support this mode and using this cause the unreliability of the switch ports, especially the malfunction of the port0. Fixes: 15b9df4ece17 ("net: phy: at803x: add resume/suspend function to qca83xx phy") Signed-off-by: Ansuel Smith --- drivers/net/phy/at803x.c | 69 ++++++++++++++++++++++++++++++++++++---- 1 file changed, 63 insertions(+), 6 deletions(-) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index 3feee4d59030..c6c87b82c95c 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -92,9 +92,14 @@ #define AT803X_DEBUG_REG_5 0x05 #define AT803X_DEBUG_TX_CLK_DLY_EN BIT(8) +#define AT803X_DEBUG_REG_HIB_CTRL 0x0b +#define AT803X_DEBUG_HIB_CTRL_SEL_RST_80U BIT(10) +#define AT803X_DEBUG_HIB_CTRL_EN_ANY_CHANGE BIT(13) + #define AT803X_DEBUG_REG_3C 0x3C #define AT803X_DEBUG_REG_3D 0x3D +#define AT803X_DEBUG_GATE_CLK_IN1000 BIT(6) #define AT803X_DEBUG_REG_1F 0x1F #define AT803X_DEBUG_PLL_ON BIT(2) @@ -1312,6 +1317,58 @@ static int qca83xx_config_init(struct phy_device *phydev) return 0; } +static int qca83xx_resume(struct phy_device *phydev) +{ + int ret, val; + + /* Skip reset if not suspended */ + if (!phydev->suspended) + return 0; + + /* Reinit the port, reset values set by suspend */ + qca83xx_config_init(phydev); + + /* Reset the port on port resume */ + phy_set_bits(phydev, MII_BMCR, BMCR_RESET | BMCR_ANENABLE); + + /* On resume from suspend the switch execute a reset and + * restart auto-negotiation. Wait for reset to complete. + */ + ret = phy_read_poll_timeout(phydev, MII_BMCR, val, !(val & BMCR_RESET), + 50000, 600000, true); + if (ret) + return ret; + + msleep(1); + + return 0; +} + +static int qca83xx_suspend(struct phy_device *phydev) +{ + u16 mask = 0; + + /* Only QCA8337 support actual suspend. + * QCA8327 cause port unreliability when phy suspend + * is set. + */ + if (phydev->drv->phy_id == QCA8337_PHY_ID) { + genphy_suspend(phydev); + } else { + mask |= ~(BMCR_SPEED1000 | BMCR_FULLDPLX); + phy_modify(phydev, MII_BMCR, mask, 0); + } + + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_3D, + AT803X_DEBUG_GATE_CLK_IN1000, 0); + + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_HIB_CTRL, + AT803X_DEBUG_HIB_CTRL_EN_ANY_CHANGE | + AT803X_DEBUG_HIB_CTRL_SEL_RST_80U, 0); + + return 0; +} + static struct phy_driver at803x_driver[] = { { /* Qualcomm Atheros AR8035 */ @@ -1421,8 +1478,8 @@ static struct phy_driver at803x_driver[] = { .get_sset_count = at803x_get_sset_count, .get_strings = at803x_get_strings, .get_stats = at803x_get_stats, - .suspend = genphy_suspend, - .resume = genphy_resume, + .suspend = qca83xx_suspend, + .resume = qca83xx_resume, }, { /* QCA8327-A from switch QCA8327-AL1A */ .phy_id = QCA8327_A_PHY_ID, @@ -1436,8 +1493,8 @@ static struct phy_driver at803x_driver[] = { .get_sset_count = at803x_get_sset_count, .get_strings = at803x_get_strings, .get_stats = at803x_get_stats, - .suspend = genphy_suspend, - .resume = genphy_resume, + .suspend = qca83xx_suspend, + .resume = qca83xx_resume, }, { /* QCA8327-B from switch QCA8327-BL1A */ .phy_id = QCA8327_B_PHY_ID, @@ -1451,8 +1508,8 @@ static struct phy_driver at803x_driver[] = { .get_sset_count = at803x_get_sset_count, .get_strings = at803x_get_strings, .get_stats = at803x_get_stats, - .suspend = genphy_suspend, - .resume = genphy_resume, + .suspend = qca83xx_suspend, + .resume = qca83xx_resume, }, }; module_phy_driver(at803x_driver); From patchwork Sat Oct 9 22:46:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12548189 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9510AC433EF for ; Sat, 9 Oct 2021 22:46:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7E77D60F6C for ; Sat, 9 Oct 2021 22:46:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231515AbhJIWsc (ORCPT ); Sat, 9 Oct 2021 18:48:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55754 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231377AbhJIWs2 (ORCPT ); Sat, 9 Oct 2021 18:48:28 -0400 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0F811C061570; Sat, 9 Oct 2021 15:46:31 -0700 (PDT) Received: by mail-ed1-x52c.google.com with SMTP id v18so51338456edc.11; Sat, 09 Oct 2021 15:46:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TIVh7aXnS7WMSRSGvwGkaRzozu+hXv97EwwaZX+jHdM=; b=oOKr/atM5nzowrWmteaojYmoF9a2R1w+9ahIVJwRX8vsfYT7X/e38DpWfyH9BrkZU3 wYg5z3Nrkfmum1nFJO561lLL5D2cE8oc4NbYhCfC+P47Z+93r86lh0n46FiIb6m8q3fd C4CbhZiKVHHLFBhWtsSVtE43EPPYymUY1XUmhlYU9pqH5oLPWd5bSNxjiIeBqiZotB5J /QAa1+0GAeK3/pjC4R0oq1th71+D9UyVTlr4EcjxRY7XY4f6BceU+uM+u6Z9E00NP10i Qe4NIFDpW39P7YMwvqJ0P/NwqI3k+4y7/D7bizr6YQKHQnfNjkT0uXIGec8xW3iu3BF/ hB0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TIVh7aXnS7WMSRSGvwGkaRzozu+hXv97EwwaZX+jHdM=; b=eQcqLLl4hUj9n3QATC1w93Iz82Q4heKWUr7R1cwjJNknKdBchtYQmpIbXl4f3qleed m01Vpi9okYa92VHEi1Qm7qRAazUGhAEkbxGSRS6e5PhdJUq2quBBl5wcBPJ1FthxFjMz tgO6zByQIV8CIby1S4vCWwqXMEw9mGFfwkXvgPkr5b3N7P8oMHt0wtn6ewYEmUV9xQ4L R5vqZrLoxEZ0TPImdTEd6haC4lIUsYV5II6kqTzgjCSIFv5eCNvEQfE2OCQon9snIUvg tq2f/qMybsvuRUmfSLNjs2jZWm/Rq3Ljdq1tEGs23inGOXM31YymWNoNxTDtytaABZU/ zc4A== X-Gm-Message-State: AOAM532Hh/xuI6lIZXIUerHYS8M2esjq5Ty55h5ujoWV2lLRzLcPLEN0 N8xrIEbPFe2+ZbP+l6nvHnkhfyyxuYk= X-Google-Smtp-Source: ABdhPJwHcNfkxX7jOEY3jv2oKG4zEYhOvCUGI6QCq2lb1Er1t7gs91TPLkk/8N65aDu5TvdD5YLEyw== X-Received: by 2002:a05:6402:410:: with SMTP id q16mr27405080edv.286.1633819589525; Sat, 09 Oct 2021 15:46:29 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id l13sm1727115eds.92.2021.10.09.15.46.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 09 Oct 2021 15:46:29 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Jakub Kicinski , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith Subject: [net-next PATCH 2/4] net: phy: at803x: add DAC amplitude fix for 8327 phy Date: Sun, 10 Oct 2021 00:46:16 +0200 Message-Id: <20211009224618.4988-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211009224618.4988-1-ansuelsmth@gmail.com> References: <20211009224618.4988-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org QCA8327 internal phy require DAC amplitude adjustement set to +6% with 100m speed. Also add additional define to report a change of the same reg in QCA8337. (different scope it does set 1000m voltage) Add link_change_notify function to set the proper amplitude adjustement on PHY_RUNNING state and disable on any other state. Fixes: b4df02b562f4 ("net: phy: at803x: add support for qca 8327 A variant internal phy") Signed-off-by: Ansuel Smith --- drivers/net/phy/at803x.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index c6c87b82c95c..5208ea8fdd69 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -87,6 +87,8 @@ #define AT803X_PSSR_MR_AN_COMPLETE 0x0200 #define AT803X_DEBUG_REG_0 0x00 +#define QCA8327_DEBUG_MANU_CTRL_EN BIT(2) +#define QCA8337_DEBUG_MANU_CTRL_EN GENMASK(3, 2) #define AT803X_DEBUG_RX_CLK_DLY_EN BIT(15) #define AT803X_DEBUG_REG_5 0x05 @@ -1314,9 +1316,37 @@ static int qca83xx_config_init(struct phy_device *phydev) break; } + /* QCA8327 require DAC amplitude adjustment for 100m set to +6%. + * Disable on init and enable only with 100m speed following + * qca original source code. + */ + if (phydev->drv->phy_id == QCA8327_A_PHY_ID || + phydev->drv->phy_id == QCA8327_B_PHY_ID) + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, + QCA8327_DEBUG_MANU_CTRL_EN, 0); + return 0; } +static void qca83xx_link_change_notify(struct phy_device *phydev) +{ + /* QCA8337 doesn't require DAC Amplitude adjustement */ + if (phydev->drv->phy_id == QCA8337_PHY_ID) + return; + + /* Set DAC Amplitude adjustment to +6% for 100m on link running */ + if (phydev->state == PHY_RUNNING) { + if (phydev->speed == SPEED_100) + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, + QCA8327_DEBUG_MANU_CTRL_EN, + QCA8327_DEBUG_MANU_CTRL_EN); + } else { + /* Reset DAC Amplitude adjustment */ + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, + QCA8327_DEBUG_MANU_CTRL_EN, 0); + } +} + static int qca83xx_resume(struct phy_device *phydev) { int ret, val; @@ -1471,6 +1501,7 @@ static struct phy_driver at803x_driver[] = { .phy_id_mask = QCA8K_PHY_ID_MASK, .name = "Qualcomm Atheros 8337 internal PHY", /* PHY_GBIT_FEATURES */ + .link_change_notify = qca83xx_link_change_notify, .probe = at803x_probe, .flags = PHY_IS_INTERNAL, .config_init = qca83xx_config_init, @@ -1486,6 +1517,7 @@ static struct phy_driver at803x_driver[] = { .phy_id_mask = QCA8K_PHY_ID_MASK, .name = "Qualcomm Atheros 8327-A internal PHY", /* PHY_GBIT_FEATURES */ + .link_change_notify = qca83xx_link_change_notify, .probe = at803x_probe, .flags = PHY_IS_INTERNAL, .config_init = qca83xx_config_init, @@ -1501,6 +1533,7 @@ static struct phy_driver at803x_driver[] = { .phy_id_mask = QCA8K_PHY_ID_MASK, .name = "Qualcomm Atheros 8327-B internal PHY", /* PHY_GBIT_FEATURES */ + .link_change_notify = qca83xx_link_change_notify, .probe = at803x_probe, .flags = PHY_IS_INTERNAL, .config_init = qca83xx_config_init, From patchwork Sat Oct 9 22:46:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12548191 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 77908C4332F for ; Sat, 9 Oct 2021 22:46:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 58B1960F9C for ; Sat, 9 Oct 2021 22:46:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231594AbhJIWsf (ORCPT ); Sat, 9 Oct 2021 18:48:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231435AbhJIWs3 (ORCPT ); Sat, 9 Oct 2021 18:48:29 -0400 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EB8E2C061570; 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id l13sm1727115eds.92.2021.10.09.15.46.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 09 Oct 2021 15:46:30 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Jakub Kicinski , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith Subject: [net-next PATCH 3/4] net: phy: at803x: enable prefer master for 83xx internal phy Date: Sun, 10 Oct 2021 00:46:17 +0200 Message-Id: <20211009224618.4988-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211009224618.4988-1-ansuelsmth@gmail.com> References: <20211009224618.4988-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org From original QCA source code the port was set to prefer master as port type in 1000BASE-T mode. Apply the same settings also here. Signed-off-by: Ansuel Smith Reviewed-by: Andrew Lunn --- drivers/net/phy/at803x.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index 5208ea8fdd69..402b2096f209 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -1325,6 +1325,9 @@ static int qca83xx_config_init(struct phy_device *phydev) at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, QCA8327_DEBUG_MANU_CTRL_EN, 0); + /* Following original QCA sourcecode set port to prefer master */ + phy_set_bits(phydev, MII_CTRL1000, CTL1000_PREFER_MASTER); + return 0; } From patchwork Sat Oct 9 22:46:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12548193 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6758CC433F5 for ; Sat, 9 Oct 2021 22:46:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4E3F960F6B for ; Sat, 9 Oct 2021 22:46:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231773AbhJIWsh (ORCPT ); Sat, 9 Oct 2021 18:48:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55764 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231235AbhJIWsa (ORCPT ); Sat, 9 Oct 2021 18:48:30 -0400 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CAC35C061762; Sat, 9 Oct 2021 15:46:32 -0700 (PDT) Received: by mail-ed1-x52a.google.com with SMTP id g8so50954043edt.7; Sat, 09 Oct 2021 15:46:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PU/BRwwO7gA0CJ8tiOcNIpgU+bIB6NLlMgIvw5Lst8o=; b=p/AZeaGwLoeehQlG6y7nficdxyJXYUe/bRQyCGo2vhVd09n3MS0xkOgIoi8Bon7s0V KPf4DqmzltPtuctEYhRtjjIP6m91Fri4u/v+zD9RZWQWzemGMfyumJv+vef6V8Ii8tpi 1vt/aFY2jrh7e2hlFZPgSka6ibOlLkf2wqk+pEnNhnfZPAlEp1eQByT9+VpokMpW7UzE kW7/Hr1YzziC4kKAjDcjLnU1yEKCb5SyHIPxrwkRt6Pgd9RqPi0epfarShKMRO7Gveih ZsnjCBypa3bg2pln7mdnpvNqzCOZ7EUwOwXgGeMS54o0Jgj1wLsyco9pYe8FeuT1GS6v K/Yg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PU/BRwwO7gA0CJ8tiOcNIpgU+bIB6NLlMgIvw5Lst8o=; b=Bo6KT8OJNTdNBOvW8RWHc1MUCZqBryKnl6HOhra5JXmwkKe38W2HRDc7yKdjYk5E9O msQyeGnBJHBKrCikHPyI+P+UEyRG9LnpBgxJ06U4PyMY5eNmjdTYSrEEvRh2g8DNV1d9 p2zPrZfBpuoDeggzZ0xZcIktoWLnwfRKt8hL7mRvM4l7SfaPKl7SdNc5oSmfSXv5xQJV Rr+d/xjNTytiBOmybTn+MhpwSJmWbnN4bW7VHpY9Sl//D+gZVUQmfbozm6mSDhmhkRdI HxhBFO57JVijTodP80jt96xqXClBFxETdIqKI5xXut4kXARrb6LfdR+z6Gz9O7RpH8HQ RJeQ== X-Gm-Message-State: AOAM533LTHsr/JD5jQtQ/4nricAL7BgfeoWWkOl/wgsbxRyCkW/t7Mop ATf38SuxFLWZy8bejwpTn88= X-Google-Smtp-Source: ABdhPJwph8+m+uUd25VX5KJa4ssD2Tl9fr6zeHWuawo4FcPaj0lsLN2r/sEIEudr9MKf/HgtgLBwIw== X-Received: by 2002:a50:fc8e:: with SMTP id f14mr27709508edq.87.1633819591210; Sat, 09 Oct 2021 15:46:31 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id l13sm1727115eds.92.2021.10.09.15.46.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 09 Oct 2021 15:46:30 -0700 (PDT) From: Ansuel Smith To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Jakub Kicinski , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith Subject: [net-next PATCH 4/4] net: phy: at803x: better describe debug regs Date: Sun, 10 Oct 2021 00:46:18 +0200 Message-Id: <20211009224618.4988-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211009224618.4988-1-ansuelsmth@gmail.com> References: <20211009224618.4988-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Give a name to known debug regs from Documentation instead of using unknown hex values. Signed-off-by: Ansuel Smith Reviewed-by: Andrew Lunn --- drivers/net/phy/at803x.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index 402b2096f209..f40f17a632ad 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -86,12 +86,12 @@ #define AT803X_PSSR 0x11 /*PHY-Specific Status Register*/ #define AT803X_PSSR_MR_AN_COMPLETE 0x0200 -#define AT803X_DEBUG_REG_0 0x00 +#define AT803X_DEBUG_ANALOG_TEST_CTRL 0x00 #define QCA8327_DEBUG_MANU_CTRL_EN BIT(2) #define QCA8337_DEBUG_MANU_CTRL_EN GENMASK(3, 2) #define AT803X_DEBUG_RX_CLK_DLY_EN BIT(15) -#define AT803X_DEBUG_REG_5 0x05 +#define AT803X_DEBUG_SYSTEM_CTRL_MODE 0x05 #define AT803X_DEBUG_TX_CLK_DLY_EN BIT(8) #define AT803X_DEBUG_REG_HIB_CTRL 0x0b @@ -100,7 +100,7 @@ #define AT803X_DEBUG_REG_3C 0x3C -#define AT803X_DEBUG_REG_3D 0x3D +#define AT803X_DEBUG_REG_GREEN 0x3D #define AT803X_DEBUG_GATE_CLK_IN1000 BIT(6) #define AT803X_DEBUG_REG_1F 0x1F @@ -284,25 +284,25 @@ static int at803x_read_page(struct phy_device *phydev) static int at803x_enable_rx_delay(struct phy_device *phydev) { - return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, 0, + return at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, 0, AT803X_DEBUG_RX_CLK_DLY_EN); } static int at803x_enable_tx_delay(struct phy_device *phydev) { - return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5, 0, + return at803x_debug_reg_mask(phydev, AT803X_DEBUG_SYSTEM_CTRL_MODE, 0, AT803X_DEBUG_TX_CLK_DLY_EN); } static int at803x_disable_rx_delay(struct phy_device *phydev) { - return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, + return at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, AT803X_DEBUG_RX_CLK_DLY_EN, 0); } static int at803x_disable_tx_delay(struct phy_device *phydev) { - return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5, + return at803x_debug_reg_mask(phydev, AT803X_DEBUG_SYSTEM_CTRL_MODE, AT803X_DEBUG_TX_CLK_DLY_EN, 0); } @@ -1300,9 +1300,9 @@ static int qca83xx_config_init(struct phy_device *phydev) switch (switch_revision) { case 1: /* For 100M waveform */ - at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_0, 0x02ea); + at803x_debug_reg_write(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, 0x02ea); /* Turn on Gigabit clock */ - at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_3D, 0x68a0); + at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_GREEN, 0x68a0); break; case 2: @@ -1310,8 +1310,8 @@ static int qca83xx_config_init(struct phy_device *phydev) fallthrough; case 4: phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_AZ_DEBUG, 0x803f); - at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_3D, 0x6860); - at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_5, 0x2c46); + at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_GREEN, 0x6860); + at803x_debug_reg_write(phydev, AT803X_DEBUG_SYSTEM_CTRL_MODE, 0x2c46); at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_3C, 0x6000); break; } @@ -1322,7 +1322,7 @@ static int qca83xx_config_init(struct phy_device *phydev) */ if (phydev->drv->phy_id == QCA8327_A_PHY_ID || phydev->drv->phy_id == QCA8327_B_PHY_ID) - at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, + at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, QCA8327_DEBUG_MANU_CTRL_EN, 0); /* Following original QCA sourcecode set port to prefer master */ @@ -1340,12 +1340,12 @@ static void qca83xx_link_change_notify(struct phy_device *phydev) /* Set DAC Amplitude adjustment to +6% for 100m on link running */ if (phydev->state == PHY_RUNNING) { if (phydev->speed == SPEED_100) - at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, + at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, QCA8327_DEBUG_MANU_CTRL_EN, QCA8327_DEBUG_MANU_CTRL_EN); } else { /* Reset DAC Amplitude adjustment */ - at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, + at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, QCA8327_DEBUG_MANU_CTRL_EN, 0); } } @@ -1392,7 +1392,7 @@ static int qca83xx_suspend(struct phy_device *phydev) phy_modify(phydev, MII_BMCR, mask, 0); } - at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_3D, + at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_GREEN, AT803X_DEBUG_GATE_CLK_IN1000, 0); at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_HIB_CTRL,