From patchwork Mon Oct 11 09:05:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 12549451 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56F25C433EF for ; Mon, 11 Oct 2021 09:06:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 300BD60FED for ; Mon, 11 Oct 2021 09:06:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235325AbhJKJH6 (ORCPT ); Mon, 11 Oct 2021 05:07:58 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:56158 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235182AbhJKJH6 (ORCPT ); Mon, 11 Oct 2021 05:07:58 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1633943157; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=td4wV2eEygq6y44ECvuPe1lQzGztm03vYG4l5phZGs8=; b=DLTitTmbw0MTvi0ErspWdgpVBA33w9j/zPUvqz7xpgjb/oanTboDjECai0uxqC+hwJfsIY hxRmWlAYz9iZS0aLqPHuNLz6ALTktjOQ77S1c4kJjNusWV4Ad2UxqBqjH3pycn1WO/ymFo S1C7DKDcuOj8Kzar6AOli7S9v9sbQTw= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-187-MNxMOF1vN2CRgZVK_bMYQA-1; Mon, 11 Oct 2021 05:05:54 -0400 X-MC-Unique: MNxMOF1vN2CRgZVK_bMYQA-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id CC7BC18414A1; Mon, 11 Oct 2021 09:05:51 +0000 (UTC) Received: from x1.localdomain.com (unknown [10.39.194.183]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6A00157CA8; Mon, 11 Oct 2021 09:05:33 +0000 (UTC) From: Hans de Goede To: "Rafael J . Wysocki" , Mika Westerberg , Bjorn Helgaas , Myron Stowe , Juha-Pekka Heikkila , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H . Peter Anvin" Cc: Hans de Goede , linux-pci@vger.kernel.org, x86@kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Benoit_Gr=C3=A9goir?= =?utf-8?q?e?= , Hui Wang Subject: [PATCH v2] x86/PCI: Ignore E820 reservations for bridge windows on newer systems Date: Mon, 11 Oct 2021 11:05:31 +0200 Message-Id: <20211011090531.244762-1-hdegoede@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Some BIOS-es contain a bug where they add addresses which map to system RAM in the PCI bridge memory window returned by the ACPI _CRS method, see commit 4dc2287c1805 ("x86: avoid E820 regions when allocating address space"). To avoid this Linux by default excludes E820 reservations when allocating addresses since 2010. Windows however ignores E820 reserved regions for PCI mem allocations, so in hindsight Linux honoring them is a problem. Recently (2020) some systems have shown-up with E820 reservations which cover the entire _CRS returned PCI bridge memory window, causing all attempts to assign memory to PCI BARs which have not been setup by the BIOS to fail. For example here are the relevant dmesg bits from a Lenovo IdeaPad 3 15IIL 81WE: [ 0.000000] BIOS-e820: [mem 0x000000004bc50000-0x00000000cfffffff] reserved [ 0.557473] pci_bus 0000:00: root bus resource [mem 0x65400000-0xbfffffff window] Ideally Linux would fully stop honoring E820 reservations for PCI mem allocations, but then the old systems this was added for will regress. Instead keep the old behavior for old systems, while ignoring the E820 reservations like Windows does for any systems from now on. Old systems are defined here as BIOS year < 2018, this was chosen to make sure that pci_use_e820 will not be set on the currently affected systems, while at the same time also taking into account that the systems for which the E820 checking was orignally added may have received BIOS updates for quite a while (esp. CVE related ones), giving them a more recent BIOS year then 2010. Also add pci=no_e820 and pci=use_e820 options to allow overriding the BIOS year heuristic. BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=206459 BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1868899 BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1871793 BugLink: https://bugs.launchpad.net/bugs/1878279 BugLink: https://bugs.launchpad.net/bugs/1931715 BugLink: https://bugs.launchpad.net/bugs/1932069 BugLink: https://bugs.launchpad.net/bugs/1921649 Cc: Benoit Grégoire Cc: Hui Wang Signed-off-by: Hans de Goede Reviewed-by: Mika Westerberg --- Changes in v2: - Replace the per model DMI quirk approach with disabling E820 reservations checking for all systems with a BIOS year >= 2018 - Add documentation for the new kernel-parameters to Documentation/admin-guide/kernel-parameters.txt --- Other patches trying to address the same issue: https://lore.kernel.org/r/20210624095324.34906-1-hui.wang@canonical.com https://lore.kernel.org/r/20200617164734.84845-1-mika.westerberg@linux.intel.com V1 patch: https://lore.kernel.org/r/20211005150956.303707-1-hdegoede@redhat.com --- .../admin-guide/kernel-parameters.txt | 6 ++++ arch/x86/include/asm/pci_x86.h | 10 +++++++ arch/x86/kernel/resource.c | 4 +++ arch/x86/pci/acpi.c | 29 +++++++++++++++++++ arch/x86/pci/common.c | 6 ++++ 5 files changed, 55 insertions(+) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 43dc35fe5bc0..969cde5d74c8 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -3949,6 +3949,12 @@ please report a bug. nocrs [X86] Ignore PCI host bridge windows from ACPI. If you need to use this, please report a bug. + use_e820 [X86] Honor E820 reservations when allocating + PCI host bridge memory. If you need to use this, + please report a bug. + no_e820 [X86] ignore E820 reservations when allocating + PCI host bridge memory. If you need to use this, + please report a bug. routeirq Do IRQ routing for all PCI devices. This is normally done in pci_enable_device(), so this option is a temporary workaround diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h index 490411dba438..e45d661f81de 100644 --- a/arch/x86/include/asm/pci_x86.h +++ b/arch/x86/include/asm/pci_x86.h @@ -39,6 +39,8 @@ do { \ #define PCI_ROOT_NO_CRS 0x100000 #define PCI_NOASSIGN_BARS 0x200000 #define PCI_BIG_ROOT_WINDOW 0x400000 +#define PCI_USE_E820 0x800000 +#define PCI_NO_E820 0x1000000 extern unsigned int pci_probe; extern unsigned long pirq_table_addr; @@ -64,6 +66,8 @@ void pcibios_scan_specific_bus(int busn); /* pci-irq.c */ +struct pci_dev; + struct irq_info { u8 bus, devfn; /* Bus, device and function */ struct { @@ -232,3 +236,9 @@ static inline void mmio_config_writel(void __iomem *pos, u32 val) # define x86_default_pci_init_irq NULL # define x86_default_pci_fixup_irqs NULL #endif + +#if defined CONFIG_PCI && defined CONFIG_ACPI +extern bool pci_use_e820; +#else +#define pci_use_e820 false +#endif diff --git a/arch/x86/kernel/resource.c b/arch/x86/kernel/resource.c index 9b9fb7882c20..e8dc9bc327bd 100644 --- a/arch/x86/kernel/resource.c +++ b/arch/x86/kernel/resource.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include #include +#include static void resource_clip(struct resource *res, resource_size_t start, resource_size_t end) @@ -28,6 +29,9 @@ static void remove_e820_regions(struct resource *avail) int i; struct e820_entry *entry; + if (!pci_use_e820) + return; + for (i = 0; i < e820_table->nr_entries; i++) { entry = &e820_table->entries[i]; diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c index 948656069cdd..6c2febe84b6f 100644 --- a/arch/x86/pci/acpi.c +++ b/arch/x86/pci/acpi.c @@ -21,6 +21,8 @@ struct pci_root_info { static bool pci_use_crs = true; static bool pci_ignore_seg = false; +/* Consumed in arch/x86/kernel/resource.c */ +bool pci_use_e820 = false; static int __init set_use_crs(const struct dmi_system_id *id) { @@ -160,6 +162,33 @@ void __init pci_acpi_crs_quirks(void) "if necessary, use \"pci=%s\" and report a bug\n", pci_use_crs ? "Using" : "Ignoring", pci_use_crs ? "nocrs" : "use_crs"); + + /* + * Some BIOS-es contain a bug where they add addresses which map to system + * RAM in the PCI bridge memory window returned by the ACPI _CRS method, see + * commit 4dc2287c1805 ("x86: avoid E820 regions when allocating address space"). + * To avoid this Linux by default excludes E820 reservations when allocating + * addresses since 2010. Windows however ignores E820 reserved regions for + * PCI mem allocations, so in hindsight Linux honoring them is a problem. + * In 2020 some systems have shown-up with E820 reservations which cover the + * entire _CRS returned PCI bridge memory window, causing all attempts to + * assign memory to PCI BARs to fail if Linux honors the E820 reservations. + * + * Ideally Linux would fully stop honoring E820 reservations for PCI mem + * allocations, but then the old systems this was added for will regress. + * Instead keep the old behavior for old systems, while ignoring the E820 + * reservations like Windows does for any systems from now on. + */ + if (year >= 0 && year < 2018) + pci_use_e820 = true; + + if (pci_probe & PCI_NO_E820) + pci_use_e820 = false; + else if (pci_probe & PCI_USE_E820) + pci_use_e820 = true; + + printk(KERN_INFO "PCI: %s E820 reservations for host bridge windows\n", + pci_use_e820 ? "Honoring" : "Ignoring"); } #ifdef CONFIG_PCI_MMCONFIG diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c index 3507f456fcd0..091ec7e94fcb 100644 --- a/arch/x86/pci/common.c +++ b/arch/x86/pci/common.c @@ -595,6 +595,12 @@ char *__init pcibios_setup(char *str) } else if (!strcmp(str, "nocrs")) { pci_probe |= PCI_ROOT_NO_CRS; return NULL; + } else if (!strcmp(str, "use_e820")) { + pci_probe |= PCI_USE_E820; + return NULL; + } else if (!strcmp(str, "no_e820")) { + pci_probe |= PCI_NO_E820; + return NULL; #ifdef CONFIG_PHYS_ADDR_T_64BIT } else if (!strcmp(str, "big_root_window")) { pci_probe |= PCI_BIG_ROOT_WINDOW;