From patchwork Mon Oct 11 16:56:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hector Martin X-Patchwork-Id: 12550611 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37534C4332F for ; Mon, 11 Oct 2021 16:59:51 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0A54260FD7 for ; Mon, 11 Oct 2021 16:59:51 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 0A54260FD7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=marcan.st Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zJsL/88Col6naBqS2IRV/Ngt2Fx7zW8qlgA+33h+30I=; b=dIlSHi1HvolWrF UMJ2inT1jhd7nPqZpK2nfu92Uj2riUhmg1KCmo+OtwCOkKlZ1dJVRn5Lpr9t7BPkEMnpsWKNaSQ+b /KNB1D01sXZ9tFC/FZJWo5UciBCLCbYpUYTmytmb95+rnAdpP2Jm9AaMVfbRpk7gdjJagSAahnmUd 9XqBuzGGh7Y9aHQ1DW8T1RSE1OxSCIuA+eMgIQRj7CmH/OKCJXGe3ctdfUKuNl+VpKDgRtxrYM3Og 902dJhVCLSMBdFWLXDRa2Px9ij29YjLm5QbAMzNlbAEpjZXWUuapdg7E/qxeZ2CzUzzt4BvlDVLWU kSWD3bE8jAGXLxIJIyLQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZycX-00A8HX-Es; Mon, 11 Oct 2021 16:57:49 +0000 Received: from marcansoft.com ([212.63.210.85] helo=mail.marcansoft.com) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZycP-00A8FK-3z for linux-arm-kernel@lists.infradead.org; Mon, 11 Oct 2021 16:57:42 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: hector@marcansoft.com) by mail.marcansoft.com (Postfix) with ESMTPSA id A2BD44219F; Mon, 11 Oct 2021 16:57:29 +0000 (UTC) From: Hector Martin To: linux-arm-kernel@lists.infradead.org Cc: Hector Martin , Alyssa Rosenzweig , Sven Peter , Marc Zyngier , Mark Kettenis , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Viresh Kumar , Nishanth Menon , Catalin Marinas , "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 1/9] MAINTAINERS: apple: Add apple-mcc and clk-apple-cluster paths Date: Tue, 12 Oct 2021 01:56:59 +0900 Message-Id: <20211011165707.138157-2-marcan@marcan.st> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211011165707.138157-1-marcan@marcan.st> References: <20211011165707.138157-1-marcan@marcan.st> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211011_095741_334179_EDC9447E X-CRM114-Status: UNSURE ( 9.86 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Splitting this out from the drivers, since we have enough things going on in parallel that MAINTAINERS merges are going to cause pain for subsystems. This will go through the SoC tree instead. Signed-off-by: Hector Martin --- MAINTAINERS | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index abdcbcfef73d..81ced53e291b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1719,10 +1719,15 @@ B: https://github.com/AsahiLinux/linux/issues C: irc://irc.oftc.net/asahi-dev T: git https://github.com/AsahiLinux/linux.git F: Documentation/devicetree/bindings/arm/apple.yaml +F: Documentation/devicetree/bindings/clock/apple,* F: Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml +F: Documentation/devicetree/bindings/memory-controllers/apple,* +F: Documentation/devicetree/bindings/opp/apple,* F: Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml F: arch/arm64/boot/dts/apple/ +F: drivers/clk/clk-apple-cluster.c F: drivers/irqchip/irq-apple-aic.c +F: drivers/memory/apple-mcc.c F: include/dt-bindings/interrupt-controller/apple-aic.h F: include/dt-bindings/pinctrl/apple.h From patchwork Mon Oct 11 16:57:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hector Martin X-Patchwork-Id: 12550615 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 333B7C433FE for ; Mon, 11 Oct 2021 17:00:41 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 007CA60FD7 for ; Mon, 11 Oct 2021 17:00:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 007CA60FD7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=marcan.st Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=oHmCrXNKIQTuRnRFysVNG3IAZBydm+SOSN2wgSDEwYI=; b=nK4PumWqSKBh17 TfiSdkovjnEY6/o3HbzOHdbvwhCNZnKfOoF4WwXxBzgmt/c71LwSVoy9uFnBQRNIZYIBRAmr/ay/g 5KX6uiZKnaXfcIhpIo7rVf0Lxp1dL1wWzlR0PLUDRRB9JH7YR0lRWmgmeE6mmhABbK5ZfrxaoeoJZ hpubenhOqQPUtySIUbfWs21nRCjfTWBD4vHmWa9gulXDrNBak00fjB67jgbIFRZ/pw+o15Ab0lVb8 5bCKPDBnHsmfQ2vSNB++4SHcQfBAhH1o/Z2/RM18EdMKTGMje5UY870u92/tj+gCkainlQB2RhQi9 ViMzMFbDa0V50JsjewVQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZych-00A8KK-VF; Mon, 11 Oct 2021 16:58:00 +0000 Received: from marcansoft.com ([2a01:298:fe:f::2] helo=mail.marcansoft.com) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZycQ-00A8Fb-3j for linux-arm-kernel@lists.infradead.org; Mon, 11 Oct 2021 16:57:43 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: hector@marcansoft.com) by mail.marcansoft.com (Postfix) with ESMTPSA id 510E642446; Mon, 11 Oct 2021 16:57:35 +0000 (UTC) From: Hector Martin To: linux-arm-kernel@lists.infradead.org Cc: Hector Martin , Alyssa Rosenzweig , Sven Peter , Marc Zyngier , Mark Kettenis , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Viresh Kumar , Nishanth Menon , Catalin Marinas , "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 2/9] dt-bindings: memory-controller: Add apple, mcc binding Date: Tue, 12 Oct 2021 01:57:00 +0900 Message-Id: <20211011165707.138157-3-marcan@marcan.st> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211011165707.138157-1-marcan@marcan.st> References: <20211011165707.138157-1-marcan@marcan.st> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211011_095742_327091_64806752 X-CRM114-Status: GOOD ( 16.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This device represents the memory controller in Apple SoCs, and is chiefly in charge of adjusting performance characteristics according to system demand. Signed-off-by: Hector Martin --- .../memory-controllers/apple,mcc.yaml | 80 +++++++++++++++++++ .../opp/apple,mcc-operating-points.yaml | 62 ++++++++++++++ 2 files changed, 142 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/apple,mcc.yaml create mode 100644 Documentation/devicetree/bindings/opp/apple,mcc-operating-points.yaml diff --git a/Documentation/devicetree/bindings/memory-controllers/apple,mcc.yaml b/Documentation/devicetree/bindings/memory-controllers/apple,mcc.yaml new file mode 100644 index 000000000000..0774f10e65ed --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/apple,mcc.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/apple,mcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple SoC MCC memory controller performance controls + +maintainers: + - Hector Martin + +description: | + Apple SoCs contain a multichannel memory controller that can have its + configuration changed to adjust to changing performance requirements from + the rest of the SoC. This node represents the controller and provides a + power domain provider that downstream devices can use to adjust the memory + controller performance level. + +properties: + compatible: + items: + - enum: + - apple,t8103-mcc + - const: apple,mcc + + reg: + maxItems: 1 + + "#power-domain-cells": + const: 0 + + operating-points-v2: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + A reference to the OPP table describing the memory controller performance + levels. Each OPP node should contain an `apple,memory-perf-config` + property that contains the configuration values for that performance + level. + + apple,num-channels: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The number of memory channels in use. + +required: + - compatible + - reg + - "#power-domain-cells" + - operating-points-v2 + - apple,num-channels + +additionalProperties: false + +examples: + # See clock/apple,cluster-clock.yaml for an example of downstream usage. + - | + mcc_opp: opp-table-2 { + compatible = "operating-points-v2"; + + mcc_lowperf: opp0 { + opp-level = <0>; + apple,memory-perf-config = <0x813057f 0x1800180>; + }; + mcc_highperf: opp1 { + opp-level = <1>; + apple,memory-perf-config = <0x133 0x55555340>; + }; + }; + soc { + #address-cells = <2>; + #size-cells = <2>; + + mcc: memory-controller@200200000 { + compatible = "apple,t8103-mcc", "apple,mcc"; + #power-domain-cells = <0>; + reg = <0x2 0x200000 0x0 0x200000>; + operating-points-v2 = <&mcc_opp>; + apple,num-channels = <8>; + }; + }; diff --git a/Documentation/devicetree/bindings/opp/apple,mcc-operating-points.yaml b/Documentation/devicetree/bindings/opp/apple,mcc-operating-points.yaml new file mode 100644 index 000000000000..babf27841bb7 --- /dev/null +++ b/Documentation/devicetree/bindings/opp/apple,mcc-operating-points.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/opp/apple,mcc-operating-points.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple SoC memory controller OPP bindings + +maintainers: + - Hector Martin + +description: | + Apple SoCs can have their memory controller performance adjusted depending on + system requirements. These performance states are represented by specific + memory controller register values. The apple-mcc driver uses these values + to change the MCC performance. + +allOf: + - $ref: opp-v2-base.yaml# + +properties: + compatible: + const: apple,mcc-operating-points + +required: + - compatible + +patternProperties: + "opp[0-9]+": + type: object + + properties: + opp-level: true + apple,memory-perf-config: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + A pair of register values used to configure this performance state. + minItems: 2 + maxItems: 2 + + required: + - opp-level + - apple,memory-perf-config + + unevaluatedProperties: false + +additionalProperties: false + +examples: + - | + mcc_opp: opp-table-2 { + compatible = "operating-points-v2"; + + mcc_lowperf: opp0 { + opp-level = <0>; + apple,memory-perf-config = <0x813057f 0x1800180>; + }; + mcc_highperf: opp1 { + opp-level = <1>; + apple,memory-perf-config = <0x133 0x55555340>; + }; + }; From patchwork Mon Oct 11 16:57:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hector Martin X-Patchwork-Id: 12550613 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0D59C433EF for ; Mon, 11 Oct 2021 17:00:39 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BFF9C60FD7 for ; Mon, 11 Oct 2021 17:00:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org BFF9C60FD7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=marcan.st Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=BmeOJsIjIW9xLRRcDzImpZKtbuWUOgrXDfebKtIk8ZE=; b=bgzNluYjAjENs9 PMXwiGXfpaC9zZVZyVK8xuP6Y2T6Qn7n1ndntgeVvIv03vbO0U0FWp/gNtmcbGk9PLAShGrHjl+/p yrq1Z1fpbWKd6BeJqSDMPRwHrO11z2gAfOeMdLCQl3k5cmhOPrIaSdPfLHglXPQO0TpvXJRziyo5c HJD1dqpTMVYMG2v3ggLQRHM9sLanjNtw1D2jQ9fQcKDE759Yo4mP6vYmR8D5NWBz2i0duThTK8+iq twDczRD4Ey+OmC76/AgvCropc+CcPgqfSQjb0G7HhiFuZN+lEbox5AzFRdigtR0KQJKwWZ/fZ31q0 QPiAln4fwTLd9AcDj0mA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZycu-00A8O2-FR; Mon, 11 Oct 2021 16:58:12 +0000 Received: from marcansoft.com ([212.63.210.85] helo=mail.marcansoft.com) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZycV-00A8H0-Ll for linux-arm-kernel@lists.infradead.org; Mon, 11 Oct 2021 16:57:49 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: hector@marcansoft.com) by mail.marcansoft.com (Postfix) with ESMTPSA id F3A2042462; Mon, 11 Oct 2021 16:57:40 +0000 (UTC) From: Hector Martin To: linux-arm-kernel@lists.infradead.org Cc: Hector Martin , Alyssa Rosenzweig , Sven Peter , Marc Zyngier , Mark Kettenis , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Viresh Kumar , Nishanth Menon , Catalin Marinas , "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 3/9] dt-bindings: clock: Add apple,cluster-clk binding Date: Tue, 12 Oct 2021 01:57:01 +0900 Message-Id: <20211011165707.138157-4-marcan@marcan.st> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211011165707.138157-1-marcan@marcan.st> References: <20211011165707.138157-1-marcan@marcan.st> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211011_095747_888623_3A75B733 X-CRM114-Status: GOOD ( 18.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This device represents the CPU performance state switching mechanism as a clock controller, to be used with the standard cpufreq-dt infrastructure. Signed-off-by: Hector Martin --- .../bindings/clock/apple,cluster-clk.yaml | 115 ++++++++++++++++++ 1 file changed, 115 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/apple,cluster-clk.yaml diff --git a/Documentation/devicetree/bindings/clock/apple,cluster-clk.yaml b/Documentation/devicetree/bindings/clock/apple,cluster-clk.yaml new file mode 100644 index 000000000000..9a8b863dadc0 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/apple,cluster-clk.yaml @@ -0,0 +1,115 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/apple,cluster-clk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CPU cluster frequency scaling for Apple SoCs + +maintainers: + - Hector Martin + +description: | + Apple SoCs control CPU cluster frequencies by using a performance state + index. This node represents the feature as a clock controller, and uses + a reference to the CPU OPP table to translate clock frequencies into + performance states. This allows the CPUs to use the standard cpufreq-dt + mechanism for frequency scaling. + +properties: + compatible: + items: + - enum: + - apple,t8103-cluster-clk + - const: apple,cluster-clk + + reg: + maxItems: 1 + + '#clock-cells': + const: 0 + + operating-points-v2: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + A reference to the OPP table used for the CPU cluster controlled by this + device instance. The table should contain an `opp-level` property for + every OPP, which represents the p-state index used by the hardware to + represent this performance level. + + OPPs may also have a `required-opps` property (see power-domains). + + power-domains: + maxItems: 1 + description: + An optional reference to a power domain provider that links its + performance state to the CPU cluster performance state. This is typically + a memory controller. If set, the `required-opps` property in the CPU + frequency OPP nodes will be used to change the performance state of this + provider state in tandem with CPU frequency changes. + +required: + - compatible + - reg + - '#clock-cells' + - operating-points-v2 + +additionalProperties: false + + +examples: + - | + pcluster_opp: opp-table-1 { + compatible = "operating-points-v2"; + opp-shared; + + opp01 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <781000>; + opp-level = <1>; + clock-latency-ns = <8000>; + required-opps = <&mcc_lowperf>; + }; + /* intermediate p-states omitted */ + opp15 { + opp-hz = /bits/ 64 <3204000000>; + opp-microvolt = <1081000>; + opp-level = <15>; + clock-latency-ns = <56000>; + required-opps = <&mcc_highperf>; + }; + }; + + mcc_opp: opp-table-2 { + compatible = "operating-points-v2"; + + mcc_lowperf: opp0 { + opp-level = <0>; + apple,memory-perf-config = <0x813057f 0x1800180>; + }; + mcc_highperf: opp1 { + opp-level = <1>; + apple,memory-perf-config = <0x133 0x55555340>; + }; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + + mcc: memory-controller@200200000 { + compatible = "apple,t8103-mcc", "apple,mcc"; + #power-domain-cells = <0>; + reg = <0x2 0x200000 0x0 0x200000>; + operating-points-v2 = <&mcc_opp>; + apple,num-channels = <8>; + }; + + clk_pcluster: clock-controller@211e20000 { + compatible = "apple,t8103-cluster-clk", "apple,cluster-clk"; + #clock-cells = <0>; + reg = <0x2 0x11e20000 0x0 0x4000>; + operating-points-v2 = <&pcluster_opp>; + power-domains = <&mcc>; + }; + }; From patchwork Mon Oct 11 16:57:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hector Martin X-Patchwork-Id: 12550617 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8EB3FC433F5 for ; Mon, 11 Oct 2021 17:00:57 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 598DF60F6E for ; Mon, 11 Oct 2021 17:00:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 598DF60F6E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=marcan.st Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=3CklIHugj4Xm2bqobFrKaKj4wgXnLDPpfCSRtxkMwg8=; b=2vJIXKutonFkpb ruFgevtbR6AM0y5NiO0jv41JQ1Wg2juC4nBlmxCVnvYkGYvLTDiPztM1mhB3bSzrn5cpMmlAeJs8h C5MkIhgxQn0lNJwcWE7cC7MPGzfu+T+svrpt6S2iNwmL7BYzDxmnjWZC2Qduqje7YNinHDzFWRvIh SyiyBOaMdsmizbnEIDVPMP2Oi1nDdSNfw0sqc4q+EmJo39j07M3o59qqpxuqZE29sCFWe8dxnSg5y 4M1/CnBm+9+oMsvIG8GxQHQj5Tp4z5T9+Pb8iAP1V/rSj3C19LBf4QJz4uvUx7O0YVhcMrDHgsO3c fdZL4lk9Zu2v5xpy5wAA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZyd7-00A8Sp-Fn; Mon, 11 Oct 2021 16:58:25 +0000 Received: from marcansoft.com ([212.63.210.85] helo=mail.marcansoft.com) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZycb-00A8IQ-Fi for linux-arm-kernel@lists.infradead.org; Mon, 11 Oct 2021 16:57:54 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: hector@marcansoft.com) by mail.marcansoft.com (Postfix) with ESMTPSA id A1FE742468; Mon, 11 Oct 2021 16:57:46 +0000 (UTC) From: Hector Martin To: linux-arm-kernel@lists.infradead.org Cc: Hector Martin , Alyssa Rosenzweig , Sven Peter , Marc Zyngier , Mark Kettenis , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Viresh Kumar , Nishanth Menon , Catalin Marinas , "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 4/9] opp: core: Don't warn if required OPP device does not exist Date: Tue, 12 Oct 2021 01:57:02 +0900 Message-Id: <20211011165707.138157-5-marcan@marcan.st> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211011165707.138157-1-marcan@marcan.st> References: <20211011165707.138157-1-marcan@marcan.st> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211011_095753_703119_E32DFEAB X-CRM114-Status: GOOD ( 13.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org When required-opps is used in CPU OPP tables, there is no parent power domain to drive it. Squelch this error, to allow a clock driver to handle this directly instead. Signed-off-by: Hector Martin --- drivers/opp/core.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/opp/core.c b/drivers/opp/core.c index 04b4691a8aac..89e616721f70 100644 --- a/drivers/opp/core.c +++ b/drivers/opp/core.c @@ -873,12 +873,13 @@ static int _set_required_opp(struct device *dev, struct device *pd_dev, return 0; ret = dev_pm_genpd_set_performance_state(pd_dev, pstate); - if (ret) { + if (ret && ret != -ENODEV) { dev_err(dev, "Failed to set performance rate of %s: %d (%d)\n", dev_name(pd_dev), pstate, ret); + return ret; } - return ret; + return 0; } /* This is only called for PM domain for now */ From patchwork Mon Oct 11 16:57:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hector Martin X-Patchwork-Id: 12550619 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDD54C433EF for ; Mon, 11 Oct 2021 17:00:57 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B869D60F6E for ; Mon, 11 Oct 2021 17:00:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org B869D60F6E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=marcan.st Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=KYfbzaMv9qiyRxIdpH7m8K+k+apwqEmJAULGQMJS0Z8=; b=aR1pDuYRMrAurH YQ/YeDXhvB8upGtwEs+uiomJ+5on95XNDqyV2cJ0EL1Sfhp96atXH+ieQdv7uk2O2F/QTXgvUzZ3h b8BqhRrV+fXDbXIMLiTNpP4T0ecK8Kj+rVh173grNiL6XL8pNfiw2MRyPkiv8YeIA7Er+SKuH/0JS hNFjWKZl57QV2lzeUE95f6/Td3Fn2tFgp11MujoTpv3ws6c4JQ7AuUHyRy+VuM8/L3tVMGbrg9OdK AaW5p3n64Q6vjbyjDeZhrYvHj0eiJJh6zpkpk+w8G9BM7p00Ih6cq7m9gw/cs6To9uUI5Z1N0s3dn +YE7rdsSbgjPC5GBaZGA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZydM-00A8Zg-NQ; Mon, 11 Oct 2021 16:58:40 +0000 Received: from marcansoft.com ([212.63.210.85] helo=mail.marcansoft.com) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZycg-00A8K1-TT for linux-arm-kernel@lists.infradead.org; Mon, 11 Oct 2021 16:58:00 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: hector@marcansoft.com) by mail.marcansoft.com (Postfix) with ESMTPSA id 5CA0E42499; Mon, 11 Oct 2021 16:57:52 +0000 (UTC) From: Hector Martin To: linux-arm-kernel@lists.infradead.org Cc: Hector Martin , Alyssa Rosenzweig , Sven Peter , Marc Zyngier , Mark Kettenis , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Viresh Kumar , Nishanth Menon , Catalin Marinas , "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 5/9] PM: domains: Add of_genpd_add_provider_simple_noclk() Date: Tue, 12 Oct 2021 01:57:03 +0900 Message-Id: <20211011165707.138157-6-marcan@marcan.st> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211011165707.138157-1-marcan@marcan.st> References: <20211011165707.138157-1-marcan@marcan.st> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211011_095759_137812_E267F0E1 X-CRM114-Status: GOOD ( 13.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is analogous to of_genpd_add_provider_simple(), but calls dev_pm_opp_of_add_table_noclk() instead of dev_pm_opp_of_add_table(). Signed-off-by: Hector Martin --- drivers/base/power/domain.c | 39 +++++++++++++++++++++++++++++-------- include/linux/pm_domain.h | 8 ++++++++ 2 files changed, 39 insertions(+), 8 deletions(-) diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c index 5db704f02e71..3377b9dd514c 100644 --- a/drivers/base/power/domain.c +++ b/drivers/base/power/domain.c @@ -2227,13 +2227,9 @@ static bool genpd_present(const struct generic_pm_domain *genpd) return ret; } -/** - * of_genpd_add_provider_simple() - Register a simple PM domain provider - * @np: Device node pointer associated with the PM domain provider. - * @genpd: Pointer to PM domain associated with the PM domain provider. - */ -int of_genpd_add_provider_simple(struct device_node *np, - struct generic_pm_domain *genpd) +static int _of_genpd_add_provider_simple(struct device_node *np, + struct generic_pm_domain *genpd, + bool getclk) { int ret; @@ -2247,7 +2243,10 @@ int of_genpd_add_provider_simple(struct device_node *np, /* Parse genpd OPP table */ if (genpd->set_performance_state) { - ret = dev_pm_opp_of_add_table(&genpd->dev); + if (getclk) + ret = dev_pm_opp_of_add_table(&genpd->dev); + else + ret = dev_pm_opp_of_add_table_noclk(&genpd->dev, 0); if (ret) { if (ret != -EPROBE_DEFER) dev_err(&genpd->dev, "Failed to add OPP table: %d\n", @@ -2278,8 +2277,32 @@ int of_genpd_add_provider_simple(struct device_node *np, return 0; } + +/** + * of_genpd_add_provider_simple() - Register a simple PM domain provider + * @np: Device node pointer associated with the PM domain provider. + * @genpd: Pointer to PM domain associated with the PM domain provider. + */ +int of_genpd_add_provider_simple(struct device_node *np, + struct generic_pm_domain *genpd) +{ + return _of_genpd_add_provider_simple(np, genpd, true); +} EXPORT_SYMBOL_GPL(of_genpd_add_provider_simple); +/** + * of_genpd_add_provider_simple_noclk() - Register a simple clockless + * PM domain provider + * @np: Device node pointer associated with the PM domain provider. + * @genpd: Pointer to PM domain associated with the PM domain provider. + */ +int of_genpd_add_provider_simple_noclk(struct device_node *np, + struct generic_pm_domain *genpd) +{ + return _of_genpd_add_provider_simple(np, genpd, false); +} +EXPORT_SYMBOL_GPL(of_genpd_add_provider_simple_noclk); + /** * of_genpd_add_provider_onecell() - Register a onecell PM domain provider * @np: Device node pointer associated with the PM domain provider. diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h index 67017c9390c8..db3f75612512 100644 --- a/include/linux/pm_domain.h +++ b/include/linux/pm_domain.h @@ -316,6 +316,8 @@ struct genpd_onecell_data { #ifdef CONFIG_PM_GENERIC_DOMAINS_OF int of_genpd_add_provider_simple(struct device_node *np, struct generic_pm_domain *genpd); +int of_genpd_add_provider_simple_noclk(struct device_node *np, + struct generic_pm_domain *genpd); int of_genpd_add_provider_onecell(struct device_node *np, struct genpd_onecell_data *data); void of_genpd_del_provider(struct device_node *np); @@ -342,6 +344,12 @@ static inline int of_genpd_add_provider_simple(struct device_node *np, return -EOPNOTSUPP; } +static inline int of_genpd_add_provider_simple_noclk(struct device_node *np, + struct generic_pm_domain *genpd) +{ + return -EOPNOTSUPP; +} + static inline int of_genpd_add_provider_onecell(struct device_node *np, struct genpd_onecell_data *data) { From patchwork Mon Oct 11 16:57:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hector Martin X-Patchwork-Id: 12550621 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33B29C433F5 for ; Mon, 11 Oct 2021 17:01:15 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 00F2C60F3A for ; Mon, 11 Oct 2021 17:01:14 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 00F2C60F3A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=marcan.st Authentication-Results: mail.kernel.org; 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Mon, 11 Oct 2021 16:58:53 +0000 Received: from marcansoft.com ([212.63.210.85] helo=mail.marcansoft.com) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZycm-00A8Lm-Kz for linux-arm-kernel@lists.infradead.org; Mon, 11 Oct 2021 16:58:06 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: hector@marcansoft.com) by mail.marcansoft.com (Postfix) with ESMTPSA id 0B91D424EC; Mon, 11 Oct 2021 16:57:57 +0000 (UTC) From: Hector Martin To: linux-arm-kernel@lists.infradead.org Cc: Hector Martin , Alyssa Rosenzweig , Sven Peter , Marc Zyngier , Mark Kettenis , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Viresh Kumar , Nishanth Menon , Catalin Marinas , "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 6/9] memory: apple: Add apple-mcc driver to manage MCC perf in Apple SoCs Date: Tue, 12 Oct 2021 01:57:04 +0900 Message-Id: <20211011165707.138157-7-marcan@marcan.st> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211011165707.138157-1-marcan@marcan.st> References: <20211011165707.138157-1-marcan@marcan.st> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211011_095804_905471_2959C669 X-CRM114-Status: GOOD ( 25.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This driver binds to the memory controller hardware in Apple SoCs such as the Apple M1, and provides a power domain that downstream devices can use to change the performance state of the memory controller. Signed-off-by: Hector Martin --- drivers/memory/Kconfig | 9 +++ drivers/memory/Makefile | 1 + drivers/memory/apple-mcc.c | 130 +++++++++++++++++++++++++++++++++++++ 3 files changed, 140 insertions(+) create mode 100644 drivers/memory/apple-mcc.c diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index 72c0df129d5c..48ef3d563a1c 100644 --- a/drivers/memory/Kconfig +++ b/drivers/memory/Kconfig @@ -30,6 +30,15 @@ config ARM_PL172_MPMC If you have an embedded system with an AMBA bus and a PL172 controller, say Y or M here. +config APPLE_MCC + tristate "Apple SoC MCC driver" + default y if ARCH_APPLE + select PM_GENERIC_DOMAINS + depends on ARCH_APPLE || COMPILE_TEST + help + This driver manages performance tuning for the memory controller in + Apple SoCs, such as the Apple M1. + config ATMEL_SDRAMC bool "Atmel (Multi-port DDR-)SDRAM Controller" default y if ARCH_AT91 diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile index bc7663ed1c25..947840cbd2d4 100644 --- a/drivers/memory/Makefile +++ b/drivers/memory/Makefile @@ -8,6 +8,7 @@ ifeq ($(CONFIG_DDR),y) obj-$(CONFIG_OF) += of_memory.o endif obj-$(CONFIG_ARM_PL172_MPMC) += pl172.o +obj-$(CONFIG_APPLE_MCC) += apple-mcc.o obj-$(CONFIG_ATMEL_SDRAMC) += atmel-sdramc.o obj-$(CONFIG_ATMEL_EBI) += atmel-ebi.o obj-$(CONFIG_BRCMSTB_DPFE) += brcmstb_dpfe.o diff --git a/drivers/memory/apple-mcc.c b/drivers/memory/apple-mcc.c new file mode 100644 index 000000000000..55959f034b9a --- /dev/null +++ b/drivers/memory/apple-mcc.c @@ -0,0 +1,130 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Apple SoC MCC memory controller performance control driver + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define APPLE_MCC_PERF_CONFIG1 0xdc4 +#define APPLE_MCC_PERF_CONFIG2 0xdbc +#define APPLE_MCC_CHANNEL(x) ((x) * 0x40000) + +struct apple_mcc { + struct device *dev; + struct generic_pm_domain genpd; + void __iomem *reg_base; + u32 num_channels; +}; + +#define to_apple_mcc(_genpd) container_of(_genpd, struct apple_mcc, genpd) + +static int apple_mcc_set_performance_state(struct generic_pm_domain *genpd, unsigned int state) +{ + struct apple_mcc *mcc = to_apple_mcc(genpd); + struct dev_pm_opp *opp; + struct device_node *np; + u32 perf_config[2]; + unsigned int i; + + dev_dbg(mcc->dev, "switching to perf state %d\n", state); + + opp = dev_pm_opp_find_level_exact(&mcc->genpd.dev, state); + if (IS_ERR(opp)) + return PTR_ERR(opp); + + np = dev_pm_opp_get_of_node(opp); + if (of_property_read_u32_array(np, "apple,memory-perf-config", + perf_config, ARRAY_SIZE(perf_config))) { + dev_err(mcc->dev, "missing apple,memory-perf-config property"); + of_node_put(np); + return -EINVAL; + } + of_node_put(np); + + for (i = 0; i < mcc->num_channels; i++) { + writel_relaxed(perf_config[0], + mcc->reg_base + APPLE_MCC_CHANNEL(i) + APPLE_MCC_PERF_CONFIG1); + writel_relaxed(perf_config[1], + mcc->reg_base + APPLE_MCC_CHANNEL(i) + APPLE_MCC_PERF_CONFIG2); + } + + return 0; +} + +static unsigned int apple_mcc_opp_to_performance_state(struct generic_pm_domain *genpd, + struct dev_pm_opp *opp) +{ + return dev_pm_opp_get_level(opp); +} + +static int apple_mcc_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *node = dev->of_node; + struct apple_mcc *mcc; + int ret; + + mcc = devm_kzalloc(dev, sizeof(*mcc), GFP_KERNEL); + if (!mcc) + return -ENOMEM; + + mcc->reg_base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(mcc->reg_base)) + return PTR_ERR(mcc->reg_base); + + if (of_property_read_u32(node, "apple,num-channels", &mcc->num_channels)) { + dev_err(dev, "missing apple,num-channels property\n"); + return -ENOENT; + } + + mcc->dev = dev; + mcc->genpd.name = "apple-mcc-perf"; + mcc->genpd.opp_to_performance_state = apple_mcc_opp_to_performance_state; + mcc->genpd.set_performance_state = apple_mcc_set_performance_state; + + ret = pm_genpd_init(&mcc->genpd, NULL, false); + if (ret < 0) { + dev_err(dev, "pm_genpd_init failed\n"); + return ret; + } + + ret = of_genpd_add_provider_simple_noclk(node, &mcc->genpd); + if (ret < 0) { + dev_err(dev, "of_genpd_add_provider_simple failed\n"); + return ret; + } + + dev_info(dev, "Apple MCC performance driver initialized\n"); + + return 0; +} + +static const struct of_device_id apple_mcc_of_match[] = { + { .compatible = "apple,mcc" }, + {} +}; + +MODULE_DEVICE_TABLE(of, apple_mcc_of_match); + +static struct platform_driver apple_mcc_driver = { + .probe = apple_mcc_probe, + .driver = { + .name = "apple-mcc", + .of_match_table = apple_mcc_of_match, + }, +}; + +MODULE_AUTHOR("Hector Martin "); +MODULE_DESCRIPTION("MCC memory controller performance tuning driver for Apple SoCs"); +MODULE_LICENSE("GPL v2"); + +module_platform_driver(apple_mcc_driver); From patchwork Mon Oct 11 16:57:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hector Martin X-Patchwork-Id: 12550623 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2FF1C433EF for ; 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Mon, 11 Oct 2021 16:58:03 +0000 (UTC) From: Hector Martin To: linux-arm-kernel@lists.infradead.org Cc: Hector Martin , Alyssa Rosenzweig , Sven Peter , Marc Zyngier , Mark Kettenis , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Viresh Kumar , Nishanth Menon , Catalin Marinas , "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 7/9] clk: apple: Add clk-apple-cluster driver to manage CPU p-states Date: Tue, 12 Oct 2021 01:57:05 +0900 Message-Id: <20211011165707.138157-8-marcan@marcan.st> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211011165707.138157-1-marcan@marcan.st> References: <20211011165707.138157-1-marcan@marcan.st> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211011_095810_675054_3ABF9C67 X-CRM114-Status: GOOD ( 22.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This driver exposes the CPU performance state switching hardware in Apple SoCs as a clock controller that can be used together with the generic cpufreq-dt mechanism to implement cpufreq support. It also supports binding to an apple-mcc instance, to increase memory controller performance when the CPUs are in the highest performance states. Signed-off-by: Hector Martin --- drivers/clk/Kconfig | 9 ++ drivers/clk/Makefile | 1 + drivers/clk/clk-apple-cluster.c | 184 ++++++++++++++++++++++++++++++++ 3 files changed, 194 insertions(+) create mode 100644 drivers/clk/clk-apple-cluster.c diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index c5b3dc97396a..f3c8ad041f91 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -390,6 +390,15 @@ config COMMON_CLK_K210 help Support for the Canaan Kendryte K210 RISC-V SoC clocks. +config COMMON_CLK_APPLE_CLUSTER + bool "Clock driver for Apple SoC CPU clusters" + depends on ARCH_APPLE || COMPILE_TEST + select CPUFREQ_DT + default ARCH_APPLE + help + This driver supports CPU cluster frequency switching on Apple SoC + platforms. + source "drivers/clk/actions/Kconfig" source "drivers/clk/analogbits/Kconfig" source "drivers/clk/baikal-t1/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index e42312121e51..6dba8c2052c7 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -31,6 +31,7 @@ obj-$(CONFIG_COMMON_CLK_FIXED_MMIO) += clk-fixed-mmio.o obj-$(CONFIG_COMMON_CLK_FSL_FLEXSPI) += clk-fsl-flexspi.o obj-$(CONFIG_COMMON_CLK_FSL_SAI) += clk-fsl-sai.o obj-$(CONFIG_COMMON_CLK_GEMINI) += clk-gemini.o +obj-$(CONFIG_COMMON_CLK_APPLE_CLUSTER) += clk-apple-cluster.o obj-$(CONFIG_COMMON_CLK_ASPEED) += clk-aspeed.o obj-$(CONFIG_MACH_ASPEED_G6) += clk-ast2600.o obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o diff --git a/drivers/clk/clk-apple-cluster.c b/drivers/clk/clk-apple-cluster.c new file mode 100644 index 000000000000..9e9be38f13b2 --- /dev/null +++ b/drivers/clk/clk-apple-cluster.c @@ -0,0 +1,184 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Apple SoC CPU cluster performance state driver + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define APPLE_CLUSTER_PSTATE 0x20 +#define APPLE_CLUSTER_PSTATE_BUSY BIT(31) +#define APPLE_CLUSTER_PSTATE_SET BIT(25) +#define APPLE_CLUSTER_PSTATE_DESIRED2 GENMASK(15, 12) +#define APPLE_CLUSTER_PSTATE_DESIRED1 GENMASK(3, 0) + +struct apple_cluster_clk { + struct clk_hw hw; + struct device *dev; + void __iomem *reg_base; + bool has_pd; +}; + +#define to_apple_cluster_clk(_hw) container_of(_hw, struct apple_cluster_clk, hw) + +#define APPLE_CLUSTER_SWITCH_TIMEOUT 100 + +static int apple_cluster_clk_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct apple_cluster_clk *cluster = to_apple_cluster_clk(hw); + struct dev_pm_opp *opp; + unsigned int level; + u64 reg; + + opp = dev_pm_opp_find_freq_floor(cluster->dev, &rate); + + if (IS_ERR(opp)) + return PTR_ERR(opp); + + level = dev_pm_opp_get_level(opp); + + dev_dbg(cluster->dev, "set_rate: %ld -> %d\n", rate, level); + + if (readq_poll_timeout(cluster->reg_base + APPLE_CLUSTER_PSTATE, reg, + !(reg & APPLE_CLUSTER_PSTATE_BUSY), 2, + APPLE_CLUSTER_SWITCH_TIMEOUT)) { + dev_err(cluster->dev, "timed out waiting for busy flag\n"); + return -EIO; + } + + reg &= ~(APPLE_CLUSTER_PSTATE_DESIRED1 | APPLE_CLUSTER_PSTATE_DESIRED2); + reg |= FIELD_PREP(APPLE_CLUSTER_PSTATE_DESIRED1, level); + reg |= FIELD_PREP(APPLE_CLUSTER_PSTATE_DESIRED2, level); + reg |= APPLE_CLUSTER_PSTATE_SET; + + writeq_relaxed(reg, cluster->reg_base + APPLE_CLUSTER_PSTATE); + + if (cluster->has_pd) + dev_pm_genpd_set_performance_state(cluster->dev, + dev_pm_opp_get_required_pstate(opp, 0)); + + return 0; +} + +static unsigned long apple_cluster_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) +{ + struct apple_cluster_clk *cluster = to_apple_cluster_clk(hw); + struct dev_pm_opp *opp; + u64 reg; + + reg = readq_relaxed(cluster->reg_base + APPLE_CLUSTER_PSTATE); + + opp = dev_pm_opp_find_level_exact(cluster->dev, + FIELD_GET(APPLE_CLUSTER_PSTATE_DESIRED1, reg)); + + if (IS_ERR(opp)) { + dev_err(cluster->dev, "failed to find level: 0x%llx (%ld)\n", reg, PTR_ERR(opp)); + return 0; + } + + return dev_pm_opp_get_freq(opp); +} + +static long apple_cluster_clk_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + struct apple_cluster_clk *cluster = to_apple_cluster_clk(hw); + struct dev_pm_opp *opp; + + opp = dev_pm_opp_find_freq_floor(cluster->dev, &rate); + + if (IS_ERR(opp)) { + dev_err(cluster->dev, "failed to find rate: %ld (%ld)\n", rate, PTR_ERR(opp)); + return PTR_ERR(opp); + } + + return rate; +} + +static const struct clk_ops apple_cluster_clk_ops = { + .set_rate = apple_cluster_clk_set_rate, + .recalc_rate = apple_cluster_clk_recalc_rate, + .round_rate = apple_cluster_clk_round_rate, +}; + +static int apple_cluster_clk_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *node = dev->of_node; + struct apple_cluster_clk *cluster; + struct clk_hw *hw; + struct clk_init_data init; + int ret; + + memset(&init, 0, sizeof(init)); + cluster = devm_kzalloc(dev, sizeof(*cluster), GFP_KERNEL); + if (!cluster) + return -ENOMEM; + + cluster->dev = dev; + cluster->reg_base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(cluster->reg_base)) + return PTR_ERR(cluster->reg_base); + + hw = &cluster->hw; + hw->init = &init; + + init.name = pdev->name; + init.num_parents = 0; + init.ops = &apple_cluster_clk_ops; + init.flags = 0; + + ret = dev_pm_opp_of_add_table_noclk(dev, 0); + if (ret < 0) { + dev_err(dev, "failed to get opp table\n"); + return ret; + } + + cluster->has_pd = of_property_read_bool(node, "power-domains"); + + ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw); + if (ret < 0) + return ret; + + ret = devm_clk_hw_register(dev, hw); + if (ret) { + dev_err(dev, "failed to register clock\n"); + return ret; + } + + return 0; +} + +static const struct of_device_id apple_cluster_clk_of_match[] = { + { .compatible = "apple,cluster-clk" }, + {} +}; + +MODULE_DEVICE_TABLE(of, apple_cluster_clk_of_match); + +static struct platform_driver apple_cluster_clk_driver = { + .probe = apple_cluster_clk_probe, + .driver = { + .name = "apple-cluster-clk", + .of_match_table = apple_cluster_clk_of_match, + }, +}; + +MODULE_AUTHOR("Hector Martin "); +MODULE_DESCRIPTION("CPU cluster performance state driver for Apple SoCs"); +MODULE_LICENSE("GPL v2"); + +module_platform_driver(apple_cluster_clk_driver); From patchwork Mon Oct 11 16:57:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hector Martin X-Patchwork-Id: 12550625 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B16DC433F5 for ; Mon, 11 Oct 2021 17:01:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DC0E860F6E for ; Mon, 11 Oct 2021 17:01:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org DC0E860F6E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=marcan.st Authentication-Results: mail.kernel.org; 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Mon, 11 Oct 2021 16:59:33 +0000 Received: from marcansoft.com ([212.63.210.85] helo=mail.marcansoft.com) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZycy-00A8PF-7l for linux-arm-kernel@lists.infradead.org; Mon, 11 Oct 2021 16:58:17 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: hector@marcansoft.com) by mail.marcansoft.com (Postfix) with ESMTPSA id 5FDA942553; Mon, 11 Oct 2021 16:58:09 +0000 (UTC) From: Hector Martin To: linux-arm-kernel@lists.infradead.org Cc: Hector Martin , Alyssa Rosenzweig , Sven Peter , Marc Zyngier , Mark Kettenis , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Viresh Kumar , Nishanth Menon , Catalin Marinas , "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 8/9] arm64: apple: Select MEMORY and APPLE_MCC Date: Tue, 12 Oct 2021 01:57:06 +0900 Message-Id: <20211011165707.138157-9-marcan@marcan.st> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211011165707.138157-1-marcan@marcan.st> References: <20211011165707.138157-1-marcan@marcan.st> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211011_095816_458031_6BD3B2B2 X-CRM114-Status: GOOD ( 10.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This driver is for the memory controller and users should always have it; it is also a requirement with our devicetree configs for cpufreq to work properly if that driver is available. Signed-off-by: Hector Martin --- arch/arm64/Kconfig.platforms | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index b0ce18d4cc98..b60ed872dae1 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -30,6 +30,8 @@ config ARCH_ALPINE config ARCH_APPLE bool "Apple Silicon SoC family" select APPLE_AIC + select MEMORY + select APPLE_MCC help This enables support for Apple's in-house ARM SoC family, starting with the Apple M1. From patchwork Mon Oct 11 16:57:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hector Martin X-Patchwork-Id: 12550627 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A529C433FE for ; Mon, 11 Oct 2021 17:02:11 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 17DB7603E7 for ; Mon, 11 Oct 2021 17:02:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 17DB7603E7 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=marcan.st Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=loJcgnvf+hbvT7Gh9kAMu5kcDe46nFds8sUE2gL6+lo=; b=HFhYafEd6JeDK1 TWaxCELz+BlNveNH4PU3ESXert4K/5CDn13kI/n7j1lU/rmnAt0u6LOp5NaTAg3bU4v5ZSmMICAl0 uaukKd+RxSqZR+2CLLYikt4v2hwJJClSXLtO3f902lu4oYmjHp5vBjxmbzqOR0hM91+o7Zv6eC+wl 23Ao47HK5NUSOgF8JssFJ9Pb7r/IoXRwCSPiRp8sjwuqAr8FUdxQUbZwLWL3nvG8cxnxViCRTlnA7 KUTH1YGJRP97GAjI84ocorwzrb2HyFBOu812X7LbouVZKyqkrRKORc1uvOpkIxH4ECBLiulF6H2uQ Epwu1uqgjfJGICZeXQKQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZyej-00A9NX-V5; Mon, 11 Oct 2021 17:00:06 +0000 Received: from marcansoft.com ([212.63.210.85] helo=mail.marcansoft.com) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZyd3-00A8RP-Pk for linux-arm-kernel@lists.infradead.org; Mon, 11 Oct 2021 16:58:23 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: hector@marcansoft.com) by mail.marcansoft.com (Postfix) with ESMTPSA id 0FAA9425E4; Mon, 11 Oct 2021 16:58:14 +0000 (UTC) From: Hector Martin To: linux-arm-kernel@lists.infradead.org Cc: Hector Martin , Alyssa Rosenzweig , Sven Peter , Marc Zyngier , Mark Kettenis , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Viresh Kumar , Nishanth Menon , Catalin Marinas , "Rafael J. Wysocki" , Kevin Hilman , Ulf Hansson , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 9/9] arm64: apple: Add CPU frequency scaling support for t8103 Date: Tue, 12 Oct 2021 01:57:07 +0900 Message-Id: <20211011165707.138157-10-marcan@marcan.st> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211011165707.138157-1-marcan@marcan.st> References: <20211011165707.138157-1-marcan@marcan.st> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211011_095822_018098_BC7ADCEA X-CRM114-Status: GOOD ( 12.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org - Proper CPU topology - CPU capacities * The 714 value is based on the CoreMark benchmark [1]. This is roughly in line with other real-world test cases, like gzip. For some reason, Dhrystone gives a wildly different value of 326, but this doesn't seem representative of real-world workloads. This might be adjusted in the future. - MCC instance to control memory controller performance - MCC OPP for t8103 using config values from hardware/ADT - E-Cluster and P-Cluster clock controllers for CPU frequency switching - Cluster OPP tables, including latency values determined experimentally. This relies on the generic cpufreq-dt driver to implement the cpufreq side. It also assumes the bootloader did any required init (iBoot does everything on firmware 12.0 and later; for 11.x we will have m1n1 do what's missing). [1] https://github.com/kdrag0n/linux-m1/commit/05c296604a42189cb61a0f7e8665566de192cbe9 Signed-off-by: Hector Martin --- arch/arm64/boot/dts/apple/t8103.dtsi | 255 ++++++++++++++++++++++++++- 1 file changed, 247 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi index a1e22a2ea2e5..5eec86917d72 100644 --- a/arch/arm64/boot/dts/apple/t8103.dtsi +++ b/arch/arm64/boot/dts/apple/t8103.dtsi @@ -20,68 +20,284 @@ cpus { #address-cells = <2>; #size-cells = <0>; - cpu0: cpu@0 { + cpu-map { + cluster0 { + core0 { + cpu = <&cpu_e0>; + }; + core1 { + cpu = <&cpu_e1>; + }; + core2 { + cpu = <&cpu_e2>; + }; + core3 { + cpu = <&cpu_e3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu_p0>; + }; + core1 { + cpu = <&cpu_p1>; + }; + core2 { + cpu = <&cpu_p2>; + }; + core3 { + cpu = <&cpu_p3>; + }; + }; + }; + + cpu_e0: cpu@0 { compatible = "apple,icestorm"; device_type = "cpu"; reg = <0x0 0x0>; enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ + clocks = <&clk_ecluster>; + operating-points-v2 = <&ecluster_opp>; + capacity-dmips-mhz = <714>; }; - cpu1: cpu@1 { + cpu_e1: cpu@1 { compatible = "apple,icestorm"; device_type = "cpu"; reg = <0x0 0x1>; enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ + clocks = <&clk_ecluster>; + operating-points-v2 = <&ecluster_opp>; + capacity-dmips-mhz = <714>; }; - cpu2: cpu@2 { + cpu_e2: cpu@2 { compatible = "apple,icestorm"; device_type = "cpu"; reg = <0x0 0x2>; enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ + clocks = <&clk_ecluster>; + operating-points-v2 = <&ecluster_opp>; + capacity-dmips-mhz = <714>; }; - cpu3: cpu@3 { + cpu_e3: cpu@3 { compatible = "apple,icestorm"; device_type = "cpu"; reg = <0x0 0x3>; enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ + clocks = <&clk_ecluster>; + operating-points-v2 = <&ecluster_opp>; + capacity-dmips-mhz = <714>; }; - cpu4: cpu@10100 { + cpu_p0: cpu@10100 { compatible = "apple,firestorm"; device_type = "cpu"; reg = <0x0 0x10100>; enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ + clocks = <&clk_pcluster>; + operating-points-v2 = <&pcluster_opp>; + capacity-dmips-mhz = <1024>; }; - cpu5: cpu@10101 { + cpu_p1: cpu@10101 { compatible = "apple,firestorm"; device_type = "cpu"; reg = <0x0 0x10101>; enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ + clocks = <&clk_pcluster>; + operating-points-v2 = <&pcluster_opp>; + capacity-dmips-mhz = <1024>; }; - cpu6: cpu@10102 { + cpu_p2: cpu@10102 { compatible = "apple,firestorm"; device_type = "cpu"; reg = <0x0 0x10102>; enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ + clocks = <&clk_pcluster>; + operating-points-v2 = <&pcluster_opp>; + capacity-dmips-mhz = <1024>; }; - cpu7: cpu@10103 { + cpu_p3: cpu@10103 { compatible = "apple,firestorm"; device_type = "cpu"; reg = <0x0 0x10103>; enable-method = "spin-table"; cpu-release-addr = <0 0>; /* To be filled by loader */ + clocks = <&clk_pcluster>; + operating-points-v2 = <&pcluster_opp>; + capacity-dmips-mhz = <1024>; + }; + }; + + ecluster_opp: opp-table-0 { + compatible = "operating-points-v2"; + opp-shared; + + opp01 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <559000>; + opp-level = <1>; + clock-latency-ns = <7500>; + }; + opp02 { + opp-hz = /bits/ 64 <972000000>; + opp-microvolt = <628000>; + opp-level = <2>; + clock-latency-ns = <22000>; + }; + opp03 { + opp-hz = /bits/ 64 <1332000000>; + opp-microvolt = <684000>; + opp-level = <3>; + clock-latency-ns = <27000>; + }; + opp04 { + opp-hz = /bits/ 64 <1704000000>; + opp-microvolt = <765000>; + opp-level = <4>; + clock-latency-ns = <33000>; + }; + opp05 { + opp-hz = /bits/ 64 <2064000000>; + opp-microvolt = <868000>; + opp-level = <5>; + clock-latency-ns = <50000>; + }; + }; + + pcluster_opp: opp-table-1 { + compatible = "operating-points-v2"; + opp-shared; + + opp01 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <781000>; + opp-level = <1>; + clock-latency-ns = <8000>; + required-opps = <&mcc_lowperf>; + }; + opp02 { + opp-hz = /bits/ 64 <828000000>; + opp-microvolt = <781000>; + opp-level = <2>; + clock-latency-ns = <19000>; + required-opps = <&mcc_lowperf>; + }; + opp03 { + opp-hz = /bits/ 64 <1056000000>; + opp-microvolt = <781000>; + opp-level = <3>; + clock-latency-ns = <21000>; + required-opps = <&mcc_lowperf>; + }; + opp04 { + opp-hz = /bits/ 64 <1284000000>; + opp-microvolt = <800000>; + opp-level = <4>; + clock-latency-ns = <23000>; + required-opps = <&mcc_lowperf>; + }; + opp05 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <821000>; + opp-level = <5>; + clock-latency-ns = <24000>; + required-opps = <&mcc_lowperf>; + }; + opp06 { + opp-hz = /bits/ 64 <1728000000>; + opp-microvolt = <831000>; + opp-level = <6>; + clock-latency-ns = <29000>; + required-opps = <&mcc_lowperf>; + }; + opp07 { + opp-hz = /bits/ 64 <1956000000>; + opp-microvolt = <865000>; + opp-level = <7>; + clock-latency-ns = <31000>; + required-opps = <&mcc_lowperf>; + }; + opp08 { + opp-hz = /bits/ 64 <2184000000>; + opp-microvolt = <909000>; + opp-level = <8>; + clock-latency-ns = <34000>; + required-opps = <&mcc_highperf>; + }; + opp09 { + opp-hz = /bits/ 64 <2388000000>; + opp-microvolt = <953000>; + opp-level = <9>; + clock-latency-ns = <36000>; + required-opps = <&mcc_highperf>; + }; + opp10 { + opp-hz = /bits/ 64 <2592000000>; + opp-microvolt = <1003000>; + opp-level = <10>; + clock-latency-ns = <51000>; + required-opps = <&mcc_highperf>; + }; + opp11 { + opp-hz = /bits/ 64 <2772000000>; + opp-microvolt = <1053000>; + opp-level = <11>; + clock-latency-ns = <54000>; + required-opps = <&mcc_highperf>; + }; + opp12 { + opp-hz = /bits/ 64 <2988000000>; + opp-microvolt = <1081000>; + opp-level = <12>; + clock-latency-ns = <55000>; + required-opps = <&mcc_highperf>; + }; + opp13 { + opp-hz = /bits/ 64 <3096000000>; + opp-microvolt = <1081000>; + opp-level = <13>; + clock-latency-ns = <55000>; + required-opps = <&mcc_highperf>; + }; + opp14 { + opp-hz = /bits/ 64 <3144000000>; + opp-microvolt = <1081000>; + opp-level = <14>; + clock-latency-ns = <56000>; + required-opps = <&mcc_highperf>; + }; + opp15 { + opp-hz = /bits/ 64 <3204000000>; + opp-microvolt = <1081000>; + opp-level = <15>; + clock-latency-ns = <56000>; + required-opps = <&mcc_highperf>; + }; + }; + + mcc_opp: opp-table-2 { + compatible = "apple,mcc-operating-points"; + + mcc_lowperf: opp0 { + opp-level = <0>; + apple,memory-perf-config = <0x813057f 0x1800180>; + }; + mcc_highperf: opp1 { + opp-level = <1>; + apple,memory-perf-config = <0x133 0x55555340>; }; }; @@ -110,6 +326,29 @@ soc { ranges; nonposted-mmio; + mcc: memory-controller@200200000 { + compatible = "apple,t8103-mcc", "apple,mcc"; + #power-domain-cells = <0>; + reg = <0x2 0x200000 0x0 0x200000>; + operating-points-v2 = <&mcc_opp>; + apple,num-channels = <8>; + }; + + clk_ecluster: clock-controller@210e20000 { + compatible = "apple,t8103-cluster-clk", "apple,cluster-clk"; + #clock-cells = <0>; + reg = <0x2 0x10e20000 0x0 0x4000>; + operating-points-v2 = <&ecluster_opp>; + }; + + clk_pcluster: clock-controller@211e20000 { + compatible = "apple,t8103-cluster-clk", "apple,cluster-clk"; + #clock-cells = <0>; + reg = <0x2 0x11e20000 0x0 0x4000>; + operating-points-v2 = <&pcluster_opp>; + power-domains = <&mcc>; + }; + serial0: serial@235200000 { compatible = "apple,s5l-uart"; reg = <0x2 0x35200000 0x0 0x1000>;