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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Extend compatible list and the i2c-sda-hold-time-ns property with 'microchip,lan966x-i2c' Signed-off-by: Horatiu Vultur Acked-by: Rob Herring --- Documentation/devicetree/bindings/i2c/i2c-at91.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/i2c-at91.txt b/Documentation/devicetree/bindings/i2c/i2c-at91.txt index 2015f50aed0f..d3b5ed081597 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-at91.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-at91.txt @@ -10,7 +10,8 @@ Required properties : "atmel,at91sam9x5-i2c", "atmel,sama5d4-i2c", "atmel,sama5d2-i2c", - "microchip,sam9x60-i2c". + "microchip,sam9x60-i2c", + "microchip,lan966x-i2c". - reg: physical base address of the controller and length of memory mapped region. - interrupts: interrupt number to the cpu. @@ -27,7 +28,8 @@ Optional properties: - i2c-sda-hold-time-ns: TWD hold time, only available for: "atmel,sama5d4-i2c", "atmel,sama5d2-i2c", - "microchip,sam9x60-i2c". + "microchip,sam9x60-i2c", + "microchip,lan966x-i2c". - scl-gpios: specify the gpio related to SCL pin - sda-gpios: specify the gpio related to SDA pin - pinctrl: add extra pinctrl to configure i2c pins to gpio function for i2c From patchwork Tue Oct 12 14:07:18 2021 Content-Type: text/plain; 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d="scan'208";a="139412090" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 12 Oct 2021 07:06:25 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Tue, 12 Oct 2021 07:06:24 -0700 Received: from soft-dev3-1.microsemi.net (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Tue, 12 Oct 2021 07:06:22 -0700 From: Horatiu Vultur To: , , , , , , , , CC: Horatiu Vultur Subject: [PATCH 2/2] i2c: at91: add support for brsrcclk Date: Tue, 12 Oct 2021 16:07:18 +0200 Message-ID: <20211012140718.2138278-3-horatiu.vultur@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211012140718.2138278-1-horatiu.vultur@microchip.com> References: <20211012140718.2138278-1-horatiu.vultur@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211012_070628_110545_463EEC96 X-CRM114-Status: GOOD ( 14.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This allows to set the TWI bite rate based on a programmable clock source. The lan966x supports this feature. Signed-off-by: Horatiu Vultur --- drivers/i2c/busses/i2c-at91-core.c | 16 ++++++++++++++++ drivers/i2c/busses/i2c-at91-master.c | 23 +++++++++++++++++++++-- drivers/i2c/busses/i2c-at91.h | 1 + 3 files changed, 38 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-at91-core.c b/drivers/i2c/busses/i2c-at91-core.c index 2df9df585131..d98b437e5775 100644 --- a/drivers/i2c/busses/i2c-at91-core.c +++ b/drivers/i2c/busses/i2c-at91-core.c @@ -146,6 +146,19 @@ static struct at91_twi_pdata sam9x60_config = { .has_clear_cmd = true, }; +static struct at91_twi_pdata lan966x_config = { + .clk_max_div = 7, + .clk_offset = 0, + .clk_brsrcclk = true, + .has_unre_flag = true, + .has_alt_cmd = true, + .has_hold_field = true, + .has_dig_filtr = true, + .has_adv_dig_filtr = true, + .has_ana_filtr = true, + .has_clear_cmd = true, +}; + static const struct of_device_id atmel_twi_dt_ids[] = { { .compatible = "atmel,at91rm9200-i2c", @@ -174,6 +187,9 @@ static const struct of_device_id atmel_twi_dt_ids[] = { }, { .compatible = "microchip,sam9x60-i2c", .data = &sam9x60_config, + }, { + .compatible = "microchip,lan966x-i2c", + .data = &lan966x_config, }, { /* sentinel */ } diff --git a/drivers/i2c/busses/i2c-at91-master.c b/drivers/i2c/busses/i2c-at91-master.c index b0eae94909f4..f504af30adbe 100644 --- a/drivers/i2c/busses/i2c-at91-master.c +++ b/drivers/i2c/busses/i2c-at91-master.c @@ -120,8 +120,27 @@ static void at91_calc_twi_clock(struct at91_twi_dev *dev) } } - dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv - | AT91_TWI_CWGR_HOLD(hold); + if (pdata->clk_brsrcclk) { + u8 chdiv, cldiv, gck_pr; + + gck_pr = 1000000000 / clk_get_rate(dev->clk); + + /* thigh = bus_freq_hz in ns * 0.4 + * tlow = bus_freq_hz in ns * 0.6 + * chdiv = (thigh / GCK_PR)/2 ^ CKDIV + * cldiv = (tlow / GCK_PR)/2 ^ CKDIV + * where ckdiv = 0; + */ + cldiv = (1000000000 / t->bus_freq_hz * 6 / 10) / gck_pr; + chdiv = (1000000000 / t->bus_freq_hz * 4 / 10) / gck_pr; + + dev->twi_cwgr_reg = (chdiv << 8) | cldiv + | AT91_TWI_CWGR_HOLD(hold) + | pdata->clk_brsrcclk << 20; + } else { + dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv + | AT91_TWI_CWGR_HOLD(hold); + } dev->filter_width = filter_width; diff --git a/drivers/i2c/busses/i2c-at91.h b/drivers/i2c/busses/i2c-at91.h index 942e9c3973bb..f7328fbe8eb8 100644 --- a/drivers/i2c/busses/i2c-at91.h +++ b/drivers/i2c/busses/i2c-at91.h @@ -115,6 +115,7 @@ struct at91_twi_pdata { unsigned clk_max_div; unsigned clk_offset; + bool clk_brsrcclk; bool has_unre_flag; bool has_alt_cmd; bool has_hold_field;