From patchwork Wed Oct 13 14:55:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556105 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16CF4C433EF for ; Wed, 13 Oct 2021 14:55:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id ECF146115B for ; Wed, 13 Oct 2021 14:55:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237211AbhJMO5e (ORCPT ); Wed, 13 Oct 2021 10:57:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56198 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236719AbhJMO5d (ORCPT ); Wed, 13 Oct 2021 10:57:33 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 14ABAC061570; Wed, 13 Oct 2021 07:55:30 -0700 (PDT) Message-ID: <20211013145322.234458659@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136927; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=VaXA+17IxKy09pY/oKmNjgRQD0JipWNjNvrXA33QlGI=; b=xGHJfwuIWyFBVx5LK2sCy6+YNG614Nb3lTO2AWVYoyecTaiIVce/SJt3aIYy4dqO4905uy jnMVhmOTgeNMKnlsZ7IJVK61y46YW3h2IOiIVl3cKnwRvzUjtFmvrixlIUuynt3Wwcvx/U 5JCU9VmrNRqU+O54rdXeqOCdP/ncS49twn2BX8NmzpVnL/woRGGCb9kq0GflAT78xZgn7e oEOn2xJHEsqW5suQ1I1e9t5LlyJzl8B8EItULYGBrW80tMAxMmkkbuwgmrsFY2k+pWrKyX cuLV43biymT6OIxbwwM1yooVWwx6B2eGH+nMwnoPcGSo0jNQLug9FgrP/TQQQQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136927; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=VaXA+17IxKy09pY/oKmNjgRQD0JipWNjNvrXA33QlGI=; b=SXOdu6uXGuFAM7De0MNwOyUNmf0RWYr3f1ThvTpkpDUF1MjiQoPfpH4kypGBW211MQBy6D 5HMOdGjVSDiTrbDA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 01/21] x86/fpu: Provide struct fpstate References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:27 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org New xfeatures will not longer be automatically stored in the regular XSAVE buffer in thread_struct::fpu. The kernel will provide the default sized buffer for storing the regular features up to AVX512 in thread_struct::fpu and if a task requests to use one of the new features then the register storage has to be extendend. The state will be accessed via a pointer in thread_struct::fpu which defaults to the builtin storage and can be switched when extended storage is required. To avoid conditionals all over the code, create a new container for the register storage which will gain other information, e.g. size, feature masks etc., later. For now it just contains the register storage, which gives it exactly the same layout as the exiting fpu::state. Stick fpu::state and the new fpu::__fpstate into an anonymous union and initialize the pointer. Add build time checks to validate that both are at the same place and have the same size. This allows step by step conversion of all users. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/fpu/types.h | 20 +++++++++++++++++++- arch/x86/include/asm/processor.h | 4 ++-- arch/x86/kernel/fpu/core.c | 11 ++++++++++- arch/x86/kernel/fpu/init.c | 9 +++++++-- arch/x86/kernel/fpu/internal.h | 1 + 5 files changed, 39 insertions(+), 6 deletions(-) --- a/arch/x86/include/asm/fpu/types.h +++ b/arch/x86/include/asm/fpu/types.h @@ -309,6 +309,13 @@ union fpregs_state { u8 __padding[PAGE_SIZE]; }; +struct fpstate { + /* @regs: The register state union for all supported formats */ + union fpregs_state regs; + + /* @regs is dynamically sized! Don't add anything after @regs! */ +} __attribute__ ((aligned (64))); + /* * Highest level per task FPU state data structure that * contains the FPU register state plus various FPU @@ -337,6 +344,14 @@ struct fpu { unsigned long avx512_timestamp; /* + * @fpstate: + * + * Pointer to the active struct fpstate. Initialized to + * point at @__fpstate below. + */ + struct fpstate *fpstate; + + /* * @state: * * In-memory copy of all FPU registers that we save/restore @@ -345,7 +360,10 @@ struct fpu { * copy. If the task context-switches away then they get * saved here and represent the FPU state. */ - union fpregs_state state; + union { + struct fpstate __fpstate; + union fpregs_state state; + }; /* * WARNING: 'state' is dynamically-sized. Do not put * anything after it here. --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -537,11 +537,11 @@ struct thread_struct { */ }; -/* Whitelist the FPU state from the task_struct for hardened usercopy. */ +/* Whitelist the FPU register state from the task_struct for hardened usercopy. */ static inline void arch_thread_struct_whitelist(unsigned long *offset, unsigned long *size) { - *offset = offsetof(struct thread_struct, fpu.state); + *offset = offsetof(struct thread_struct, fpu.__fpstate.regs); *size = fpu_kernel_xstate_size; } --- a/arch/x86/kernel/fpu/core.c +++ b/arch/x86/kernel/fpu/core.c @@ -337,10 +337,17 @@ void fpstate_init_user(union fpregs_stat fpstate_init_fstate(&state->fsave); } +void fpstate_reset(struct fpu *fpu) +{ + /* Set the fpstate pointer to the default fpstate */ + fpu->fpstate = &fpu->__fpstate; +} + #if IS_ENABLED(CONFIG_KVM) void fpu_init_fpstate_user(struct fpu *fpu) { - fpstate_init_user(&fpu->state); + fpstate_reset(fpu); + fpstate_init_user(&fpu->fpstate->regs); } EXPORT_SYMBOL_GPL(fpu_init_fpstate_user); #endif @@ -354,6 +361,8 @@ int fpu_clone(struct task_struct *dst) /* The new task's FPU state cannot be valid in the hardware. */ dst_fpu->last_cpu = -1; + fpstate_reset(dst_fpu); + if (!cpu_feature_enabled(X86_FEATURE_FPU)) return 0; --- a/arch/x86/kernel/fpu/init.c +++ b/arch/x86/kernel/fpu/init.c @@ -165,7 +165,7 @@ static void __init fpu__init_task_struct * Subtract off the static size of the register state. * It potentially has a bunch of padding. */ - task_size -= sizeof(((struct task_struct *)0)->thread.fpu.state); + task_size -= sizeof(current->thread.fpu.__fpstate.regs); /* * Add back the dynamically-calculated register state @@ -180,10 +180,14 @@ static void __init fpu__init_task_struct * you hit a compile error here, check the structure to * see if something got added to the end. */ - CHECK_MEMBER_AT_END_OF(struct fpu, state); + CHECK_MEMBER_AT_END_OF(struct fpu, __fpstate); CHECK_MEMBER_AT_END_OF(struct thread_struct, fpu); CHECK_MEMBER_AT_END_OF(struct task_struct, thread); + BUILD_BUG_ON(sizeof(struct fpstate) != sizeof(union fpregs_state)); + BUILD_BUG_ON(offsetof(struct thread_struct, fpu.state) != + offsetof(struct thread_struct, fpu.__fpstate)); + arch_task_struct_size = task_size; } @@ -220,6 +224,7 @@ static void __init fpu__init_system_xsta */ void __init fpu__init_system(struct cpuinfo_x86 *c) { + fpstate_reset(¤t->thread.fpu); fpu__init_system_early_generic(c); /* --- a/arch/x86/kernel/fpu/internal.h +++ b/arch/x86/kernel/fpu/internal.h @@ -26,5 +26,6 @@ extern void fpu__init_prepare_fx_sw_fram /* Used in init.c */ extern void fpstate_init_user(union fpregs_state *state); +extern void fpstate_reset(struct fpu *fpu); #endif From patchwork Wed Oct 13 14:55:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556107 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C52D7C433F5 for ; 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Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 02/21] x86/fpu: Convert fpstate_init() to struct fpstate References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:28 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Convert fpstate_init() and related code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/fpu/core.c | 44 ++++++++++++++++++++--------------------- arch/x86/kernel/fpu/internal.h | 4 +-- arch/x86/kernel/fpu/signal.c | 2 - arch/x86/kernel/fpu/xstate.c | 12 +++++------ 4 files changed, 31 insertions(+), 31 deletions(-) --- a/arch/x86/kernel/fpu/core.c +++ b/arch/x86/kernel/fpu/core.c @@ -29,7 +29,7 @@ * Represents the initial FPU state. It's mostly (but not completely) zeroes, * depending on the FPU hardware format: */ -union fpregs_state init_fpstate __ro_after_init; +struct fpstate init_fpstate __ro_after_init; /* * Track whether the kernel is using the FPU state @@ -157,7 +157,7 @@ void restore_fpregs_from_fpstate(union f void fpu_reset_from_exception_fixup(void) { - restore_fpregs_from_fpstate(&init_fpstate, xfeatures_mask_fpstate()); + restore_fpregs_from_fpstate(&init_fpstate.regs, xfeatures_mask_fpstate()); } #if IS_ENABLED(CONFIG_KVM) @@ -297,24 +297,24 @@ static inline unsigned int init_fpstate_ return fpu_kernel_xstate_size; /* XSAVE(S) just needs the legacy and the xstate header part */ - return sizeof(init_fpstate.xsave); + return sizeof(init_fpstate.regs.xsave); } -static inline void fpstate_init_fxstate(struct fxregs_state *fx) +static inline void fpstate_init_fxstate(struct fpstate *fpstate) { - fx->cwd = 0x37f; - fx->mxcsr = MXCSR_DEFAULT; + fpstate->regs.fxsave.cwd = 0x37f; + fpstate->regs.fxsave.mxcsr = MXCSR_DEFAULT; } /* * Legacy x87 fpstate state init: */ -static inline void fpstate_init_fstate(struct fregs_state *fp) +static inline void fpstate_init_fstate(struct fpstate *fpstate) { - fp->cwd = 0xffff037fu; - fp->swd = 0xffff0000u; - fp->twd = 0xffffffffu; - fp->fos = 0xffff0000u; + fpstate->regs.fsave.cwd = 0xffff037fu; + fpstate->regs.fsave.swd = 0xffff0000u; + fpstate->regs.fsave.twd = 0xffffffffu; + fpstate->regs.fsave.fos = 0xffff0000u; } /* @@ -322,19 +322,19 @@ static inline void fpstate_init_fstate(s * 1) Early boot to setup init_fpstate for non XSAVE systems * 2) fpu_init_fpstate_user() which is invoked from KVM */ -void fpstate_init_user(union fpregs_state *state) +void fpstate_init_user(struct fpstate *fpstate) { if (!cpu_feature_enabled(X86_FEATURE_FPU)) { - fpstate_init_soft(&state->soft); + fpstate_init_soft(&fpstate->regs.soft); return; } - xstate_init_xcomp_bv(&state->xsave, xfeatures_mask_uabi()); + xstate_init_xcomp_bv(&fpstate->regs.xsave, xfeatures_mask_uabi()); if (cpu_feature_enabled(X86_FEATURE_FXSR)) - fpstate_init_fxstate(&state->fxsave); + fpstate_init_fxstate(fpstate); else - fpstate_init_fstate(&state->fsave); + fpstate_init_fstate(fpstate); } void fpstate_reset(struct fpu *fpu) @@ -347,7 +347,7 @@ void fpstate_reset(struct fpu *fpu) void fpu_init_fpstate_user(struct fpu *fpu) { fpstate_reset(fpu); - fpstate_init_user(&fpu->fpstate->regs); + fpstate_init_user(fpu->fpstate); } EXPORT_SYMBOL_GPL(fpu_init_fpstate_user); #endif @@ -378,7 +378,7 @@ int fpu_clone(struct task_struct *dst) */ if (dst->flags & (PF_KTHREAD | PF_IO_WORKER)) { /* Clear out the minimal state */ - memcpy(&dst_fpu->state, &init_fpstate, + memcpy(&dst_fpu->state, &init_fpstate.regs, init_fpstate_copy_size()); return 0; } @@ -435,11 +435,11 @@ void fpu__drop(struct fpu *fpu) static inline void restore_fpregs_from_init_fpstate(u64 features_mask) { if (use_xsave()) - os_xrstor(&init_fpstate.xsave, features_mask); + os_xrstor(&init_fpstate.regs.xsave, features_mask); else if (use_fxsr()) - fxrstor(&init_fpstate.fxsave); + fxrstor(&init_fpstate.regs.fxsave); else - frstor(&init_fpstate.fsave); + frstor(&init_fpstate.regs.fsave); pkru_write_default(); } @@ -466,7 +466,7 @@ static void fpu_reset_fpstate(void) * user space as PKRU is eagerly written in switch_to() and * flush_thread(). */ - memcpy(&fpu->state, &init_fpstate, init_fpstate_copy_size()); + memcpy(&fpu->state, &init_fpstate.regs, init_fpstate_copy_size()); set_thread_flag(TIF_NEED_FPU_LOAD); fpregs_unlock(); } --- a/arch/x86/kernel/fpu/internal.h +++ b/arch/x86/kernel/fpu/internal.h @@ -2,7 +2,7 @@ #ifndef __X86_KERNEL_FPU_INTERNAL_H #define __X86_KERNEL_FPU_INTERNAL_H -extern union fpregs_state init_fpstate; +extern struct fpstate init_fpstate; /* CPU feature check wrappers */ static __always_inline __pure bool use_xsave(void) @@ -25,7 +25,7 @@ static __always_inline __pure bool use_f extern void fpu__init_prepare_fx_sw_frame(void); /* Used in init.c */ -extern void fpstate_init_user(union fpregs_state *state); +extern void fpstate_init_user(struct fpstate *fpstate); extern void fpstate_reset(struct fpu *fpu); #endif --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -243,7 +243,7 @@ static int __restore_fpregs_from_user(vo ret = fxrstor_from_user_sigframe(buf); if (!ret && unlikely(init_bv)) - os_xrstor(&init_fpstate.xsave, init_bv); + os_xrstor(&init_fpstate.regs.xsave, init_bv); return ret; } else if (use_fxsr()) { return fxrstor_from_user_sigframe(buf); --- a/arch/x86/kernel/fpu/xstate.c +++ b/arch/x86/kernel/fpu/xstate.c @@ -408,12 +408,12 @@ static void __init setup_init_fpu_buf(vo setup_xstate_features(); print_xstate_features(); - xstate_init_xcomp_bv(&init_fpstate.xsave, xfeatures_mask_all); + xstate_init_xcomp_bv(&init_fpstate.regs.xsave, xfeatures_mask_all); /* * Init all the features state with header.xfeatures being 0x0 */ - os_xrstor_booting(&init_fpstate.xsave); + os_xrstor_booting(&init_fpstate.regs.xsave); /* * All components are now in init state. Read the state back so @@ -431,7 +431,7 @@ static void __init setup_init_fpu_buf(vo * state is all zeroes or if not to add the necessary handling * here. */ - fxsave(&init_fpstate.fxsave); + fxsave(&init_fpstate.regs.fxsave); } static int xfeature_uncompacted_offset(int xfeature_nr) @@ -672,11 +672,11 @@ static unsigned int __init get_xsave_siz */ static bool __init is_supported_xstate_size(unsigned int test_xstate_size) { - if (test_xstate_size <= sizeof(union fpregs_state)) + if (test_xstate_size <= sizeof(init_fpstate.regs)) return true; pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n", - sizeof(union fpregs_state), test_xstate_size); + sizeof(init_fpstate.regs), test_xstate_size); return false; } @@ -981,7 +981,7 @@ void __copy_xstate_to_uabi_buf(struct me u32 pkru_val, enum xstate_copy_mode copy_mode) { const unsigned int off_mxcsr = offsetof(struct fxregs_state, mxcsr); - struct xregs_state *xinit = &init_fpstate.xsave; + struct xregs_state *xinit = &init_fpstate.regs.xsave; struct xstate_header header; unsigned int zerofrom; u64 mask; From patchwork Wed Oct 13 14:55:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556109 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07974C433F5 for ; Wed, 13 Oct 2021 14:55:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DADC661154 for ; Wed, 13 Oct 2021 14:55:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237585AbhJMO5h (ORCPT ); Wed, 13 Oct 2021 10:57:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56210 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237413AbhJMO5f (ORCPT ); Wed, 13 Oct 2021 10:57:35 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B991C061570; Wed, 13 Oct 2021 07:55:32 -0700 (PDT) Message-ID: <20211013145322.347395546@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136930; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=y1Z2Az1JrjMwCXWxSlcQxz5vFesFHkG9dYnK/Nla8H4=; b=1TVrOm4ND0K7U/+lDt19sQarLBJHcDy/mZFgGUBnrJBtls3EODXwv0z2afRhWFoBR6E3Vb KZhsFm1H0105y2B96XvbMvYY+yy3JOMhWizRyly46D7GNrYc3P0ve4DrkZ2u081SvlZG45 AGkNTuHZm+lITw6IEqMflveUWz1pDKASttMPrukw8gNA2tvA4lyqheBSd8gcnRVk0M9A26 +wYWAYDAhgAAcM/Ov6A5Z5oBpLQgkrR+GMIphA59ijU7pV5+EcscBEonZ38fNFBcxCTVLT BYfPnQtZz/h/JfeoyOSRRYSKTFzoKo03YOQAFF1F0Tv8rbRGEbJGeKnZecQ6Kw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136930; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=y1Z2Az1JrjMwCXWxSlcQxz5vFesFHkG9dYnK/Nla8H4=; b=VBE3q/DrDfolSfCGAzdH2KlW0t2RifoE5IFQg47D37Emqnf5IJoZ8Cx++oTOsLyTe9szg+ c38W21XG/s+G7bCQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 03/21] x86/fpu: Convert restore_fpregs_from_fpstate() to struct fpstate References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:30 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Convert restore_fpregs_from_fpstate and related code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/fpu/signal.h | 2 +- arch/x86/kernel/fpu/context.h | 2 +- arch/x86/kernel/fpu/core.c | 12 ++++++------ 3 files changed, 8 insertions(+), 8 deletions(-) --- a/arch/x86/include/asm/fpu/signal.h +++ b/arch/x86/include/asm/fpu/signal.h @@ -40,7 +40,7 @@ extern bool copy_fpstate_to_sigframe(voi extern void fpu__clear_user_states(struct fpu *fpu); extern bool fpu__restore_sig(void __user *buf, int ia32_frame); -extern void restore_fpregs_from_fpstate(union fpregs_state *fpstate, u64 mask); +extern void restore_fpregs_from_fpstate(struct fpstate *fpstate, u64 mask); extern bool copy_fpstate_to_sigframe(void __user *buf, void __user *fp, int size); --- a/arch/x86/kernel/fpu/context.h +++ b/arch/x86/kernel/fpu/context.h @@ -74,7 +74,7 @@ static inline void fpregs_restore_userre */ mask = xfeatures_mask_restore_user() | xfeatures_mask_supervisor(); - restore_fpregs_from_fpstate(&fpu->state, mask); + restore_fpregs_from_fpstate(fpu->fpstate, mask); fpregs_activate(fpu); fpu->last_cpu = cpu; --- a/arch/x86/kernel/fpu/core.c +++ b/arch/x86/kernel/fpu/core.c @@ -129,7 +129,7 @@ void save_fpregs_to_fpstate(struct fpu * frstor(&fpu->state.fsave); } -void restore_fpregs_from_fpstate(union fpregs_state *fpstate, u64 mask) +void restore_fpregs_from_fpstate(struct fpstate *fpstate, u64 mask) { /* * AMD K7/K8 and later CPUs up to Zen don't save/restore @@ -146,18 +146,18 @@ void restore_fpregs_from_fpstate(union f } if (use_xsave()) { - os_xrstor(&fpstate->xsave, mask); + os_xrstor(&fpstate->regs.xsave, mask); } else { if (use_fxsr()) - fxrstor(&fpstate->fxsave); + fxrstor(&fpstate->regs.fxsave); else - frstor(&fpstate->fsave); + frstor(&fpstate->regs.fsave); } } void fpu_reset_from_exception_fixup(void) { - restore_fpregs_from_fpstate(&init_fpstate.regs, xfeatures_mask_fpstate()); + restore_fpregs_from_fpstate(&init_fpstate, xfeatures_mask_fpstate()); } #if IS_ENABLED(CONFIG_KVM) @@ -176,7 +176,7 @@ void fpu_swap_kvm_fpu(struct fpu *save, if (rstor) { restore_mask &= xfeatures_mask_fpstate(); - restore_fpregs_from_fpstate(&rstor->state, restore_mask); + restore_fpregs_from_fpstate(rstor->fpstate, restore_mask); } fpregs_mark_activate(); From patchwork Wed Oct 13 14:55:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556111 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AEA3AC433EF for ; Wed, 13 Oct 2021 14:55:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9519F61175 for ; Wed, 13 Oct 2021 14:55:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237612AbhJMO5j (ORCPT ); Wed, 13 Oct 2021 10:57:39 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:35376 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237434AbhJMO5g (ORCPT ); Wed, 13 Oct 2021 10:57:36 -0400 Message-ID: <20211013145322.399567049@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136932; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=VN+bgfPvy8oG5qDv8nOVEMCkG7ge3h/lsMiht5xt0Hw=; b=O6aawK5zxskGtEhvkytuk64xaOvFNsCAuuQ+cj12RGZ/KB1gK+WdgdoCdb7zIWbib2Xsu/ ZaWzTQ3PiA1cKE5cuMN42WYFryn4EcL/yM/V2W4xKeR6qLWDQTLV6HYQ9pZ0mKz+6DwiWo VO0wFGWnofa50pi/l2ob4j+xHaIH58kFyRimuPxMvjz0xkdA+6O3oRjoe/iVlk1w1U/c/G AbhgRKjUP3yA7oRr3OR7YmePkHtz2kFLMNU+POwrceldlPMRN/+eOZIAIOuDSThKixx3HM v3iG8N3Q9gEqwgcU3BjMyB4Nlaz1g8yGzYargz1D1VoW53VqW6XKnL5NJnCvbw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136932; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=VN+bgfPvy8oG5qDv8nOVEMCkG7ge3h/lsMiht5xt0Hw=; b=8b3N9rtSY9jtD5G70VV1iTRbjTB+kwuICXj5oMUbg6RqFFUYqWAvvUtcM/kMM4aS79VAAe TqkcCAvR9gpkdrDQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 04/21] x86/fpu: Replace KVMs xstate component clearing References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:31 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org In order to prepare for the support of dynamically enabled FPU features, move the clearing of xstate components to the FPU core code. No functional change. Signed-off-by: Thomas Gleixner Cc: Paolo Bonzini Cc: kvm@vger.kernel.org --- arch/x86/include/asm/fpu/api.h | 1 + arch/x86/include/asm/fpu/xstate.h | 1 - arch/x86/kernel/fpu/xstate.c | 12 +++++++++++- arch/x86/kernel/fpu/xstate.h | 2 ++ arch/x86/kvm/x86.c | 14 +++++--------- 5 files changed, 19 insertions(+), 11 deletions(-) --- a/arch/x86/include/asm/fpu/api.h +++ b/arch/x86/include/asm/fpu/api.h @@ -132,6 +132,7 @@ DECLARE_PER_CPU(struct fpu *, fpu_fpregs /* fpstate-related functions which are exported to KVM */ extern void fpu_init_fpstate_user(struct fpu *fpu); +extern void fpstate_clear_xstate_component(struct fpstate *fps, unsigned int xfeature); /* KVM specific functions */ extern void fpu_swap_kvm_fpu(struct fpu *save, struct fpu *rstor, u64 restore_mask); --- a/arch/x86/include/asm/fpu/xstate.h +++ b/arch/x86/include/asm/fpu/xstate.h @@ -128,7 +128,6 @@ extern u64 xstate_fx_sw_bytes[USER_XSTAT extern void __init update_regset_xstate_info(unsigned int size, u64 xstate_mask); -void *get_xsave_addr(struct xregs_state *xsave, int xfeature_nr); int xfeature_size(int xfeature_nr); int copy_uabi_from_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf); int copy_sigframe_from_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf); --- a/arch/x86/kernel/fpu/xstate.c +++ b/arch/x86/kernel/fpu/xstate.c @@ -908,7 +908,6 @@ void *get_xsave_addr(struct xregs_state return __raw_xsave_addr(xsave, xfeature_nr); } -EXPORT_SYMBOL_GPL(get_xsave_addr); #ifdef CONFIG_ARCH_HAS_PKEYS @@ -1257,6 +1256,17 @@ void xrstors(struct xregs_state *xstate, WARN_ON_ONCE(err); } +#if IS_ENABLED(CONFIG_KVM) +void fpstate_clear_xstate_component(struct fpstate *fps, unsigned int xfeature) +{ + void *addr = get_xsave_addr(&fps->regs.xsave, xfeature); + + if (addr) + memset(addr, 0, xstate_sizes[xfeature]); +} +EXPORT_SYMBOL_GPL(fpstate_clear_xstate_component); +#endif + #ifdef CONFIG_PROC_PID_ARCH_STATUS /* * Report the amount of time elapsed in millisecond since last AVX512 --- a/arch/x86/kernel/fpu/xstate.h +++ b/arch/x86/kernel/fpu/xstate.h @@ -21,6 +21,8 @@ extern void __copy_xstate_to_uabi_buf(st extern void fpu__init_cpu_xstate(void); extern void fpu__init_system_xstate(void); +extern void *get_xsave_addr(struct xregs_state *xsave, int xfeature_nr); + /* XSAVE/XRSTOR wrapper functions */ #ifdef CONFIG_X86_64 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -10689,7 +10689,7 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcp vcpu->arch.apf.halted = false; if (vcpu->arch.guest_fpu && kvm_mpx_supported()) { - void *mpx_state_buffer; + struct fpstate *fpstate = vcpu->arch.guest_fpu->fpstate; /* * To avoid have the INIT path from kvm_apic_has_events() that be @@ -10697,14 +10697,10 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcp */ if (init_event) kvm_put_guest_fpu(vcpu); - mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave, - XFEATURE_BNDREGS); - if (mpx_state_buffer) - memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state)); - mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave, - XFEATURE_BNDCSR); - if (mpx_state_buffer) - memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr)); + + fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS); + fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR); + if (init_event) kvm_load_guest_fpu(vcpu); } From patchwork Wed Oct 13 14:55:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556113 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 742B8C433F5 for ; Wed, 13 Oct 2021 14:55:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5592861108 for ; Wed, 13 Oct 2021 14:55:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237860AbhJMO5k (ORCPT ); Wed, 13 Oct 2021 10:57:40 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:35376 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237377AbhJMO5h (ORCPT ); Wed, 13 Oct 2021 10:57:37 -0400 Message-ID: <20211013145322.451439983@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136933; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=oSFTRrG1M7hlRW5/Fmh7mVM82LlOghgD5/z1wLXfyOM=; b=ZaGT+Hg9QfbmHBPeWzQMFLdrI1a+5uSiAbB5/FrcLRmsJiVaCEEVGJX2DzV+HD5KRRTnJN tqfWgCYbs7PTp5/yb3tVd6Nj8sDK+5UXPZX0efWcqNAZ0B13Fks2Czv0KQA9bYn+PjAgsr 3nvBH4u+AVyXSfUIohWnKRjF+9Qv2v0Bpd3VsvHWZuPhu54TG3C8FshpGRdpNWuh35a4vL blWoNLX1sui18YQANwmLgxYE457V6VsZbuAxzUQwc21EaS5kK9mqRMagA7igC+Wnameban lVQNdWXfNcAOo1Bt06+spfii/OH6lr+EqW9f1agjdOx7tyxySFGgHFXRgbWEkQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136933; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=oSFTRrG1M7hlRW5/Fmh7mVM82LlOghgD5/z1wLXfyOM=; b=21leFw/TEhfyMBih/O5xKvcojw1jvXiPXaAoXUR7jQncYVLmZQ+KZiXKF/DjQv+NPNVi48 4tAudzovnQgBV7BA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 05/21] x86/KVM: Convert to fpstate References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:33 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Convert KVM code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner Cc: Paolo Bonzini Cc: kvm@vger.kernel.org Acked-by: Paolo Bonzini --- arch/x86/kvm/x86.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -10389,7 +10389,7 @@ int kvm_arch_vcpu_ioctl_get_fpu(struct k vcpu_load(vcpu); - fxsave = &vcpu->arch.guest_fpu->state.fxsave; + fxsave = &vcpu->arch.guest_fpu->fpstate->regs.fxsave; memcpy(fpu->fpr, fxsave->st_space, 128); fpu->fcw = fxsave->cwd; fpu->fsw = fxsave->swd; @@ -10412,7 +10412,7 @@ int kvm_arch_vcpu_ioctl_set_fpu(struct k vcpu_load(vcpu); - fxsave = &vcpu->arch.guest_fpu->state.fxsave; + fxsave = &vcpu->arch.guest_fpu->fpstate->regs.fxsave; memcpy(fxsave->st_space, fpu->fpr, 128); fxsave->cwd = fpu->fcw; From patchwork Wed Oct 13 14:55:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556115 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FFCCC433F5 for ; Wed, 13 Oct 2021 14:55:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4768461108 for ; Wed, 13 Oct 2021 14:55:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238019AbhJMO5p (ORCPT ); Wed, 13 Oct 2021 10:57:45 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:35396 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237654AbhJMO5j (ORCPT ); Wed, 13 Oct 2021 10:57:39 -0400 Message-ID: <20211013145322.503327333@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136935; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=AMd0kJ1rCstUZs3aFFlbnYg4MBXkNT2VAG/LpBOLZqI=; b=uF3QNt9/6PFjzPUgh6ntRsDKFMDRftqBqtXaBiadHuX6cNB7SH/CjK7ySxAjGdJf3rnKvf o0MO35ItnMVHoN1hJPJpbnTDIvP0NyMmoraBZIG+VyFI6mA7OFHkcgHKfCa+USnwJytDux tgmRmKdo0iUH9lH5QTnOSODxKAfhZamiNGx3kM1lMjhuRhZVWCSyzbYlcGmEbp7EFaemew yuDZWRcIIsGDlkiXTrJWvaigdGQNd0CPeOQ7OncHAos/wCW+zOOpqsjRKjJX6fNvgsxXLk u927yqJoFQWHmEs/yp82be6s4iEmlc1sgAcSSLcjD0gDYluiK/FiDZuEdliQdQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136935; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=AMd0kJ1rCstUZs3aFFlbnYg4MBXkNT2VAG/LpBOLZqI=; b=TEwdsL+cA/6XLn4GefYluLNy0pG7Lwlbp3v+65UiW3cVaYpgt/9PnjEgLa0TIzUUyc+StH 5tlkCS5nwKVV/mAw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 06/21] x86/fpu: Convert tracing to fpstate References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:34 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Convert FPU tracing code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/trace/fpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/arch/x86/include/asm/trace/fpu.h +++ b/arch/x86/include/asm/trace/fpu.h @@ -22,8 +22,8 @@ DECLARE_EVENT_CLASS(x86_fpu, __entry->fpu = fpu; __entry->load_fpu = test_thread_flag(TIF_NEED_FPU_LOAD); if (boot_cpu_has(X86_FEATURE_OSXSAVE)) { - __entry->xfeatures = fpu->state.xsave.header.xfeatures; - __entry->xcomp_bv = fpu->state.xsave.header.xcomp_bv; + __entry->xfeatures = fpu->fpstate->regs.xsave.header.xfeatures; + __entry->xcomp_bv = fpu->fpstate->regs.xsave.header.xcomp_bv; } ), TP_printk("x86/fpu: %p load: %d xfeatures: %llx xcomp_bv: %llx", From patchwork Wed Oct 13 14:55:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556117 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A53BC433EF for ; Wed, 13 Oct 2021 14:55:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EEF196115B for ; Wed, 13 Oct 2021 14:55:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238047AbhJMO5q (ORCPT ); Wed, 13 Oct 2021 10:57:46 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:35376 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237747AbhJMO5k (ORCPT ); Wed, 13 Oct 2021 10:57:40 -0400 Message-ID: <20211013145322.555239736@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=U7gsEuDGMDabYjhedbdmAJ9kXhUMBT4TdImZ4fF59Fc=; b=ioP2IlvLF+vc8tAJ1yzAgL0CzDKyUqeBGGjivGhTqqWBEJoI8ciyYEovL2DpfYqpRSAUun OtJrJBWojwrKsL8m9nq7QLxb6TFryMtkNKXRXkzetDRM/mOeoJ1VMzQktxu9yeqcnu170d yqPGVi6GjLof3KjpF+lAglnsr0BajbB4wIG9kwMJvgxmVTXeGx+scLePlBkW6G2rC0JSuk oQu0f5bj2frcGRrxyN8u8RRr0CZIguDX/qEonPuqfYzlVMDcgTDbzHsniVgEzF3lSHJYHb +sj4X71udvNzf+WYTxYHLSBsryiSPU7c/p/vIx1uU+aZVBm+qHwtBsygvcGKWQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136936; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=U7gsEuDGMDabYjhedbdmAJ9kXhUMBT4TdImZ4fF59Fc=; b=BA5vjqvJ2KLTPaPESzwNb1eA6AYlqvXFrn7emFxk5Lr7cQkzUmltCqgsgbnwnP1aujqzEH XzS0ohsBc0zPUkBQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 07/21] x86/fpu/regset: Convert to fpstate References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:36 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Convert regset related code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/fpu/regset.c | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-) --- a/arch/x86/kernel/fpu/regset.c +++ b/arch/x86/kernel/fpu/regset.c @@ -78,8 +78,8 @@ int xfpregs_get(struct task_struct *targ sync_fpstate(fpu); if (!use_xsave()) { - return membuf_write(&to, &fpu->state.fxsave, - sizeof(fpu->state.fxsave)); + return membuf_write(&to, &fpu->fpstate->regs.fxsave, + sizeof(fpu->fpstate->regs.fxsave)); } copy_xstate_to_uabi_buf(to, target, XSTATE_COPY_FX); @@ -114,15 +114,15 @@ int xfpregs_set(struct task_struct *targ fpu_force_restore(fpu); /* Copy the state */ - memcpy(&fpu->state.fxsave, &newstate, sizeof(newstate)); + memcpy(&fpu->fpstate->regs.fxsave, &newstate, sizeof(newstate)); /* Clear xmm8..15 */ - BUILD_BUG_ON(sizeof(fpu->state.fxsave.xmm_space) != 16 * 16); - memset(&fpu->state.fxsave.xmm_space[8], 0, 8 * 16); + BUILD_BUG_ON(sizeof(fpu->__fpstate.regs.fxsave.xmm_space) != 16 * 16); + memset(&fpu->fpstate->regs.fxsave.xmm_space[8], 0, 8 * 16); /* Mark FP and SSE as in use when XSAVE is enabled */ if (use_xsave()) - fpu->state.xsave.header.xfeatures |= XFEATURE_MASK_FPSSE; + fpu->fpstate->regs.xsave.header.xfeatures |= XFEATURE_MASK_FPSSE; return 0; } @@ -168,7 +168,8 @@ int xstateregs_set(struct task_struct *t } fpu_force_restore(fpu); - ret = copy_uabi_from_kernel_to_xstate(&fpu->state.xsave, kbuf ?: tmpbuf); + ret = copy_uabi_from_kernel_to_xstate(&fpu->fpstate->regs.xsave, + kbuf ?: tmpbuf); out: vfree(tmpbuf); @@ -287,7 +288,7 @@ static void __convert_from_fxsr(struct u void convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk) { - __convert_from_fxsr(env, tsk, &tsk->thread.fpu.state.fxsave); + __convert_from_fxsr(env, tsk, &tsk->thread.fpu.fpstate->regs.fxsave); } void convert_to_fxsr(struct fxregs_state *fxsave, @@ -330,7 +331,7 @@ int fpregs_get(struct task_struct *targe return fpregs_soft_get(target, regset, to); if (!cpu_feature_enabled(X86_FEATURE_FXSR)) { - return membuf_write(&to, &fpu->state.fsave, + return membuf_write(&to, &fpu->fpstate->regs.fsave, sizeof(struct fregs_state)); } @@ -341,7 +342,7 @@ int fpregs_get(struct task_struct *targe copy_xstate_to_uabi_buf(mb, target, XSTATE_COPY_FP); fx = &fxsave; } else { - fx = &fpu->state.fxsave; + fx = &fpu->fpstate->regs.fxsave; } __convert_from_fxsr(&env, target, fx); @@ -370,16 +371,16 @@ int fpregs_set(struct task_struct *targe fpu_force_restore(fpu); if (cpu_feature_enabled(X86_FEATURE_FXSR)) - convert_to_fxsr(&fpu->state.fxsave, &env); + convert_to_fxsr(&fpu->fpstate->regs.fxsave, &env); else - memcpy(&fpu->state.fsave, &env, sizeof(env)); + memcpy(&fpu->fpstate->regs.fsave, &env, sizeof(env)); /* * Update the header bit in the xsave header, indicating the * presence of FP. */ if (cpu_feature_enabled(X86_FEATURE_XSAVE)) - fpu->state.xsave.header.xfeatures |= XFEATURE_MASK_FP; + fpu->fpstate->regs.xsave.header.xfeatures |= XFEATURE_MASK_FP; return 0; } From patchwork Wed Oct 13 14:55:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556121 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78424C4332F for ; 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a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136938; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=sQvge6nvkxgIxHV6g/oETXfh3Z7hm1cWjkiPqF5szUA=; b=5mrALv29LVjQ7oKwG/HhJOk/ULwnRimjmbsv7GayuG8LGiFkU5B+16iitVnE6yx0PXPY9o fe7Sk6enBRSnSIBg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 08/21] x86/fpu/signal: Convert to fpstate References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:37 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Convert signal related code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/fpu/signal.c | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -72,13 +72,13 @@ static inline bool check_xstate_in_sigfr static inline bool save_fsave_header(struct task_struct *tsk, void __user *buf) { if (use_fxsr()) { - struct xregs_state *xsave = &tsk->thread.fpu.state.xsave; + struct xregs_state *xsave = &tsk->thread.fpu.fpstate->regs.xsave; struct user_i387_ia32_struct env; struct _fpstate_32 __user *fp = buf; fpregs_lock(); if (!test_thread_flag(TIF_NEED_FPU_LOAD)) - fxsave(&tsk->thread.fpu.state.fxsave); + fxsave(&tsk->thread.fpu.fpstate->regs.fxsave); fpregs_unlock(); convert_from_fxsr(&env, tsk); @@ -303,7 +303,7 @@ static bool restore_fpregs_from_user(voi * been restored from a user buffer directly. */ if (test_thread_flag(TIF_NEED_FPU_LOAD) && xfeatures_mask_supervisor()) - os_xrstor(&fpu->state.xsave, xfeatures_mask_supervisor()); + os_xrstor(&fpu->fpstate->regs.xsave, xfeatures_mask_supervisor()); fpregs_mark_activate(); fpregs_unlock(); @@ -317,6 +317,7 @@ static bool __fpu_restore_sig(void __use struct task_struct *tsk = current; struct fpu *fpu = &tsk->thread.fpu; struct user_i387_ia32_struct env; + union fpregs_state *fpregs; u64 user_xfeatures = 0; bool fx_only = false; bool success; @@ -349,6 +350,7 @@ static bool __fpu_restore_sig(void __use if (__copy_from_user(&env, buf, sizeof(env))) return false; + fpregs = &fpu->fpstate->regs; /* * By setting TIF_NEED_FPU_LOAD it is ensured that our xstate is * not modified on context switch and that the xstate is considered @@ -366,7 +368,7 @@ static bool __fpu_restore_sig(void __use * the right place in memory. It's ia32 mode. Shrug. */ if (xfeatures_mask_supervisor()) - os_xsave(&fpu->state.xsave); + os_xsave(&fpregs->xsave); set_thread_flag(TIF_NEED_FPU_LOAD); } __fpu_invalidate_fpregs_state(fpu); @@ -374,29 +376,29 @@ static bool __fpu_restore_sig(void __use fpregs_unlock(); if (use_xsave() && !fx_only) { - if (copy_sigframe_from_user_to_xstate(&fpu->state.xsave, buf_fx)) + if (copy_sigframe_from_user_to_xstate(&fpregs->xsave, buf_fx)) return false; } else { - if (__copy_from_user(&fpu->state.fxsave, buf_fx, - sizeof(fpu->state.fxsave))) + if (__copy_from_user(&fpregs->fxsave, buf_fx, + sizeof(fpregs->fxsave))) return false; if (IS_ENABLED(CONFIG_X86_64)) { /* Reject invalid MXCSR values. */ - if (fpu->state.fxsave.mxcsr & ~mxcsr_feature_mask) + if (fpregs->fxsave.mxcsr & ~mxcsr_feature_mask) return false; } else { /* Mask invalid bits out for historical reasons (broken hardware). */ - fpu->state.fxsave.mxcsr &= ~mxcsr_feature_mask; + fpregs->fxsave.mxcsr &= ~mxcsr_feature_mask; } /* Enforce XFEATURE_MASK_FPSSE when XSAVE is enabled */ if (use_xsave()) - fpu->state.xsave.header.xfeatures |= XFEATURE_MASK_FPSSE; + fpregs->xsave.header.xfeatures |= XFEATURE_MASK_FPSSE; } /* Fold the legacy FP storage */ - convert_to_fxsr(&fpu->state.fxsave, &env); + convert_to_fxsr(&fpregs->fxsave, &env); fpregs_lock(); if (use_xsave()) { @@ -411,10 +413,10 @@ static bool __fpu_restore_sig(void __use */ u64 mask = user_xfeatures | xfeatures_mask_supervisor(); - fpu->state.xsave.header.xfeatures &= mask; - success = !os_xrstor_safe(&fpu->state.xsave, xfeatures_mask_all); + fpregs->xsave.header.xfeatures &= mask; + success = !os_xrstor_safe(&fpregs->xsave, xfeatures_mask_all); } else { - success = !fxrstor_safe(&fpu->state.fxsave); + success = !fxrstor_safe(&fpregs->fxsave); } if (likely(success)) From patchwork Wed Oct 13 14:55:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556119 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 367F5C433EF for ; Wed, 13 Oct 2021 14:55:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1B8BB610E6 for ; Wed, 13 Oct 2021 14:55:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237959AbhJMO5x (ORCPT ); Wed, 13 Oct 2021 10:57:53 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:35424 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237968AbhJMO5o (ORCPT ); Wed, 13 Oct 2021 10:57:44 -0400 Message-ID: <20211013145322.659456185@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136939; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=L9MFNnb+5EhYZzjza1LcCn5Mphd5on/qHXQ35Nu1kvk=; b=3IzfUKYoBz4rYXUH46Z9IQ2+tQTkKyoYiwMyW49qZA2HIte/Y+wQLX8tMs8gfgxYF9C0cZ XdK9ShnELaTboYH5Vx6awL0EvRsoxjeTOYQDCgzSm4exuucnz+yP2rpvwSkjqeQL9+qF8s jpWizd6yvGTfoFDJSnZNTDZzp/f2Z/iR8aqj4dqEad95Vp1lQB2hGZYWwnv+hwNpKYQ1Hx bJ3N6x/LfLRPk7L8qQ8NLZodVnIDbkrfe02yEzJVI0N9H5O3ealLs2BaVFRI73tFRSq+fb KnZABMqVLgLhufDKkiYf3qWFx2NybJj0EbO+/U0cyPFTzkGkCKwFvUpOcKorgA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136939; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=L9MFNnb+5EhYZzjza1LcCn5Mphd5on/qHXQ35Nu1kvk=; b=Qz0qJbPCGPu3w0B6xeDZXfCCTbouhgK8fwlOc6khCDAccYp+jyHV9aNv+h2/nyfVexb6Gd VSPHWM8dmxH0fbAw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 09/21] x86/fpu/core: Convert to fpstate References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:39 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Convert the rest of the core code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/fpu/api.h | 4 +-- arch/x86/kernel/fpu/core.c | 44 +++++++++++++++++++++-------------------- arch/x86/kernel/fpu/init.c | 2 - arch/x86/kernel/fpu/xstate.c | 2 - 4 files changed, 27 insertions(+), 25 deletions(-) --- a/arch/x86/include/asm/fpu/api.h +++ b/arch/x86/include/asm/fpu/api.h @@ -50,9 +50,9 @@ static inline void kernel_fpu_begin(void } /* - * Use fpregs_lock() while editing CPU's FPU registers or fpu->state. + * Use fpregs_lock() while editing CPU's FPU registers or fpu->fpstate. * A context switch will (and softirq might) save CPU's FPU registers to - * fpu->state and set TIF_NEED_FPU_LOAD leaving CPU's FPU registers in + * fpu->fpstate.regs and set TIF_NEED_FPU_LOAD leaving CPU's FPU registers in * a random state. * * local_bh_disable() protects against both preemption and soft interrupts --- a/arch/x86/kernel/fpu/core.c +++ b/arch/x86/kernel/fpu/core.c @@ -89,7 +89,7 @@ bool irq_fpu_usable(void) EXPORT_SYMBOL(irq_fpu_usable); /* - * Save the FPU register state in fpu->state. The register state is + * Save the FPU register state in fpu->fpstate->regs. The register state is * preserved. * * Must be called with fpregs_lock() held. @@ -105,19 +105,19 @@ EXPORT_SYMBOL(irq_fpu_usable); void save_fpregs_to_fpstate(struct fpu *fpu) { if (likely(use_xsave())) { - os_xsave(&fpu->state.xsave); + os_xsave(&fpu->fpstate->regs.xsave); /* * AVX512 state is tracked here because its use is * known to slow the max clock speed of the core. */ - if (fpu->state.xsave.header.xfeatures & XFEATURE_MASK_AVX512) + if (fpu->fpstate->regs.xsave.header.xfeatures & XFEATURE_MASK_AVX512) fpu->avx512_timestamp = jiffies; return; } if (likely(use_fxsr())) { - fxsave(&fpu->state.fxsave); + fxsave(&fpu->fpstate->regs.fxsave); return; } @@ -125,8 +125,8 @@ void save_fpregs_to_fpstate(struct fpu * * Legacy FPU register saving, FNSAVE always clears FPU registers, * so we have to reload them from the memory state. */ - asm volatile("fnsave %[fp]; fwait" : [fp] "=m" (fpu->state.fsave)); - frstor(&fpu->state.fsave); + asm volatile("fnsave %[fp]; fwait" : [fp] "=m" (fpu->fpstate->regs.fsave)); + frstor(&fpu->fpstate->regs.fsave); } void restore_fpregs_from_fpstate(struct fpstate *fpstate, u64 mask) @@ -167,7 +167,8 @@ void fpu_swap_kvm_fpu(struct fpu *save, if (save) { if (test_thread_flag(TIF_NEED_FPU_LOAD)) { - memcpy(&save->state, ¤t->thread.fpu.state, + memcpy(&save->fpstate->regs, + ¤t->thread.fpu.fpstate->regs, fpu_kernel_xstate_size); } else { save_fpregs_to_fpstate(save); @@ -187,7 +188,7 @@ EXPORT_SYMBOL_GPL(fpu_swap_kvm_fpu); void fpu_copy_fpstate_to_kvm_uabi(struct fpu *fpu, void *buf, unsigned int size, u32 pkru) { - union fpregs_state *kstate = &fpu->state; + union fpregs_state *kstate = &fpu->fpstate->regs; union fpregs_state *ustate = buf; struct membuf mb = { .p = buf, .left = size }; @@ -205,7 +206,7 @@ EXPORT_SYMBOL_GPL(fpu_copy_fpstate_to_kv int fpu_copy_kvm_uabi_to_fpstate(struct fpu *fpu, const void *buf, u64 xcr0, u32 *vpkru) { - union fpregs_state *kstate = &fpu->state; + union fpregs_state *kstate = &fpu->fpstate->regs; const union fpregs_state *ustate = buf; struct pkru_state *xpkru; int ret; @@ -378,7 +379,7 @@ int fpu_clone(struct task_struct *dst) */ if (dst->flags & (PF_KTHREAD | PF_IO_WORKER)) { /* Clear out the minimal state */ - memcpy(&dst_fpu->state, &init_fpstate.regs, + memcpy(&dst_fpu->fpstate->regs, &init_fpstate.regs, init_fpstate_copy_size()); return 0; } @@ -389,11 +390,12 @@ int fpu_clone(struct task_struct *dst) * child's FPU context, without any memory-to-memory copying. */ fpregs_lock(); - if (test_thread_flag(TIF_NEED_FPU_LOAD)) - memcpy(&dst_fpu->state, &src_fpu->state, fpu_kernel_xstate_size); - - else + if (test_thread_flag(TIF_NEED_FPU_LOAD)) { + memcpy(&dst_fpu->fpstate->regs, &src_fpu->fpstate->regs, + fpu_kernel_xstate_size); + } else { save_fpregs_to_fpstate(dst_fpu); + } fpregs_unlock(); trace_x86_fpu_copy_src(src_fpu); @@ -466,7 +468,7 @@ static void fpu_reset_fpstate(void) * user space as PKRU is eagerly written in switch_to() and * flush_thread(). */ - memcpy(&fpu->state, &init_fpstate.regs, init_fpstate_copy_size()); + memcpy(&fpu->fpstate->regs, &init_fpstate.regs, init_fpstate_copy_size()); set_thread_flag(TIF_NEED_FPU_LOAD); fpregs_unlock(); } @@ -493,7 +495,7 @@ void fpu__clear_user_states(struct fpu * */ if (xfeatures_mask_supervisor() && !fpregs_state_valid(fpu, smp_processor_id())) { - os_xrstor(&fpu->state.xsave, xfeatures_mask_supervisor()); + os_xrstor(&fpu->fpstate->regs.xsave, xfeatures_mask_supervisor()); } /* Reset user states in registers. */ @@ -574,11 +576,11 @@ int fpu__exception_code(struct fpu *fpu, * fully reproduce the context of the exception. */ if (boot_cpu_has(X86_FEATURE_FXSR)) { - cwd = fpu->state.fxsave.cwd; - swd = fpu->state.fxsave.swd; + cwd = fpu->fpstate->regs.fxsave.cwd; + swd = fpu->fpstate->regs.fxsave.swd; } else { - cwd = (unsigned short)fpu->state.fsave.cwd; - swd = (unsigned short)fpu->state.fsave.swd; + cwd = (unsigned short)fpu->fpstate->regs.fsave.cwd; + swd = (unsigned short)fpu->fpstate->regs.fsave.swd; } err = swd & ~cwd; @@ -592,7 +594,7 @@ int fpu__exception_code(struct fpu *fpu, unsigned short mxcsr = MXCSR_DEFAULT; if (boot_cpu_has(X86_FEATURE_XMM)) - mxcsr = fpu->state.fxsave.mxcsr; + mxcsr = fpu->fpstate->regs.fxsave.mxcsr; err = ~(mxcsr >> 7) & mxcsr; } --- a/arch/x86/kernel/fpu/init.c +++ b/arch/x86/kernel/fpu/init.c @@ -38,7 +38,7 @@ static void fpu__init_cpu_generic(void) /* Flush out any pending x87 state: */ #ifdef CONFIG_MATH_EMULATION if (!boot_cpu_has(X86_FEATURE_FPU)) - fpstate_init_soft(¤t->thread.fpu.state.soft); + fpstate_init_soft(¤t->thread.fpu.fpstate->regs.soft); else #endif asm volatile ("fninit"); --- a/arch/x86/kernel/fpu/xstate.c +++ b/arch/x86/kernel/fpu/xstate.c @@ -1094,7 +1094,7 @@ void __copy_xstate_to_uabi_buf(struct me void copy_xstate_to_uabi_buf(struct membuf to, struct task_struct *tsk, enum xstate_copy_mode copy_mode) { - __copy_xstate_to_uabi_buf(to, &tsk->thread.fpu.state.xsave, + __copy_xstate_to_uabi_buf(to, &tsk->thread.fpu.fpstate->regs.xsave, tsk->thread.pkru, copy_mode); } From patchwork Wed Oct 13 14:55:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556131 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D7C4C433EF for ; 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bh=B29BT66jlj++7fWsfB9NcdvP87OUUfI5ksLz0CH91gw=; b=H5RIqkfdE3KyL6LbTepBBzIUqlw5P25ljlvHVfU8Y33SUnevXh+KMvSQeQjDi/5vUWRlmy UaHEujbjbkDVAsX01I6qtgPMYDwYuQAJp0EN4OA2WEOOKQwDbYJgOFD97k2Jk0JqBv/bYk zDwYemoFm/OHzgnLw4NQKuBc/QqxfrvXfVNLB5oEZa6uE5/WoUzHVpYuTJRd04d0F9lOgz byYA8clyOHmFaW4/QMHU9/Zb8Ked9/EEfmQ61tWe+LF1G7X4PeiAIPnaTCHrYl9LRWdgwl vZwmVsqmb/b57VR/UAwN47GdEtshqelgeylfv7hz94CKkRijOcRAbLNkd6puVA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136941; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=B29BT66jlj++7fWsfB9NcdvP87OUUfI5ksLz0CH91gw=; b=U1F8w8MwDlmax2DIbfHWhKnkg7iKpHCAEyyJZZbUFfla5W3JvgoD5XGRkKYbmy+pYVCUqQ k/8YI14hJTcUauBg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 10/21] x86/math-emu: Convert to fpstate References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:40 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Convert math emulation code to the new register storage mechanism in preparation for dynamically sized buffers. No functional change. Signed-off-by: Thomas Gleixner --- arch/x86/math-emu/fpu_aux.c | 2 +- arch/x86/math-emu/fpu_entry.c | 4 ++-- arch/x86/math-emu/fpu_system.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) --- a/arch/x86/math-emu/fpu_aux.c +++ b/arch/x86/math-emu/fpu_aux.c @@ -53,7 +53,7 @@ void fpstate_init_soft(struct swregs_sta void finit(void) { - fpstate_init_soft(¤t->thread.fpu.state.soft); + fpstate_init_soft(¤t->thread.fpu.fpstate->regs.soft); } /* --- a/arch/x86/math-emu/fpu_entry.c +++ b/arch/x86/math-emu/fpu_entry.c @@ -640,7 +640,7 @@ int fpregs_soft_set(struct task_struct * unsigned int pos, unsigned int count, const void *kbuf, const void __user *ubuf) { - struct swregs_state *s387 = &target->thread.fpu.state.soft; + struct swregs_state *s387 = &target->thread.fpu.fpstate->regs.soft; void *space = s387->st_space; int ret; int offset, other, i, tags, regnr, tag, newtop; @@ -691,7 +691,7 @@ int fpregs_soft_get(struct task_struct * const struct user_regset *regset, struct membuf to) { - struct swregs_state *s387 = &target->thread.fpu.state.soft; + struct swregs_state *s387 = &target->thread.fpu.fpstate->regs.soft; const void *space = s387->st_space; int offset = (S387->ftop & 7) * 10, other = 80 - offset; --- a/arch/x86/math-emu/fpu_system.h +++ b/arch/x86/math-emu/fpu_system.h @@ -73,7 +73,7 @@ static inline bool seg_writable(struct d return (d->type & SEG_TYPE_EXECUTE_MASK) == SEG_TYPE_WRITABLE; } -#define I387 (¤t->thread.fpu.state) +#define I387 (¤t->thread.fpu.fpstate->regs) #define FPU_info (I387->soft.info) #define FPU_CS (*(unsigned short *) &(FPU_info->regs->cs)) From patchwork Wed Oct 13 14:55:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556125 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6EA9C433EF for ; Wed, 13 Oct 2021 14:55:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AD5146117A for ; Wed, 13 Oct 2021 14:55:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237377AbhJMO57 (ORCPT ); Wed, 13 Oct 2021 10:57:59 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:35376 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238044AbhJMO5q (ORCPT ); Wed, 13 Oct 2021 10:57:46 -0400 Message-ID: <20211013145322.765063318@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136942; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=KG53QOGc4VkNL0CVqfZ44CkyO1qKBK0wUzZF8Vb4s2w=; b=OZCTP/A/72BmPT/3JDBNDbOhh7w7MAuUJA0LUytdPySHhImB011hs1M0balzdGBRiWTXAL iPPKlKbhdn+RydEHhhwPxblk4dmJEoIQUM9v+04b5tyDYchdG2kVemObu+EyyUJoMQufhf amuDoyDSqf5fqZ5yew5YISVpojzReQT88GT7+nsZrG+mFpZhqr3s5+KWhg1co87ZZH5QwX PXkr7wlw/wCe2PdDPkkVdO9Q1U9RqZpwZYW3ABwelhg9r8nfe3OI7FnfG3UVN6hU6xiFBo rl94+wnqVevqzeWXJjpghn237TXTepNefsBLdLDhSFlqmS1MRNJ/v5HDtzagUQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136942; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=KG53QOGc4VkNL0CVqfZ44CkyO1qKBK0wUzZF8Vb4s2w=; b=fAYPn/Ul13vMyZgfICAe6n0Ugo1cMALKXWgM56E5Vm+Wz199U7gp1Hg4c/jLfZgXSkmb0s H60/0Wbu7g7CB8AQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 11/21] x86/fpu: Remove fpu::state References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:42 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org All users converted. Remove it along with the sanity checks. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/fpu/types.h | 18 +++++++----------- arch/x86/kernel/fpu/init.c | 4 ---- 2 files changed, 7 insertions(+), 15 deletions(-) --- a/arch/x86/include/asm/fpu/types.h +++ b/arch/x86/include/asm/fpu/types.h @@ -352,20 +352,16 @@ struct fpu { struct fpstate *fpstate; /* - * @state: + * @__fpstate: * - * In-memory copy of all FPU registers that we save/restore - * over context switches. If the task is using the FPU then - * the registers in the FPU are more recent than this state - * copy. If the task context-switches away then they get - * saved here and represent the FPU state. + * Initial in-memory storage for FPU registers which are saved in + * context switch and when the kernel uses the FPU. The registers + * are restored from this storage on return to user space if they + * are not longer containing the tasks FPU register state. */ - union { - struct fpstate __fpstate; - union fpregs_state state; - }; + struct fpstate __fpstate; /* - * WARNING: 'state' is dynamically-sized. Do not put + * WARNING: '__fpstate' is dynamically-sized. Do not put * anything after it here. */ }; --- a/arch/x86/kernel/fpu/init.c +++ b/arch/x86/kernel/fpu/init.c @@ -184,10 +184,6 @@ static void __init fpu__init_task_struct CHECK_MEMBER_AT_END_OF(struct thread_struct, fpu); CHECK_MEMBER_AT_END_OF(struct task_struct, thread); - BUILD_BUG_ON(sizeof(struct fpstate) != sizeof(union fpregs_state)); - BUILD_BUG_ON(offsetof(struct thread_struct, fpu.state) != - offsetof(struct thread_struct, fpu.__fpstate)); - arch_task_struct_size = task_size; } From patchwork Wed Oct 13 14:55:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556123 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 762BFC433F5 for ; Wed, 13 Oct 2021 14:55:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 595C561108 for ; Wed, 13 Oct 2021 14:55:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238099AbhJMO56 (ORCPT ); Wed, 13 Oct 2021 10:57:58 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:35446 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237377AbhJMO5s (ORCPT ); Wed, 13 Oct 2021 10:57:48 -0400 Message-ID: <20211013145322.817101108@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136944; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=RLeMhaAZt5yyxkrpW+ax/B5S7CN2/6ZcEG9+mIB/KPk=; b=Vv72sKkTsOCIYjTCKiXwfG96yPH3ZHCUJlDziDdOXw3FBwGo+hPRwIuJFLdmMRfoUcFCUJ b3ih4TZ43VIFEpsNv3d78DJlXsk/dWMjNugAWf8wClwRplPiOqpr79/Xi4SJMvYmop4SVi h2zxwU53RUlRkcjcoV2LdkkOEuZf7kBpOeFXNt/eYjfHvdxwIcaDYkgVA3QInNQzpCYp3c 5VAhGeCXYy7jcQJb8tnzQErPStOObvh36agpsanFjrvhrcIKURuBJkZPnGlRtzlK6MXTHp tbGTr2KQtTtG+T+DBnq2XwjdAxSBe2jzKanHJLJEtVlBYm7mPgeVzhSTrTPQTg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136944; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=RLeMhaAZt5yyxkrpW+ax/B5S7CN2/6ZcEG9+mIB/KPk=; b=Ch0MM0T7JFbQYyMR8AggsyT9wzFdSYU317hZIC4kiOWkTOiVxmsDalI9/GBMTGNreXdBky 4STmfDt5MI8JHdDA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 12/21] x86/fpu: Do not leak fpstate pointer on fork References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:43 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org If fork fails early then the copied task struct would carry the fpstate pointer of the parent task. Not a problem right now, but later when dynamically allocated buffers are available, keeping the pointer might result in freeing the parents buffer. Set it to NULL which prevents that. If fork reaches clone_thread, the pointer will be correctly set to the new task context. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/process.c | 2 ++ 1 file changed, 2 insertions(+) --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c @@ -87,6 +87,8 @@ int arch_dup_task_struct(struct task_str #ifdef CONFIG_VM86 dst->thread.vm86 = NULL; #endif + /* Drop the copied pointer to current's fpstate */ + dst->thread.fpu.fpstate = NULL; return 0; } From patchwork Wed Oct 13 14:55:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556127 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 708EBC4332F for ; Wed, 13 Oct 2021 14:56:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5D920610E6 for ; Wed, 13 Oct 2021 14:56:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238353AbhJMO6B (ORCPT ); Wed, 13 Oct 2021 10:58:01 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:35462 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238148AbhJMO5t (ORCPT ); Wed, 13 Oct 2021 10:57:49 -0400 Message-ID: <20211013145322.869001791@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136945; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ncWQ0hRZ3EV+ZEbd4taFLJFeMkbBwnFwXxOb4l2vRbA=; b=iSHgbznvtoGUjqStKLgntGUyWYmGv/UdxPlzJGKv4AsICK2pe8fV73AaFjuOJtKkU/zgsh JRDO+ESDzkN3WjPDj+3iz3nJ60YtgZxI75DWOKHAYRMwmWcDVxskpc851O69U6iXLSgs6E k6I9GlH99JISDHTjIcwzZM+XJ1SFJx8KomjTnmHoxseBFtUUfNiWdEo19fmlZjn5Z8zMRY uyIYK8hlXT4GgsAWFuQj5gqexhCIj7ggwYWsI2zGxy114/YOjNsVMg5W+bbsISHTCp14eY rseAYZ4mcVGteQo9ZTQlAGd3et1O7mSqAqy0roNk9mauolNMX5MYte0bAzU/yw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136945; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ncWQ0hRZ3EV+ZEbd4taFLJFeMkbBwnFwXxOb4l2vRbA=; b=PJvfuCS5AxjUg3NYQFVeyGh+CCUgxJxX4BVztWnc9HIx04piaEQk96oAsrHrVFfp1V+V1U l8W8kz0vmB8xvTDg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 13/21] x86/process: Move arch_thread_struct_whitelist() out of line References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:45 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org In preparation for dynamic enabled FPU features move the function out of line as the goal is to expose less and not more information. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/processor.h | 9 +++------ arch/x86/kernel/fpu/core.c | 10 ++++++++++ arch/x86/kernel/fpu/internal.h | 2 ++ 3 files changed, 15 insertions(+), 6 deletions(-) --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -461,9 +461,6 @@ DECLARE_PER_CPU(struct irq_stack *, hard DECLARE_PER_CPU(struct irq_stack *, softirq_stack_ptr); #endif /* !X86_64 */ -extern unsigned int fpu_kernel_xstate_size; -extern unsigned int fpu_user_xstate_size; - struct perf_event; struct thread_struct { @@ -537,12 +534,12 @@ struct thread_struct { */ }; -/* Whitelist the FPU register state from the task_struct for hardened usercopy. */ +extern void fpu_thread_struct_whitelist(unsigned long *offset, unsigned long *size); + static inline void arch_thread_struct_whitelist(unsigned long *offset, unsigned long *size) { - *offset = offsetof(struct thread_struct, fpu.__fpstate.regs); - *size = fpu_kernel_xstate_size; + fpu_thread_struct_whitelist(offset, size); } static inline void --- a/arch/x86/kernel/fpu/core.c +++ b/arch/x86/kernel/fpu/core.c @@ -405,6 +405,16 @@ int fpu_clone(struct task_struct *dst) } /* + * Whitelist the FPU register state embedded into task_struct for hardened + * usercopy. + */ +void fpu_thread_struct_whitelist(unsigned long *offset, unsigned long *size) +{ + *offset = offsetof(struct thread_struct, fpu.__fpstate.regs); + *size = fpu_kernel_xstate_size; +} + +/* * Drops current FPU state: deactivates the fpregs and * the fpstate. NOTE: it still leaves previous contents * in the fpregs in the eager-FPU case. --- a/arch/x86/kernel/fpu/internal.h +++ b/arch/x86/kernel/fpu/internal.h @@ -2,6 +2,8 @@ #ifndef __X86_KERNEL_FPU_INTERNAL_H #define __X86_KERNEL_FPU_INTERNAL_H +extern unsigned int fpu_kernel_xstate_size; +extern unsigned int fpu_user_xstate_size; extern struct fpstate init_fpstate; /* CPU feature check wrappers */ From patchwork Wed Oct 13 14:55:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556129 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97C55C433EF for ; Wed, 13 Oct 2021 14:56:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 797D6610E6 for ; Wed, 13 Oct 2021 14:56:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237966AbhJMO6J (ORCPT ); Wed, 13 Oct 2021 10:58:09 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:35396 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238168AbhJMO5v (ORCPT ); Wed, 13 Oct 2021 10:57:51 -0400 Message-ID: <20211013145322.921388806@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136947; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=wypfrIc22n4P4BWKy9qrRd+6CEMC66XrchNc4B3EwM0=; b=Nzf2emAetc3c+xVxxJ2N3JfaDbZ1FBxkTHjpZAQLmG5VmF3p2+wM7IE8Sd07KRek4qGGK9 XjeHIyqjPJs0d4pXPLJmhnS1b0b0ACpx6t/ZrX4cMaS4Dxp3F2PZ1G64fuJdsgOsVRicTI SwIWkUOFZ9P/7Iz7EocGjF78Dv+GMOQ2MRGcpdhW9ik93HGTG2WUjd7JZyJY1VAxohSHSc VggVuJDuJpk/uQv3kq0HFFNfgy7UUowI80ZOeCr4ba2w9OaSIyMjBbnRBCw/Uvr25f8O2a rt4ewTKa/jEk6CIBwFRFnNpaPobOE8hdA7Qysv4F+K/h1osevx4vJvybmB7g/Q== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136947; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=wypfrIc22n4P4BWKy9qrRd+6CEMC66XrchNc4B3EwM0=; b=wL2JS7qWGZgsgDWRvqXqnUHVnFJdDmMnp7/QzGOTk+G0KIjSW/YW9SaiC35pgoElbbhGcZ IENnL4Y9cAG8wABA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 14/21] x86/fpu: Add size and mask information to fpstate References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:46 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Add state size and feature mask information to the fpstate container. This will be used for runtime checks with the upcoming support for dynamically enabled features and dynamically sized buffers. That avoids conditionals all over the place as the required information is accessible for both default and extended buffers. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/fpu/types.h | 12 ++++++++++++ arch/x86/kernel/fpu/core.c | 6 ++++++ arch/x86/kernel/fpu/init.c | 9 +++++++++ arch/x86/kernel/fpu/xstate.c | 3 +++ 4 files changed, 30 insertions(+) --- a/arch/x86/include/asm/fpu/types.h +++ b/arch/x86/include/asm/fpu/types.h @@ -310,6 +310,18 @@ union fpregs_state { }; struct fpstate { + /* @kernel_size: The size of the kernel register image */ + unsigned int size; + + /* @user_size: The size in non-compacted UABI format */ + unsigned int user_size; + + /* @xfeatures: xfeatures for which the storage is sized */ + u64 xfeatures; + + /* @user_xfeatures: xfeatures valid in UABI buffers */ + u64 user_xfeatures; + /* @regs: The register state union for all supported formats */ union fpregs_state regs; --- a/arch/x86/kernel/fpu/core.c +++ b/arch/x86/kernel/fpu/core.c @@ -342,6 +342,12 @@ void fpstate_reset(struct fpu *fpu) { /* Set the fpstate pointer to the default fpstate */ fpu->fpstate = &fpu->__fpstate; + + /* Initialize sizes and feature masks */ + fpu->fpstate->size = fpu_kernel_xstate_size; + fpu->fpstate->user_size = fpu_user_xstate_size; + fpu->fpstate->xfeatures = xfeatures_mask_all; + fpu->fpstate->user_xfeatures = xfeatures_mask_uabi(); } #if IS_ENABLED(CONFIG_KVM) --- a/arch/x86/kernel/fpu/init.c +++ b/arch/x86/kernel/fpu/init.c @@ -212,6 +212,14 @@ static void __init fpu__init_system_xsta } fpu_user_xstate_size = fpu_kernel_xstate_size; + fpstate_reset(¤t->thread.fpu); +} + +static void __init fpu__init_init_fpstate(void) +{ + /* Bring init_fpstate size and features up to date */ + init_fpstate.size = fpu_kernel_xstate_size; + init_fpstate.xfeatures = xfeatures_mask_all; } /* @@ -233,4 +241,5 @@ void __init fpu__init_system(struct cpui fpu__init_system_xstate_size_legacy(); fpu__init_system_xstate(); fpu__init_task_struct_size(); + fpu__init_init_fpstate(); } --- a/arch/x86/kernel/fpu/xstate.c +++ b/arch/x86/kernel/fpu/xstate.c @@ -720,6 +720,7 @@ static void __init fpu__init_disable_sys xfeatures_mask_all = 0; cr4_clear_bits(X86_CR4_OSXSAVE); setup_clear_cpu_cap(X86_FEATURE_XSAVE); + fpstate_reset(¤t->thread.fpu); } /* @@ -792,6 +793,8 @@ void __init fpu__init_system_xstate(void if (err) goto out_disable; + fpstate_reset(¤t->thread.fpu); + /* * Update info used for ptrace frames; use standard-format size and no * supervisor xstates: From patchwork Wed Oct 13 14:55:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556133 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CF6EC43217 for ; Wed, 13 Oct 2021 14:56:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 13F0361108 for ; Wed, 13 Oct 2021 14:56:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238590AbhJMO6N (ORCPT ); Wed, 13 Oct 2021 10:58:13 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:35424 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237413AbhJMO5w (ORCPT ); Wed, 13 Oct 2021 10:57:52 -0400 Message-ID: <20211013145322.973518954@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136948; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=0Q+9WUCgebhBn6q9AbgpLS1YKzFFGoHVdAWxJSIgEHM=; b=zDplXaNvJYF/IEJmvHvQwnvYSfHZgzZ3KgWeSp7JoFFUGGKKmRy29fQgM8MRI0Pk7mKKq6 kJKTzfqL184zKng6zcMpD1UPnmOwPexndBgNuh7fGYyhUZzxEWaVH6VrqZlAkcNBJoC5jD dLE4+gsW+j8ZOPj4Vim75pGLc4hLZaXywYYkmdvBeegkCZg4EH0+wpa4oMopcBoeq+CAJ4 k/5uQfGFcAe4kgSKkdS3nHa+FIvZN/CGh2HljpgqdzHoT6B5ROIw6N/lN1QTPwxaJ4iQ9+ 1PRAUI0hsLCR4sRFp+ysEZD3WPvn/73ys20+RMIu2MzWQPEYwExIW1vhOfncPQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136948; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=0Q+9WUCgebhBn6q9AbgpLS1YKzFFGoHVdAWxJSIgEHM=; b=UODfQDhDAiVFz5uXhUpQ+rdAXzapQdjqAKZGmyuiNTs18pf3c8n4o+6NoE+iBcI2KLLFr+ cR0AhvQO8eUWezAg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 15/21] x86/fpu: Use fpstate::size References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:48 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Make use of fpstate::size in various places which require the buffer size information for sanity checks or memcpy() sizing. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/fpu/core.c | 13 ++++++------- arch/x86/kernel/fpu/signal.c | 7 +++---- 2 files changed, 9 insertions(+), 11 deletions(-) --- a/arch/x86/kernel/fpu/core.c +++ b/arch/x86/kernel/fpu/core.c @@ -166,13 +166,12 @@ void fpu_swap_kvm_fpu(struct fpu *save, fpregs_lock(); if (save) { - if (test_thread_flag(TIF_NEED_FPU_LOAD)) { - memcpy(&save->fpstate->regs, - ¤t->thread.fpu.fpstate->regs, - fpu_kernel_xstate_size); - } else { + struct fpstate *fpcur = current->thread.fpu.fpstate; + + if (test_thread_flag(TIF_NEED_FPU_LOAD)) + memcpy(&save->fpstate->regs, &fpcur->regs, fpcur->size); + else save_fpregs_to_fpstate(save); - } } if (rstor) { @@ -398,7 +397,7 @@ int fpu_clone(struct task_struct *dst) fpregs_lock(); if (test_thread_flag(TIF_NEED_FPU_LOAD)) { memcpy(&dst_fpu->fpstate->regs, &src_fpu->fpstate->regs, - fpu_kernel_xstate_size); + dst_fpu->fpstate->size); } else { save_fpregs_to_fpstate(dst_fpu); } --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -313,15 +313,13 @@ static bool restore_fpregs_from_user(voi static bool __fpu_restore_sig(void __user *buf, void __user *buf_fx, bool ia32_fxstate) { - int state_size = fpu_kernel_xstate_size; struct task_struct *tsk = current; struct fpu *fpu = &tsk->thread.fpu; struct user_i387_ia32_struct env; + bool success, fx_only = false; union fpregs_state *fpregs; + unsigned int state_size; u64 user_xfeatures = 0; - bool fx_only = false; - bool success; - if (use_xsave()) { struct _fpx_sw_bytes fx_sw_user; @@ -334,6 +332,7 @@ static bool __fpu_restore_sig(void __use user_xfeatures = fx_sw_user.xfeatures; } else { user_xfeatures = XFEATURE_MASK_FPSSE; + state_size = fpu->fpstate->size; } if (likely(!ia32_fxstate)) { From patchwork Wed Oct 13 14:55:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556141 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A7FCC433EF for ; Wed, 13 Oct 2021 14:56:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 688A7610E6 for ; Wed, 13 Oct 2021 14:56:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238517AbhJMO6n (ORCPT ); Wed, 13 Oct 2021 10:58:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56294 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238504AbhJMO6J (ORCPT ); Wed, 13 Oct 2021 10:58:09 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A2124C061775; Wed, 13 Oct 2021 07:55:51 -0700 (PDT) Message-ID: <20211013145323.025695590@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136950; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=tyZ4fB8M8KQ+ZVy4Tj94RxQ5EI71d2jFs+ZcceYHE5g=; b=YuNi/CmrBXr+jRuCRtfQMJqh7ai5mxHcQCdxSPTnRUwhIk2wVsL/a+dPwMLZ05M/c6Ko/H xDNV12j317mQJQd7jkcqPSI8IiKNnKBlahIma4D4qsWiz8DADCRL1Pe2q1M2y4Llecs1DZ owpdRWhUSzTPf61fXA9m8sYHn1WIVofjkzi3ar8INOwAeZt/n2pzxSbBb4T+9yWvDL2FRq yxbcigL3zJa3EvnUMq85dz+btnuVbDeVl/5iGLMrQzIclQK44Ug9Qu8JDXVAPdILdcPgk3 8W8M3oFYq00Qbmi4wTmKGhexCmSZpBxQsvxx3gj07ThGImElJa4JIhGyjwZWVw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136950; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=tyZ4fB8M8KQ+ZVy4Tj94RxQ5EI71d2jFs+ZcceYHE5g=; b=UOtFelc+PDgYGglRygwpw6eXBGhD4tID5NP1Jt2NuzcH1uc2x/3jWthxZyAzFGlTFoHY4j G7Q8VWxW5Ch+hBBw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 16/21] x86/fpu/xstate: Use fpstate for os_xsave() References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:49 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org With variable feature sets XSAVE[S} requires to know the feature set for which the buffer is valid. Retrieve it from fpstate. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/fpu/core.c | 2 +- arch/x86/kernel/fpu/signal.c | 4 ++-- arch/x86/kernel/fpu/xstate.h | 6 +++--- 3 files changed, 6 insertions(+), 6 deletions(-) --- a/arch/x86/kernel/fpu/core.c +++ b/arch/x86/kernel/fpu/core.c @@ -105,7 +105,7 @@ EXPORT_SYMBOL(irq_fpu_usable); void save_fpregs_to_fpstate(struct fpu *fpu) { if (likely(use_xsave())) { - os_xsave(&fpu->fpstate->regs.xsave); + os_xsave(fpu->fpstate); /* * AVX512 state is tracked here because its use is --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -349,7 +349,6 @@ static bool __fpu_restore_sig(void __use if (__copy_from_user(&env, buf, sizeof(env))) return false; - fpregs = &fpu->fpstate->regs; /* * By setting TIF_NEED_FPU_LOAD it is ensured that our xstate is * not modified on context switch and that the xstate is considered @@ -367,13 +366,14 @@ static bool __fpu_restore_sig(void __use * the right place in memory. It's ia32 mode. Shrug. */ if (xfeatures_mask_supervisor()) - os_xsave(&fpregs->xsave); + os_xsave(fpu->fpstate); set_thread_flag(TIF_NEED_FPU_LOAD); } __fpu_invalidate_fpregs_state(fpu); __cpu_invalidate_fpregs_state(); fpregs_unlock(); + fpregs = &fpu->fpstate->regs; if (use_xsave() && !fx_only) { if (copy_sigframe_from_user_to_xstate(&fpregs->xsave, buf_fx)) return false; --- a/arch/x86/kernel/fpu/xstate.h +++ b/arch/x86/kernel/fpu/xstate.h @@ -101,16 +101,16 @@ extern void *get_xsave_addr(struct xregs * Uses either XSAVE or XSAVEOPT or XSAVES depending on the CPU features * and command line options. The choice is permanent until the next reboot. */ -static inline void os_xsave(struct xregs_state *xstate) +static inline void os_xsave(struct fpstate *fpstate) { - u64 mask = xfeatures_mask_all; + u64 mask = fpstate->xfeatures; u32 lmask = mask; u32 hmask = mask >> 32; int err; WARN_ON_FPU(!alternatives_patched); - XSTATE_XSAVE(xstate, lmask, hmask, err); + XSTATE_XSAVE(&fpstate->regs.xsave, lmask, hmask, err); /* We should never fault when copying to a kernel buffer: */ WARN_ON_FPU(err); From patchwork Wed Oct 13 14:55:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556143 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D557EC433EF for ; Wed, 13 Oct 2021 14:56:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B3E8C610E6 for ; Wed, 13 Oct 2021 14:56:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238539AbhJMO6r (ORCPT ); Wed, 13 Oct 2021 10:58:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56262 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238542AbhJMO6K (ORCPT ); Wed, 13 Oct 2021 10:58:10 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A471C06177B; Wed, 13 Oct 2021 07:55:53 -0700 (PDT) Message-ID: <20211013145323.077781448@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136951; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=YP1CP9Xf5ROQgVwmt9Wg47yzn0wbL0Hvqv4B5Z8LC0g=; b=a3XrpP/QAAwl7aTu2bdzhdpXK7fruh6y4RBIfqlgXGwH2p2GImGM42rpiLw96ZDlnHhbUN jvDe3MCJtFcwOObynShkDoYeKt3aSCynP4BWckYPyzAL7PWH04nqOnKIPYJMVpuo1y1h30 t/eUM834PHdBiZAvQd7atWwtos09i3diKoMBgFZyorKf5tjIkKOV1KsjKWzESxpWMvo4RD pDKs76DwaGd0vLf8oKLU3nWcmGDNjCFG7Kn0uH64LUYPtWkcwGyopamwfQgPevMbjnnRkf u6sn66WGlHMXHRG+BRKOxeCVeLiSkMu3ahMc7dCOnMKXqk7YJnn3GZWZwsq/gA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136951; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=YP1CP9Xf5ROQgVwmt9Wg47yzn0wbL0Hvqv4B5Z8LC0g=; b=HSjC3R/EMwQCMCTflIjYBjT/7dtqDDL+aP6wHkEA//57Pcc+jJxaFLJDTSKsH8QqbDRcwh O6PDOqMjD0Xc9GAg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 17/21] x86/fpu/xstate: Use fpstate for xsave_to_user_sigframe() References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:51 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org With dynamically enabled features the sigframe code must know the features which are enabled for the task. Get them from fpstate. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/fpu/xstate.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/arch/x86/kernel/fpu/xstate.h +++ b/arch/x86/kernel/fpu/xstate.h @@ -149,7 +149,7 @@ static inline int xsave_to_user_sigframe * internally, e.g. PKRU. That's user space ABI and also required * to allow the signal handler to modify PKRU. */ - u64 mask = xfeatures_mask_uabi(); + u64 mask = current->thread.fpu.fpstate->user_xfeatures; u32 lmask = mask; u32 hmask = mask >> 32; int err; From patchwork Wed Oct 13 14:55:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556135 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1C6BC433F5 for ; Wed, 13 Oct 2021 14:56:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CA8496112D for ; Wed, 13 Oct 2021 14:56:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238285AbhJMO6Z (ORCPT ); Wed, 13 Oct 2021 10:58:25 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:35376 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238266AbhJMO55 (ORCPT ); Wed, 13 Oct 2021 10:57:57 -0400 Message-ID: <20211013145323.129699950@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136953; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=2dk3RFW57oZ1plO2S379FVF9hIdOzs/SDlm1jedIkxI=; b=hWlR56gSJYet3XS5orxABZGLITqCdj7Lz3mF19iu0xxnfbU8+RzJZ91evS+5dMC8IkJVVf Uh2YRPlRUnyS8G8aJQN68zJvlg9adXpPS4bis7oshXre8UkangeWXUEsO49PJ9hHH8RzWq uReV3Y8LNJL+ymPZ86No75KCapyhClxd8/lFPN2YK/0c4pHo55+7IUt8tpI8wDUAeoxe1D Iw8Z91Z1e1XD/GWhB5e6ibaXgen5sQgjgw+0uVzdrNTLHrnNDJI00MV2TEATrCsG0IDn2/ 4sWh/zVUY10Zmrg6RjdD3/dJvw0HRFWSR+4arn+spax0PMmuzEJdZryNNtnWbA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136953; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=2dk3RFW57oZ1plO2S379FVF9hIdOzs/SDlm1jedIkxI=; b=tbjFO9G3q0MKsPXMMtifenpU3IW72cyC6XmLBoXOpWs102dYLtbdlSuxCk5AquncHX9tGH kG/XsXawE82s++Aw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 18/21] x86/fpu: Use fpstate in fpu_copy_kvm_uabi_to_fpstate() References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:52 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Straight forward conversion. No functional change. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/fpu/core.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) --- a/arch/x86/kernel/fpu/core.c +++ b/arch/x86/kernel/fpu/core.c @@ -205,7 +205,7 @@ EXPORT_SYMBOL_GPL(fpu_copy_fpstate_to_kv int fpu_copy_kvm_uabi_to_fpstate(struct fpu *fpu, const void *buf, u64 xcr0, u32 *vpkru) { - union fpregs_state *kstate = &fpu->fpstate->regs; + struct fpstate *kstate = fpu->fpstate; const union fpregs_state *ustate = buf; struct pkru_state *xpkru; int ret; @@ -215,25 +215,25 @@ int fpu_copy_kvm_uabi_to_fpstate(struct return -EINVAL; if (ustate->fxsave.mxcsr & ~mxcsr_feature_mask) return -EINVAL; - memcpy(&kstate->fxsave, &ustate->fxsave, sizeof(ustate->fxsave)); + memcpy(&kstate->regs.fxsave, &ustate->fxsave, sizeof(ustate->fxsave)); return 0; } if (ustate->xsave.header.xfeatures & ~xcr0) return -EINVAL; - ret = copy_uabi_from_kernel_to_xstate(&kstate->xsave, ustate); + ret = copy_uabi_from_kernel_to_xstate(&kstate->regs.xsave, ustate); if (ret) return ret; /* Retrieve PKRU if not in init state */ - if (kstate->xsave.header.xfeatures & XFEATURE_MASK_PKRU) { - xpkru = get_xsave_addr(&kstate->xsave, XFEATURE_PKRU); + if (kstate->regs.xsave.header.xfeatures & XFEATURE_MASK_PKRU) { + xpkru = get_xsave_addr(&kstate->regs.xsave, XFEATURE_PKRU); *vpkru = xpkru->pkru; } /* Ensure that XCOMP_BV is set up for XSAVES */ - xstate_init_xcomp_bv(&kstate->xsave, xfeatures_mask_uabi()); + xstate_init_xcomp_bv(&kstate->regs.xsave, xfeatures_mask_uabi()); return 0; } EXPORT_SYMBOL_GPL(fpu_copy_kvm_uabi_to_fpstate); From patchwork Wed Oct 13 14:55:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556137 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A629C433FE for ; Wed, 13 Oct 2021 14:56:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0489B6112D for ; Wed, 13 Oct 2021 14:56:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238751AbhJMO60 (ORCPT ); Wed, 13 Oct 2021 10:58:26 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:35446 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238056AbhJMO56 (ORCPT ); Wed, 13 Oct 2021 10:57:58 -0400 Message-ID: <20211013145323.181495492@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136954; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=M7epPoXlEVXhVT9MtSrIKMVfCK09b8UlgJegNqqby9Q=; b=f8R7Li9Va/Lz0wBHGvt/fnQMHEwxx60m0HlDrNsl4Veb/s4CEMQuIymZkwCbxnjAMi4ROQ WiWLcyXlnYbNjZCpN1cadlwkR88Ft0Bufz9te9ASz1A4T6B8zMZkZfHQnEc+htZND6hSYC vbX20fc2lPzykt7cYgGDbvMmS+7p9+wP4UJF6mWg5kFyLCtoYM+AkeE7HmTqNxOZhoFcwG H2/xnpT9ZHlq7wlvPpGAqa2CwhrQBtAdaeln2G2X+tGGnTlEeCRgPQdH572xn9jOtySND+ wNlgG39rak30RyglitRNgeE6i3QMNYj9q83dqmyUSz5v7huXgs/CEcmmA3z/tw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136954; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=M7epPoXlEVXhVT9MtSrIKMVfCK09b8UlgJegNqqby9Q=; b=t2LwL0LMTefT1X3sEa94ZEmghYI7FTpaztlH8lvqoFnzb/7Tp2kO0tDNj782qP+A8cb5JZ DDEsBgAa5IgpbJDg== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 19/21] x86/fpu: Use fpstate in __copy_xstate_to_uabi_buf() References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:54 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org With dynamically enabled features the copy function must know the features and the size which is valid for the task. Retrieve them from fpstate. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/fpu/core.c | 8 ++++---- arch/x86/kernel/fpu/xstate.c | 11 ++++++----- arch/x86/kernel/fpu/xstate.h | 2 +- 3 files changed, 11 insertions(+), 10 deletions(-) --- a/arch/x86/kernel/fpu/core.c +++ b/arch/x86/kernel/fpu/core.c @@ -187,15 +187,15 @@ EXPORT_SYMBOL_GPL(fpu_swap_kvm_fpu); void fpu_copy_fpstate_to_kvm_uabi(struct fpu *fpu, void *buf, unsigned int size, u32 pkru) { - union fpregs_state *kstate = &fpu->fpstate->regs; + struct fpstate *kstate = fpu->fpstate; union fpregs_state *ustate = buf; struct membuf mb = { .p = buf, .left = size }; if (cpu_feature_enabled(X86_FEATURE_XSAVE)) { - __copy_xstate_to_uabi_buf(mb, &kstate->xsave, pkru, - XSTATE_COPY_XSAVE); + __copy_xstate_to_uabi_buf(mb, kstate, pkru, XSTATE_COPY_XSAVE); } else { - memcpy(&ustate->fxsave, &kstate->fxsave, sizeof(ustate->fxsave)); + memcpy(&ustate->fxsave, &kstate->regs.fxsave, + sizeof(ustate->fxsave)); /* Make it restorable on a XSAVE enabled host */ ustate->xsave.header.xfeatures = XFEATURE_MASK_FPSSE; } --- a/arch/x86/kernel/fpu/xstate.c +++ b/arch/x86/kernel/fpu/xstate.c @@ -969,7 +969,7 @@ static void copy_feature(bool from_xstat /** * __copy_xstate_to_uabi_buf - Copy kernel saved xstate to a UABI buffer * @to: membuf descriptor - * @xsave: The xsave from which to copy + * @fpstate: The fpstate buffer from which to copy * @pkru_val: The PKRU value to store in the PKRU component * @copy_mode: The requested copy mode * @@ -979,11 +979,12 @@ static void copy_feature(bool from_xstat * * It supports partial copy but @to.pos always starts from zero. */ -void __copy_xstate_to_uabi_buf(struct membuf to, struct xregs_state *xsave, +void __copy_xstate_to_uabi_buf(struct membuf to, struct fpstate *fpstate, u32 pkru_val, enum xstate_copy_mode copy_mode) { const unsigned int off_mxcsr = offsetof(struct fxregs_state, mxcsr); struct xregs_state *xinit = &init_fpstate.regs.xsave; + struct xregs_state *xsave = &fpstate->regs.xsave; struct xstate_header header; unsigned int zerofrom; u64 mask; @@ -1003,7 +1004,7 @@ void __copy_xstate_to_uabi_buf(struct me break; case XSTATE_COPY_XSAVE: - header.xfeatures &= xfeatures_mask_uabi(); + header.xfeatures &= fpstate->user_xfeatures; break; } @@ -1046,7 +1047,7 @@ void __copy_xstate_to_uabi_buf(struct me * but there is no state to copy from in the compacted * init_fpstate. The gap tracking will zero these states. */ - mask = xfeatures_mask_uabi(); + mask = fpstate->user_xfeatures; for_each_extended_xfeature(i, mask) { /* @@ -1097,7 +1098,7 @@ void __copy_xstate_to_uabi_buf(struct me void copy_xstate_to_uabi_buf(struct membuf to, struct task_struct *tsk, enum xstate_copy_mode copy_mode) { - __copy_xstate_to_uabi_buf(to, &tsk->thread.fpu.fpstate->regs.xsave, + __copy_xstate_to_uabi_buf(to, tsk->thread.fpu.fpstate, tsk->thread.pkru, copy_mode); } --- a/arch/x86/kernel/fpu/xstate.h +++ b/arch/x86/kernel/fpu/xstate.h @@ -15,7 +15,7 @@ static inline void xstate_init_xcomp_bv( xsave->header.xcomp_bv = mask | XCOMP_BV_COMPACTED_FORMAT; } -extern void __copy_xstate_to_uabi_buf(struct membuf to, struct xregs_state *xsave, +extern void __copy_xstate_to_uabi_buf(struct membuf to, struct fpstate *fpstate, u32 pkru_val, enum xstate_copy_mode copy_mode); extern void fpu__init_cpu_xstate(void); From patchwork Wed Oct 13 14:55:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556145 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41BCFC433FE for ; Wed, 13 Oct 2021 14:57:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 27EA861139 for ; Wed, 13 Oct 2021 14:57:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238404AbhJMO7R (ORCPT ); Wed, 13 Oct 2021 10:59:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56294 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238458AbhJMO6m (ORCPT ); Wed, 13 Oct 2021 10:58:42 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 85D48C0613E8; Wed, 13 Oct 2021 07:55:57 -0700 (PDT) Message-ID: <20211013145323.233529986@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136956; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=bap8nj49keOI3aiwIuu3xjhv/aUqjhea7KisuXttHHM=; b=0I9cvBbAP8BNprxTk3wGm58XaELSaF/JRYaU8WLe5feV3VvJrAPWQ7P6DFtFBFamxo16gH hEWoxs0IpiAE9AWe+HrmXRyGc8JBSdF5l1bbb6kZ5w9md9QrPyJMVwxtgI1OxB+YDuOGet aZAkywvudUYho0iNOMiZvWQsfzZ1APAioR5w525cVbcFOPko8k6gzz7Oc07GlNe1uPZfCl lT+zZ1GcidyHnJmM534lcsl290169OyWssMj/Y9mTrlc6bkFi7HgrRNUGLoCU/BQHqSzxD husC/BsaqGZD9jLPBeQ9Sqs/G1Le80my/xhuxu1Iwcb9zN5RurslpIv0jPH/CA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136956; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=bap8nj49keOI3aiwIuu3xjhv/aUqjhea7KisuXttHHM=; b=jEu4GaPZj/0PKdNl0zxjsHKnHqeckHCwkZDo4KW/IubuOfAPAAU+ySUYtlhrT/Wb1Mfwsw IoP95di0bwilKOBQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 20/21] x86/fpu/xstate: Use fpstate for copy_uabi_to_xstate() References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:55 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Prepare for dynamically enabled states per task. The function needs to retrieve the features and sizes which are valid in a fpstate context. Retrieve them from fpstate. Move the function declarations to the core header as they are not required anywhere else. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/fpu/xstate.h | 12 ------------ arch/x86/kernel/fpu/core.c | 2 +- arch/x86/kernel/fpu/regset.c | 5 ++--- arch/x86/kernel/fpu/signal.c | 2 +- arch/x86/kernel/fpu/xstate.c | 18 ++++++++++-------- arch/x86/kernel/fpu/xstate.h | 12 ++++++++++++ 6 files changed, 26 insertions(+), 25 deletions(-) --- a/arch/x86/include/asm/fpu/xstate.h +++ b/arch/x86/include/asm/fpu/xstate.h @@ -129,20 +129,8 @@ extern void __init update_regset_xstate_ u64 xstate_mask); int xfeature_size(int xfeature_nr); -int copy_uabi_from_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf); -int copy_sigframe_from_user_to_xstate(struct xregs_state *xsave, const void __user *ubuf); void xsaves(struct xregs_state *xsave, u64 mask); void xrstors(struct xregs_state *xsave, u64 mask); -enum xstate_copy_mode { - XSTATE_COPY_FP, - XSTATE_COPY_FX, - XSTATE_COPY_XSAVE, -}; - -struct membuf; -void copy_xstate_to_uabi_buf(struct membuf to, struct task_struct *tsk, - enum xstate_copy_mode mode); - #endif --- a/arch/x86/kernel/fpu/core.c +++ b/arch/x86/kernel/fpu/core.c @@ -222,7 +222,7 @@ int fpu_copy_kvm_uabi_to_fpstate(struct if (ustate->xsave.header.xfeatures & ~xcr0) return -EINVAL; - ret = copy_uabi_from_kernel_to_xstate(&kstate->regs.xsave, ustate); + ret = copy_uabi_from_kernel_to_xstate(kstate, ustate); if (ret) return ret; --- a/arch/x86/kernel/fpu/regset.c +++ b/arch/x86/kernel/fpu/regset.c @@ -8,11 +8,11 @@ #include #include #include -#include #include "context.h" #include "internal.h" #include "legacy.h" +#include "xstate.h" /* * The xstateregs_active() routine is the same as the regset_fpregs_active() routine, @@ -168,8 +168,7 @@ int xstateregs_set(struct task_struct *t } fpu_force_restore(fpu); - ret = copy_uabi_from_kernel_to_xstate(&fpu->fpstate->regs.xsave, - kbuf ?: tmpbuf); + ret = copy_uabi_from_kernel_to_xstate(fpu->fpstate, kbuf ?: tmpbuf); out: vfree(tmpbuf); --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -375,7 +375,7 @@ static bool __fpu_restore_sig(void __use fpregs = &fpu->fpstate->regs; if (use_xsave() && !fx_only) { - if (copy_sigframe_from_user_to_xstate(&fpregs->xsave, buf_fx)) + if (copy_sigframe_from_user_to_xstate(fpu->fpstate, buf_fx)) return false; } else { if (__copy_from_user(&fpregs->fxsave, buf_fx, --- a/arch/x86/kernel/fpu/xstate.c +++ b/arch/x86/kernel/fpu/xstate.c @@ -463,10 +463,11 @@ int xfeature_size(int xfeature_nr) } /* Validate an xstate header supplied by userspace (ptrace or sigreturn) */ -static int validate_user_xstate_header(const struct xstate_header *hdr) +static int validate_user_xstate_header(const struct xstate_header *hdr, + struct fpstate *fpstate) { /* No unknown or supervisor features may be set */ - if (hdr->xfeatures & ~xfeatures_mask_uabi()) + if (hdr->xfeatures & ~fpstate->user_xfeatures) return -EINVAL; /* Userspace must use the uncompacted format */ @@ -1115,9 +1116,10 @@ static int copy_from_buffer(void *dst, u } -static int copy_uabi_to_xstate(struct xregs_state *xsave, const void *kbuf, +static int copy_uabi_to_xstate(struct fpstate *fpstate, const void *kbuf, const void __user *ubuf) { + struct xregs_state *xsave = &fpstate->regs.xsave; unsigned int offset, size; struct xstate_header hdr; u64 mask; @@ -1127,7 +1129,7 @@ static int copy_uabi_to_xstate(struct xr if (copy_from_buffer(&hdr, offset, sizeof(hdr), kbuf, ubuf)) return -EFAULT; - if (validate_user_xstate_header(&hdr)) + if (validate_user_xstate_header(&hdr, fpstate)) return -EINVAL; /* Validate MXCSR when any of the related features is in use */ @@ -1182,9 +1184,9 @@ static int copy_uabi_to_xstate(struct xr * Convert from a ptrace standard-format kernel buffer to kernel XSAVE[S] * format and copy to the target thread. Used by ptrace and KVM. */ -int copy_uabi_from_kernel_to_xstate(struct xregs_state *xsave, const void *kbuf) +int copy_uabi_from_kernel_to_xstate(struct fpstate *fpstate, const void *kbuf) { - return copy_uabi_to_xstate(xsave, kbuf, NULL); + return copy_uabi_to_xstate(fpstate, kbuf, NULL); } /* @@ -1192,10 +1194,10 @@ int copy_uabi_from_kernel_to_xstate(stru * XSAVE[S] format and copy to the target thread. This is called from the * sigreturn() and rt_sigreturn() system calls. */ -int copy_sigframe_from_user_to_xstate(struct xregs_state *xsave, +int copy_sigframe_from_user_to_xstate(struct fpstate *fpstate, const void __user *ubuf) { - return copy_uabi_to_xstate(xsave, NULL, ubuf); + return copy_uabi_to_xstate(fpstate, NULL, ubuf); } static bool validate_independent_components(u64 mask) --- a/arch/x86/kernel/fpu/xstate.h +++ b/arch/x86/kernel/fpu/xstate.h @@ -15,8 +15,20 @@ static inline void xstate_init_xcomp_bv( xsave->header.xcomp_bv = mask | XCOMP_BV_COMPACTED_FORMAT; } +enum xstate_copy_mode { + XSTATE_COPY_FP, + XSTATE_COPY_FX, + XSTATE_COPY_XSAVE, +}; + +struct membuf; extern void __copy_xstate_to_uabi_buf(struct membuf to, struct fpstate *fpstate, u32 pkru_val, enum xstate_copy_mode copy_mode); +extern void copy_xstate_to_uabi_buf(struct membuf to, struct task_struct *tsk, + enum xstate_copy_mode mode); +extern int copy_uabi_from_kernel_to_xstate(struct fpstate *fpstate, const void *kbuf); +extern int copy_sigframe_from_user_to_xstate(struct fpstate *fpstate, const void __user *ubuf); + extern void fpu__init_cpu_xstate(void); extern void fpu__init_system_xstate(void); From patchwork Wed Oct 13 14:55:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12556139 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4A51C433EF for ; Wed, 13 Oct 2021 14:56:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B1BC0610E6 for ; Wed, 13 Oct 2021 14:56:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238354AbhJMO6a (ORCPT ); Wed, 13 Oct 2021 10:58:30 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:35462 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238334AbhJMO6B (ORCPT ); Wed, 13 Oct 2021 10:58:01 -0400 Message-ID: <20211013145323.285696382@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1634136957; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=1C1rPf7NVgZwm5o/B8NVWJ5bZQaS4NDUuXblws5cGwI=; b=XeyxWzpHFDA/b/D67cS7bRkWvUMmTjWBvMb/xZnANmZkbvV9f+ouwfIPQ2MYHbKCNXhU8J pZg3H0QdNHLMJHjAcSdQ2teC5Bebb5sX5qgnjeTEeV3JkexpD0Qf1ttux2ej9a1P/TaXFh 8q5Y0ZGGsgQioSUDnebplK6eBljV8hfDey7506Rn/CEk6FU7iTI2ERFRnsvRuy6AR1Bqr4 EjlaYhu96f52cvJy0I7cXCe03PWNZNZEw1Qt7GyZA9MVdSVKR9vjthfY2iPOeefOTwJgsW jqTeebKyxTQmvbWYh/j8khisRqD6x8uuCJD10O5Jxz4VQ1omQL5qLa4jyavIVQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1634136957; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=1C1rPf7NVgZwm5o/B8NVWJ5bZQaS4NDUuXblws5cGwI=; b=5kar4zVy3b4jB631a4qzi5gxpLOb5cTnhqB9perPNiQEQ+a5h5A2BhK3qUXtNZ0xQkDIdB OkYXpQtixoF/9JDQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, "Chang S. Bae" , Dave Hansen , Arjan van de Ven , kvm@vger.kernel.org, Paolo Bonzini Subject: [patch 21/21] x86/fpu/signal: Use fpstate for size and features References: <20211013142847.120153383@linutronix.de> MIME-Version: 1.0 Date: Wed, 13 Oct 2021 16:55:57 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org For dynamically enabled features it's required to get the features which are enabled for that context when restoring from sigframe. The same applies for all signal frame size calculations. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/fpu/signal.c | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -41,7 +41,7 @@ static inline bool check_xstate_in_sigfr /* Check for the first magic field and other error scenarios. */ if (fx_sw->magic1 != FP_XSTATE_MAGIC1 || fx_sw->xstate_size < min_xstate_size || - fx_sw->xstate_size > fpu_user_xstate_size || + fx_sw->xstate_size > current->thread.fpu.fpstate->user_size || fx_sw->xstate_size > fx_sw->extended_size) goto setfx; @@ -230,11 +230,11 @@ bool copy_fpstate_to_sigframe(void __use return true; } -static int __restore_fpregs_from_user(void __user *buf, u64 xrestore, - bool fx_only) +static int __restore_fpregs_from_user(void __user *buf, u64 ufeatures, + u64 xrestore, bool fx_only) { if (use_xsave()) { - u64 init_bv = xfeatures_mask_uabi() & ~xrestore; + u64 init_bv = ufeatures & ~xrestore; int ret; if (likely(!fx_only)) @@ -265,7 +265,8 @@ static bool restore_fpregs_from_user(voi retry: fpregs_lock(); pagefault_disable(); - ret = __restore_fpregs_from_user(buf, xrestore, fx_only); + ret = __restore_fpregs_from_user(buf, fpu->fpstate->user_xfeatures, + xrestore, fx_only); pagefault_enable(); if (unlikely(ret)) { @@ -425,10 +426,11 @@ static bool __fpu_restore_sig(void __use return success; } -static inline int xstate_sigframe_size(void) +static inline unsigned int xstate_sigframe_size(struct fpstate *fpstate) { - return use_xsave() ? fpu_user_xstate_size + FP_XSTATE_MAGIC2_SIZE : - fpu_user_xstate_size; + unsigned int size = fpstate->user_size; + + return use_xsave() ? size + FP_XSTATE_MAGIC2_SIZE : size; } /* @@ -436,17 +438,19 @@ static inline int xstate_sigframe_size(v */ bool fpu__restore_sig(void __user *buf, int ia32_frame) { - unsigned int size = xstate_sigframe_size(); struct fpu *fpu = ¤t->thread.fpu; void __user *buf_fx = buf; bool ia32_fxstate = false; bool success = false; + unsigned int size; if (unlikely(!buf)) { fpu__clear_user_states(fpu); return true; } + size = xstate_sigframe_size(fpu->fpstate); + ia32_frame &= (IS_ENABLED(CONFIG_X86_32) || IS_ENABLED(CONFIG_IA32_EMULATION)); @@ -481,7 +485,7 @@ unsigned long fpu__alloc_mathframe(unsigned long sp, int ia32_frame, unsigned long *buf_fx, unsigned long *size) { - unsigned long frame_size = xstate_sigframe_size(); + unsigned long frame_size = xstate_sigframe_size(current->thread.fpu.fpstate); *buf_fx = sp = round_down(sp - frame_size, 64); if (ia32_frame && use_fxsr()) { @@ -494,9 +498,12 @@ fpu__alloc_mathframe(unsigned long sp, i return sp; } -unsigned long fpu__get_fpstate_size(void) +unsigned long __init fpu__get_fpstate_size(void) { - unsigned long ret = xstate_sigframe_size(); + unsigned long ret = fpu_user_xstate_size; + + if (use_xsave()) + ret += FP_XSTATE_MAGIC2_SIZE; /* * This space is needed on (most) 32-bit kernels, or when a 32-bit