From patchwork Thu Oct 14 05:40:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Lipnitskiy X-Patchwork-Id: 12557755 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 447EFC4332F for ; Thu, 14 Oct 2021 05:40:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 25FAE611CE for ; Thu, 14 Oct 2021 05:40:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229457AbhJNFmb (ORCPT ); Thu, 14 Oct 2021 01:42:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229802AbhJNFma (ORCPT ); Thu, 14 Oct 2021 01:42:30 -0400 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 917C0C061570; Wed, 13 Oct 2021 22:40:26 -0700 (PDT) Received: by mail-pj1-x102f.google.com with SMTP id na16-20020a17090b4c1000b0019f5bb661f9so4005790pjb.0; Wed, 13 Oct 2021 22:40:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JrL+FNc3+RxCWmT97CU54lI2MPsiUcOLy1VZMHpHKr4=; b=AJfBdhPMo5ez+gkYbywNk+TfQM3iHDv4mJ161RoI1nADOZAN+N+44AridU9MoApVwO dRPDoT+5FQEXNTu28ETkrPHNibH3k9pn9gsENmnlY6fnBkrcgjSuYO2kFXCb9CbwnoEa hUeDz30L9OsESpsh2bho89br/Ww+dx2RPuVYKULf+MhOaLbGsHvvmzcAJ0V1T9fJDZ4i trHLpiNR49zi/6H6UeUSYBkpARaMwCkmOeteEqKRMj4r6zFsCH9Ji/eBB+zQRuOAE6w/ ooIPrT0cJ9BOOxtCDA3rzMSrDgki/QiCKaBcLOBq3WBLoRW94v/LSspq06fD80QjXiaq 8IFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JrL+FNc3+RxCWmT97CU54lI2MPsiUcOLy1VZMHpHKr4=; b=bexgdMnQYh2Sxcb0X0zYX7+2pG1oxqBmoeQ8w2dtcYEyquhHP6F9eXwTOFHF8CLC+W 4PVhnGnp25/Fd/MllX/nyIeB0v7eeUF8Mm0Bvn5WjpKowUAnUObXtLoyxsICrBiQwghW HiWG5O/EJ63x5d4FyEx/BCEFvchtetd/yfU7+JzUl9awbkmhQCIRWhsY0mzSIEC6p4g4 TOa0NxR9xh8FqIBTb68fKIjh6m8hsyAA/BtWDPlVoljLCBqTvOSwqSGySH7G8BAuVyBS QgJcy1pPwJtusX5IXW/SC5WoBJ8cUS5DJqVoeIlWTXTgAI3yB381i8V6JrO0Z1CyYF18 wdgA== X-Gm-Message-State: AOAM531JUPx9z+4O4aW08GUEGbd97oy3k5PyjXG1PfQfh7KPw2t1A8x3 RnXu7mgl0bP+I66pwD6iYQM= X-Google-Smtp-Source: ABdhPJy+9UrX9TQ0wF37RB60bWf3OMLIVKdSS1pJjlFUIF9WkX1v8wQwgmaBF08FPq/Wn1D82YLstw== X-Received: by 2002:a17:903:244c:b0:13e:c46e:a353 with SMTP id l12-20020a170903244c00b0013ec46ea353mr3274212pls.10.1634190025908; Wed, 13 Oct 2021 22:40:25 -0700 (PDT) Received: from z640-arch.lan ([2602:61:7360:b000::9d4]) by smtp.gmail.com with ESMTPSA id mu7sm1257318pjb.12.2021.10.13.22.40.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Oct 2021 22:40:25 -0700 (PDT) From: Ilya Lipnitskiy To: Thomas Bogendoerfer , Jiri Kosina , Alexey Malahov , Serge Semin , Hauke Mehrtens , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ilya Lipnitskiy Subject: [PATCH v3 1/3] MIPS: kernel: proc: fix trivial style errors Date: Wed, 13 Oct 2021 22:40:16 -0700 Message-Id: <20211014054018.6179-2-ilya.lipnitskiy@gmail.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211014054018.6179-1-ilya.lipnitskiy@gmail.com> References: <20211014054018.6179-1-ilya.lipnitskiy@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Fix the following checkpatch errors - no logic changes: WARNING: Block comments use a trailing */ on a separate line + * */ ERROR: space prohibited before open square bracket '[' + char fmt [64]; ERROR: space prohibited before that ',' (ctx:WxE) + seq_printf(m, "%s0x%04x", i ? ", " : "" , ERROR: trailing whitespace +^Iseq_printf(m, "isa\t\t\t:"); $ ERROR: trailing statements should be on next line Signed-off-by: Ilya Lipnitskiy --- arch/mips/kernel/proc.c | 67 ++++++++++++++++++++++++++--------------- 1 file changed, 43 insertions(+), 24 deletions(-) diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 4184d641f05e..053847c0d4cd 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -19,8 +19,8 @@ unsigned int vced_count, vcei_count; /* - * * No lock; only written during early bootup by CPU 0. - * */ + * No lock; only written during early bootup by CPU 0. + */ static RAW_NOTIFIER_HEAD(proc_cpuinfo_chain); int __ref register_proc_cpuinfo_notifier(struct notifier_block *nb) @@ -39,7 +39,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) unsigned long n = (unsigned long) v - 1; unsigned int version = cpu_data[n].processor_id; unsigned int fp_vers = cpu_data[n].fpu_id; - char fmt [64]; + char fmt[64]; int i; #ifdef CONFIG_SMP @@ -78,12 +78,12 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_printf(m, "count: %d, address/irw mask: [", cpu_data[n].watch_reg_count); for (i = 0; i < cpu_data[n].watch_reg_count; i++) - seq_printf(m, "%s0x%04x", i ? ", " : "" , + seq_printf(m, "%s0x%04x", i ? ", " : "", cpu_data[n].watch_reg_masks[i]); seq_printf(m, "]\n"); } - seq_printf(m, "isa\t\t\t:"); + seq_printf(m, "isa\t\t\t:"); if (cpu_has_mips_1) seq_printf(m, " mips1"); if (cpu_has_mips_2) @@ -113,25 +113,44 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_printf(m, "\n"); seq_printf(m, "ASEs implemented\t:"); - if (cpu_has_mips16) seq_printf(m, "%s", " mips16"); - if (cpu_has_mips16e2) seq_printf(m, "%s", " mips16e2"); - if (cpu_has_mdmx) seq_printf(m, "%s", " mdmx"); - if (cpu_has_mips3d) seq_printf(m, "%s", " mips3d"); - if (cpu_has_smartmips) seq_printf(m, "%s", " smartmips"); - if (cpu_has_dsp) seq_printf(m, "%s", " dsp"); - if (cpu_has_dsp2) seq_printf(m, "%s", " dsp2"); - if (cpu_has_dsp3) seq_printf(m, "%s", " dsp3"); - if (cpu_has_mipsmt) seq_printf(m, "%s", " mt"); - if (cpu_has_mmips) seq_printf(m, "%s", " micromips"); - if (cpu_has_vz) seq_printf(m, "%s", " vz"); - if (cpu_has_msa) seq_printf(m, "%s", " msa"); - if (cpu_has_eva) seq_printf(m, "%s", " eva"); - if (cpu_has_htw) seq_printf(m, "%s", " htw"); - if (cpu_has_xpa) seq_printf(m, "%s", " xpa"); - if (cpu_has_loongson_mmi) seq_printf(m, "%s", " loongson-mmi"); - if (cpu_has_loongson_cam) seq_printf(m, "%s", " loongson-cam"); - if (cpu_has_loongson_ext) seq_printf(m, "%s", " loongson-ext"); - if (cpu_has_loongson_ext2) seq_printf(m, "%s", " loongson-ext2"); + if (cpu_has_mips16) + seq_printf(m, "%s", " mips16"); + if (cpu_has_mips16e2) + seq_printf(m, "%s", " mips16e2"); + if (cpu_has_mdmx) + seq_printf(m, "%s", " mdmx"); + if (cpu_has_mips3d) + seq_printf(m, "%s", " mips3d"); + if (cpu_has_smartmips) + seq_printf(m, "%s", " smartmips"); + if (cpu_has_dsp) + seq_printf(m, "%s", " dsp"); + if (cpu_has_dsp2) + seq_printf(m, "%s", " dsp2"); + if (cpu_has_dsp3) + seq_printf(m, "%s", " dsp3"); + if (cpu_has_mipsmt) + seq_printf(m, "%s", " mt"); + if (cpu_has_mmips) + seq_printf(m, "%s", " micromips"); + if (cpu_has_vz) + seq_printf(m, "%s", " vz"); + if (cpu_has_msa) + seq_printf(m, "%s", " msa"); + if (cpu_has_eva) + seq_printf(m, "%s", " eva"); + if (cpu_has_htw) + seq_printf(m, "%s", " htw"); + if (cpu_has_xpa) + seq_printf(m, "%s", " xpa"); + if (cpu_has_loongson_mmi) + seq_printf(m, "%s", " loongson-mmi"); + if (cpu_has_loongson_cam) + seq_printf(m, "%s", " loongson-cam"); + if (cpu_has_loongson_ext) + seq_printf(m, "%s", " loongson-ext"); + if (cpu_has_loongson_ext2) + seq_printf(m, "%s", " loongson-ext2"); seq_printf(m, "\n"); if (cpu_has_mmips) { From patchwork Thu Oct 14 05:40:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Lipnitskiy X-Patchwork-Id: 12557757 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 130B8C433EF for ; Thu, 14 Oct 2021 05:40:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E814E60D07 for ; Thu, 14 Oct 2021 05:40:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229882AbhJNFmc (ORCPT ); Thu, 14 Oct 2021 01:42:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229846AbhJNFmc (ORCPT ); Thu, 14 Oct 2021 01:42:32 -0400 Received: from mail-pl1-x62a.google.com (mail-pl1-x62a.google.com [IPv6:2607:f8b0:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 03D6BC061570; Wed, 13 Oct 2021 22:40:28 -0700 (PDT) Received: by mail-pl1-x62a.google.com with SMTP id y4so3408457plb.0; Wed, 13 Oct 2021 22:40:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tRybA6aId5iNq0MGMlrDWo3uq4MpQvC3KSkwvufnPuA=; b=iWYWA1G4CfrruYeVMT5I0p1wjUfVSk1afoiq4TyC2nTS+VlycdSR8QDhvARtnkCVbt tGgtjtcVDvrLn6WmSUxDbd+k61uJK8kgjI6QPNiWgG/MAnrOwgPdrFBDSGrWfSZipRKu PyNLQsmfQ4hQTs8YJDFQl5qV+8cQejM7dUa7nhM75iYf116PxHaRrxR6wWNXHERK8hK0 8gW59vKtoqwjvXfVJxNsNLwW2Mp6UkzL8T7J/aFuSOBof5i3ugDmVpFpCkzHv8TN7g+u rQLGI2Cz902pQB/D9yenoBcFKVmunwM8fpiyIIhBBe3TX/gJ4CXmKinnDO/bYQthEnW2 vlsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tRybA6aId5iNq0MGMlrDWo3uq4MpQvC3KSkwvufnPuA=; b=DExRmpjGiq5yy0SH31FB/l4ymtACHscjJrQ1r/klLXpkZbNm4gcxvSDXpKrIBFtRi9 pEPJ6jcCA/SoMo/Ho+3BjWTbOIWz+Nq/Ip+72I60gW62NhJC1hV3oJFwopOd9Wm01IEh /U0hNuHV4a1Bhp813DaEgkJsNaVdtb+tbVv3ZpFJhUCyRSriLttrUNNZ46hAwELfevtg wamNlnfIoKLkXMnHL4u+3B8mFt8KtGGvxHzwjcVjYQo21t60vprvO7Du8WJZLMl9pjT5 Q0z8S+svW3bzgW61fzbet4TU4JPle46zOZuVGAcmzPRjHrUQ0JFo5TkcT/hefeBgTz/z fPgg== X-Gm-Message-State: AOAM533v48yKDnBYXBvuAeHPcoyu3MVbTbPXxsw/d/fHjT84KyQVhvlY vKo5htQYbE423tZusJKZS36QXhxuCYg= X-Google-Smtp-Source: ABdhPJwqBSUQ12Is4GplflwpUZc2rkDb8BsDPwJbI8qLmhzE5SFC2GIc1tb8+L354f8bH0Qz2s0+Ug== X-Received: by 2002:a17:90a:51:: with SMTP id 17mr4038189pjb.185.1634190027483; Wed, 13 Oct 2021 22:40:27 -0700 (PDT) Received: from z640-arch.lan ([2602:61:7360:b000::9d4]) by smtp.gmail.com with ESMTPSA id mu7sm1257318pjb.12.2021.10.13.22.40.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Oct 2021 22:40:27 -0700 (PDT) From: Ilya Lipnitskiy To: Thomas Bogendoerfer , Jiri Kosina , Alexey Malahov , Serge Semin , Hauke Mehrtens , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ilya Lipnitskiy Subject: [PATCH v3 2/3] MIPS: kernel: proc: use seq_puts instead of seq_printf Date: Wed, 13 Oct 2021 22:40:17 -0700 Message-Id: <20211014054018.6179-3-ilya.lipnitskiy@gmail.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211014054018.6179-1-ilya.lipnitskiy@gmail.com> References: <20211014054018.6179-1-ilya.lipnitskiy@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Fix checkpatch WARNING: Prefer seq_puts to seq_printf Signed-off-by: Ilya Lipnitskiy --- arch/mips/kernel/proc.c | 76 ++++++++++++++++++++--------------------- 1 file changed, 38 insertions(+), 38 deletions(-) diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 053847c0d4cd..7d8481d9acc3 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -80,78 +80,78 @@ static int show_cpuinfo(struct seq_file *m, void *v) for (i = 0; i < cpu_data[n].watch_reg_count; i++) seq_printf(m, "%s0x%04x", i ? ", " : "", cpu_data[n].watch_reg_masks[i]); - seq_printf(m, "]\n"); + seq_puts(m, "]\n"); } - seq_printf(m, "isa\t\t\t:"); + seq_puts(m, "isa\t\t\t:"); if (cpu_has_mips_1) - seq_printf(m, " mips1"); + seq_puts(m, " mips1"); if (cpu_has_mips_2) - seq_printf(m, "%s", " mips2"); + seq_puts(m, " mips2"); if (cpu_has_mips_3) - seq_printf(m, "%s", " mips3"); + seq_puts(m, " mips3"); if (cpu_has_mips_4) - seq_printf(m, "%s", " mips4"); + seq_puts(m, " mips4"); if (cpu_has_mips_5) - seq_printf(m, "%s", " mips5"); + seq_puts(m, " mips5"); if (cpu_has_mips32r1) - seq_printf(m, "%s", " mips32r1"); + seq_puts(m, " mips32r1"); if (cpu_has_mips32r2) - seq_printf(m, "%s", " mips32r2"); + seq_puts(m, " mips32r2"); if (cpu_has_mips32r5) - seq_printf(m, "%s", " mips32r5"); + seq_puts(m, " mips32r5"); if (cpu_has_mips32r6) - seq_printf(m, "%s", " mips32r6"); + seq_puts(m, " mips32r6"); if (cpu_has_mips64r1) - seq_printf(m, "%s", " mips64r1"); + seq_puts(m, " mips64r1"); if (cpu_has_mips64r2) - seq_printf(m, "%s", " mips64r2"); + seq_puts(m, " mips64r2"); if (cpu_has_mips64r5) - seq_printf(m, "%s", " mips64r5"); + seq_puts(m, " mips64r5"); if (cpu_has_mips64r6) - seq_printf(m, "%s", " mips64r6"); - seq_printf(m, "\n"); + seq_puts(m, " mips64r6"); + seq_puts(m, "\n"); - seq_printf(m, "ASEs implemented\t:"); + seq_puts(m, "ASEs implemented\t:"); if (cpu_has_mips16) - seq_printf(m, "%s", " mips16"); + seq_puts(m, " mips16"); if (cpu_has_mips16e2) - seq_printf(m, "%s", " mips16e2"); + seq_puts(m, " mips16e2"); if (cpu_has_mdmx) - seq_printf(m, "%s", " mdmx"); + seq_puts(m, " mdmx"); if (cpu_has_mips3d) - seq_printf(m, "%s", " mips3d"); + seq_puts(m, " mips3d"); if (cpu_has_smartmips) - seq_printf(m, "%s", " smartmips"); + seq_puts(m, " smartmips"); if (cpu_has_dsp) - seq_printf(m, "%s", " dsp"); + seq_puts(m, " dsp"); if (cpu_has_dsp2) - seq_printf(m, "%s", " dsp2"); + seq_puts(m, " dsp2"); if (cpu_has_dsp3) - seq_printf(m, "%s", " dsp3"); + seq_puts(m, " dsp3"); if (cpu_has_mipsmt) - seq_printf(m, "%s", " mt"); + seq_puts(m, " mt"); if (cpu_has_mmips) - seq_printf(m, "%s", " micromips"); + seq_puts(m, " micromips"); if (cpu_has_vz) - seq_printf(m, "%s", " vz"); + seq_puts(m, " vz"); if (cpu_has_msa) - seq_printf(m, "%s", " msa"); + seq_puts(m, " msa"); if (cpu_has_eva) - seq_printf(m, "%s", " eva"); + seq_puts(m, " eva"); if (cpu_has_htw) - seq_printf(m, "%s", " htw"); + seq_puts(m, " htw"); if (cpu_has_xpa) - seq_printf(m, "%s", " xpa"); + seq_puts(m, " xpa"); if (cpu_has_loongson_mmi) - seq_printf(m, "%s", " loongson-mmi"); + seq_puts(m, " loongson-mmi"); if (cpu_has_loongson_cam) - seq_printf(m, "%s", " loongson-cam"); + seq_puts(m, " loongson-cam"); if (cpu_has_loongson_ext) - seq_printf(m, "%s", " loongson-ext"); + seq_puts(m, " loongson-ext"); if (cpu_has_loongson_ext2) - seq_printf(m, "%s", " loongson-ext2"); - seq_printf(m, "\n"); + seq_puts(m, " loongson-ext2"); + seq_puts(m, "\n"); if (cpu_has_mmips) { seq_printf(m, "micromips kernel\t: %s\n", @@ -182,7 +182,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) raw_notifier_call_chain(&proc_cpuinfo_chain, 0, &proc_cpuinfo_notifier_args); - seq_printf(m, "\n"); + seq_puts(m, "\n"); return 0; } From patchwork Thu Oct 14 05:40:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Lipnitskiy X-Patchwork-Id: 12557759 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7AA06C433F5 for ; Thu, 14 Oct 2021 05:40:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 58C7D611C7 for ; Thu, 14 Oct 2021 05:40:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229958AbhJNFmf (ORCPT ); Thu, 14 Oct 2021 01:42:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59550 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229904AbhJNFmd (ORCPT ); Thu, 14 Oct 2021 01:42:33 -0400 Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A35C2C061570; Wed, 13 Oct 2021 22:40:29 -0700 (PDT) Received: by mail-pl1-x62f.google.com with SMTP id t11so3356527plq.11; Wed, 13 Oct 2021 22:40:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=26b6FMCylFMAHNcIhKc1n3VoY7qFK9eJmJZLWnz6s2s=; b=SjqOnWFqaU9bGUwBtffMnwVit5BgMw05zs4f0tDwYpgfeAFjUrN+ApyoDLDE6swfPs iS+kRui4EuW7tMOC6vz6jm9/OBq78JkJqfFBaw/4gbA+/F7zkPUV4SXOf1PALtHhtsUu 37pn7DSJIHyQs0SuQBqVSxOYwVHQ+2RM7zhp3/f+CIckInBHNErxC1pyYKg53i2Vv5vD rsPZYNCUtKxqqPAy7bznM9758ge76xdfV+0vUf2KAvWpRiXQjsYjREcEQY7TJldMDi/6 I6Mv/FxSQj4yZ+VZgeWboqtRsApyzsDj/OCQi5F67K1Tv1oBf8NcXkKnn1CSYQcbYXDl xuEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=26b6FMCylFMAHNcIhKc1n3VoY7qFK9eJmJZLWnz6s2s=; b=IYFfvB3lEw7+IoPnI55sOp4U0ktndrnRd7J11kbqeOnhU4ALJgcCzuRtYk0icv2cBR xtV5nHUZm6aMZVceSgK3WbVj/PXs8swjCm3zY+80HlPsXS7PXQ5ls05UzjS7g1vevdVl eQuvFg3wz426fSWk3dl4wFqJmHIlsuZtouY77IGl1R88xOh4J2sQIYVeCDHt2HtG+kbA HNoOxUphSyiIZY2r+uua/jscOlZQ259VPirg2NToJxv/qe3b25K4JBXQBTVlRpZWKnbo 7h9NPb/hmdoiqgREw9mNP+5t69DTxjyfwRwQZn/w3oVqjVrgGZdZxeipLbOE35cu/9Bn niMg== X-Gm-Message-State: AOAM532YABkBN1BC20pCLhYe4OMJWzj7MFLVC2pKYCpxP7MlQHwC1n/5 NQiCbFG3NCBqbrQqNUYQGgo= X-Google-Smtp-Source: ABdhPJwzlmfipjFihxRwPrutD8CKSOXQ0wm4l6xlowx5jEArWpSTNB3nJMkchhLs5pQq2Wv8lpA7GQ== X-Received: by 2002:a17:902:b691:b029:12d:2b6:d116 with SMTP id c17-20020a170902b691b029012d02b6d116mr3124863pls.71.1634190029137; Wed, 13 Oct 2021 22:40:29 -0700 (PDT) Received: from z640-arch.lan ([2602:61:7360:b000::9d4]) by smtp.gmail.com with ESMTPSA id mu7sm1257318pjb.12.2021.10.13.22.40.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Oct 2021 22:40:28 -0700 (PDT) From: Ilya Lipnitskiy To: Thomas Bogendoerfer , Jiri Kosina , Alexey Malahov , Serge Semin , Hauke Mehrtens , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ilya Lipnitskiy Subject: [PATCH v3 3/3] MIPS: kernel: proc: add CPU option reporting Date: Wed, 13 Oct 2021 22:40:18 -0700 Message-Id: <20211014054018.6179-4-ilya.lipnitskiy@gmail.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211014054018.6179-1-ilya.lipnitskiy@gmail.com> References: <20211014054018.6179-1-ilya.lipnitskiy@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Hauke Mehrtens Many MIPS CPUs have optional CPU features which are not activated for all CPU cores. Print the CPU options, which are implemented in the core, in /proc/cpuinfo. This makes it possible to see which features are supported and which are not supported. This should cover all standard MIPS extensions. Before, it only printed information about the main MIPS ASEs. Signed-off-by: Hauke Mehrtens Changes from original patch[0]: - Remove cpu_has_6k_cache and cpu_has_8k_cache due to commit 6ce91ba8589a ("MIPS: Remove cpu_has_6k_cache and cpu_has_8k_cache in cpu_cache_init()") - Add new options: mac2008_only, ftlbparex, gsexcex, mmid, mm_sysad, mm_full - Use seq_puts instead of seq_printf as suggested by checkpatch - Minor commit message reword [0]: https://lore.kernel.org/linux-mips/20181223225224.23042-1-hauke@hauke-m.de/ Signed-off-by: Ilya Lipnitskiy Acked-by: Hauke Mehrtens --- arch/mips/kernel/proc.c | 122 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 122 insertions(+) diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 7d8481d9acc3..376a6e2676e9 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -157,6 +157,128 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_printf(m, "micromips kernel\t: %s\n", (read_c0_config3() & MIPS_CONF3_ISA_OE) ? "yes" : "no"); } + + seq_puts(m, "Options implemented\t:"); + if (cpu_has_tlb) + seq_puts(m, " tlb"); + if (cpu_has_ftlb) + seq_puts(m, " ftlb"); + if (cpu_has_tlbinv) + seq_puts(m, " tlbinv"); + if (cpu_has_segments) + seq_puts(m, " segments"); + if (cpu_has_rixiex) + seq_puts(m, " rixiex"); + if (cpu_has_ldpte) + seq_puts(m, " ldpte"); + if (cpu_has_maar) + seq_puts(m, " maar"); + if (cpu_has_rw_llb) + seq_puts(m, " rw_llb"); + if (cpu_has_4kex) + seq_puts(m, " 4kex"); + if (cpu_has_3k_cache) + seq_puts(m, " 3k_cache"); + if (cpu_has_4k_cache) + seq_puts(m, " 4k_cache"); + if (cpu_has_tx39_cache) + seq_puts(m, " tx39_cache"); + if (cpu_has_octeon_cache) + seq_puts(m, " octeon_cache"); + if (cpu_has_fpu) + seq_puts(m, " fpu"); + if (cpu_has_32fpr) + seq_puts(m, " 32fpr"); + if (cpu_has_cache_cdex_p) + seq_puts(m, " cache_cdex_p"); + if (cpu_has_cache_cdex_s) + seq_puts(m, " cache_cdex_s"); + if (cpu_has_prefetch) + seq_puts(m, " prefetch"); + if (cpu_has_mcheck) + seq_puts(m, " mcheck"); + if (cpu_has_ejtag) + seq_puts(m, " ejtag"); + if (cpu_has_llsc) + seq_puts(m, " llsc"); + if (cpu_has_guestctl0ext) + seq_puts(m, " guestctl0ext"); + if (cpu_has_guestctl1) + seq_puts(m, " guestctl1"); + if (cpu_has_guestctl2) + seq_puts(m, " guestctl2"); + if (cpu_has_guestid) + seq_puts(m, " guestid"); + if (cpu_has_drg) + seq_puts(m, " drg"); + if (cpu_has_rixi) + seq_puts(m, " rixi"); + if (cpu_has_lpa) + seq_puts(m, " lpa"); + if (cpu_has_mvh) + seq_puts(m, " mvh"); + if (cpu_has_vtag_icache) + seq_puts(m, " vtag_icache"); + if (cpu_has_dc_aliases) + seq_puts(m, " dc_aliases"); + if (cpu_has_ic_fills_f_dc) + seq_puts(m, " ic_fills_f_dc"); + if (cpu_has_pindexed_dcache) + seq_puts(m, " pindexed_dcache"); + if (cpu_has_userlocal) + seq_puts(m, " userlocal"); + if (cpu_has_nofpuex) + seq_puts(m, " nofpuex"); + if (cpu_has_vint) + seq_puts(m, " vint"); + if (cpu_has_veic) + seq_puts(m, " veic"); + if (cpu_has_inclusive_pcaches) + seq_puts(m, " inclusive_pcaches"); + if (cpu_has_perf_cntr_intr_bit) + seq_puts(m, " perf_cntr_intr_bit"); + if (cpu_has_ufr) + seq_puts(m, " ufr"); + if (cpu_has_fre) + seq_puts(m, " fre"); + if (cpu_has_cdmm) + seq_puts(m, " cdmm"); + if (cpu_has_small_pages) + seq_puts(m, " small_pages"); + if (cpu_has_nan_legacy) + seq_puts(m, " nan_legacy"); + if (cpu_has_nan_2008) + seq_puts(m, " nan_2008"); + if (cpu_has_ebase_wg) + seq_puts(m, " ebase_wg"); + if (cpu_has_badinstr) + seq_puts(m, " badinstr"); + if (cpu_has_badinstrp) + seq_puts(m, " badinstrp"); + if (cpu_has_contextconfig) + seq_puts(m, " contextconfig"); + if (cpu_has_perf) + seq_puts(m, " perf"); + if (cpu_has_mac2008_only) + seq_puts(m, " mac2008_only"); + if (cpu_has_ftlbparex) + seq_puts(m, " ftlbparex"); + if (cpu_has_gsexcex) + seq_puts(m, " gsexcex"); + if (cpu_has_shared_ftlb_ram) + seq_puts(m, " shared_ftlb_ram"); + if (cpu_has_shared_ftlb_entries) + seq_puts(m, " shared_ftlb_entries"); + if (cpu_has_mipsmt_pertccounters) + seq_puts(m, " mipsmt_pertccounters"); + if (cpu_has_mmid) + seq_puts(m, " mmid"); + if (cpu_has_mm_sysad) + seq_puts(m, " mm_sysad"); + if (cpu_has_mm_full) + seq_puts(m, " mm_full"); + seq_puts(m, "\n"); + seq_printf(m, "shadow register sets\t: %d\n", cpu_data[n].srsets); seq_printf(m, "kscratch registers\t: %d\n",