From patchwork Thu Oct 14 14:18:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kelvin Cao X-Patchwork-Id: 12557859 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51F4BC433F5 for ; Thu, 14 Oct 2021 07:26:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3726B611C1 for ; Thu, 14 Oct 2021 07:26:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230179AbhJNH2c (ORCPT ); Thu, 14 Oct 2021 03:28:32 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:11631 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230201AbhJNH20 (ORCPT ); Thu, 14 Oct 2021 03:28:26 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1634196382; x=1665732382; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=UHmw1kryPDsjtcU9cCkAUSQxb8CTwQU7xtusCYKyOf0=; b=wtD7m8fXgUmx8kT6StjcC6/ZgyFDZ3TlaqGE/dFTd9UPdWXIA7KuzCiP GwgL/deuOe0HRAeTv/D5g6QZ/RdvFKeZF+gbQops1RTwOJQ67pyBXFhB9 BGFu1YVoezM9n0smase/YVjXQqm7fC9rIMtmeZOfzaE2JB0JDFgd93P19 08l98gMnM/KrQ4H79PxaTd91IK5AcgUN0qSmCCxoAzNtoOfPHY88euKBW 3/ajScFr/YE1NKgv2huoGhS1Q7wrUocllbsMlOo2aaNtJhPQNNnrUwpPH JJVFDIlV8ltfCrDf1lkiOC0jPSaDu91QHwCXDH4X0tkU0t0VEnszJUJxF w==; IronPort-SDR: kUXduQDh71AsmlXSw10ttDqJWkuTj1VxqXStCY8lfNqMPDme6RxmpDiEeEy5r4X17PXZ9BxORh 8dx6w2lFpJw9BSsRC4xvwx3FrKanz4WX0bR9Vu9L2U+LHNSeF8E5U/GYSZoijpbytAHx7Khk/i tGJwoSxRRH3rhvGuRxkXs1Z2sbd7xws8xMCJ570a/xKNel1aMLSYW9YvKY74S69uL9601LNKfs q2/OyFQ7vQXQiOYU5PTd48/NcBEzLsnp2muC8DbE86rja5ZAx72ERvBkbJmxxIi+Rnap5m9mtZ AL2f0bg7uNiZq6baQkIEVY+1 X-IronPort-AV: E=Sophos;i="5.85,371,1624345200"; d="scan'208";a="132951847" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 14 Oct 2021 00:26:16 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 14 Oct 2021 00:26:15 -0700 Received: from localhost (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 14 Oct 2021 00:26:15 -0700 From: To: , , , , CC: , Subject: [PATCH v2 1/5] PCI/switchtec: Error out MRPC execution when MMIO reads fail Date: Thu, 14 Oct 2021 14:18:55 +0000 Message-ID: <20211014141859.11444-2-kelvin.cao@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211014141859.11444-1-kelvin.cao@microchip.com> References: <20211014141859.11444-1-kelvin.cao@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Kelvin Cao A firmware hard reset may be initiated by various mechanisms including a UART interface, TWI sideband interface from BMC, MRPC command from userspace, etc. The switchtec management driver is unaware of these resets. The reset clears PCI state including the BARs and Memory Space Enable bits, so the device no longer responds to the MMIO accesses the driver uses to operate it. MMIO reads to the device will fail with a PCIe error. When the root complex handles that error, it typically fabricates ~0 data to complete the CPU read. Check for this sort of error by reading the device ID from MMIO space. This ID can never be ~0, so if we see that value, it probably means the PCIe Memory Read failed and we should return an error indication to the application using the switchtec driver. Signed-off-by: Kelvin Cao --- drivers/pci/switch/switchtec.c | 67 ++++++++++++++++++++++++++++++---- 1 file changed, 60 insertions(+), 7 deletions(-) diff --git a/drivers/pci/switch/switchtec.c b/drivers/pci/switch/switchtec.c index 0b301f8be9ed..e5bb2ac0e7bb 100644 --- a/drivers/pci/switch/switchtec.c +++ b/drivers/pci/switch/switchtec.c @@ -45,6 +45,7 @@ enum mrpc_state { MRPC_QUEUED, MRPC_RUNNING, MRPC_DONE, + MRPC_IO_ERROR, }; struct switchtec_user { @@ -66,6 +67,19 @@ struct switchtec_user { int event_cnt; }; +/* + * The MMIO reads to the device_id register should always return the device ID + * of the device, otherwise the firmware is probably stuck or unreachable + * due to a firmware reset which clears PCI state including the BARs and Memory + * Space Enable bits. + */ +static int is_firmware_running(struct switchtec_dev *stdev) +{ + u32 device = ioread32(&stdev->mmio_sys_info->device_id); + + return stdev->pdev->device == device; +} + static struct switchtec_user *stuser_create(struct switchtec_dev *stdev) { struct switchtec_user *stuser; @@ -113,6 +127,7 @@ static void stuser_set_state(struct switchtec_user *stuser, [MRPC_QUEUED] = "QUEUED", [MRPC_RUNNING] = "RUNNING", [MRPC_DONE] = "DONE", + [MRPC_IO_ERROR] = "IO_ERROR", }; stuser->state = state; @@ -184,9 +199,26 @@ static int mrpc_queue_cmd(struct switchtec_user *stuser) return 0; } +static void mrpc_cleanup_cmd(struct switchtec_dev *stdev) +{ + /* requires the mrpc_mutex to already be held when called */ + + struct switchtec_user *stuser = list_entry(stdev->mrpc_queue.next, + struct switchtec_user, list); + + stuser->cmd_done = true; + wake_up_interruptible(&stuser->cmd_comp); + list_del_init(&stuser->list); + stuser_put(stuser); + stdev->mrpc_busy = 0; + + mrpc_cmd_submit(stdev); +} + static void mrpc_complete_cmd(struct switchtec_dev *stdev) { /* requires the mrpc_mutex to already be held when called */ + struct switchtec_user *stuser; if (list_empty(&stdev->mrpc_queue)) @@ -223,13 +255,7 @@ static void mrpc_complete_cmd(struct switchtec_dev *stdev) memcpy_fromio(stuser->data, &stdev->mmio_mrpc->output_data, stuser->read_len); out: - stuser->cmd_done = true; - wake_up_interruptible(&stuser->cmd_comp); - list_del_init(&stuser->list); - stuser_put(stuser); - stdev->mrpc_busy = 0; - - mrpc_cmd_submit(stdev); + mrpc_cleanup_cmd(stdev); } static void mrpc_event_work(struct work_struct *work) @@ -246,6 +272,23 @@ static void mrpc_event_work(struct work_struct *work) mutex_unlock(&stdev->mrpc_mutex); } +static void mrpc_error_complete_cmd(struct switchtec_dev *stdev) +{ + /* requires the mrpc_mutex to already be held when called */ + + struct switchtec_user *stuser; + + if (list_empty(&stdev->mrpc_queue)) + return; + + stuser = list_entry(stdev->mrpc_queue.next, + struct switchtec_user, list); + + stuser_set_state(stuser, MRPC_IO_ERROR); + + mrpc_cleanup_cmd(stdev); +} + static void mrpc_timeout_work(struct work_struct *work) { struct switchtec_dev *stdev; @@ -257,6 +300,11 @@ static void mrpc_timeout_work(struct work_struct *work) mutex_lock(&stdev->mrpc_mutex); + if (!is_firmware_running(stdev)) { + mrpc_error_complete_cmd(stdev); + goto out; + } + if (stdev->dma_mrpc) status = stdev->dma_mrpc->status; else @@ -544,6 +592,11 @@ static ssize_t switchtec_dev_read(struct file *filp, char __user *data, if (rc) return rc; + if (stuser->state == MRPC_IO_ERROR) { + mutex_unlock(&stdev->mrpc_mutex); + return -EIO; + } + if (stuser->state != MRPC_DONE) { mutex_unlock(&stdev->mrpc_mutex); return -EBADE; From patchwork Thu Oct 14 14:18:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kelvin Cao X-Patchwork-Id: 12557861 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1E8EC433FE for ; Thu, 14 Oct 2021 07:26:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9B7E860FDA for ; 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IronPort-SDR: kxaBU1UUv4IAdGQSxlUc9Xu1UkxyhI95VmExwY5GMdONCPXx1Js/6opcT6u0TBwVYwyx4QOPyo 0h12BoYKANAQRHnl12b3vUedWzK2y21dp578wdfb4gRoDpapuTh7vlKBxD9sXrEk2Hq68kwI5c trKdQtrV8lJAcwUjOWU6kseIgYs0++NNAdezUoFoRUIfVUNh9y9JPOJwe29HYrlAVjobHYOQo1 v7lC38kFXvk8sMYqWApHPJe95DTBH00Gj0FtCOxBPawobkgCvzYhnQBO/ie+7hZBiQ3zwltCrt 29z375kUJJLJ5Zi4/5BZtXhj X-IronPort-AV: E=Sophos;i="5.85,371,1624345200"; d="scan'208";a="132951855" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 14 Oct 2021 00:26:21 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 14 Oct 2021 00:26:17 -0700 Received: from localhost (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 14 Oct 2021 00:26:17 -0700 From: To: , , , , CC: , Subject: [PATCH v2 2/5] PCI/switchtec: Fix a MRPC error status handling issue Date: Thu, 14 Oct 2021 14:18:56 +0000 Message-ID: <20211014141859.11444-3-kelvin.cao@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211014141859.11444-1-kelvin.cao@microchip.com> References: <20211014141859.11444-1-kelvin.cao@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Kelvin Cao If an error is encountered when executing a MRPC command, the firmware will set the status register to SWITCHTEC_MRPC_STATUS_ERROR and return the error code in the return value register. Add handling of SWITCHTEC_MRPC_STATUS_ERROR on status register when completing a MRPC command. Signed-off-by: Kelvin Cao --- drivers/pci/switch/switchtec.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/pci/switch/switchtec.c b/drivers/pci/switch/switchtec.c index e5bb2ac0e7bb..5c300ff3921d 100644 --- a/drivers/pci/switch/switchtec.c +++ b/drivers/pci/switch/switchtec.c @@ -238,7 +238,8 @@ static void mrpc_complete_cmd(struct switchtec_dev *stdev) stuser_set_state(stuser, MRPC_DONE); stuser->return_code = 0; - if (stuser->status != SWITCHTEC_MRPC_STATUS_DONE) + if (stuser->status != SWITCHTEC_MRPC_STATUS_DONE && + stuser->status != SWITCHTEC_MRPC_STATUS_ERROR) goto out; if (stdev->dma_mrpc) @@ -622,7 +623,8 @@ static ssize_t switchtec_dev_read(struct file *filp, char __user *data, out: mutex_unlock(&stdev->mrpc_mutex); - if (stuser->status == SWITCHTEC_MRPC_STATUS_DONE) + if (stuser->status == SWITCHTEC_MRPC_STATUS_DONE || + stuser->status == SWITCHTEC_MRPC_STATUS_ERROR) return size; else if (stuser->status == SWITCHTEC_MRPC_STATUS_INTERRUPTED) return -ENXIO; From patchwork Thu Oct 14 14:18:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kelvin Cao X-Patchwork-Id: 12557855 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB1A8C433FE for ; Thu, 14 Oct 2021 07:26:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CFC1760F9E for ; Thu, 14 Oct 2021 07:26:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230128AbhJNH2a (ORCPT ); Thu, 14 Oct 2021 03:28:30 -0400 Received: from esa.microchip.iphmx.com ([68.232.153.233]:15542 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230179AbhJNH2Z (ORCPT ); Thu, 14 Oct 2021 03:28:25 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1634196381; x=1665732381; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WxuhAGIVqe9v2R3ZyelOWDi7CHT04MYAzY0b5QLN2qc=; b=lsO538LUNQmB4IeD5TGa8LWNB0Vwc9dZnVGGIqOyQYlVYkj49s4PCmxz /UsJxvS67EmonjeeNG6p68Cn+Yk/NTbQK+aRuECe2KVpiC1TdDo+fl8ie EoDSdfaUBSTmcU9X2gW5r/BsqM80J5m20YoQZHSlz6/FtoCAIHzlP4iqo 6Oa9GM2vK1EZ9GQ+4oh1MlpL/hsYm+Pnd3qRZuAxYSY10AI0ARMBun7D3 E2lFTpFX4TkPrP8KfsckP72O21Mb0/Gna1pUKppE404koQwXjqTd6ciPP crIuzcUNwdj/S3839+KdX74J/azpB9PYUbYbSAIBHukvAPBJ08BPbuAAn Q==; IronPort-SDR: 0BAYzRjLsp3W/Yl/KBsUVvdeKO0DuJgpEOmh/+ji1UTI1A3Qvca4xaeeoXb1MLxA3XJnUold21 QjDZAa9bwOB4yFHmIWNuof4QXcR0LsQkgZ+dX9QwKrbRnVqsdi9oSh70I7c1/ZParg1trkzxD2 2IvFAjIXZqxwXOu1pCDPC7RPZcGcvvYCZo8OEceH+pQ/+GMzuUEjr3cnCn1gKM+Wt+llEMaAi2 AKagRrveziLr8i2xa6vG6x9AyUJcP60B369K2aaR198cNR9XdWJIISttH35E1iGWroz9GF0iFn ThutRPuRB05jt/3Zoxz/6Huz X-IronPort-AV: E=Sophos;i="5.85,371,1624345200"; d="scan'208";a="140250737" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 14 Oct 2021 00:26:19 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 14 Oct 2021 00:26:19 -0700 Received: from localhost (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 14 Oct 2021 00:26:18 -0700 From: To: , , , , CC: , Subject: [PATCH v2 3/5] PCI/switchtec: Update the way of getting management VEP instance ID Date: Thu, 14 Oct 2021 14:18:57 +0000 Message-ID: <20211014141859.11444-4-kelvin.cao@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211014141859.11444-1-kelvin.cao@microchip.com> References: <20211014141859.11444-1-kelvin.cao@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Kelvin Cao Gen4 firmware adds DMA VEP and NVMe VEP support in VEP (virtual EP) instance ID register in addtion to management EP, update the way of getting management VEP instance ID. Signed-off-by: Kelvin Cao --- drivers/pci/switch/switchtec.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pci/switch/switchtec.c b/drivers/pci/switch/switchtec.c index 5c300ff3921d..97a93c9b4629 100644 --- a/drivers/pci/switch/switchtec.c +++ b/drivers/pci/switch/switchtec.c @@ -1133,7 +1133,7 @@ static int ioctl_pff_to_port(struct switchtec_dev *stdev, break; } - reg = ioread32(&pcfg->vep_pff_inst_id); + reg = ioread32(&pcfg->vep_pff_inst_id) & 0xFF; if (reg == p.pff) { p.port = SWITCHTEC_IOCTL_PFF_VEP; break; @@ -1179,7 +1179,7 @@ static int ioctl_port_to_pff(struct switchtec_dev *stdev, p.pff = ioread32(&pcfg->usp_pff_inst_id); break; case SWITCHTEC_IOCTL_PFF_VEP: - p.pff = ioread32(&pcfg->vep_pff_inst_id); + p.pff = ioread32(&pcfg->vep_pff_inst_id) & 0xFF; break; default: if (p.port > ARRAY_SIZE(pcfg->dsp_pff_inst_id)) @@ -1553,7 +1553,7 @@ static void init_pff(struct switchtec_dev *stdev) if (reg < stdev->pff_csr_count) stdev->pff_local[reg] = 1; - reg = ioread32(&pcfg->vep_pff_inst_id); + reg = ioread32(&pcfg->vep_pff_inst_id) & 0xFF; if (reg < stdev->pff_csr_count) stdev->pff_local[reg] = 1; From patchwork Thu Oct 14 14:18:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kelvin Cao X-Patchwork-Id: 12557863 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B956C433FE for ; Thu, 14 Oct 2021 07:26:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E932660F9E for ; Thu, 14 Oct 2021 07:26:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230026AbhJNH2g (ORCPT ); Thu, 14 Oct 2021 03:28:36 -0400 Received: from esa.microchip.iphmx.com ([68.232.153.233]:56343 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230189AbhJNH2c (ORCPT ); Thu, 14 Oct 2021 03:28:32 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1634196388; x=1665732388; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=syL4/+YK/aL5HlwXEqODcUbypd3HoBOXAo6KAvaPuXk=; b=AyfhGESGlrX3/kwvR5VImNsv7/kz5nBd9n5JsTsvaWOwDOsEDIocnIQC dkW8rUMLETiO/zbZLhl6wL3kOy+bpD1on9l/IiKp+VutWv5vduOCZb6FM CZicw6WYA5+Ta3BM0LegTP/Gam3pQ8zR+sxkyz6G9fnWfB1eKtLt2f14x CyNu2Cc/B/uA1TryO8wurOR0eEfeM5OHqgzo+D/HazGRjKy56iN64lKix B2uwTE/PNKLvyv+Lg9o1qnR/tnl3drm6cur2YxrjVLnjGYOrYtEl7g7kg PNdi86+Q4LgpDDs2l35i1nna0smKihyT/AS3LpM0+n9ej2j4NSBb6czpG A==; IronPort-SDR: NeTmjoOYSXppJ4D+QBHugjKfPF4RnOY9jO8C2uGY+Jc+EPl/jdXGtLwLyo1b+cGd9M6rnV73qs +fiP711PqJtIP6cgYpevnwbBHWULtaDT3xvmsEoj2/IYe/JMaSXoYesFVAzM56DdYMrVJ3WEOY LuoTKpD/C1aLZ/u4w0GYa/Cl/o1ljIamj/Z7yXFFOcp5qKJqJXH4HlZhDIXWdWBOTnG1BYbM06 rco0579RI28EnIMNpW14kfeSQyU2l8t9hsV3YH0+f4bPm0rnjRvhffr1ArLeQGyH2CkQL1OJRe H6QTi+ZmqlWtizzdKXNhvM5M X-IronPort-AV: E=Sophos;i="5.85,371,1624345200"; d="scan'208";a="148045675" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 14 Oct 2021 00:26:27 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 14 Oct 2021 00:26:20 -0700 Received: from localhost (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 14 Oct 2021 00:26:20 -0700 From: To: , , , , CC: , Subject: [PATCH v2 4/5] PCI/switchtec: Replace ENOTSUPP with EOPNOTSUPP Date: Thu, 14 Oct 2021 14:18:58 +0000 Message-ID: <20211014141859.11444-5-kelvin.cao@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211014141859.11444-1-kelvin.cao@microchip.com> References: <20211014141859.11444-1-kelvin.cao@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Kelvin Cao ENOTSUPP is not a SUSV4 error code, and the following checkpatch.pl warning will be given for new patches which still use ENOTSUPP. WARNING: ENOTSUPP is not a SUSV4 error code, prefer EOPNOTSUPP See the link below for the discussion. https://lore.kernel.org/netdev/20200511165319.2251678-1-kuba@kernel.org/ Replace ENOTSUPP with EOPNOTSUPP to align with future patches which will be using EOPNOTSUPP. Signed-off-by: Kelvin Cao --- drivers/pci/switch/switchtec.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pci/switch/switchtec.c b/drivers/pci/switch/switchtec.c index 97a93c9b4629..236cb40cc7c5 100644 --- a/drivers/pci/switch/switchtec.c +++ b/drivers/pci/switch/switchtec.c @@ -376,7 +376,7 @@ static ssize_t field ## _show(struct device *dev, \ return io_string_show(buf, &si->gen4.field, \ sizeof(si->gen4.field)); \ else \ - return -ENOTSUPP; \ + return -EOPNOTSUPP; \ } \ \ static DEVICE_ATTR_RO(field) @@ -668,7 +668,7 @@ static int ioctl_flash_info(struct switchtec_dev *stdev, info.flash_length = ioread32(&fi->gen4.flash_length); info.num_partitions = SWITCHTEC_NUM_PARTITIONS_GEN4; } else { - return -ENOTSUPP; + return -EOPNOTSUPP; } if (copy_to_user(uinfo, &info, sizeof(info))) @@ -876,7 +876,7 @@ static int ioctl_flash_part_info(struct switchtec_dev *stdev, if (ret) return ret; } else { - return -ENOTSUPP; + return -EOPNOTSUPP; } if (copy_to_user(uinfo, &info, sizeof(info))) @@ -1611,7 +1611,7 @@ static int switchtec_init_pci(struct switchtec_dev *stdev, else if (stdev->gen == SWITCHTEC_GEN4) part_id = &stdev->mmio_sys_info->gen4.partition_id; else - return -ENOTSUPP; + return -EOPNOTSUPP; stdev->partition = ioread8(part_id); stdev->partition_count = ioread8(&stdev->mmio_ntb->partition_count); From patchwork Thu Oct 14 14:18:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kelvin Cao X-Patchwork-Id: 12557857 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82EA6C433EF for ; Thu, 14 Oct 2021 07:26:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 60B0E60F9E for ; Thu, 14 Oct 2021 07:26:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230107AbhJNH2a (ORCPT ); Thu, 14 Oct 2021 03:28:30 -0400 Received: from esa.microchip.iphmx.com ([68.232.153.233]:56343 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230153AbhJNH20 (ORCPT ); Thu, 14 Oct 2021 03:28:26 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1634196382; x=1665732382; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=X1a8UGdzQQhtEDv2nq1V9v/r5V0ijSfYG3NKu7KoekY=; b=rtQayLCK+pS+HEdHwsIh7sZuAz4SVZLPN12MtfdIC+GXFOAJpol47xhp M5M2YTmjRa/xig3Y8ZsWLCNr0UXSBNqzOeARf7hxB6o1lzVW1UAJIEs8o mEpODfihE6fz0oMDSbI+1ay15OtEh6e2JxeIznFmdQP0ShcucQe6xQxOL rGQqJhxiUtHGNXdCaHTUoUoNfUrQ3ZQwXdgtgMkKEOzMTGANpC+TpdOnc kGfvIJsseZtGDIID119Otc3IjX9Ayrp9QbWbE18ZV0/g+r8ACw35kt1tL aJDarUZ6dMwHpCSXDuogvYf3rivUN6yTI8UwPBbmCfyZ8DGyEs8++tdf+ g==; IronPort-SDR: xEzB5GJX8fP4hivAizfOzAipt5UgqDrV9BmGjtAjCXvW/NXwgtnYMhmHV76q73hgbgOz8Usv0p CMwp+abf4u9FXVZ7SYg5A3cEoCTRnBB4xrAQF2AvF28AoPsz41N8H5C/DjExGU9M56X2SqUn8v OOpJTRjI2lXD7+7KRCz498LZbkmVVqiwWfLFXvlnOq6HTF8vKhfTXiWmKidko9GJMzN3f0/LlG eTt2valLyXxtm1gtOxySnnNmL5LiZvdWTkiPyiVntm4ov/lthmNyd08PSxraaqJFTXZzmcjeuU J6W6KdGLmNqsh29JzO4aiFjy X-IronPort-AV: E=Sophos;i="5.85,371,1624345200"; d="scan'208";a="148045650" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 14 Oct 2021 00:26:21 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 14 Oct 2021 00:26:22 -0700 Received: from localhost (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Thu, 14 Oct 2021 00:26:21 -0700 From: To: , , , , CC: , Subject: [PATCH v2 5/5] PCI/switchtec: Add check of event support Date: Thu, 14 Oct 2021 14:18:59 +0000 Message-ID: <20211014141859.11444-6-kelvin.cao@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211014141859.11444-1-kelvin.cao@microchip.com> References: <20211014141859.11444-1-kelvin.cao@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Logan Gunthorpe Not all events are supported by every gen/variant of the Switchtec firmware. To solve this, since Gen4, a new bit in each event header is introduced to indicate if an event is supported by the firmware. Signed-off-by: Logan Gunthorpe Signed-off-by: Kelvin Cao --- drivers/pci/switch/switchtec.c | 8 +++++++- include/linux/switchtec.h | 1 + 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/pci/switch/switchtec.c b/drivers/pci/switch/switchtec.c index 236cb40cc7c5..38c2b036fb8e 100644 --- a/drivers/pci/switch/switchtec.c +++ b/drivers/pci/switch/switchtec.c @@ -1024,6 +1024,9 @@ static int event_ctl(struct switchtec_dev *stdev, return PTR_ERR(reg); hdr = ioread32(reg); + if (hdr & SWITCHTEC_EVENT_NOT_SUPP) + return -EOPNOTSUPP; + for (i = 0; i < ARRAY_SIZE(ctl->data); i++) ctl->data[i] = ioread32(®[i + 1]); @@ -1096,7 +1099,7 @@ static int ioctl_event_ctl(struct switchtec_dev *stdev, for (ctl.index = 0; ctl.index < nr_idxs; ctl.index++) { ctl.flags = event_flags; ret = event_ctl(stdev, &ctl); - if (ret < 0) + if (ret < 0 && ret != -EOPNOTSUPP) return ret; } } else { @@ -1403,6 +1406,9 @@ static int mask_event(struct switchtec_dev *stdev, int eid, int idx) hdr_reg = event_regs[eid].map_reg(stdev, off, idx); hdr = ioread32(hdr_reg); + if (hdr & SWITCHTEC_EVENT_NOT_SUPP) + return 0; + if (!(hdr & SWITCHTEC_EVENT_OCCURRED && hdr & SWITCHTEC_EVENT_EN_IRQ)) return 0; diff --git a/include/linux/switchtec.h b/include/linux/switchtec.h index 082f1d51957a..be24056ac00f 100644 --- a/include/linux/switchtec.h +++ b/include/linux/switchtec.h @@ -19,6 +19,7 @@ #define SWITCHTEC_EVENT_EN_CLI BIT(2) #define SWITCHTEC_EVENT_EN_IRQ BIT(3) #define SWITCHTEC_EVENT_FATAL BIT(4) +#define SWITCHTEC_EVENT_NOT_SUPP BIT(31) #define SWITCHTEC_DMA_MRPC_EN BIT(0)