From patchwork Fri Oct 15 00:57:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 12559635 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5EFEDC433F5 for ; Fri, 15 Oct 2021 00:59:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 30426610E8 for ; Fri, 15 Oct 2021 00:59:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 30426610E8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LAt61u+he2txezMoK6qQbtRkCZc/FTQPda+q9hFjrQA=; b=OchalIjipj/mdp QEf35kv+E1Z96COm9QbtNDgi9ZHE5GbhBRjfKS/5PEoPOWRTbyMdEE2QIfyon6Yxfk8N2qkbwdMZS j0IWfGVyhq6cIbCRtS+kPHqQzDSL4OZEVj4gI5rtLz+o+sCf2vd+lN05IIyorYxtB4ALop2hVK4Ob Lpd4HZGaAy+mSqzPWJNCvHYJlxcd/MglaFsg7Lm7I5xNV6ivbYpaGRj1Rnc4QCyUtc0HYw3E2dHMV 53IfdDt6oSF5OxyF+XmSEIHwZ79c7Ttt/VbjIs+MtWiE6YGE4uCWOwOvd09gfJMBg7odbkUt9+uHG uKB434in0tBcNVC9kWnw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mbBXq-004qjm-I2; Fri, 15 Oct 2021 00:57:58 +0000 Received: from inva021.nxp.com ([92.121.34.21]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mbBXI-004qQO-GD for linux-arm-kernel@lists.infradead.org; Fri, 15 Oct 2021 00:57:27 +0000 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 85427200042; Fri, 15 Oct 2021 02:57:20 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 3677E200031; Fri, 15 Oct 2021 02:57:20 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.142]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id 76C0540BCF; Thu, 14 Oct 2021 17:57:19 -0700 (MST) From: Li Yang To: Rob Herring , devicetree@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Li Yang Subject: [PATCH v2 1/2] dt-bindings: memory: fsl: convert ifc binding to yaml schema Date: Thu, 14 Oct 2021 19:57:06 -0500 Message-Id: <20211015005707.1996-2-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20211015005707.1996-1-leoyang.li@nxp.com> References: <20211015005707.1996-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211014_175724_894591_4DDD2F78 X-CRM114-Status: GOOD ( 25.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert the txt binding to yaml format and add description. Drop the "simple-bus" compatible string from the example and not allowed by the binding any more. This will help to enforce the correct probe order between parent device and child devices, but will require the ifc driver to probe the child devices to work properly. Signed-off-by: Li Yang Reviewed-by: Rob Herring --- .../memory-controllers/fsl/fsl,ifc.yaml | 113 ++++++++++++++++++ .../bindings/memory-controllers/fsl/ifc.txt | 82 ------------- 2 files changed, 113 insertions(+), 82 deletions(-) create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ifc.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ifc.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ifc.yaml new file mode 100644 index 000000000000..3be1db30bf41 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ifc.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,ifc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: FSL/NXP Integrated Flash Controller + +maintainers: + - Li Yang + +description: | + NXP's integrated flash controller (IFC) is an advanced version of the + enhanced local bus controller which includes similar programming and signal + interfaces with an extended feature set. The IFC provides access to multiple + external memory types, such as NAND flash (SLC and MLC), NOR flash, EPROM, + SRAM and other memories where address and data are shared on a bus. + +properties: + $nodename: + pattern: "^memory-controller@[0-9a-f]+$" + + compatible: + const: fsl,ifc + + "#address-cells": + enum: [2, 3] + description: | + Should be either two or three. The first cell is the chipselect + number, and the remaining cells are the offset into the chipselect. + + "#size-cells": + enum: [1, 2] + description: | + Either one or two, depending on how large each chipselect can be. + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 2 + description: | + IFC may have one or two interrupts. If two interrupt specifiers are + present, the first is the "common" interrupt (CM_EVTER_STAT), and the + second is the NAND interrupt (NAND_EVTER_STAT). If there is only one, + that interrupt reports both types of event. + + little-endian: + type: boolean + description: | + If this property is absent, the big-endian mode will be in use as default + for registers. + + ranges: + description: | + Each range corresponds to a single chipselect, and covers the entire + access window as configured. + +patternProperties: + "^.*@[a-f0-9]+(,[a-f0-9]+)+$": + type: object + description: | + Child device nodes describe the devices connected to IFC such as NOR (e.g. + cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices + like FPGAs, CPLDs, etc. + + required: + - compatible + - reg + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + memory-controller@ffe1e000 { + compatible = "fsl,ifc"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0x0 0xffe1e000 0 0x2000>; + interrupts = <16 2 19 2>; + little-endian; + + /* NOR, NAND Flashes and CPLD on board */ + ranges = <0x0 0x0 0x0 0xee000000 0x02000000>, + <0x1 0x0 0x0 0xffa00000 0x00010000>, + <0x3 0x0 0x0 0xffb00000 0x00020000>; + + flash@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x2000000>; + bank-width = <2>; + device-width = <1>; + + partition@0 { + /* 32MB for user data */ + reg = <0x0 0x02000000>; + label = "NOR Data"; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt deleted file mode 100644 index 89427b018ba7..000000000000 --- a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt +++ /dev/null @@ -1,82 +0,0 @@ -Integrated Flash Controller - -Properties: -- name : Should be ifc -- compatible : should contain "fsl,ifc". The version of the integrated - flash controller can be found in the IFC_REV register at - offset zero. - -- #address-cells : Should be either two or three. The first cell is the - chipselect number, and the remaining cells are the - offset into the chipselect. -- #size-cells : Either one or two, depending on how large each chipselect - can be. -- reg : Offset and length of the register set for the device -- interrupts: IFC may have one or two interrupts. If two interrupt - specifiers are present, the first is the "common" - interrupt (CM_EVTER_STAT), and the second is the NAND - interrupt (NAND_EVTER_STAT). If there is only one, - that interrupt reports both types of event. - -- little-endian : If this property is absent, the big-endian mode will - be in use as default for registers. - -- ranges : Each range corresponds to a single chipselect, and covers - the entire access window as configured. - -Child device nodes describe the devices connected to IFC such as NOR (e.g. -cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices -like FPGAs, CPLDs, etc. - -Example: - - ifc@ffe1e000 { - compatible = "fsl,ifc", "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0x0 0xffe1e000 0 0x2000>; - interrupts = <16 2 19 2>; - little-endian; - - /* NOR, NAND Flashes and CPLD on board */ - ranges = <0x0 0x0 0x0 0xee000000 0x02000000 - 0x1 0x0 0x0 0xffa00000 0x00010000 - 0x3 0x0 0x0 0xffb00000 0x00020000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x2000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* 32MB for user data */ - reg = <0x0 0x02000000>; - label = "NOR Data"; - }; - }; - - flash@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,ifc-nand"; - reg = <0x1 0x0 0x10000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND U-Boot Image"; - read-only; - }; - }; - - cpld@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1010rdb-cpld"; - reg = <0x3 0x0 0x000001f>; - }; - }; From patchwork Fri Oct 15 00:57:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Li X-Patchwork-Id: 12559631 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1560C433F5 for ; Fri, 15 Oct 2021 00:58:45 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7294761040 for ; Fri, 15 Oct 2021 00:58:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 7294761040 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; 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Fri, 15 Oct 2021 00:57:28 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mbBXI-004qQP-6Z for linux-arm-kernel@lists.infradead.org; Fri, 15 Oct 2021 00:57:25 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id B72181A0979; Fri, 15 Oct 2021 02:57:20 +0200 (CEST) Received: from smtp.na-rdc02.nxp.com (usphx01srsp001v.us-phx01.nxp.com [134.27.49.11]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 8072D1A095D; Fri, 15 Oct 2021 02:57:20 +0200 (CEST) Received: from right.am.freescale.net (right.am.freescale.net [10.81.116.142]) by usphx01srsp001v.us-phx01.nxp.com (Postfix) with ESMTP id B90AC40BD3; Thu, 14 Oct 2021 17:57:19 -0700 (MST) From: Li Yang To: Rob Herring , devicetree@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Li Yang Subject: [PATCH v2 2/2] memory: fsl_ifc: populate child devices without relying on simple-bus Date: Thu, 14 Oct 2021 19:57:07 -0500 Message-Id: <20211015005707.1996-3-leoyang.li@nxp.com> X-Mailer: git-send-email 2.25.1.377.g2d2118b In-Reply-To: <20211015005707.1996-1-leoyang.li@nxp.com> References: <20211015005707.1996-1-leoyang.li@nxp.com> MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211014_175724_520794_104B96D2 X-CRM114-Status: GOOD ( 11.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org After we update the binding to not use simple-bus compatible for the controller, we need the driver to populate the child devices explicitly. Signed-off-by: Li Yang --- drivers/memory/fsl_ifc.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/memory/fsl_ifc.c b/drivers/memory/fsl_ifc.c index d062c2f8250f..ef2092fa90d9 100644 --- a/drivers/memory/fsl_ifc.c +++ b/drivers/memory/fsl_ifc.c @@ -88,6 +88,7 @@ static int fsl_ifc_ctrl_remove(struct platform_device *dev) { struct fsl_ifc_ctrl *ctrl = dev_get_drvdata(&dev->dev); + of_platform_depopulate(&dev->dev); free_irq(ctrl->nand_irq, ctrl); free_irq(ctrl->irq, ctrl); @@ -285,6 +286,12 @@ static int fsl_ifc_ctrl_probe(struct platform_device *dev) } } + /* legacy dts may still use "simple-bus" compatible */ + ret = of_platform_populate(dev->dev.of_node, NULL, NULL, + &dev->dev); + if (ret) + goto err_nandirq; + return 0; err_nandirq: