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envelope-from=tongh@xilinx.com; helo=NAM10-DM6-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@gmail.com, alistair@alistair23.me, tong.ho@xilinx.com, qemu-devel@nongnu.org, peter.maydell@linaro.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Tong Ho Reviewed-by: Francisco Iglesias --- hw/nvram/xlnx-efuse.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/nvram/xlnx-efuse.c b/hw/nvram/xlnx-efuse.c index ee1caab54c..a0fd77b586 100644 --- a/hw/nvram/xlnx-efuse.c +++ b/hw/nvram/xlnx-efuse.c @@ -144,10 +144,11 @@ static bool efuse_ro_bits_find(XlnxEFuse *s, uint32_t k) bool xlnx_efuse_set_bit(XlnxEFuse *s, unsigned int bit) { if (efuse_ro_bits_find(s, bit)) { + g_autofree char *path = object_get_canonical_path(OBJECT(s)); + qemu_log_mask(LOG_GUEST_ERROR, "%s: WARN: " "Ignored setting of readonly efuse bit<%u,%u>!\n", - object_get_canonical_path(OBJECT(s)), - (bit / 32), (bit % 32)); + path, (bit / 32), (bit % 32)); return false; } @@ -202,9 +203,11 @@ static void efuse_realize(DeviceState *dev, Error **errp) efuse_ro_bits_sort(s); if ((s->efuse_size % 32) != 0) { + g_autofree char *path = object_get_canonical_path(OBJECT(s)); + error_setg(errp, "%s.efuse-size: %u: property value not multiple of 32.", - object_get_canonical_path(OBJECT(dev)), s->efuse_size); + path, s->efuse_size); return; } From patchwork Fri Oct 15 20:35:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tong Ho X-Patchwork-Id: 12562765 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ACB2DC433FE for ; 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envelope-from=tongh@xilinx.com; helo=NAM02-BN1-obe.outbound.protection.outlook.com X-Spam_score_int: 0 X-Spam_score: -0.0 X-Spam_bar: / X-Spam_report: (-0.0 / 5.0 requ) DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@gmail.com, alistair@alistair23.me, tong.ho@xilinx.com, qemu-devel@nongnu.org, peter.maydell@linaro.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Tong Ho Reviewed-by: Francisco Iglesias --- hw/nvram/xlnx-versal-efuse-ctrl.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/hw/nvram/xlnx-versal-efuse-ctrl.c b/hw/nvram/xlnx-versal-efuse-ctrl.c index d362376703..b35ba65ab5 100644 --- a/hw/nvram/xlnx-versal-efuse-ctrl.c +++ b/hw/nvram/xlnx-versal-efuse-ctrl.c @@ -439,9 +439,11 @@ static void efuse_pgm_addr_postw(RegisterInfo *reg, uint64_t val64) * up to guest to do so (or by reset). */ if (efuse_pgm_locked(s, bit)) { + g_autofree char *path = object_get_canonical_path(OBJECT(s)); + qemu_log_mask(LOG_GUEST_ERROR, "%s: Denied setting of efuse<%u, %u, %u>\n", - object_get_canonical_path(OBJECT(s)), + path, FIELD_EX32(bit, EFUSE_PGM_ADDR, PAGE), FIELD_EX32(bit, EFUSE_PGM_ADDR, ROW), FIELD_EX32(bit, EFUSE_PGM_ADDR, COLUMN)); @@ -478,9 +480,11 @@ static void efuse_rd_addr_postw(RegisterInfo *reg, uint64_t val64) s->regs[R_EFUSE_RD_DATA] = xlnx_versal_efuse_read_row(s->efuse, bit, &denied); if (denied) { + g_autofree char *path = object_get_canonical_path(OBJECT(s)); + qemu_log_mask(LOG_GUEST_ERROR, "%s: Denied reading of efuse<%u, %u>\n", - object_get_canonical_path(OBJECT(s)), + path, FIELD_EX32(bit, EFUSE_RD_ADDR, PAGE), FIELD_EX32(bit, EFUSE_RD_ADDR, ROW)); @@ -625,9 +629,11 @@ static void efuse_ctrl_reg_write(void *opaque, hwaddr addr, s = XLNX_VERSAL_EFUSE_CTRL(dev); if (addr != A_WR_LOCK && s->regs[R_WR_LOCK]) { + g_autofree char *path = object_get_canonical_path(OBJECT(s)); + qemu_log_mask(LOG_GUEST_ERROR, "%s[reg_0x%02lx]: Attempt to write locked register.\n", - object_get_canonical_path(OBJECT(s)), (long)addr); + path, (long)addr); } else { register_write_memory(opaque, addr, data, size); } @@ -681,16 +687,20 @@ static void efuse_ctrl_realize(DeviceState *dev, Error **errp) const uint32_t lks_sz = sizeof(XlnxEFuseLkSpec) / 2; if (!s->efuse) { + g_autofree char *path = object_get_canonical_path(OBJECT(s)); + error_setg(errp, "%s.efuse: link property not connected to XLNX-EFUSE", - object_get_canonical_path(OBJECT(dev))); + path); return; } /* Sort property-defined pgm-locks for bsearch lookup */ if ((s->extra_pg0_lock_n16 % lks_sz) != 0) { + g_autofree char *path = object_get_canonical_path(OBJECT(s)); + error_setg(errp, "%s.pg0-lock: array property item-count not multiple of %u", - object_get_canonical_path(OBJECT(dev)), lks_sz); + path, lks_sz); return; } From patchwork Fri Oct 15 20:35:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tong Ho X-Patchwork-Id: 12562767 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4B55C433F5 for ; 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envelope-from=tongh@xilinx.com; helo=NAM02-DM3-obe.outbound.protection.outlook.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@gmail.com, alistair@alistair23.me, tong.ho@xilinx.com, qemu-devel@nongnu.org, peter.maydell@linaro.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Tong Ho Reviewed-by: Francisco Iglesias --- hw/nvram/xlnx-zynqmp-efuse.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/hw/nvram/xlnx-zynqmp-efuse.c b/hw/nvram/xlnx-zynqmp-efuse.c index 1f87dbf988..228ba0bbfa 100644 --- a/hw/nvram/xlnx-zynqmp-efuse.c +++ b/hw/nvram/xlnx-zynqmp-efuse.c @@ -434,11 +434,12 @@ static void zynqmp_efuse_pgm_addr_postw(RegisterInfo *reg, uint64_t val64) if (!errmsg) { ARRAY_FIELD_DP32(s->regs, EFUSE_ISR, PGM_ERROR, 0); } else { + g_autofree char *path = object_get_canonical_path(OBJECT(s)); + ARRAY_FIELD_DP32(s->regs, EFUSE_ISR, PGM_ERROR, 1); qemu_log_mask(LOG_GUEST_ERROR, "%s - eFuse write error: %s; addr=0x%x\n", - object_get_canonical_path(OBJECT(s)), - errmsg, (unsigned)val64); + path, errmsg, (unsigned)val64); } ARRAY_FIELD_DP32(s->regs, EFUSE_ISR, PGM_DONE, 1); @@ -448,6 +449,7 @@ static void zynqmp_efuse_pgm_addr_postw(RegisterInfo *reg, uint64_t val64) static void zynqmp_efuse_rd_addr_postw(RegisterInfo *reg, uint64_t val64) { XlnxZynqMPEFuse *s = XLNX_ZYNQMP_EFUSE(reg->opaque); + g_autofree char *path = NULL; /* * Grant reads only to allowed bits; reference sources: @@ -538,10 +540,10 @@ static void zynqmp_efuse_rd_addr_postw(RegisterInfo *reg, uint64_t val64) return; denied: + path = object_get_canonical_path(OBJECT(s)); qemu_log_mask(LOG_GUEST_ERROR, "%s: Denied efuse read from array %u, row %u\n", - object_get_canonical_path(OBJECT(s)), - efuse_ary, efuse_row); + path, efuse_ary, efuse_row); s->regs[R_EFUSE_RD_DATA] = 0; @@ -731,9 +733,11 @@ static void zynqmp_efuse_reg_write(void *opaque, hwaddr addr, s = XLNX_ZYNQMP_EFUSE(dev); if (addr != A_WR_LOCK && s->regs[R_WR_LOCK]) { + g_autofree char *path = object_get_canonical_path(OBJECT(s)); + qemu_log_mask(LOG_GUEST_ERROR, "%s[reg_0x%02lx]: Attempt to write locked register.\n", - object_get_canonical_path(OBJECT(s)), (long)addr); + path, (long)addr); } else { register_write_memory(opaque, addr, data, size); } @@ -784,8 +788,10 @@ static void zynqmp_efuse_realize(DeviceState *dev, Error **errp) XlnxZynqMPEFuse *s = XLNX_ZYNQMP_EFUSE(dev); if (!s->efuse) { + g_autofree char *path = object_get_canonical_path(OBJECT(s)); + error_setg(errp, "%s.efuse: link property not connected to XLNX-EFUSE", - object_get_canonical_path(OBJECT(dev))); + path); return; }