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[84.72.105.84]) by smtp.gmail.com with ESMTPSA id r3sm814224lfc.131.2021.10.16.03.54.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Oct 2021 03:54:24 -0700 (PDT) From: Nicolas Frattaroli To: Nicolas Frattaroli , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Heiko Stuebner , Philipp Zabel Cc: linux-rockchip@lists.infradead.org, alsa-devel@alsa-project.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/4] ASoC: rockchip: i2s-tdm: Strip out direct CRU use Date: Sat, 16 Oct 2021 12:53:50 +0200 Message-Id: <20211016105354.116513-2-frattaroli.nicolas@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211016105354.116513-1-frattaroli.nicolas@gmail.com> References: <20211016105354.116513-1-frattaroli.nicolas@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211016_035427_051522_862223CC X-CRM114-Status: GOOD ( 28.61 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org In cases where both rx and tx lrck are synced to the same source, the resets for rx and tx need to be triggered simultaneously, according to the downstream driver. As there is no reset API to atomically bulk (de)assert two resets at once, what the driver did was implement half a reset controller specific to Rockchip, which tried to write the registers for the resets within one write ideally or several writes within an irqsave section. This of course violates abstractions quite badly. The driver should not write to the CRU's registers directly. In practice, for the cases I tested the driver with, which is audio playback, replacing the synchronised asserts with just individual ones does not seem to make any difference. If it turns out that this breaks something in the future, it should be fixed through the specification and implementation of an atomic bulk reset API, not with a CRU hack. Signed-off-by: Nicolas Frattaroli Reviewed-by: Heiko Stuebner --- sound/soc/rockchip/rockchip_i2s_tdm.c | 126 +++++--------------------- 1 file changed, 21 insertions(+), 105 deletions(-) diff --git a/sound/soc/rockchip/rockchip_i2s_tdm.c b/sound/soc/rockchip/rockchip_i2s_tdm.c index 5d3abbada72a..e8dee1f95d85 100644 --- a/sound/soc/rockchip/rockchip_i2s_tdm.c +++ b/sound/soc/rockchip/rockchip_i2s_tdm.c @@ -76,7 +76,6 @@ struct rk_i2s_tdm_dev { struct reset_control *tx_reset; struct reset_control *rx_reset; struct rk_i2s_soc_data *soc_data; - void __iomem *cru_base; bool is_master_mode; bool io_multiplex; bool mclk_calibrate; @@ -92,8 +91,6 @@ struct rk_i2s_tdm_dev { unsigned int i2s_sdis[CH_GRP_MAX]; unsigned int i2s_sdos[CH_GRP_MAX]; int clk_ppm; - int tx_reset_id; - int rx_reset_id; int refcount; spinlock_t lock; /* xfer lock */ bool has_playback; @@ -222,83 +219,35 @@ static inline struct rk_i2s_tdm_dev *to_info(struct snd_soc_dai *dai) return snd_soc_dai_get_drvdata(dai); } -static void rockchip_snd_xfer_reset_assert(struct rk_i2s_tdm_dev *i2s_tdm, - int tx_bank, int tx_offset, - int rx_bank, int rx_offset) -{ - void __iomem *cru_reset; - unsigned long flags; - - cru_reset = i2s_tdm->cru_base + i2s_tdm->soc_data->softrst_offset; - - if (tx_bank == rx_bank) { - writel(BIT(tx_offset) | BIT(rx_offset) | - (BIT(tx_offset) << 16) | (BIT(rx_offset) << 16), - cru_reset + (tx_bank * 4)); - } else { - local_irq_save(flags); - writel(BIT(tx_offset) | (BIT(tx_offset) << 16), - cru_reset + (tx_bank * 4)); - writel(BIT(rx_offset) | (BIT(rx_offset) << 16), - cru_reset + (rx_bank * 4)); - local_irq_restore(flags); - } -} - -static void rockchip_snd_xfer_reset_deassert(struct rk_i2s_tdm_dev *i2s_tdm, - int tx_bank, int tx_offset, - int rx_bank, int rx_offset) -{ - void __iomem *cru_reset; - unsigned long flags; - - cru_reset = i2s_tdm->cru_base + i2s_tdm->soc_data->softrst_offset; - - if (tx_bank == rx_bank) { - writel((BIT(tx_offset) << 16) | (BIT(rx_offset) << 16), - cru_reset + (tx_bank * 4)); - } else { - local_irq_save(flags); - writel((BIT(tx_offset) << 16), - cru_reset + (tx_bank * 4)); - writel((BIT(rx_offset) << 16), - cru_reset + (rx_bank * 4)); - local_irq_restore(flags); - } -} - /* * Makes sure that both tx and rx are reset at the same time to sync lrck * when clk_trcm > 0. */ static void rockchip_snd_xfer_sync_reset(struct rk_i2s_tdm_dev *i2s_tdm) { - int tx_id, rx_id; - int tx_bank, rx_bank, tx_offset, rx_offset; - - if (!i2s_tdm->cru_base || !i2s_tdm->soc_data) - return; - - tx_id = i2s_tdm->tx_reset_id; - rx_id = i2s_tdm->rx_reset_id; - if (tx_id < 0 || rx_id < 0) - return; - - tx_bank = tx_id / 16; - tx_offset = tx_id % 16; - rx_bank = rx_id / 16; - rx_offset = rx_id % 16; - dev_dbg(i2s_tdm->dev, - "tx_bank: %d, rx_bank: %d, tx_offset: %d, rx_offset: %d\n", - tx_bank, rx_bank, tx_offset, rx_offset); - - rockchip_snd_xfer_reset_assert(i2s_tdm, tx_bank, tx_offset, - rx_bank, rx_offset); + /* This is technically race-y. + * + * In an ideal world, we could atomically assert both resets at the + * same time, through an atomic bulk reset API. This API however does + * not exist, so what the downstream vendor code used to do was + * implement half a reset controller here and require the CRU to be + * passed to the driver as a device tree node. Violating abstractions + * like that is bad, especially when it influences something like the + * bindings which are supposed to describe the hardware, not whatever + * workarounds the driver needs, so it was dropped. + * + * In practice, asserting the resets one by one appears to work just + * fine for playback. During duplex (playback + capture) operation, + * this might become an issue, but that should be solved by the + * implementation of the aforementioned API, not by shoving a reset + * controller into an audio driver. + */ + reset_control_assert(i2s_tdm->tx_reset); + reset_control_assert(i2s_tdm->rx_reset); udelay(10); - - rockchip_snd_xfer_reset_deassert(i2s_tdm, tx_bank, tx_offset, - rx_bank, rx_offset); + reset_control_deassert(i2s_tdm->tx_reset); + reset_control_deassert(i2s_tdm->rx_reset); udelay(10); } @@ -1361,24 +1310,6 @@ static const struct of_device_id rockchip_i2s_tdm_match[] = { {}, }; -static int of_i2s_resetid_get(struct device_node *node, - const char *id) -{ - struct of_phandle_args args; - int index = 0; - int ret; - - if (id) - index = of_property_match_string(node, - "reset-names", id); - ret = of_parse_phandle_with_args(node, "resets", "#reset-cells", - index, &args); - if (ret) - return ret; - - return args.args[0]; -} - static struct snd_soc_dai_driver i2s_tdm_dai = { .probe = rockchip_i2s_tdm_dai_probe, .playback = { @@ -1591,7 +1522,6 @@ static int rockchip_i2s_tdm_rx_path_prepare(struct rk_i2s_tdm_dev *i2s_tdm, static int rockchip_i2s_tdm_probe(struct platform_device *pdev) { struct device_node *node = pdev->dev.of_node; - struct device_node *cru_node; const struct of_device_id *of_id; struct rk_i2s_tdm_dev *i2s_tdm; struct resource *res; @@ -1633,20 +1563,6 @@ static int rockchip_i2s_tdm_probe(struct platform_device *pdev) return dev_err_probe(i2s_tdm->dev, PTR_ERR(i2s_tdm->grf), "Error in rockchip,grf\n"); - if (i2s_tdm->clk_trcm != TRCM_TXRX) { - cru_node = of_parse_phandle(node, "rockchip,cru", 0); - i2s_tdm->cru_base = of_iomap(cru_node, 0); - of_node_put(cru_node); - if (!i2s_tdm->cru_base) { - dev_err(i2s_tdm->dev, - "Missing or unsupported rockchip,cru node\n"); - return -ENOENT; - } - - i2s_tdm->tx_reset_id = of_i2s_resetid_get(node, "tx-m"); - i2s_tdm->rx_reset_id = of_i2s_resetid_get(node, "rx-m"); - } - i2s_tdm->tx_reset = devm_reset_control_get_optional_exclusive(&pdev->dev, "tx-m"); if (IS_ERR(i2s_tdm->tx_reset)) { From patchwork Sat Oct 16 10:53:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Frattaroli X-Patchwork-Id: 12563593 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 670B7C433EF for ; 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[84.72.105.84]) by smtp.gmail.com with ESMTPSA id r3sm814224lfc.131.2021.10.16.03.54.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Oct 2021 03:54:31 -0700 (PDT) From: Nicolas Frattaroli To: Nicolas Frattaroli , Liam Girdwood , Mark Brown , Rob Herring , Heiko Stuebner Cc: linux-rockchip@lists.infradead.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/4] ASoC: dt-bindings: rockchip: i2s-tdm: Drop rockchip, cru property Date: Sat, 16 Oct 2021 12:53:51 +0200 Message-Id: <20211016105354.116513-3-frattaroli.nicolas@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211016105354.116513-1-frattaroli.nicolas@gmail.com> References: <20211016105354.116513-1-frattaroli.nicolas@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211016_035433_270069_F0FEE7CD X-CRM114-Status: GOOD ( 11.90 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org This property was only needed for a driver hack, which we can remove. Since the bindings were not in any kernel release yet, we are able to just drop the property instead of silently accepting and ignoring it. Signed-off-by: Nicolas Frattaroli Reviewed-by: Heiko Stuebner --- .../bindings/sound/rockchip,i2s-tdm.yaml | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml b/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml index ce3e18b50230..6a7c004bef17 100644 --- a/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml +++ b/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml @@ -82,12 +82,6 @@ properties: - tx-m - rx-m - rockchip,cru: - $ref: /schemas/types.yaml#/definitions/phandle - description: - The phandle of the cru. - Required if neither trcm-sync-tx-only nor trcm-sync-rx-only are specified. - rockchip,grf: $ref: /schemas/types.yaml#/definitions/phandle description: @@ -144,15 +138,6 @@ required: - rockchip,grf - "#sound-dai-cells" -allOf: - - if: - properties: - rockchip,trcm-sync-tx-only: false - rockchip,trcm-sync-rx-only: false - then: - required: - - rockchip,cru - additionalProperties: false examples: @@ -177,7 +162,6 @@ examples: resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>; reset-names = "tx-m", "rx-m"; rockchip,trcm-sync-tx-only; - rockchip,cru = <&cru>; rockchip,grf = <&grf>; #sound-dai-cells = <0>; pinctrl-names = "default"; From patchwork Sat Oct 16 10:53:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Frattaroli X-Patchwork-Id: 12563595 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADF09C433EF for ; Sat, 16 Oct 2021 10:55:49 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 78C0B611C3 for ; Sat, 16 Oct 2021 10:55:49 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 78C0B611C3 Authentication-Results: mail.kernel.org; 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[84.72.105.84]) by smtp.gmail.com with ESMTPSA id r3sm814224lfc.131.2021.10.16.03.54.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Oct 2021 03:54:42 -0700 (PDT) From: Nicolas Frattaroli To: Rob Herring , Heiko Stuebner Cc: Nicolas Frattaroli , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/4] arm64: dts: rockchip: Add i2s1 on rk356x Date: Sat, 16 Oct 2021 12:53:52 +0200 Message-Id: <20211016105354.116513-4-frattaroli.nicolas@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211016105354.116513-1-frattaroli.nicolas@gmail.com> References: <20211016105354.116513-1-frattaroli.nicolas@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211016_035445_026939_ADD990D9 X-CRM114-Status: GOOD ( 12.58 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org This adds the necessary device tree node on rk3566 and rk3568 to enable the I2S1 TDM audio controller. I2S0 has not been added, as it is connected to HDMI and there is no way to test that it's working without a functioning video clock (read: VOP2 driver). Signed-off-by: Nicolas Frattaroli --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 25 ++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index b721a34ffa8c..dbe0123e74e8 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -608,6 +608,31 @@ sdhci: mmc@fe310000 { status = "disabled"; }; + i2s1_8ch: i2s@fe410000 { + compatible = "rockchip,rk3568-i2s-tdm"; + reg = <0x0 0xfe410000 0x0 0x1000>; + interrupts = ; + assigned-clocks = <&cru CLK_I2S1_8CH_TX_SRC>, <&cru CLK_I2S1_8CH_RX_SRC>; + assigned-clock-rates = <1188000000>, <1188000000>; + clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>, + <&cru HCLK_I2S1_8CH>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + dmas = <&dmac1 3>, <&dmac1 2>; + dma-names = "rx", "tx"; + resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>; + reset-names = "tx-m", "rx-m"; + rockchip,grf = <&grf>; + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_sclkrx + &i2s1m0_lrcktx &i2s1m0_lrckrx + &i2s1m0_sdi0 &i2s1m0_sdi1 + &i2s1m0_sdi2 &i2s1m0_sdi3 + &i2s1m0_sdo0 &i2s1m0_sdo1 + &i2s1m0_sdo2 &i2s1m0_sdo3>; + status = "disabled"; + }; + dmac0: dmac@fe530000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x0 0xfe530000 0x0 0x4000>; From patchwork Sat Oct 16 10:53:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Frattaroli X-Patchwork-Id: 12563597 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C88EEC433F5 for ; Sat, 16 Oct 2021 10:56:19 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8C6676108E for ; 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[84.72.105.84]) by smtp.gmail.com with ESMTPSA id r3sm814224lfc.131.2021.10.16.03.54.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Oct 2021 03:54:49 -0700 (PDT) From: Nicolas Frattaroli To: Rob Herring , Heiko Stuebner Cc: Nicolas Frattaroli , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] arm64: dts: rockchip: Add analog audio on Quartz64 Date: Sat, 16 Oct 2021 12:53:53 +0200 Message-Id: <20211016105354.116513-5-frattaroli.nicolas@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211016105354.116513-1-frattaroli.nicolas@gmail.com> References: <20211016105354.116513-1-frattaroli.nicolas@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211016_035451_587558_BCE42861 X-CRM114-Status: GOOD ( 13.52 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org On the Quartz64 Model A, the I2S1 TDM controller is connected to the rk817 codec in I2S mode. Enabling it and adding the necessary simple-sound-card and codec nodes allows for analog audio output on the PINE64 Quartz64 Model A SBC. Signed-off-by: Nicolas Frattaroli --- .../boot/dts/rockchip/rk3566-quartz64-a.dts | 31 ++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index a244f7b87e38..f1261f25cb35 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -58,6 +58,20 @@ led-diy { }; }; + rk817-sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "Analog RK817"; + simple-audio-card,mclk-fs = <256>; + + simple-audio-card,cpu { + sound-dai = <&i2s1_8ch>; + }; + simple-audio-card,codec { + sound-dai = <&rk817>; + }; + }; + vcc12v_dcin: vcc12v_dcin { compatible = "regulator-fixed"; regulator-name = "vcc12v_dcin"; @@ -199,8 +213,13 @@ rk817: pmic@20 { interrupts = ; clock-output-names = "rk808-clkout1", "rk808-clkout2"; + #sound-dai-cells = <0>; + clock-names = "mclk"; + clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; + pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>; rockchip,system-power-controller; wakeup-source; #clock-cells = <1>; @@ -392,6 +411,16 @@ regulator-state-mem { }; }; +&i2s1_8ch { + status = "okay"; + rockchip,trcm-sync-tx-only; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_sclktx + &i2s1m0_lrcktx + &i2s1m0_sdi0 + &i2s1m0_sdo0>; +}; + &mdio1 { rgmii_phy1: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22";