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[209.91.167.254]) by smtp.gmail.com with ESMTPSA id i13sm4047978qtp.87.2021.10.16.08.46.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Oct 2021 08:46:02 -0700 (PDT) From: Trevor Woerner To: linux-kernel@vger.kernel.org Cc: Rob Herring , Heiko Stuebner , Johan Jonker , Chen-Yu Tsai , David Wu , Ezequiel Garcia , Cameron Nemo , Robin Murphy , Elaine Zhang , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC support), linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC support) Subject: [PATCH 1/2] arm64: dts: rk3328: add gpu opp table Date: Sat, 16 Oct 2021 11:45:44 -0400 Message-Id: <20211016154548.29555-1-twoerner@gmail.com> X-Mailer: git-send-email 2.30.0.rc0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211016_084605_115042_6DABB548 X-CRM114-Status: GOOD ( 11.12 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Add an operating-points table and cooling entry to the GPU on the RK3328 SoC to improve its performance. According to its datasheet[1] the maximum frequency of the Mali-450 MP2 GPU found on the RK3328 SoC is 500MHz. On my rock64 device, under x11, glmark2-es2 performance increased from around 60 to just over 100. Same device running glmark2-es2 under wayland/weston improved from just over 100 to just over 200. [1] https://rockchip.fr/RK3328%20datasheet%20V1.2.pdf Signed-off-by: Trevor Woerner Tested-by: Nicolas Frattaroli --- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 26 +++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 8c821acb21ff..5e1dcf71e414 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -532,7 +532,8 @@ map0 { cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; contribution = <4096>; }; }; @@ -617,6 +618,29 @@ gpu: gpu@ff300000 { clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; clock-names = "bus", "core"; resets = <&cru SRST_GPU_A>; + operating-points-v2 = <&gpu_opp_table>; + #cooling-cells = <2>; + }; + + gpu_opp_table: gpu-opp-table { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <1100000>; + }; + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <1100000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1100000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <1100000>; + }; }; h265e_mmu: iommu@ff330200 { From patchwork Sat Oct 16 15:45:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Trevor Woerner X-Patchwork-Id: 12563707 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83F4DC433EF for ; Sat, 16 Oct 2021 15:46:30 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 438C260F70 for ; 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[209.91.167.254]) by smtp.gmail.com with ESMTPSA id i13sm4047978qtp.87.2021.10.16.08.46.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Oct 2021 08:46:06 -0700 (PDT) From: Trevor Woerner To: linux-kernel@vger.kernel.org Cc: Rob Herring , Heiko Stuebner , Katsuhiro Suzuki , Chen-Yu Tsai , Cameron Nemo , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC support), linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC support) Subject: [PATCH 2/2] arm64: dts: rock64: add gpu regulator Date: Sat, 16 Oct 2021 11:45:45 -0400 Message-Id: <20211016154548.29555-2-twoerner@gmail.com> X-Mailer: git-send-email 2.30.0.rc0 In-Reply-To: <20211016154548.29555-1-twoerner@gmail.com> References: <20211016154548.29555-1-twoerner@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211016_084607_826702_54766BF0 X-CRM114-Status: GOOD ( 11.02 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Add a regulator for the GPU in order to properly make use of the newly added operations-table. Signed-off-by: Trevor Woerner --- arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts index 1b0f7e4551ea..e76673d5fdc5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts @@ -133,6 +133,10 @@ &cpu3 { cpu-supply = <&vdd_arm>; }; +&gpu { + mali-supply = <&vdd_logic>; +}; + &emmc { bus-width = <8>; cap-mmc-highspeed;