From patchwork Tue Oct 19 21:58:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12571197 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE5EFC433EF for ; Tue, 19 Oct 2021 21:59:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D21F16137C for ; Tue, 19 Oct 2021 21:59:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229704AbhJSWBU (ORCPT ); Tue, 19 Oct 2021 18:01:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229734AbhJSWBQ (ORCPT ); Tue, 19 Oct 2021 18:01:16 -0400 Received: from mail-pf1-x42d.google.com (mail-pf1-x42d.google.com [IPv6:2607:f8b0:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 373B1C06174E; Tue, 19 Oct 2021 14:59:03 -0700 (PDT) Received: by mail-pf1-x42d.google.com with SMTP id d5so1180412pfu.1; Tue, 19 Oct 2021 14:59:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Dv8ie/kzP99OSKx2zPfoLqRlI0izEadzKVnoX+2n0Ow=; b=AY2Ha5MT0GGSiAQJtui4C9ngVrORBxADCZ2UfDcWMFG49K8fbexaNgX+wtRbjAPmOs h1EEcZ3Vs5nGsU3lxyyBJQMwREZVYsbTP/YzlXMZWlzD5GbioJ60HLdgBxq2ORiyZHQE 4xyeZJ9jjQsOYUQ61XMmMS62pVe4SGhnSo6SPFOPxwphnh0bXAM/2XCi5hPWH7W7fV/a FodWYf/Ikfz1FcNJecK5z/opptgGMCyXJvoGJlCnRQuG9Y9QYUO0RNppBhkS/g4Jf9TO Zq4H8Ih541/TPH4MSdRSiP1RLwvGXN/GMeWW4RX/0QiH1IfwYTZumd/Vuclo5j+8ay3s 6QYw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Dv8ie/kzP99OSKx2zPfoLqRlI0izEadzKVnoX+2n0Ow=; b=V9ZiQnr/MUBobDdiZCH5HLxyOKzwqlk2y8TItDZnU7klB4/SOD0/m/blDEe3UsaTBx 7PUkTO48eDeyNMo9phOgzVe5RjaHklL/iwaSTxNmI5eemHYfGEZqSnyxmqRxGaWfdYHr brkIv113LHD9EtXuNB0G7M4C8+BbOm4TGUDJO16gLnHcXHRW914gqPfk1Nq914DfEuoo g5I1fLvY7Lr3O9lgMVsxbMv5augFKfcJStRyFwmUyGYhtUgVctRgUI6c1CBd5J7TnCR4 qS+JQcDN+92TBDUqKakQIIOQHg7UPmcfY989XtlKvqQrnXBlvB2Fbu35qWOk/iGH57+n 3IZA== X-Gm-Message-State: AOAM532/wXNuaml+4etJ8bzx9ZEl1bl3dBBsNfHGxsgFzZ6SbSTUIMWn zycgFGSKwh0khUL3egoGNkZEc3oJ/P8= X-Google-Smtp-Source: ABdhPJxg80f3aU9s30YTITBpGuu/MH1V8WZnV8yB6ev7fGNeckIaO0jlPiUPY6LwoY00LNnGswTQWA== X-Received: by 2002:a05:6a00:1a8e:b0:44c:5f27:e971 with SMTP id e14-20020a056a001a8e00b0044c5f27e971mr2464454pfv.72.1634680742412; Tue, 19 Oct 2021 14:59:02 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id bf7sm139325pjb.14.2021.10.19.14.59.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Oct 2021 14:59:01 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Rob Herring , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v5 01/14] irqchip: Provide platform_device to of_irq_init_cb_t Date: Tue, 19 Oct 2021 14:58:42 -0700 Message-Id: <20211019215855.1920099-2-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019215855.1920099-1-f.fainelli@gmail.com> References: <20211019215855.1920099-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Provide the platform device mapping to the interrupt controller node to the of_irq_init_cb_t callback such that drivers can make use of it. Reviewed-by: Rob Herring Signed-off-by: Florian Fainelli --- drivers/irqchip/irqchip.c | 2 +- drivers/irqchip/qcom-pdc.c | 3 ++- drivers/of/irq.c | 2 +- include/linux/of_irq.h | 5 ++++- 4 files changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/irqchip/irqchip.c b/drivers/irqchip/irqchip.c index 3570f0a588c4..289784eefd00 100644 --- a/drivers/irqchip/irqchip.c +++ b/drivers/irqchip/irqchip.c @@ -55,6 +55,6 @@ int platform_irqchip_probe(struct platform_device *pdev) if (par_np && !irq_find_matching_host(par_np, DOMAIN_BUS_ANY)) return -EPROBE_DEFER; - return irq_init_cb(np, par_np); + return irq_init_cb(np, par_np, pdev); } EXPORT_SYMBOL_GPL(platform_irqchip_probe); diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c index 173e6520e06e..819a93360b96 100644 --- a/drivers/irqchip/qcom-pdc.c +++ b/drivers/irqchip/qcom-pdc.c @@ -359,7 +359,8 @@ static int pdc_setup_pin_mapping(struct device_node *np) return 0; } -static int qcom_pdc_init(struct device_node *node, struct device_node *parent) +static int qcom_pdc_init(struct device_node *node, struct device_node *parent, + struct platform_device *pdev) { struct irq_domain *parent_domain, *pdc_domain, *pdc_gpio_domain; int ret; diff --git a/drivers/of/irq.c b/drivers/of/irq.c index 352e14b007e7..18f3f5c00c87 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -538,7 +538,7 @@ void __init of_irq_init(const struct of_device_id *matches) desc->dev, desc->dev, desc->interrupt_parent); ret = desc->irq_init_cb(desc->dev, - desc->interrupt_parent); + desc->interrupt_parent, NULL); if (ret) { of_node_clear_flag(desc->dev, OF_POPULATED); kfree(desc); diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h index aaf219bd0354..89acc8b089f0 100644 --- a/include/linux/of_irq.h +++ b/include/linux/of_irq.h @@ -9,7 +9,10 @@ #include #include -typedef int (*of_irq_init_cb_t)(struct device_node *, struct device_node *); +struct platform_device; + +typedef int (*of_irq_init_cb_t)(struct device_node *, struct device_node *, + struct platform_device *); /* * Workarounds only applied to 32bit powermac machines From patchwork Tue Oct 19 21:58:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12571199 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B279C4332F for ; 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Tue, 19 Oct 2021 14:59:04 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id bf7sm139325pjb.14.2021.10.19.14.59.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Oct 2021 14:59:03 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Thomas Gleixner , Thomas Bogendoerfer , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v5 02/14] MIPS: BMIPS: Remove use of irq_cpu_offline Date: Tue, 19 Oct 2021 14:58:43 -0700 Message-Id: <20211019215855.1920099-3-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019215855.1920099-1-f.fainelli@gmail.com> References: <20211019215855.1920099-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org irq_cpu_offline() is only used by MIPS and we should instead use irq_migrate_all_off_this_cpu(). This will be helpful in order to remove drivers/irqchip/irq-bcm7038-l1.c irq_cpu_offline callback which would have got in the way of making this driver modular. Suggested-by: Thomas Gleixner Acked-by: Thomas Bogendoerfer Signed-off-by: Florian Fainelli --- arch/mips/Kconfig | 1 + arch/mips/kernel/smp-bmips.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 771ca53af06d..2c03b27cec02 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1782,6 +1782,7 @@ config CPU_BMIPS select CPU_HAS_PREFETCH select CPU_SUPPORTS_CPUFREQ select MIPS_EXTERNAL_TIMER + select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU help Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c index b6ef5f7312cf..f5d7bfa3472a 100644 --- a/arch/mips/kernel/smp-bmips.c +++ b/arch/mips/kernel/smp-bmips.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -373,7 +374,7 @@ static int bmips_cpu_disable(void) set_cpu_online(cpu, false); calculate_cpu_foreign_map(); - irq_cpu_offline(); + irq_migrate_all_off_this_cpu(); clear_c0_status(IE_IRQ5); local_flush_tlb_all(); From patchwork Tue Oct 19 21:58:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12571201 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB50AC43219 for ; Tue, 19 Oct 2021 21:59:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 955CB6128B for ; Tue, 19 Oct 2021 21:59:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229770AbhJSWBW (ORCPT ); Tue, 19 Oct 2021 18:01:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54894 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229570AbhJSWBU (ORCPT ); Tue, 19 Oct 2021 18:01:20 -0400 Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 789BCC061768; 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Tue, 19 Oct 2021 14:59:05 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id bf7sm139325pjb.14.2021.10.19.14.59.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Oct 2021 14:59:05 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v5 03/14] irqchip/irq-bcm7038-l1: Remove .irq_cpu_offline() Date: Tue, 19 Oct 2021 14:58:44 -0700 Message-Id: <20211019215855.1920099-4-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019215855.1920099-1-f.fainelli@gmail.com> References: <20211019215855.1920099-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org With arch/mips/kernel/smp-bmips.c having been migrated away from irq_cpu_offline() and use irq_migrate_all_off_this_cpu() instead, we no longer need to implement an .irq_cpu_offline() callback. This is a necessary change to facilitate the building of this driver as a module. Signed-off-by: Florian Fainelli --- drivers/irqchip/irq-bcm7038-l1.c | 30 ------------------------------ 1 file changed, 30 deletions(-) diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c index a035c385ca7a..750156217c82 100644 --- a/drivers/irqchip/irq-bcm7038-l1.c +++ b/drivers/irqchip/irq-bcm7038-l1.c @@ -221,33 +221,6 @@ static int bcm7038_l1_set_affinity(struct irq_data *d, return 0; } -#ifdef CONFIG_SMP -static void bcm7038_l1_cpu_offline(struct irq_data *d) -{ - struct cpumask *mask = irq_data_get_affinity_mask(d); - int cpu = smp_processor_id(); - cpumask_t new_affinity; - - /* This CPU was not on the affinity mask */ - if (!cpumask_test_cpu(cpu, mask)) - return; - - if (cpumask_weight(mask) > 1) { - /* - * Multiple CPU affinity, remove this CPU from the affinity - * mask - */ - cpumask_copy(&new_affinity, mask); - cpumask_clear_cpu(cpu, &new_affinity); - } else { - /* Only CPU, put on the lowest online CPU */ - cpumask_clear(&new_affinity); - cpumask_set_cpu(cpumask_first(cpu_online_mask), &new_affinity); - } - irq_set_affinity_locked(d, &new_affinity, false); -} -#endif - static int __init bcm7038_l1_init_one(struct device_node *dn, unsigned int idx, struct bcm7038_l1_chip *intc) @@ -396,9 +369,6 @@ static struct irq_chip bcm7038_l1_irq_chip = { .irq_mask = bcm7038_l1_mask, .irq_unmask = bcm7038_l1_unmask, .irq_set_affinity = bcm7038_l1_set_affinity, -#ifdef CONFIG_SMP - .irq_cpu_offline = bcm7038_l1_cpu_offline, -#endif #ifdef CONFIG_PM_SLEEP .irq_set_wake = bcm7038_l1_set_wake, #endif From patchwork Tue Oct 19 21:58:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12571205 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3E909C433EF for ; Tue, 19 Oct 2021 21:59:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 280FE6128B for ; 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Tue, 19 Oct 2021 14:59:06 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v5 04/14] irqchip/irq-bcm7038-l1: Use irq_get_irq_data() Date: Tue, 19 Oct 2021 14:58:45 -0700 Message-Id: <20211019215855.1920099-5-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019215855.1920099-1-f.fainelli@gmail.com> References: <20211019215855.1920099-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Using irq_desc_get_irq_data(irq_to_desc()) to retrieve the irq_data structure from a virtual interrupt number is going to be problematic to make irq-bcm7038-l1 a module because irq_to_desc() is not exported, and there is no intent to export it to modules, see 64a1b95bb9fe ("genirq: Restrict export of irq_to_desc()"). Signed-off-by: Florian Fainelli --- drivers/irqchip/irq-bcm7038-l1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c index 750156217c82..14caf32dc23e 100644 --- a/drivers/irqchip/irq-bcm7038-l1.c +++ b/drivers/irqchip/irq-bcm7038-l1.c @@ -386,7 +386,7 @@ static int bcm7038_l1_map(struct irq_domain *d, unsigned int virq, irq_set_chip_and_handler(virq, &bcm7038_l1_irq_chip, handle_level_irq); irq_set_chip_data(virq, d->host_data); - irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq))); + irqd_set_single_target(irq_get_irq_data(virq)); return 0; } From patchwork Tue Oct 19 21:58:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12571207 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8D62C433F5 for ; Tue, 19 Oct 2021 21:59:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B433460FDA for ; Tue, 19 Oct 2021 21:59:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229880AbhJSWB2 (ORCPT ); Tue, 19 Oct 2021 18:01:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54908 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229835AbhJSWBX (ORCPT ); Tue, 19 Oct 2021 18:01:23 -0400 Received: from mail-pf1-x432.google.com (mail-pf1-x432.google.com [IPv6:2607:f8b0:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DAB8DC06161C; Tue, 19 Oct 2021 14:59:09 -0700 (PDT) Received: by mail-pf1-x432.google.com with SMTP id m14so1149898pfc.9; Tue, 19 Oct 2021 14:59:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=G1RiT4GRKPcXSkOjyrks/jOWZL3DTQpMJtRhCsgVjY8=; b=cyzCM8cEq98+2JVInYARdzvnPFDlb+RpcmSxGjOnuPsTHUOiMok/KttJldug/14e8M rQvVnOyJ0CELKk8zzWnj0ffDJDHKcoQ4KTlUYzf8nLXmXm0aQq+BK1FeklFZvir79kyv lWfVmE/A64KuJHq+tZWeo+1PgoyOuo9FNfsSNPpyS+8V0dAF265+uleCgPN8vWjn67W5 h8rj5Jb3ITfWWh4W0gfJECjAMnOdhIviVMm+OMMTDszHr1W5jCJd2kq4XsWkW4dfguPj L+BsJeVzfw2kFltIQEdVeWByilZqd4OhMBVOTgAH6SB4uABOe3o0mXXY8MqCZ3JJs295 RChA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=G1RiT4GRKPcXSkOjyrks/jOWZL3DTQpMJtRhCsgVjY8=; b=ChGdIs78xbSN4aB40VcMHzXSTBAzCWsgaMIYx1vPasOFyPsRlX8i26TvsfT4W8Kvlg oBLmnUsKDY1XUNbB4Ea3RfHlXlqpA3VhdPeos0yLfy5vPX+YNwpNSimaGekA5m/kSeyv PO7Iwbfql9KXH81MhIyaNywUI833gLmxebcp2HgDEsjm1ezkJeS5LoRwmAZXJ8Z2rdEH KHQz5cQKJJ4oRgUljoLTzDMJgMru0RlC8WjkPRZtaGahEQMU5PEc8nq6LHGRosxrVpaw bUSmdUuiDCcbiiHVgDm1/ff9Vuur4Nz2p3fEVaovbgO0kiLNUqW/GUi3ZPZZZSDFxJ4s ihew== X-Gm-Message-State: AOAM532R5FtfXW7eiCor9mPYXwceUkot40FLSerHFXKn3/7kQRDAkwqE oQxc93/XjXVVs/NAUYnELfLKSiXekok= X-Google-Smtp-Source: ABdhPJyvXt8tiZQtburDOapFUkwxCPRPZJWC0e1+JlkT1IrqiUQ8MYGqccDWPCmqXGW0OBwRnOhxrw== X-Received: by 2002:a62:804a:0:b0:44c:5bfd:7765 with SMTP id j71-20020a62804a000000b0044c5bfd7765mr2360576pfd.83.1634680748991; Tue, 19 Oct 2021 14:59:08 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id bf7sm139325pjb.14.2021.10.19.14.59.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Oct 2021 14:59:08 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v5 05/14] irqchip/irq-bcm7038-l1: Gate use of CPU logical map to MIPS Date: Tue, 19 Oct 2021 14:58:46 -0700 Message-Id: <20211019215855.1920099-6-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019215855.1920099-1-f.fainelli@gmail.com> References: <20211019215855.1920099-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The use of the cpu_logical_map[] array is only relevant for MIPS based platform where this driver is used as a first level interrupt controller and contains multiple register groups to map with an associated CPU. On ARM/ARM64 based systems this interrupt controller is present and used as a second level interrupt controller hanging off the ARM GIC. That copy of the interrupt controller contains a single group, resulting in the intc->cpus[] array to be of size 1. Things happened to work in that case because we install that interrupt controller as a chained handler which does not allow it to be affine to any CPU but the boot CPU which happens to be 0, therefore we never de-reference past intc->cpus[] but with the current code in place, we do leave a chance of de-referencing the array past its bounds. Signed-off-by: Florian Fainelli --- drivers/irqchip/irq-bcm7038-l1.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c index 14caf32dc23e..3c4e348c661e 100644 --- a/drivers/irqchip/irq-bcm7038-l1.c +++ b/drivers/irqchip/irq-bcm7038-l1.c @@ -28,9 +28,6 @@ #include #include #include -#ifdef CONFIG_ARM -#include -#endif #define IRQS_PER_WORD 32 #define REG_BYTES_PER_IRQ_WORD (sizeof(u32) * 4) @@ -127,7 +124,7 @@ static void bcm7038_l1_irq_handle(struct irq_desc *desc) struct irq_chip *chip = irq_desc_get_chip(desc); unsigned int idx; -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP) && defined(CONFIG_MIPS) cpu = intc->cpus[cpu_logical_map(smp_processor_id())]; #else cpu = intc->cpus[0]; @@ -301,7 +298,7 @@ static int bcm7038_l1_suspend(void) u32 val; /* Wakeup interrupt should only come from the boot cpu */ -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP) && defined(CONFIG_MIPS) boot_cpu = cpu_logical_map(0); #else boot_cpu = 0; @@ -325,7 +322,7 @@ static void bcm7038_l1_resume(void) struct bcm7038_l1_chip *intc; int boot_cpu, word; -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP) && defined(CONFIG_MIPS) boot_cpu = cpu_logical_map(0); #else boot_cpu = 0; From patchwork Tue Oct 19 21:58:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12571209 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CE82C433FE for ; Tue, 19 Oct 2021 21:59:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E83A16135F for ; Tue, 19 Oct 2021 21:59:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229728AbhJSWB3 (ORCPT ); Tue, 19 Oct 2021 18:01:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54934 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229924AbhJSWBZ (ORCPT ); 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Tue, 19 Oct 2021 14:59:10 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v5 06/14] irqchip/irq-bcm7038-l1: Restrict affinity setting to MIPS Date: Tue, 19 Oct 2021 14:58:47 -0700 Message-Id: <20211019215855.1920099-7-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019215855.1920099-1-f.fainelli@gmail.com> References: <20211019215855.1920099-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Only MIPS based platforms using this interrupt controller as first level interrupt controller can actually change the affinity of interrupts by re-programming the affinity mask of the interrupt controller and use another word group to have another CPU process the interrupt. When this interrupt is used as a second level interrupt controller on ARM/ARM64 there is no way to change the interrupt affinity. This fixes a NULL pointer de-reference while trying to change the affinity since there is only a single word group in that case, and we would have been overruning the intc->cpus[] array. Signed-off-by: Florian Fainelli --- drivers/irqchip/irq-bcm7038-l1.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c index 3c4e348c661e..357570dd8780 100644 --- a/drivers/irqchip/irq-bcm7038-l1.c +++ b/drivers/irqchip/irq-bcm7038-l1.c @@ -191,6 +191,7 @@ static void bcm7038_l1_mask(struct irq_data *d) raw_spin_unlock_irqrestore(&intc->lock, flags); } +#if defined(CONFIG_MIPS) && defined(CONFIG_SMP) static int bcm7038_l1_set_affinity(struct irq_data *d, const struct cpumask *dest, bool force) @@ -217,6 +218,7 @@ static int bcm7038_l1_set_affinity(struct irq_data *d, return 0; } +#endif static int __init bcm7038_l1_init_one(struct device_node *dn, unsigned int idx, @@ -365,7 +367,9 @@ static struct irq_chip bcm7038_l1_irq_chip = { .name = "bcm7038-l1", .irq_mask = bcm7038_l1_mask, .irq_unmask = bcm7038_l1_unmask, +#if defined(CONFIG_SMP) && defined(CONFIG_MIPS) .irq_set_affinity = bcm7038_l1_set_affinity, +#endif #ifdef CONFIG_PM_SLEEP .irq_set_wake = bcm7038_l1_set_wake, #endif From patchwork Tue Oct 19 21:58:48 2021 Content-Type: text/plain; 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Tue, 19 Oct 2021 14:59:12 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id bf7sm139325pjb.14.2021.10.19.14.59.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Oct 2021 14:59:11 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v5 07/14] irqchip/irq-bcm7038-l1: Switch to IRQCHIP_PLATFORM_DRIVER Date: Tue, 19 Oct 2021 14:58:48 -0700 Message-Id: <20211019215855.1920099-8-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019215855.1920099-1-f.fainelli@gmail.com> References: <20211019215855.1920099-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Allow the user selection and building of this interrupt controller driver as a module since it is used on ARM/ARM64 based systems as a second level interrupt controller hanging off the ARM GIC and is therefore loadable during boot. Signed-off-by: Florian Fainelli --- drivers/irqchip/Kconfig | 4 +++- drivers/irqchip/irq-bcm7038-l1.c | 9 +++++++-- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 4d5924e9f766..3022f6137096 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -115,7 +115,9 @@ config BCM6345_L1_IRQ select GENERIC_IRQ_EFFECTIVE_AFF_MASK config BCM7038_L1_IRQ - bool + tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" + depends on ARCH_BRCMSTB || BMIPS_GENERIC + default ARCH_BRCMSTB || BMIPS_GENERIC select GENERIC_IRQ_CHIP select IRQ_DOMAIN select GENERIC_IRQ_EFFECTIVE_AFF_MASK diff --git a/drivers/irqchip/irq-bcm7038-l1.c b/drivers/irqchip/irq-bcm7038-l1.c index 357570dd8780..f1e6e14145d2 100644 --- a/drivers/irqchip/irq-bcm7038-l1.c +++ b/drivers/irqchip/irq-bcm7038-l1.c @@ -397,7 +397,8 @@ static const struct irq_domain_ops bcm7038_l1_domain_ops = { }; static int __init bcm7038_l1_of_init(struct device_node *dn, - struct device_node *parent) + struct device_node *parent, + struct platform_device *pdev) { struct bcm7038_l1_chip *intc; int idx, ret; @@ -455,4 +456,8 @@ static int __init bcm7038_l1_of_init(struct device_node *dn, return ret; } -IRQCHIP_DECLARE(bcm7038_l1, "brcm,bcm7038-l1-intc", bcm7038_l1_of_init); +IRQCHIP_PLATFORM_DRIVER_BEGIN(bcm7038_l1) +IRQCHIP_MATCH("brcm,bcm7038-l1-intc", bcm7038_l1_of_init) +IRQCHIP_PLATFORM_DRIVER_END(bcm7038_l1) +MODULE_DESCRIPTION("Broadcom STB 7038-style L1/L2 interrupt controller"); +MODULE_LICENSE("GPL v2"); From patchwork Tue Oct 19 21:58:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12571213 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1BC49C4332F for ; Tue, 19 Oct 2021 21:59:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 04E14611CB for ; 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Tue, 19 Oct 2021 14:59:13 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v5 08/14] genirq: Export irq_gc_{unmask_enable,mask_disable}_reg Date: Tue, 19 Oct 2021 14:58:49 -0700 Message-Id: <20211019215855.1920099-9-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019215855.1920099-1-f.fainelli@gmail.com> References: <20211019215855.1920099-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org In order to allow drivers/irqchip/irq-brcmstb-l2.c to be built as a module we need to export: irq_gc_unmask_enable_reg() and irq_gc_mask_disable_reg(). Signed-off-by: Florian Fainelli --- kernel/irq/generic-chip.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c index cc7cdd26e23e..4c011c21bb1a 100644 --- a/kernel/irq/generic-chip.c +++ b/kernel/irq/generic-chip.c @@ -44,6 +44,7 @@ void irq_gc_mask_disable_reg(struct irq_data *d) *ct->mask_cache &= ~mask; irq_gc_unlock(gc); } +EXPORT_SYMBOL_GPL(irq_gc_mask_disable_reg); /** * irq_gc_mask_set_bit - Mask chip via setting bit in mask register @@ -103,6 +104,7 @@ void irq_gc_unmask_enable_reg(struct irq_data *d) *ct->mask_cache |= mask; irq_gc_unlock(gc); } +EXPORT_SYMBOL_GPL(irq_gc_unmask_enable_reg); /** * irq_gc_ack_set_bit - Ack pending interrupt via setting bit From patchwork Tue Oct 19 21:58:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12571215 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF433C4332F for ; Tue, 19 Oct 2021 21:59:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B66D861355 for ; Tue, 19 Oct 2021 21:59:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230117AbhJSWBg (ORCPT ); Tue, 19 Oct 2021 18:01:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230013AbhJSWBa (ORCPT ); Tue, 19 Oct 2021 18:01:30 -0400 Received: from mail-pg1-x52f.google.com (mail-pg1-x52f.google.com [IPv6:2607:f8b0:4864:20::52f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B8572C061768; Tue, 19 Oct 2021 14:59:16 -0700 (PDT) Received: by mail-pg1-x52f.google.com with SMTP id m21so20602581pgu.13; Tue, 19 Oct 2021 14:59:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=c8Bh3Ui9YNGBrxgDKS29OGaqvTCLClNr/nEGx5BqRmI=; b=dgqh2Eqhu+SfYYXYGbhsVilHapzEJ4OIDr1BtT0zoO05zpsy/wA5LbMzHctCKYnuQx Q0bIqbzAzKQwxjJn26zO+bYhhJlyY+53hoVZ5q/J3KsWY58jm0PILctaAQ7Nr24PFhLb HTQY2Av9jkP/SmrmdIShdLYdbLf4d/GCs1HihLWv8thq0MFbiapI1qzzSbGbA9uW9tqZ pfxFRyeAb40kvS1knlN/uOK81VJZNbYsu+cYH6xcsk6jRvma0KE16RmMH7VxhGY5NPQ3 kk1Z7As/8cfqHlKefmp1xpcoDjElcmxox4m+7WFBpizRLpwQc1K407bngwoZK7CCQ7ca LZgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=c8Bh3Ui9YNGBrxgDKS29OGaqvTCLClNr/nEGx5BqRmI=; b=34J8QDm0q64cPC1c0LO3n4KLj6SMv4xUVaH7gRejB0DrySZfpzTboz1VDiIctdmLWy 7Jlug4NnTfOm7CyC19MHF/GscOTflqwNradfej7RB0yTtUaQHnqYWvdJzFevnZaI+4fU CmPC5Ui/gIBNgNWV1YRJEPLMDDC+6dsznjhm+4p39ui2wKVmvVWd5QgzA3rZqkcKjrhR QatCBtsGSfWMWuzRijXMqN5fAzH1QARwDfyT6j01gnXy67OECYpvIxC673psexMIBrYU saf/TesFukbNbPd+7VyQ7xzrIzwhKirTuNwynjipvqeo0ApE6UqSH1DV9TiYvTjYFbyT QknA== X-Gm-Message-State: AOAM5309bk0frNv6fagwiwGGQC07mwafCRKiDaR9hW/lki+XxbrlQ9aI VpsBCnmF3Icbt3O8NYPATVrG6U3Xzro= X-Google-Smtp-Source: ABdhPJyau3kDcMWS70+R/w5sw3Fb11r/gal7Glmb2cGuuWx6ZK/a1vJ8yzGBjBB5Xp/mGuHAYq52hA== X-Received: by 2002:a63:724b:: with SMTP id c11mr9662708pgn.59.1634680755869; Tue, 19 Oct 2021 14:59:15 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id bf7sm139325pjb.14.2021.10.19.14.59.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Oct 2021 14:59:15 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v5 09/14] irqchip/irq-brcmstb-l2: Switch to IRQCHIP_PLATFORM_DRIVER Date: Tue, 19 Oct 2021 14:58:50 -0700 Message-Id: <20211019215855.1920099-10-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019215855.1920099-1-f.fainelli@gmail.com> References: <20211019215855.1920099-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Allow the user selection and building of this interrupt controller driver as a module since it is used on ARM/ARM64 based systems as a second level interrupt controller hanging off the ARM GIC and is therefore loadable during boot. Signed-off-by: Florian Fainelli --- drivers/irqchip/Kconfig | 4 +++- drivers/irqchip/irq-brcmstb-l2.c | 22 +++++++++++++--------- 2 files changed, 16 insertions(+), 10 deletions(-) diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 3022f6137096..dfe54bf9b35f 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -128,7 +128,9 @@ config BCM7120_L2_IRQ select IRQ_DOMAIN config BRCMSTB_L2_IRQ - bool + tristate "Broadcom STB generic L2 interrupt controller driver" + depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC + default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC select GENERIC_IRQ_CHIP select IRQ_DOMAIN diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c index 8e0911561f2d..06364ba67d1d 100644 --- a/drivers/irqchip/irq-brcmstb-l2.c +++ b/drivers/irqchip/irq-brcmstb-l2.c @@ -271,20 +271,24 @@ static int __init brcmstb_l2_intc_of_init(struct device_node *np, } static int __init brcmstb_l2_edge_intc_of_init(struct device_node *np, - struct device_node *parent) + struct device_node *parent, + struct platform_device *pdev) { return brcmstb_l2_intc_of_init(np, parent, &l2_edge_intc_init); } -IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,l2-intc", brcmstb_l2_edge_intc_of_init); -IRQCHIP_DECLARE(brcmstb_hif_spi_l2_intc, "brcm,hif-spi-l2-intc", - brcmstb_l2_edge_intc_of_init); -IRQCHIP_DECLARE(brcmstb_upg_aux_aon_l2_intc, "brcm,upg-aux-aon-l2-intc", - brcmstb_l2_edge_intc_of_init); static int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np, - struct device_node *parent) + struct device_node *parent, + struct platform_device *pdev) { return brcmstb_l2_intc_of_init(np, parent, &l2_lvl_intc_init); } -IRQCHIP_DECLARE(bcm7271_l2_intc, "brcm,bcm7271-l2-intc", - brcmstb_l2_lvl_intc_of_init); + +IRQCHIP_PLATFORM_DRIVER_BEGIN(brcmstb_l2) +IRQCHIP_MATCH("brcm,l2-intc", brcmstb_l2_edge_intc_of_init) +IRQCHIP_MATCH("brcm,hif-spi-l2-intc", brcmstb_l2_edge_intc_of_init) +IRQCHIP_MATCH("brcm,upg-aux-aon-l2-intc", brcmstb_l2_edge_intc_of_init) +IRQCHIP_MATCH("brcm,bcm7271-l2-intc", brcmstb_l2_lvl_intc_of_init) +IRQCHIP_PLATFORM_DRIVER_END(brcmstb_l2) +MODULE_DESCRIPTION("Broadcom STB generic L2 interrupt controller"); +MODULE_LICENSE("GPL v2"); From patchwork Tue Oct 19 21:58:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12571217 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0F15C433EF for ; Tue, 19 Oct 2021 21:59:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BBE9A6128B for ; Tue, 19 Oct 2021 21:59:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230200AbhJSWBm (ORCPT ); Tue, 19 Oct 2021 18:01:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230070AbhJSWBd (ORCPT ); Tue, 19 Oct 2021 18:01:33 -0400 Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A95DC061770; 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Tue, 19 Oct 2021 14:59:17 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id bf7sm139325pjb.14.2021.10.19.14.59.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Oct 2021 14:59:17 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v5 10/14] genirq: Export irq_gc_noop() Date: Tue, 19 Oct 2021 14:58:51 -0700 Message-Id: <20211019215855.1920099-11-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019215855.1920099-1-f.fainelli@gmail.com> References: <20211019215855.1920099-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org In order to build drivers/irqchip/irq-bcm7120-l2.c as a module which references irq_gc_noop(), we need to export it towards modules. Signed-off-by: Florian Fainelli --- kernel/irq/generic-chip.c | 1 + 1 file changed, 1 insertion(+) diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c index 4c011c21bb1a..6f29bf4c8515 100644 --- a/kernel/irq/generic-chip.c +++ b/kernel/irq/generic-chip.c @@ -25,6 +25,7 @@ static DEFINE_RAW_SPINLOCK(gc_lock); void irq_gc_noop(struct irq_data *d) { } +EXPORT_SYMBOL_GPL(irq_gc_noop); /** * irq_gc_mask_disable_reg - Mask chip via disable register From patchwork Tue Oct 19 21:58:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12571219 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6191C433EF for ; Tue, 19 Oct 2021 21:59:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CF5C160FDA for ; Tue, 19 Oct 2021 21:59:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230261AbhJSWB4 (ORCPT ); Tue, 19 Oct 2021 18:01:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55018 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230137AbhJSWBi (ORCPT ); Tue, 19 Oct 2021 18:01:38 -0400 Received: from mail-pf1-x42f.google.com (mail-pf1-x42f.google.com [IPv6:2607:f8b0:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EFD84C061774; Tue, 19 Oct 2021 14:59:19 -0700 (PDT) Received: by mail-pf1-x42f.google.com with SMTP id t184so1207617pfd.0; Tue, 19 Oct 2021 14:59:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=T+nuZjtMi8lifdnlhi4/+fNb2Wj4qKRZZKIw/UMDjOI=; b=pnk2Ki9piaE+Jf4iFrqOU1lKxOr4VVKqgnzA6M0Q1bvCpFY0cqleKo31AGAzmqF0e1 NSFhLdZ5Fq3W4nymSNGrhF0/syk0CZKc5+levWF5Afh0mmgNn1li4LB64emC+RRfU2t3 hHP7JBe/gsgD+QdqRp1HZemxZ4WKQTa5S2w2W+ujJJn8pl41ymO/xKUDMHdhevll4LOk wNwqIfZYLkxH4XTcBaJAFHKwN3mFB2aBgJSOvDjrhP4m8OCI0zoKGDiX0izDyi/lLeBC cA6Iv0n/Ys+U40IggBld3Nssr5StzgHVt1myOzTCPAM6RjVBAoCEqDAboW5fyHVzCtPC Vk5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=T+nuZjtMi8lifdnlhi4/+fNb2Wj4qKRZZKIw/UMDjOI=; b=XQBRDSNyC5wLeQrHPAHkVvUeCKysqPCVGeKqC6Pi3cmNmghN0v3mNDJ+g3ZLR4Z79t HuXgLJn5jtLc56LelkcB/VZhsORVS5GpspHKSyxxts/4v8KOSxhpSfWazbKvwvhHiCxX u00SD3I1wZ9n5n8/2ETP4grAw03tnaBp+Jizo7SERqoW7mNLhSrlQfd2zu7JAZIA1T15 q2DocTPnbFbFo/58idhLQPmn9mNM1z62ixljiKW18CVKUldR3PM0OGDZlHO7w0MycNtX Je65543bkM4+4j2q/3EpF1MyABp+6hS5HIUklPBio5Q+7gCcOKrTRYZ7wVnEfc1v0Erp Ac9w== X-Gm-Message-State: AOAM530lvTtyHW+dgP60dSkjfLmjDh1/fnX8NDJwBc3JGZi2S5daQsJK 1VEkEefBH/9qSSCTdlxFjRmGf5D0tYI= X-Google-Smtp-Source: ABdhPJxLuePV0+uMoFQjH8ssdV4w2GVRjyIuIhxVjnIoy7crBYQp4NMCio/lroj0C7Pdni9mP1UP6Q== X-Received: by 2002:aa7:9d0b:0:b0:44c:62a6:8679 with SMTP id k11-20020aa79d0b000000b0044c62a68679mr2384955pfp.0.1634680759089; Tue, 19 Oct 2021 14:59:19 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id bf7sm139325pjb.14.2021.10.19.14.59.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Oct 2021 14:59:18 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v5 11/14] irqchip/irq-bcm7120-l2: Switch to IRQCHIP_PLATFORM_DRIVER Date: Tue, 19 Oct 2021 14:58:52 -0700 Message-Id: <20211019215855.1920099-12-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019215855.1920099-1-f.fainelli@gmail.com> References: <20211019215855.1920099-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Allow the user selection and building of this interrupt controller driver as a module since it is used on ARM/ARM64 based systems as a second level interrupt controller hanging off the ARM GIC and is therefore loadable during boot. To avoid using of_irq_count() which is not exported towards module, switch the driver to use the platform_device provided by the irqchip platform driver code and resolve the number of interrupts using platform_irq_count(). Signed-off-by: Florian Fainelli --- drivers/irqchip/Kconfig | 4 +++- drivers/irqchip/irq-bcm7120-l2.c | 28 ++++++++++++++++------------ 2 files changed, 19 insertions(+), 13 deletions(-) diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index dfe54bf9b35f..c7320bed5668 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -123,7 +123,9 @@ config BCM7038_L1_IRQ select GENERIC_IRQ_EFFECTIVE_AFF_MASK config BCM7120_L2_IRQ - bool + tristate "Broadcom STB 7120-style L2 interrupt controller driver" + depends on ARCH_BRCMSTB || BMIPS_GENERIC + default ARCH_BRCMSTB || BMIPS_GENERIC select GENERIC_IRQ_CHIP select IRQ_DOMAIN diff --git a/drivers/irqchip/irq-bcm7120-l2.c b/drivers/irqchip/irq-bcm7120-l2.c index f23d7651ea84..9b1edf7747fd 100644 --- a/drivers/irqchip/irq-bcm7120-l2.c +++ b/drivers/irqchip/irq-bcm7120-l2.c @@ -214,6 +214,7 @@ static int __init bcm7120_l2_intc_iomap_3380(struct device_node *dn, static int __init bcm7120_l2_intc_probe(struct device_node *dn, struct device_node *parent, + struct platform_device *pdev, int (*iomap_regs_fn)(struct device_node *, struct bcm7120_l2_intc_data *), const char *intc_name) @@ -230,7 +231,7 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn, if (!data) return -ENOMEM; - data->num_parent_irqs = of_irq_count(dn); + data->num_parent_irqs = platform_irq_count(pdev); if (data->num_parent_irqs <= 0) { pr_err("invalid number of parent interrupts\n"); ret = -ENOMEM; @@ -334,21 +335,24 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn, } static int __init bcm7120_l2_intc_probe_7120(struct device_node *dn, - struct device_node *parent) + struct device_node *parent, + struct platform_device *pdev) { - return bcm7120_l2_intc_probe(dn, parent, bcm7120_l2_intc_iomap_7120, - "BCM7120 L2"); + return bcm7120_l2_intc_probe(dn, parent, pdev, + bcm7120_l2_intc_iomap_7120, "BCM7120 L2"); } static int __init bcm7120_l2_intc_probe_3380(struct device_node *dn, - struct device_node *parent) + struct device_node *parent, + struct platform_device *pdev) { - return bcm7120_l2_intc_probe(dn, parent, bcm7120_l2_intc_iomap_3380, - "BCM3380 L2"); + return bcm7120_l2_intc_probe(dn, parent, pdev, + bcm7120_l2_intc_iomap_3380, "BCM3380 L2"); } -IRQCHIP_DECLARE(bcm7120_l2_intc, "brcm,bcm7120-l2-intc", - bcm7120_l2_intc_probe_7120); - -IRQCHIP_DECLARE(bcm3380_l2_intc, "brcm,bcm3380-l2-intc", - bcm7120_l2_intc_probe_3380); +IRQCHIP_PLATFORM_DRIVER_BEGIN(bcm7120_l2) +IRQCHIP_MATCH("brcm,bcm7120-l2-intc", bcm7120_l2_intc_probe_7120) +IRQCHIP_MATCH("brcm,bcm3380-l2-intc", bcm7120_l2_intc_probe_3380) +IRQCHIP_PLATFORM_DRIVER_END(bcm7120_l2) +MODULE_DESCRIPTION("Broadcom STB 7120-style L2 interrupt controller driver"); +MODULE_LICENSE("GPL v2"); From patchwork Tue Oct 19 21:58:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12571223 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 324E4C43219 for ; Tue, 19 Oct 2021 21:59:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1F43560FDA for ; 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Tue, 19 Oct 2021 14:59:20 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v5 12/14] arm64: broadcom: Removed forced select of interrupt controllers Date: Tue, 19 Oct 2021 14:58:53 -0700 Message-Id: <20211019215855.1920099-13-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019215855.1920099-1-f.fainelli@gmail.com> References: <20211019215855.1920099-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Now that the various second level interrupt controllers have been moved to IRQCHIP_PLATFORM_DRIVER and they do default to ARCH_BRCMSTB and ARCH_BCM2835 where relevant, remove their forced selection from the machine entry to allow an user to build them as modules. Signed-off-by: Florian Fainelli --- arch/arm64/Kconfig.platforms | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index b0ce18d4cc98..2e9440f2da22 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -44,7 +44,6 @@ config ARCH_BCM2835 select ARM_AMBA select ARM_GIC select ARM_TIMER_SP804 - select BRCMSTB_L2_IRQ help This enables support for the Broadcom BCM2837 and BCM2711 SoC. These SoCs are used in the Raspberry Pi 3 and 4 devices. @@ -82,8 +81,6 @@ config ARCH_BITMAIN config ARCH_BRCMSTB bool "Broadcom Set-Top-Box SoCs" select ARCH_HAS_RESET_CONTROLLER - select BCM7038_L1_IRQ - select BRCMSTB_L2_IRQ select GENERIC_IRQ_CHIP select PINCTRL help From patchwork Tue Oct 19 21:58:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12571221 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF709C4332F for ; Tue, 19 Oct 2021 21:59:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BC1C460FDA for ; Tue, 19 Oct 2021 21:59:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230136AbhJSWB5 (ORCPT ); Tue, 19 Oct 2021 18:01:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55032 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230170AbhJSWBj (ORCPT ); Tue, 19 Oct 2021 18:01:39 -0400 Received: from mail-pg1-x52d.google.com (mail-pg1-x52d.google.com [IPv6:2607:f8b0:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2FC48C061779; Tue, 19 Oct 2021 14:59:23 -0700 (PDT) Received: by mail-pg1-x52d.google.com with SMTP id j190so13898408pgd.0; Tue, 19 Oct 2021 14:59:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cvv2iZxij6FWrFEEKivGkcFAPGtCwuGKeJ0S/lB+6EU=; b=puyoSqrav3ko0lxLZDxOgj+HF1tMBUhtqeS8ibOhQkHM6TZio2/uRT9KT/AchkliH3 ojpy87guSLAevK+3haRFgpyrMyenPSCxA/7CDUwQNDghnHe1BonrgUntG+wx2GlzwV/w oFvg2SQa2sTNuLN0OS3TC4d3u9P4F1+jU/4NjMmAYds3xMymzYbZQUKXh08AQeHsIQH9 dV/8N7WeiA8dANrE6ZS4h4KRMuKbWSFgIchErMO0d7Hm/o+TRrcvYGkoyZTAvnJ5RpNP 0LlcwFaFC1omp4VwK4XmrfAMSm9glKW0hKMXS4zWp6DlQlGaNwhi7U2NTaQPz0k7a1mi Y7nw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cvv2iZxij6FWrFEEKivGkcFAPGtCwuGKeJ0S/lB+6EU=; b=ZEq9yTEGBLinFIuy54638MDNDnm5jNx8YGgCw+skk+pbu9h9x+/Ny6VsEKh543LVq2 hbaUS5zDKXBVnG3Xm0HLPtnRDAUjpapzI3YioUk6aJBm2PWnc8Wd1o643zEnBW1YrhXe mikGmeA/NZp3u1Vea4lLLU7t7gDnsNNzsrv1jkYweqoVBeztvdMRUypIK+Nip9aHo8f+ +HNRFxF2iGbLcVTMHBSiVHnMMSn2ys/b0i2SCfpgmRsC8zqeHqmSKq16H79/VRldf1br BkD8ycEmCksxTd2S5h9zWKFPVN33Z4Ol4g5dyFjRldBme1gJC8U+NEd1NTex+mFx62bh m3+A== X-Gm-Message-State: AOAM531hgb3CrESmh9QRhbCTgh7rHuMNdPYGz292wx57+8ypj/sLZhSU qQGU//3EiSm2AROnYOBykj3v4x63Hv4= X-Google-Smtp-Source: ABdhPJxhzjt2b4JpAP5y08pLkv/ZLh6VuVP+HWQ9UgMTyxUq1vcrNg8BwCWVmSqBUvmU5OQowhuk1Q== X-Received: by 2002:a63:3d8c:: with SMTP id k134mr30384423pga.394.1634680762159; Tue, 19 Oct 2021 14:59:22 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id bf7sm139325pjb.14.2021.10.19.14.59.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Oct 2021 14:59:21 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v5 13/14] ARM: bcm: Removed forced select of interrupt controllers Date: Tue, 19 Oct 2021 14:58:54 -0700 Message-Id: <20211019215855.1920099-14-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019215855.1920099-1-f.fainelli@gmail.com> References: <20211019215855.1920099-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Now that the various second level interrupt controllers have been moved to IRQCHIP_PLATFORM_DRIVER and they do default to ARCH_BRCMSTB and ARCH_BCM2835 where relevant, remove their forced selection from the machine entry to allow an user to build them as modules. Signed-off-by: Florian Fainelli --- arch/arm/mach-bcm/Kconfig | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig index 2890e61b2b46..bd3f82788ebc 100644 --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig @@ -161,7 +161,6 @@ config ARCH_BCM2835 select ARM_TIMER_SP804 select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7 select BCM2835_TIMER - select BRCMSTB_L2_IRQ select PINCTRL select PINCTRL_BCM2835 select MFD_CORE @@ -209,9 +208,6 @@ config ARCH_BRCMSTB select ARM_GIC select ARM_ERRATA_798181 if SMP select HAVE_ARM_ARCH_TIMER - select BCM7038_L1_IRQ - select BRCMSTB_L2_IRQ - select BCM7120_L2_IRQ select ZONE_DMA if ARM_LPAE select SOC_BRCMSTB select SOC_BUS From patchwork Tue Oct 19 21:58:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 12571225 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8A67C433EF for ; Tue, 19 Oct 2021 21:59:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D215D60FDA for ; Tue, 19 Oct 2021 21:59:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230298AbhJSWCA (ORCPT ); Tue, 19 Oct 2021 18:02:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230190AbhJSWBm (ORCPT ); Tue, 19 Oct 2021 18:01:42 -0400 Received: from mail-pg1-x531.google.com (mail-pg1-x531.google.com [IPv6:2607:f8b0:4864:20::531]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7E69AC0613E3; Tue, 19 Oct 2021 14:59:24 -0700 (PDT) Received: by mail-pg1-x531.google.com with SMTP id g184so20631668pgc.6; Tue, 19 Oct 2021 14:59:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2G1kdri23kWnlj1enPufIZN1leyxpMasJ2EyRU0acfw=; b=Y5clh4hJuQyM8eC5A+hgiBCp367+x4gkBxd+43EC3gI8EhkdW9oupc9VprJN88A+SS MXTHIQCNafVT3DbL2pCZSy3fiLeF0SEKKp0m6MVaa6nk70CD2U8zGmq/1cEi5NM/7I3X DVM4WarHYUHHtzY263A4Kz2rszp3lsNoKs0v2rvv6hfDsyAFR7ILK2Ov1P81G/OXu7+n UuW4Sa46ne3mVkOBB09KzfcE/ffd4WXtx3d1ugUwrqtf/VI+0bfPdTMw128tcJ4+X95R a1/YA5eKCmN+kkII9t5ISBDNRfN5T4/yLr6NPGd1/mT3rgLbS5u860+VgdrpyHIxNta2 A1sA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2G1kdri23kWnlj1enPufIZN1leyxpMasJ2EyRU0acfw=; b=NXnCuJBOwvWguOJFx7y33gqrKsjkoonVytNu0mvAtTpbyVnxr/RJNBCe0FCseZ5toY hSDlW4ntQatClg4+Ubguq2/DCNm0ZBXRK30e9Y/cruOKWMCYOK7GowOkUnNKfxl45qjg rQBlSTBablsSuYAIynsRCvAq9KpgOPfXlMvTeOH6tj2D58xokiXQNeUkwo+X5gZ+R1tE 4V1MpWKUdyrkAMcttKrrNEPa6g55D0TrMPDvdAqtJOVRv60KwqLu4nLFe5wzBMOygtlo ojxgnn5inxu5lUVtM5KHX1FS3Xeyq9dssgkEs83o3LH12TvgXtG/MuX7KSwP9/vJpOvR iWlA== X-Gm-Message-State: AOAM531C2bzl/ZKkjDSWsq4PzxBbFwx3TbHYjdIqA+2kU86ylTPlVm8D RkeuECv4ZTcz8wkkFdRhzjLkUYNkhWI= X-Google-Smtp-Source: ABdhPJxR3R8hw1YDkPeaq+1XWGII38BdkuxodKSXvnmpG9QGveZCyXnqmGNQGOxR6w5CknBLqcfbnA== X-Received: by 2002:a63:7514:: with SMTP id q20mr5138672pgc.232.1634680763731; Tue, 19 Oct 2021 14:59:23 -0700 (PDT) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id bf7sm139325pjb.14.2021.10.19.14.59.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Oct 2021 14:59:23 -0700 (PDT) From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Russell King , Catalin Marinas , Will Deacon , Thomas Bogendoerfer , Thomas Gleixner , Marc Zyngier , Rob Herring , Frank Rowand , linux-arm-kernel@lists.infradead.org (moderated list:ARM SUB-ARCHITECTURES), linux-mips@vger.kernel.org (open list:MIPS), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE) Subject: [PATCH v5 14/14] irqchip: Fix kernel-doc parameter typo for IRQCHIP_DECLARE Date: Tue, 19 Oct 2021 14:58:55 -0700 Message-Id: <20211019215855.1920099-15-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211019215855.1920099-1-f.fainelli@gmail.com> References: <20211019215855.1920099-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The documentation refers to "compstr" when we have the parameter named "compat", fix the typo. Signed-off-by: Florian Fainelli --- include/linux/irqchip.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/irqchip.h b/include/linux/irqchip.h index 67351aac65ef..ccf32758ea85 100644 --- a/include/linux/irqchip.h +++ b/include/linux/irqchip.h @@ -23,7 +23,7 @@ * * @name: name that must be unique across all IRQCHIP_DECLARE of the * same file. - * @compstr: compatible string of the irqchip driver + * @compat: compatible string of the irqchip driver * @fn: initialization function */ #define IRQCHIP_DECLARE(name, compat, fn) OF_DECLARE_2(irqchip, name, compat, fn)