From patchwork Mon Oct 25 09:07:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sandeep Maheswaram X-Patchwork-Id: 12581103 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB03FC433EF for ; Mon, 25 Oct 2021 09:08:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D431160F46 for ; Mon, 25 Oct 2021 09:08:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232455AbhJYJKb (ORCPT ); Mon, 25 Oct 2021 05:10:31 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:36225 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232402AbhJYJK1 (ORCPT ); Mon, 25 Oct 2021 05:10:27 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1635152886; x=1666688886; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=+lxKegXvS+9F21/eCMPAAOXUr+98ZOCrhEjp4t5oUTk=; b=ea1KH00+GRg9F5SZNuaQAlZxDv+f/XVDb/DwnWQrebgUwx8NPXi05btE CnibTxUb/4T1thkjolJVttieQ4KgBqsWfBNIAHByvsaSV70VugRJ1ls1V TN294Y9FCCcieSLYVlDFXxMGaDNJ2HtTeoMLLmYoYRXMP11Dx5oToRJYy c=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 25 Oct 2021 02:08:06 -0700 X-QCInternal: smtphost Received: from nalasex01a.na.qualcomm.com ([10.47.209.196]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2021 02:08:04 -0700 Received: from c-sanm-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.7; Mon, 25 Oct 2021 02:07:59 -0700 From: Sandeep Maheswaram To: Rob Herring , Andy Gross , "Bjorn Andersson" , Greg Kroah-Hartman , Felipe Balbi , Stephen Boyd , Doug Anderson , "Matthias Kaehlcke" CC: , , , , , , Sandeep Maheswaram Subject: [PATCH v2 1/3] dt-bindings: usb: qcom,dwc3: Add multi-pd bindings for dwc3 qcom Date: Mon, 25 Oct 2021 14:37:29 +0530 Message-ID: <1635152851-23660-2-git-send-email-quic_c_sanm@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1635152851-23660-1-git-send-email-quic_c_sanm@quicinc.com> References: <1635152851-23660-1-git-send-email-quic_c_sanm@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add multi pd bindings to set performance state for cx domain to maintain minimum corner voltage for USB clocks. Signed-off-by: Sandeep Maheswaram --- v2: Make cx domain mandatory. Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 2bdaba0..fd595a8 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -42,7 +42,13 @@ properties: power-domains: description: specifies a phandle to PM domain provider node - maxItems: 1 + minItems: 2 + items: + - description: cx power domain + - description: USB gdsc power domain + + required-opps: + description: specifies the performance state to power domain clocks: description: From patchwork Mon Oct 25 09:07:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sandeep Maheswaram X-Patchwork-Id: 12581105 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4895BC433F5 for ; Mon, 25 Oct 2021 09:08:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2F17E61050 for ; Mon, 25 Oct 2021 09:08:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232410AbhJYJKf (ORCPT ); Mon, 25 Oct 2021 05:10:35 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:36225 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232470AbhJYJKd (ORCPT ); Mon, 25 Oct 2021 05:10:33 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1635152891; x=1666688891; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=CjAdXMnakyluZbjWl5Xa5MqruQNYhsEtDiz/4+GVDDg=; b=R6xGrtl5N29z+JxIgjZMB63H8QmRD8AoI2Zw6LW0cU+CUBblnq+NjLur DyBOdcKJXAY/UiJF50KSYv7gXsCokE7n6aV4pHq7HgfvVypbUbkUAu4ke CjrzIjU+vMjQ7kINJJFG9JJPPZfqP2Q9zasKLoFU4kxLuQ64XDIXqfhxP 4=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 25 Oct 2021 02:08:11 -0700 X-QCInternal: smtphost Received: from nalasex01a.na.qualcomm.com ([10.47.209.196]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2021 02:08:10 -0700 Received: from c-sanm-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.7; Mon, 25 Oct 2021 02:08:04 -0700 From: Sandeep Maheswaram To: Rob Herring , Andy Gross , "Bjorn Andersson" , Greg Kroah-Hartman , Felipe Balbi , Stephen Boyd , Doug Anderson , "Matthias Kaehlcke" CC: , , , , , , Sandeep Maheswaram Subject: [PATCH v2 2/3] usb: dwc3: qcom: Add multi-pd support Date: Mon, 25 Oct 2021 14:37:30 +0530 Message-ID: <1635152851-23660-3-git-send-email-quic_c_sanm@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1635152851-23660-1-git-send-email-quic_c_sanm@quicinc.com> References: <1635152851-23660-1-git-send-email-quic_c_sanm@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add multi pd support to set performance state for cx domain to maintain minimum corner voltage for USB clocks. Signed-off-by: Sandeep Maheswaram --- v2: Added error handling and detach function.Used attach_by_id function. drivers/usb/dwc3/dwc3-qcom.c | 87 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 9abbd01..efbd34a 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -89,6 +90,14 @@ struct dwc3_qcom { bool pm_suspended; struct icc_path *icc_path_ddr; struct icc_path *icc_path_apps; + + /* power domain for cx */ + struct device *pd_cx; + struct device_link *pd_link_cx; + + /* power domain for usb gdsc */ + struct device *pd_usb_gdsc; + struct device_link *pd_link_usb_gdsc; }; static inline void dwc3_qcom_setbits(void __iomem *base, u32 offset, u32 val) @@ -521,6 +530,79 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev) return 0; } +static int dwc3_qcom_attach_pd(struct device *dev) +{ + struct dwc3_qcom *qcom = dev_get_drvdata(dev); + int ret; + + /* Do nothing when in a single power domain */ + if (dev->pm_domain) + return 0; + + qcom->pd_cx = dev_pm_domain_attach_by_id(dev, 0); + if (IS_ERR_OR_NULL(qcom->pd_cx)) { + dev_err(dev, "Failed to attach cx pd.\n"); + + if (!qcom->pd_cx) + return -EINVAL; + else + return PTR_ERR(qcom->pd_cx); + } + + qcom->pd_link_cx = device_link_add(dev, qcom->pd_cx, + DL_FLAG_STATELESS | + DL_FLAG_PM_RUNTIME | + DL_FLAG_RPM_ACTIVE); + if (!qcom->pd_link_cx) { + dev_err(dev, "Failed to add device_link to cx pd.\n"); + ret = -EINVAL; + goto detach_cx_pd; + } + + qcom->pd_usb_gdsc = dev_pm_domain_attach_by_id(dev, 1); + if (IS_ERR_OR_NULL(qcom->pd_usb_gdsc)) { + dev_err(dev, "Failed to attach usb gdsc pd.\n"); + if (!qcom->pd_usb_gdsc) + ret = -EINVAL; + else + ret = PTR_ERR(qcom->pd_usb_gdsc); + goto del_cx_link; + } + + qcom->pd_link_usb_gdsc = device_link_add(dev, qcom->pd_usb_gdsc, + DL_FLAG_STATELESS | + DL_FLAG_PM_RUNTIME | + DL_FLAG_RPM_ACTIVE); + if (!qcom->pd_link_usb_gdsc) { + dev_err(dev, "Failed to add device_link to usb gdsc pd.\n"); + ret = -EINVAL; + goto detach_gdsc_pd; + } + + return 0; + +detach_gdsc_pd: + dev_pm_domain_detach(qcom->pd_usb_gdsc, true); +del_cx_link: + device_link_del(qcom->pd_link_cx); +detach_cx_pd: + dev_pm_domain_detach(qcom->pd_cx, true); + return ret; +} + +static void dwc3_qcom_detach_pd(struct device *dev) +{ + struct dwc3_qcom *qcom = dev_get_drvdata(dev); + + if (dev->pm_domain) + return; + + device_link_del(qcom->pd_link_usb_gdsc); + dev_pm_domain_detach(qcom->pd_usb_gdsc, true); + device_link_del(qcom->pd_link_cx); + dev_pm_domain_detach(qcom->pd_cx, true); +} + static int dwc3_qcom_clk_init(struct dwc3_qcom *qcom, int count) { struct device *dev = qcom->dev; @@ -837,6 +919,10 @@ static int dwc3_qcom_probe(struct platform_device *pdev) if (ret) goto interconnect_exit; + ret = dwc3_qcom_attach_pd(dev); + if (ret) + goto interconnect_exit; + device_init_wakeup(&pdev->dev, 1); qcom->is_suspended = false; pm_runtime_set_active(dev); @@ -878,6 +964,7 @@ static int dwc3_qcom_remove(struct platform_device *pdev) } qcom->num_clocks = 0; + dwc3_qcom_detach_pd(dev); dwc3_qcom_interconnect_exit(qcom); reset_control_assert(qcom->resets); From patchwork Mon Oct 25 09:07:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sandeep Maheswaram X-Patchwork-Id: 12581107 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A62E0C433F5 for ; Mon, 25 Oct 2021 09:08:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 932F860EE9 for ; Mon, 25 Oct 2021 09:08:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232449AbhJYJKi (ORCPT ); Mon, 25 Oct 2021 05:10:38 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:36225 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232479AbhJYJKh (ORCPT ); Mon, 25 Oct 2021 05:10:37 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1635152896; x=1666688896; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=P4bXBTYrltaXp9PhngK0POqzvllY4fXOthFXfnrTvcA=; b=rI0SSz027FZKTXm2hRUPFPwHSc5Bq8wiZQjF2da+eaGt7Yjf562/U6Ox a6yujMW5r0RgILeBQcla89+n4wM7T+WNdYjsctiFyox9A2MShHUCdunLF QEkpfgfnQqt0b9UCNcAoPLb1WzFKl0zvzkltNw5CtkhTeeF/jrtyppUTn 4=; Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 25 Oct 2021 02:08:16 -0700 X-QCInternal: smtphost Received: from nalasex01a.na.qualcomm.com ([10.47.209.196]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2021 02:08:15 -0700 Received: from c-sanm-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.7; Mon, 25 Oct 2021 02:08:09 -0700 From: Sandeep Maheswaram To: Rob Herring , Andy Gross , "Bjorn Andersson" , Greg Kroah-Hartman , Felipe Balbi , Stephen Boyd , Doug Anderson , "Matthias Kaehlcke" CC: , , , , , , Sandeep Maheswaram Subject: [PATCH v2 3/3] arm64: dts: qcom: sc7280: Add cx power domain support Date: Mon, 25 Oct 2021 14:37:31 +0530 Message-ID: <1635152851-23660-4-git-send-email-quic_c_sanm@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1635152851-23660-1-git-send-email-quic_c_sanm@quicinc.com> References: <1635152851-23660-1-git-send-email-quic_c_sanm@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add multi pd support to set performance state for cx domain to maintain minimum corner voltage for USB clocks. Signed-off-by: Sandeep Maheswaram --- v2: Changed rpmhd_opp_svs to rmphd_opp_nom for cx domain. arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index d74a4c8..9e3b6ad 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2538,7 +2538,8 @@ interrupt-names = "hs_phy_irq", "dp_hs_phy_irq", "dm_hs_phy_irq", "ss_phy_irq"; - power-domains = <&gcc GCC_USB30_PRIM_GDSC>; + power-domains = <&rpmhpd SC7280_CX>, <&gcc GCC_USB30_PRIM_GDSC>; + required-opps = <&rpmhpd_opp_svs>, <>; resets = <&gcc GCC_USB30_PRIM_BCR>;