From patchwork Sat Dec 15 14:25:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10732235 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F023C14DE for ; Sat, 15 Dec 2018 14:26:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DF9062A0C8 for ; Sat, 15 Dec 2018 14:26:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D1E0F2A824; Sat, 15 Dec 2018 14:26:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6F7262A0C8 for ; Sat, 15 Dec 2018 14:26:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730119AbeLOO0b (ORCPT ); Sat, 15 Dec 2018 09:26:31 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:34939 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729687AbeLOO0a (ORCPT ); Sat, 15 Dec 2018 09:26:30 -0500 Received: by mail-wr1-f67.google.com with SMTP id 96so8083643wrb.2; Sat, 15 Dec 2018 06:26:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=BGQ9yNjIn4OO2QkKvR9d+Wcmfw6vmKSB2+xDHiMuT5k=; b=AQW3tVRp1mLQ1E0hyOBl/R5RB7pHq5yDVIJOXy4hrqzmFqhx4J3htepDo+uH7a4K/Y Vn4oH9zu8D5Kg61rJ0X0BZDIIq/UnjwVO9KG8WC7+5hLmC3XKGDNJ6maNuK9GrjdJKSD Zz1SqxQdX881GMAIUKSpmOUzOePtbRKpddlE/B0+70CaAG6NmLg0kPNa+M3PjGUosncC 2rC1NYUFtCNrgI6iG5alucVjYmplDZ0Eqm3FFYWTPLX7abG0XoAa12m+uCP5p7qP2A9E q8TRiAXhgHUSPuF5qAvC9Pi8T2g1gsnYD2cyLREahh34ocUpIp9TM94Wnz8c7QTUKH6W rvTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=BGQ9yNjIn4OO2QkKvR9d+Wcmfw6vmKSB2+xDHiMuT5k=; b=YjLBzYnaa6odG6geZGzoanBrJOAW3lyoYzhWu3jkTXCXRDduH/L/sYvi1lquxkflaI dqrm8Ow2WXu9TFQci/LzlxMqBK6Tdineohdo/j6HeyDPYV9VhsfFxbujoZ13VEOY4OqI RL03n5HCctNlQNjA45ym6ok7aSH9Fxcoe3OdWk5E6C+d56cdH/RWy5sf708kjNvzbgqn 6B1CUg0e8Mo9EnEKzmDk80DK4aNgBpEW2NC0KLgyetdxyQrXNQYEjvAtjcOOFQ2J8aiA UCH2LMdrUMSjc1uNzYPr6fN9/aoh3CmtzJd4Pu+wAMfkM/qFkJBdbdLMRoorECVX1/Vg cIAw== X-Gm-Message-State: AA+aEWY2+xjbVeVnKkNzgOW2CY8A7lP9U4sXzddE1Zq7cAf4wT5JZhpC LArUd4QU2zS9tojPC30VnYDUGTDV X-Google-Smtp-Source: AFSGD/W4lLwUE35wlT1PkNENTCt1Fa5qPrZmH2HFuzGYLfxzRXyDCiVEl9KlMHN6kK3P5xxJ/giRdQ== X-Received: by 2002:a05:6000:11c3:: with SMTP id i3mr5984040wrx.221.1544883987108; Sat, 15 Dec 2018 06:26:27 -0800 (PST) Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz. [86.49.110.70]) by smtp.gmail.com with ESMTPSA id c7sm15401225wre.64.2018.12.15.06.26.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 15 Dec 2018 06:26:26 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH V3 01/14] gpio: pca953x: Deduplicate the bank_shift Date: Sat, 15 Dec 2018 15:25:52 +0100 Message-Id: <20181215142605.15397-2-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> References: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The bank_shift = fls(...) code was duplicated in the driver 5 times, pull it into separate function. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski Reviewed-by: Kieran Bingham --- V2: Replace bank_size with bank_shift in commit message V3: No change --- drivers/gpio/gpio-pca953x.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 540166443c34..afe6de4c48c4 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -159,11 +159,16 @@ struct pca953x_chip { int (*read_regs)(struct pca953x_chip *, int, u8 *); }; +static int pca953x_bank_shift(struct pca953x_chip *chip) +{ + return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); +} + static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, int off) { int ret; - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); + int bank_shift = pca953x_bank_shift(chip); int offset = off / BANK_SZ; ret = i2c_smbus_read_byte_data(chip->client, @@ -182,7 +187,7 @@ static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, int off) { int ret; - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); + int bank_shift = pca953x_bank_shift(chip); int offset = off / BANK_SZ; ret = i2c_smbus_write_byte_data(chip->client, @@ -221,7 +226,7 @@ static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) { - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); + int bank_shift = pca953x_bank_shift(chip); int addr = (reg & PCAL_GPIO_MASK) << bank_shift; int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; @@ -265,7 +270,7 @@ static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val) { - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); + int bank_shift = pca953x_bank_shift(chip); int addr = (reg & PCAL_GPIO_MASK) << bank_shift; int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; @@ -402,13 +407,12 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits) { struct pca953x_chip *chip = gpiochip_get_data(gc); + int bank_shift = pca953x_bank_shift(chip); unsigned int bank_mask, bank_val; - int bank_shift, bank; + int bank; u8 reg_val[MAX_BANK]; int ret; - bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); - mutex_lock(&chip->i2c_lock); memcpy(reg_val, chip->reg_output, NBANK(chip)); for (bank = 0; bank < NBANK(chip); bank++) { From patchwork Sat Dec 15 14:25:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10732237 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B7E2014E2 for ; Sat, 15 Dec 2018 14:26:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A87702A0C8 for ; Sat, 15 Dec 2018 14:26:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9CD6F2A822; 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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id c7sm15401225wre.64.2018.12.15.06.26.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 15 Dec 2018 06:26:27 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH V3 02/14] gpio: pca953x: Fix AI overflow on PCAL6524 Date: Sat, 15 Dec 2018 15:25:53 +0100 Message-Id: <20181215142605.15397-3-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> References: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The PCAL_PINCTRL_MASK is too large. The extended register block on PCAL6524, which is the largest chip with this block, has the block limited to address range 0x40..0x7f. This is because the bit 7 in the command register is used for the Address Increment functionality. Trim the mask to 0x60 to match the datasheet and to prevent accidental overwrite of the AI bit. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski Reviewed-by: Bartosz Golaszewski --- V2: Add RB from Bart V3: No change --- drivers/gpio/gpio-pca953x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index afe6de4c48c4..ec9fd11cd21c 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -58,7 +58,7 @@ #define PCA_GPIO_MASK 0x00FF #define PCAL_GPIO_MASK 0x1f -#define PCAL_PINCTRL_MASK 0xe0 +#define PCAL_PINCTRL_MASK 0x60 #define PCA_INT 0x0100 #define PCA_PCAL 0x0200 From patchwork Sat Dec 15 14:25:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10732239 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B4B7E14DE for ; Sat, 15 Dec 2018 14:26:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A316E2A0C8 for ; Sat, 15 Dec 2018 14:26:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 97B7C2A822; Sat, 15 Dec 2018 14:26:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 30FD82A0C8 for ; Sat, 15 Dec 2018 14:26:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730145AbeLOO0c (ORCPT ); Sat, 15 Dec 2018 09:26:32 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:37455 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730037AbeLOO0c (ORCPT ); Sat, 15 Dec 2018 09:26:32 -0500 Received: by mail-wr1-f65.google.com with SMTP id s12so7633087wrt.4; Sat, 15 Dec 2018 06:26:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=do3KTnLDgvxNSCcH3TW+HHFTH6vyfh6ObjgTjsGaoeM=; b=ohebmE/TX7mCV3mDk4EZiGf6zJbHpbq+eacQRrlLLLunexP8FmROfoTtYKHRGgxn47 GEST6o/Px0WZ9D9LMPfju51VBE61vwq+jQVr0WP9SyjX7otexmBfIJPmbvibYvIUtjmE vjCZO2rmVv72c5uWWSTbOM+Cxo/9BHiUkSAbIX1f16VszBRwT3kGooBsRzhBN6TNaDZI VJwVkGy3+AZTUKDw1UcG87FHTsmQNxLmhsqIMrheb4JvDYjc4SBJMmN7MBYoI5tnh6y9 f0qkaMZ+fwK02LVi6JsQ0uudGccc5hL2C5NPr7ea36eyK93QomAC3aaF7GjOMoxTKeZ+ C/lA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=do3KTnLDgvxNSCcH3TW+HHFTH6vyfh6ObjgTjsGaoeM=; b=RudSrEpZ0k7I4T010iD8r87Q8p9BahfMebhRVWMBIJV8Br90Lu1+2v1YiBlWTSqSEK 4uBF/jWxMdDWq6jafWjiFYPa2Sk9Q5F6Bv3pB042wfuxfHDj3B/mZRUFzLR/WRPH92P9 67mO54B5kB6pqJNKYo+E5yMZo+q7AGojYdlT3KlaneJiHjkfmHcbeEMMJwHKXauuvibH 06y/RWhg+wLYsbfa9bNs6yMoAAlthA4F1M0HUU2cxatRX/j9aDc8vPMclk4+PFriqxkv Sdolmg6BoDq14AZwaqPoGQQ7XblWDmLYU7hu8+wjb00W3tRWMUyM4IZgWb/01ZOmTBLE vYfQ== X-Gm-Message-State: AA+aEWZnKVjr9P3bsXk5iEZUSx8cYTEdou5IBQc6nmmaCOC/q/xfgAYC EF7SwpbBqmAH+I4tzNEJ2Pj6NelK X-Google-Smtp-Source: AFSGD/Vgm5x4qJs5LHLNiHrr9KNwee5veuqZX+5gm4ilBzNQSgjntH8zSTLHLd6ycVgfpS1V3vFX8A== X-Received: by 2002:adf:e78f:: with SMTP id n15mr5814055wrm.115.1544883989800; Sat, 15 Dec 2018 06:26:29 -0800 (PST) Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz. [86.49.110.70]) by smtp.gmail.com with ESMTPSA id c7sm15401225wre.64.2018.12.15.06.26.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 15 Dec 2018 06:26:28 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH V3 03/14] gpio: pca953x: Repair multi-byte IO address increment on PCA9575 Date: Sat, 15 Dec 2018 15:25:54 +0100 Message-Id: <20181215142605.15397-4-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> References: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The multi-byte IO on various pca953x chips requires the auto-increment bit, while other chips toggle the LSbit automatically. Note that LSbit toggling only alternates between two registers during the IO, it is not the same as address auto-increment. The driver currently assumes that #gpios > 16 implies auto-increment, while #gpios <= 16 implies LSbit toggling. This is incorrect at there are chips with 16 GPIOs which require the auto-increment bit. The PCA9575, according to NXP datasheet rev. 4.2 from 16 April 2015, section 7.3 Command Register, the bit 7 in command register is the auto-increment bit, which allows programming multiple registers sequentially. Set this bit both in pca953x_gpio_set_multiple(), where it fixes the multi register programming, and in pca957x_write_regs_16(), where is simplifies the function. In fact, the pca957x_write_regs_16() now looks rather similar to pca953x_write_regs_24() and pca953x_write_regs_16(), which is intended for subsequent patches. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- V2: No change V3: No change --- drivers/gpio/gpio-pca953x.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index ec9fd11cd21c..8f6478f4545f 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -215,13 +215,10 @@ static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) { - int ret; - - ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]); - if (ret < 0) - return ret; + u32 regaddr = (reg << 1) | REG_ADDR_AI; - return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]); + return i2c_smbus_write_i2c_block_data(chip->client, regaddr, + NBANK(chip), val); } static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) @@ -408,6 +405,7 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, { struct pca953x_chip *chip = gpiochip_get_data(gc); int bank_shift = pca953x_bank_shift(chip); + u32 regaddr = chip->regs->output << bank_shift; unsigned int bank_mask, bank_val; int bank; u8 reg_val[MAX_BANK]; @@ -426,8 +424,13 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, } } - ret = i2c_smbus_write_i2c_block_data(chip->client, - chip->regs->output << bank_shift, + /* PCA9575 needs address-increment on multi-byte writes */ + if ((PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) && + (NBANK(chip) > 1)) { + regaddr |= REG_ADDR_AI; + } + + ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr, NBANK(chip), reg_val); if (ret) goto exit; From patchwork Sat Dec 15 14:25:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10732241 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9E6ED14DE for ; Sat, 15 Dec 2018 14:26:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8E1242A0C8 for ; Sat, 15 Dec 2018 14:26:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 82E862A822; Sat, 15 Dec 2018 14:26:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2F4282A0C8 for ; Sat, 15 Dec 2018 14:26:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730196AbeLOO0d (ORCPT ); Sat, 15 Dec 2018 09:26:33 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:39374 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729966AbeLOO0d (ORCPT ); Sat, 15 Dec 2018 09:26:33 -0500 Received: by mail-wr1-f67.google.com with SMTP id t27so8074125wra.6; Sat, 15 Dec 2018 06:26:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZNYURw3tH9DmBORc9fD+7ODj82imGs8g5WxeCqaGPr8=; b=azxt7qjkQzuXJsbWwAHrMWeGG3WX3aD7Xdgkn3hQ+6RJ84mAX8nfWW05KpS11VgD/h U1mbvUUkbOaC1u34XXR0n0PYUHFR/co9PQ1dSSe1G+GmNn5/IDT3QjLbIuXayt2jDfmZ PkIh7/+GGDFAhqRPkTkiyamPdAM1LmLSNqoD3TannwrrONYLbqnN6k9w/PmjEpdqM2eB NVefd4sY+r+iruc+OvHZkkkUvxiuolA5IRoxGfGhO9C4VodK99agPmRXRJkXg8zU/VLS qMcFOMQZuECGuLL7ZierYDAbuTk6/36Sf8zxi1Yb+hAPVk/TjZumMzIOEtzf1M2WG7r0 42ow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZNYURw3tH9DmBORc9fD+7ODj82imGs8g5WxeCqaGPr8=; b=TC4HD6dt2YvT311s2VqKGWLDozFt4y0U/+RgbXEX003VJaHRH7RLMhy9sClIAeYAFs q1pyh5ihpOp/YcRumb07RkqLmF0XDetmyJgYdVyuUT89DVs0wo3bVR8wMFZE9FBOckMj AlIl+1yoxqp0jgCZ7D3Pu8mrm9ijPCzeC1eqgtTzbsLNSiidf7zM/9Vu66b17khghM+f zD0Qm8QvtGFqv6pGhtB81cakyJVcb5pLWygXMMsO2fidh7KwgJJgQSUKYWSzvjNFYYXZ zQxggoMIP0faVGo8MejaMsHgQxbVJvfVeamNxn2m1TU8jxqKo302PaQpl/+M+QO70/Ps EHrA== X-Gm-Message-State: AA+aEWbzRsg9GoS0gXsAD7bScwvYabdfTgS3VIHTyQ9BsNx98dBmf2tq 4K1TTQ0uqvhu/NdcwqnzhA4NKIr/ X-Google-Smtp-Source: AFSGD/XI2beqfvo0VD6W7MnULa2p0KGZLnqq3lp/K0lYDK+kmoGl0w1yo4vV/IwI7K7/Zv6Xh1ZLdg== X-Received: by 2002:adf:b6a1:: with SMTP id j33mr5652542wre.55.1544883991210; Sat, 15 Dec 2018 06:26:31 -0800 (PST) Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz. [86.49.110.70]) by smtp.gmail.com with ESMTPSA id c7sm15401225wre.64.2018.12.15.06.26.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 15 Dec 2018 06:26:30 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH V3 04/14] gpio: pca953x: Unify pca95{3,7}x_write_regs_16() Date: Sat, 15 Dec 2018 15:25:55 +0100 Message-Id: <20181215142605.15397-5-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> References: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP At this point, these two functions only differ in whether they do or do not set the address increment bit on PCA9575. Merge these two functions together to simplify the code a bit. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- V2: No change V3: No change --- drivers/gpio/gpio-pca953x.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 8f6478f4545f..7288a589a6b7 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -208,14 +208,11 @@ static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) { - u16 word = get_unaligned((u16 *)val); + u32 regaddr = (reg << 1); - return i2c_smbus_write_word_data(chip->client, reg << 1, word); -} - -static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) -{ - u32 regaddr = (reg << 1) | REG_ADDR_AI; + /* PCA9575 needs address-increment on multi-byte writes */ + if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) + regaddr |= REG_ADDR_AI; return i2c_smbus_write_i2c_block_data(chip->client, regaddr, NBANK(chip), val); @@ -892,10 +889,7 @@ static int pca953x_probe(struct i2c_client *client, chip->write_regs = pca953x_write_regs_24; chip->read_regs = pca953x_read_regs_24; } else { - if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) - chip->write_regs = pca953x_write_regs_16; - else - chip->write_regs = pca957x_write_regs_16; + chip->write_regs = pca953x_write_regs_16; chip->read_regs = pca953x_read_regs_16; } From patchwork Sat Dec 15 14:25:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10732243 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7B40714DE for ; Sat, 15 Dec 2018 14:26:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 67D092A0C8 for ; Sat, 15 Dec 2018 14:26:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 589DD2A822; Sat, 15 Dec 2018 14:26:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E31962A0C8 for ; Sat, 15 Dec 2018 14:26:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730252AbeLOO0f (ORCPT ); Sat, 15 Dec 2018 09:26:35 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:44734 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729966AbeLOO0f (ORCPT ); Sat, 15 Dec 2018 09:26:35 -0500 Received: by mail-wr1-f66.google.com with SMTP id z5so8057583wrt.11; Sat, 15 Dec 2018 06:26:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uJQ10kolOpwc6gQ7lRBdlTd/5YvWveGTvKblNVYSap0=; b=nIVGRIqQ9v13EpQFYlO0kQxVdB1h1n9Zst3UBSw6WmZG5fcv+NGjnNwnpMd43pURGP WC+gl99lHCIVk1mQDSMtsqm++uqb/p4MW7sUJuC4avVKYOTqq3bKpzE+nNeYfIvkTvMh Yy9g5rmXdzQMAa68MS+NU0P20kgOqfGAGStAr8okVHmv1V9/IXR8ddAPMZqWPZIyqgl5 3n8eBP8jPOXZD6HIHbB0ivUSoz2KXr7XRQRkqDsaUp78w1H3GyvY56+8CsuFj2lYMHxD 9JU9hi+DxYncnZbhDIP2ZV/H+7gIk9vlI7Z7hl2RU2MrMW43c7MUzstZ/LyKXEmLg1E2 8Kig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=uJQ10kolOpwc6gQ7lRBdlTd/5YvWveGTvKblNVYSap0=; b=Ek/Ys26utXmueTml0Cy78ezbQpeHdtB4xuooa4dRnIq0oA4SsDWtnulQ5NugKeJfhL u2XzGRL+VOIqE6XK6VG6T53OrOGW6gX4/eZDJA2AzmPwC3OQr2+wkupxmHb74xiWwrv3 xEgTtDciNATjT6D9RmbHxggdmy+g4I+GHsUb7bNf6+K89BkKltUZy22zRGLwftJ+UdQq PbGiqx28b/aZ+tiS+Tn2aysGEWrm+sUOT36wQDda+n35NSjKokANPrgkOCDHLGlatupN fweOjetiw2a99JBFoZa6uBhYvJZp20Bh5LxyYWNwvrskSx/Lcy2rkdWIf6kRLtEbHlZg WudA== X-Gm-Message-State: AA+aEWbfpG/JwwbzNw7csOowcinVR+qdIx8RD0fwYtZUvafv/vC9NrqR m44OnN5bTX3HkIsAesTzQb0mhFH+ X-Google-Smtp-Source: AFSGD/UPnd7e1WmwSDdR3rIDVqWtE1DLBZciQ3uArafw6ts+kODVdC+VIYuDzxHRYjqXuPQgLCJViA== X-Received: by 2002:a5d:51ca:: with SMTP id n10mr5324255wrv.316.1544883992435; Sat, 15 Dec 2018 06:26:32 -0800 (PST) Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz. [86.49.110.70]) by smtp.gmail.com with ESMTPSA id c7sm15401225wre.64.2018.12.15.06.26.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 15 Dec 2018 06:26:31 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH V3 05/14] gpio: pca953x: Unify pca953x_{read,write}_regs_{16,24}() Date: Sat, 15 Dec 2018 15:25:56 +0100 Message-Id: <20181215142605.15397-6-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> References: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP At this point, these two functions only differ in whether they do or do not set the address increment bit. The 16 GPIO case does not need to set the AI bit, except for PCA9575 on write, while the 24 GPIO and more case does set the AI bit always. Merge these two functions together to simplify the code a bit. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- V2: No change V3: No change --- drivers/gpio/gpio-pca953x.c | 49 ++++++++++++++----------------------- 1 file changed, 18 insertions(+), 31 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 7288a589a6b7..9b37dbbb63cb 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -206,9 +206,16 @@ static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val) return i2c_smbus_write_byte_data(chip->client, reg, *val); } -static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) +static int pca953x_write_regs_mul(struct pca953x_chip *chip, int reg, u8 *val) { - u32 regaddr = (reg << 1); + int bank_shift = pca953x_bank_shift(chip); + int addr = (reg & PCAL_GPIO_MASK) << bank_shift; + int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; + u8 regaddr = pinctrl | addr; + + /* Chips with 24 and more GPIOs always support Auto Increment */ + if (NBANK(chip) > 2) + regaddr |= REG_ADDR_AI; /* PCA9575 needs address-increment on multi-byte writes */ if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) @@ -218,17 +225,6 @@ static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) NBANK(chip), val); } -static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) -{ - int bank_shift = pca953x_bank_shift(chip); - int addr = (reg & PCAL_GPIO_MASK) << bank_shift; - int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; - - return i2c_smbus_write_i2c_block_data(chip->client, - pinctrl | addr | REG_ADDR_AI, - NBANK(chip), val); -} - static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) { int ret = 0; @@ -252,24 +248,18 @@ static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val) return ret; } -static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val) -{ - int ret; - - ret = i2c_smbus_read_word_data(chip->client, reg << 1); - put_unaligned(ret, (u16 *)val); - - return ret; -} - -static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val) +static int pca953x_read_regs_mul(struct pca953x_chip *chip, int reg, u8 *val) { int bank_shift = pca953x_bank_shift(chip); int addr = (reg & PCAL_GPIO_MASK) << bank_shift; int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; + u8 regaddr = pinctrl | addr; + + /* Chips with 24 and more GPIOs always support Auto Increment */ + if (NBANK(chip) > 2) + regaddr |= REG_ADDR_AI; - return i2c_smbus_read_i2c_block_data(chip->client, - pinctrl | addr | REG_ADDR_AI, + return i2c_smbus_read_i2c_block_data(chip->client, regaddr, NBANK(chip), val); } @@ -885,12 +875,9 @@ static int pca953x_probe(struct i2c_client *client, if (chip->gpio_chip.ngpio <= 8) { chip->write_regs = pca953x_write_regs_8; chip->read_regs = pca953x_read_regs_8; - } else if (chip->gpio_chip.ngpio >= 24) { - chip->write_regs = pca953x_write_regs_24; - chip->read_regs = pca953x_read_regs_24; } else { - chip->write_regs = pca953x_write_regs_16; - chip->read_regs = pca953x_read_regs_16; + chip->write_regs = pca953x_write_regs_mul; + chip->read_regs = pca953x_read_regs_mul; } if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) From patchwork Sat Dec 15 14:25:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10732245 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4985114E2 for ; Sat, 15 Dec 2018 14:26:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 386562A0C8 for ; Sat, 15 Dec 2018 14:26:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2C9802A822; Sat, 15 Dec 2018 14:26:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B40472A0C8 for ; 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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id c7sm15401225wre.64.2018.12.15.06.26.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 15 Dec 2018 06:26:32 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH V3 06/14] gpio: pca953x: Unify pca953x_{read,write}_regs_{8,mul}() Date: Sat, 15 Dec 2018 15:25:57 +0100 Message-Id: <20181215142605.15397-7-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> References: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP At this point, the pca953x_{read,write}_regs_mul() can read single bank PCA953x GPIO chips as well. Merge the _8 and _mul functions together to simplify the code a bit. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- V2: No change V3: No change --- drivers/gpio/gpio-pca953x.c | 54 ++++++------------------------------- 1 file changed, 8 insertions(+), 46 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 9b37dbbb63cb..626cbe040985 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -154,9 +154,6 @@ struct pca953x_chip { struct regulator *regulator; const struct pca953x_reg_config *regs; - - int (*write_regs)(struct pca953x_chip *, int, u8 *); - int (*read_regs)(struct pca953x_chip *, int, u8 *); }; static int pca953x_bank_shift(struct pca953x_chip *chip) @@ -201,17 +198,13 @@ static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, return 0; } -static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val) -{ - return i2c_smbus_write_byte_data(chip->client, reg, *val); -} - -static int pca953x_write_regs_mul(struct pca953x_chip *chip, int reg, u8 *val) +static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) { int bank_shift = pca953x_bank_shift(chip); int addr = (reg & PCAL_GPIO_MASK) << bank_shift; int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; u8 regaddr = pinctrl | addr; + int ret; /* Chips with 24 and more GPIOs always support Auto Increment */ if (NBANK(chip) > 2) @@ -221,15 +214,8 @@ static int pca953x_write_regs_mul(struct pca953x_chip *chip, int reg, u8 *val) if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) regaddr |= REG_ADDR_AI; - return i2c_smbus_write_i2c_block_data(chip->client, regaddr, - NBANK(chip), val); -} - -static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) -{ - int ret = 0; - - ret = chip->write_regs(chip, reg, val); + ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr, + NBANK(chip), val); if (ret < 0) { dev_err(&chip->client->dev, "failed writing register\n"); return ret; @@ -238,36 +224,20 @@ static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) return 0; } -static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val) -{ - int ret; - - ret = i2c_smbus_read_byte_data(chip->client, reg); - *val = ret; - - return ret; -} - -static int pca953x_read_regs_mul(struct pca953x_chip *chip, int reg, u8 *val) +static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) { int bank_shift = pca953x_bank_shift(chip); int addr = (reg & PCAL_GPIO_MASK) << bank_shift; int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; u8 regaddr = pinctrl | addr; + int ret; /* Chips with 24 and more GPIOs always support Auto Increment */ if (NBANK(chip) > 2) regaddr |= REG_ADDR_AI; - return i2c_smbus_read_i2c_block_data(chip->client, regaddr, - NBANK(chip), val); -} - -static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) -{ - int ret; - - ret = chip->read_regs(chip, reg, val); + ret = i2c_smbus_read_i2c_block_data(chip->client, regaddr, + NBANK(chip), val); if (ret < 0) { dev_err(&chip->client->dev, "failed reading register\n"); return ret; @@ -872,14 +842,6 @@ static int pca953x_probe(struct i2c_client *client, */ pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); - if (chip->gpio_chip.ngpio <= 8) { - chip->write_regs = pca953x_write_regs_8; - chip->read_regs = pca953x_read_regs_8; - } else { - chip->write_regs = pca953x_write_regs_mul; - chip->read_regs = pca953x_read_regs_mul; - } - if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) ret = device_pca953x_init(chip, invert); else From patchwork Sat Dec 15 14:25:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10732249 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 50FFB14DE for ; Sat, 15 Dec 2018 14:26:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3E07A2A0C8 for ; Sat, 15 Dec 2018 14:26:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 325AF2A812; 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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id c7sm15401225wre.64.2018.12.15.06.26.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 15 Dec 2018 06:26:34 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH V3 07/14] gpio: pca953x: Factor out common code from device_pca95xx_init() Date: Sat, 15 Dec 2018 15:25:58 +0100 Message-Id: <20181215142605.15397-8-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> References: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The PCA957x and PCA953x init functions are almost the same, except for the different register mapping and one extra write to BKEN register in case of PCA957x. Factor out the common code. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- V2: No change V3: No change --- drivers/gpio/gpio-pca953x.c | 35 ++++++++++++----------------------- 1 file changed, 12 insertions(+), 23 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 626cbe040985..d4b8946ea710 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -119,18 +119,21 @@ struct pca953x_reg_config { int direction; int output; int input; + int invert; }; static const struct pca953x_reg_config pca953x_regs = { .direction = PCA953X_DIRECTION, .output = PCA953X_OUTPUT, .input = PCA953X_INPUT, + .invert = PCA953X_INVERT, }; static const struct pca953x_reg_config pca957x_regs = { .direction = PCA957X_CFG, .output = PCA957X_OUT, .input = PCA957X_IN, + .invert = PCA957X_INVRT, }; struct pca953x_chip { @@ -679,13 +682,11 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, } #endif -static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) +static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert) { int ret; u8 val[MAX_BANK]; - chip->regs = &pca953x_regs; - ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output); if (ret) goto out; @@ -701,7 +702,7 @@ static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) else memset(val, 0, NBANK(chip)); - ret = pca953x_write_regs(chip, PCA953X_INVERT, val); + ret = pca953x_write_regs(chip, chip->regs->invert, val); out: return ret; } @@ -711,22 +712,7 @@ static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) int ret; u8 val[MAX_BANK]; - chip->regs = &pca957x_regs; - - ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output); - if (ret) - goto out; - ret = pca953x_read_regs(chip, chip->regs->direction, - chip->reg_direction); - if (ret) - goto out; - - /* set platform specific polarity inversion */ - if (invert) - memset(val, 0xFF, NBANK(chip)); - else - memset(val, 0, NBANK(chip)); - ret = pca953x_write_regs(chip, PCA957X_INVRT, val); + ret = device_pca95xx_init(chip, invert); if (ret) goto out; @@ -842,10 +828,13 @@ static int pca953x_probe(struct i2c_client *client, */ pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); - if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) - ret = device_pca953x_init(chip, invert); - else + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { + chip->regs = &pca953x_regs; + ret = device_pca95xx_init(chip, invert); + } else { + chip->regs = &pca957x_regs; ret = device_pca957x_init(chip, invert); + } if (ret) goto err_exit; From patchwork Sat Dec 15 14:25:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10732247 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EFF8914E2 for ; Sat, 15 Dec 2018 14:26:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DEBEF2A0C8 for ; Sat, 15 Dec 2018 14:26:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D29802A824; 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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id c7sm15401225wre.64.2018.12.15.06.26.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 15 Dec 2018 06:26:35 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH V3 08/14] gpio: pca953x: Zap ad-hoc I2C block write in multi GPIO set Date: Sat, 15 Dec 2018 15:25:59 +0100 Message-Id: <20181215142605.15397-9-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> References: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ad-hoc i2c block write can be replaced by standard register accessor function, which correctly handles all the chip details and differences. Do so to simplify the code. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- V2: No change V3: No change --- drivers/gpio/gpio-pca953x.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index d4b8946ea710..cbc3b82b9385 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -364,8 +364,6 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits) { struct pca953x_chip *chip = gpiochip_get_data(gc); - int bank_shift = pca953x_bank_shift(chip); - u32 regaddr = chip->regs->output << bank_shift; unsigned int bank_mask, bank_val; int bank; u8 reg_val[MAX_BANK]; @@ -384,14 +382,7 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, } } - /* PCA9575 needs address-increment on multi-byte writes */ - if ((PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) && - (NBANK(chip) > 1)) { - regaddr |= REG_ADDR_AI; - } - - ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr, - NBANK(chip), reg_val); + ret = pca953x_write_regs(chip, chip->regs->output, reg_val); if (ret) goto exit; From patchwork Sat Dec 15 14:26:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10732251 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3F6AA14E2 for ; Sat, 15 Dec 2018 14:26:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2E6322A0C8 for ; Sat, 15 Dec 2018 14:26:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 22C952A822; Sat, 15 Dec 2018 14:26:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9BB692A0C8 for ; Sat, 15 Dec 2018 14:26:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730313AbeLOO0l (ORCPT ); Sat, 15 Dec 2018 09:26:41 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:45995 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730290AbeLOO0l (ORCPT ); Sat, 15 Dec 2018 09:26:41 -0500 Received: by mail-wr1-f65.google.com with SMTP id t6so7894888wrr.12; Sat, 15 Dec 2018 06:26:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tztWRkvfsQqp4qFm4CC6NSKUU0zGyK7TW+JZNWp9ghg=; b=UqXXIsSCaSJ4ZOdYwTVyxTJOKyHH3CiarG3sTvyxaHMGRYdNspsc912R2DukzBYG1i 0yIprcC9xgzBrUCdhJ9d63a2XRxH6xIbvKWHHZg5TMQM2N/5Nh+HyzCSVXXn9ukznYrv jpYLLLMqkpY+/Fy6AHM+s247O+S9MOt6FAMPChaLv1JY76WHK3SoP2lV4yNI8MSR3KE0 oX9e50NnHubByK5XQ4USn1Lc9FtoMbciMYuIdMq6lZeP9+yNiRtpfbKn/715D1Vapx0f m10MI7PX1WQG2QHDxWglfsQ89KBDT2kNXRao9jNRrhgltCdFh+DEddBuTMp45hkb0uqM BJTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tztWRkvfsQqp4qFm4CC6NSKUU0zGyK7TW+JZNWp9ghg=; b=hSwjLWahUsiIKiDpHjSfEkqQDLgv4NO7aNTiXRkcoAAs8mlUAePBt+fT+epCGAeFYT ufqAR3tn+SzjEe69qtcrdqme0pXPHI0/ZufRPWsp0lQGzXvdzvhm5Ut+NXYhec+41jwv 1yC14bsFDoXReLGDJvQebPv7I1XTCAksGAU8wGi2634IqAhVS8ocz/e4golbuFmxSEy4 O4OPIIw5Vcl0UDdVENx2/89aqzQDNu30Xg9/oq4o2+B9VRauj8luvW62uZ9W49h94J0d MgLk67+V9SbAhRrFbqkCU/7ZrxqLiu4Cun57BDt2o3i7CissYYrA4al9NIoLrKvykwh4 fhlw== X-Gm-Message-State: AA+aEWZ5RDP4xnt9XbqRSZow4JNKjAtrrZZPi5MO31VQMqmTgb709BD6 cm72rsCLYMbvJXCeF3hu0V0Yot5E X-Google-Smtp-Source: AFSGD/WriX7uxriYIOHn62+624YQU92ckLHf5bYs647x1Uke6wodO6rhPy1K9wjn6uCck45F16ebvQ== X-Received: by 2002:adf:fd50:: with SMTP id h16mr6025552wrs.231.1544883997922; Sat, 15 Dec 2018 06:26:37 -0800 (PST) Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz. [86.49.110.70]) by smtp.gmail.com with ESMTPSA id c7sm15401225wre.64.2018.12.15.06.26.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 15 Dec 2018 06:26:37 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH V3 09/14] gpio: pca953x: Extract the register address mangling to single function Date: Sat, 15 Dec 2018 15:26:00 +0100 Message-Id: <20181215142605.15397-10-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> References: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Instead of having the I2C register calculation function spread across multiple accessor functions, pull it out into a single function which returns the adjusted register address. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- V2: No change V3: No change --- drivers/gpio/gpio-pca953x.c | 59 ++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 30 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index cbc3b82b9385..b08e071ad48c 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -164,17 +164,37 @@ static int pca953x_bank_shift(struct pca953x_chip *chip) return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); } +static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off, + bool write, bool addrinc) +{ + int bank_shift = pca953x_bank_shift(chip); + int addr = (reg & PCAL_GPIO_MASK) << bank_shift; + int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; + u8 regaddr = pinctrl | addr | (off / BANK_SZ); + + /* Single byte read doesn't need AI bit set. */ + if (!addrinc) + return regaddr; + + /* Chips with 24 and more GPIOs always support Auto Increment */ + if (write && NBANK(chip) > 2) + regaddr |= REG_ADDR_AI; + + /* PCA9575 needs address-increment on multi-byte writes */ + if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) + regaddr |= REG_ADDR_AI; + + return regaddr; +} + static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, int off) { + u8 regaddr = pca953x_recalc_addr(chip, reg, off, false, false); int ret; - int bank_shift = pca953x_bank_shift(chip); - int offset = off / BANK_SZ; - ret = i2c_smbus_read_byte_data(chip->client, - (reg << bank_shift) + offset); + ret = i2c_smbus_read_byte_data(chip->client, regaddr); *val = ret; - if (ret < 0) { dev_err(&chip->client->dev, "failed reading register\n"); return ret; @@ -186,13 +206,10 @@ static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, int off) { + u8 regaddr = pca953x_recalc_addr(chip, reg, off, true, false); int ret; - int bank_shift = pca953x_bank_shift(chip); - int offset = off / BANK_SZ; - - ret = i2c_smbus_write_byte_data(chip->client, - (reg << bank_shift) + offset, val); + ret = i2c_smbus_write_byte_data(chip->client, regaddr, val); if (ret < 0) { dev_err(&chip->client->dev, "failed writing register\n"); return ret; @@ -203,20 +220,9 @@ static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) { - int bank_shift = pca953x_bank_shift(chip); - int addr = (reg & PCAL_GPIO_MASK) << bank_shift; - int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; - u8 regaddr = pinctrl | addr; + u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true); int ret; - /* Chips with 24 and more GPIOs always support Auto Increment */ - if (NBANK(chip) > 2) - regaddr |= REG_ADDR_AI; - - /* PCA9575 needs address-increment on multi-byte writes */ - if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) - regaddr |= REG_ADDR_AI; - ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr, NBANK(chip), val); if (ret < 0) { @@ -229,16 +235,9 @@ static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) { - int bank_shift = pca953x_bank_shift(chip); - int addr = (reg & PCAL_GPIO_MASK) << bank_shift; - int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; - u8 regaddr = pinctrl | addr; + u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true); int ret; - /* Chips with 24 and more GPIOs always support Auto Increment */ - if (NBANK(chip) > 2) - regaddr |= REG_ADDR_AI; - ret = i2c_smbus_read_i2c_block_data(chip->client, regaddr, NBANK(chip), val); if (ret < 0) { From patchwork Sat Dec 15 14:26:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10732253 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7920514E2 for ; Sat, 15 Dec 2018 14:26:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 688A72A0C8 for ; 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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id c7sm15401225wre.64.2018.12.15.06.26.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 15 Dec 2018 06:26:38 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH V3 10/14] gpio: pca953x: Perform basic regmap conversion Date: Sat, 15 Dec 2018 15:26:01 +0100 Message-Id: <20181215142605.15397-11-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> References: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Convert the driver to use regmap to access the chips. Due to the convoluted register mapping scheme, implement read/write/volatile check functions that untangle the mess and perform check accordingly. This patch does not zap the internal register cache of the PCA953x driver, nor does it push the regmap access down into the gpiochip accessors to simplify the review. All that is in subsequent patches. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- V2: No change V3: select REGMAP_I2C in Kconfig --- drivers/gpio/Kconfig | 1 + drivers/gpio/gpio-pca953x.c | 159 ++++++++++++++++++++++++++++++++++-- 2 files changed, 152 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 329d2f9523b2..830b6b1e00c8 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -849,6 +849,7 @@ config GPIO_MC9S08DZ60 config GPIO_PCA953X tristate "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports" + select REGMAP_I2C help Say yes here to provide access to several register-oriented SMBus I/O expanders, made mostly by NXP or TI. Compatible diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index b08e071ad48c..3b845b16031e 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -30,6 +31,8 @@ #define PCA953X_INVERT 0x02 #define PCA953X_DIRECTION 0x03 +#define REG_ADDR_MASK 0x3f +#define REG_ADDR_EXT 0x40 #define REG_ADDR_AI 0x80 #define PCA957X_IN 0x00 @@ -141,6 +144,7 @@ struct pca953x_chip { u8 reg_output[MAX_BANK]; u8 reg_direction[MAX_BANK]; struct mutex i2c_lock; + struct regmap *regmap; #ifdef CONFIG_GPIO_PCA953X_IRQ struct mutex irq_lock; @@ -164,6 +168,141 @@ static int pca953x_bank_shift(struct pca953x_chip *chip) return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); } +#define PCA953x_BANK_INPUT BIT(0) +#define PCA953x_BANK_OUTPUT BIT(1) +#define PCA953x_BANK_POLARITY BIT(2) +#define PCA953x_BANK_CONFIG BIT(3) + +#define PCA957x_BANK_INPUT BIT(0) +#define PCA957x_BANK_POLARITY BIT(1) +#define PCA957x_BANK_BUSHOLD BIT(2) +#define PCA957x_BANK_CONFIG BIT(4) +#define PCA957x_BANK_OUTPUT BIT(5) + +#define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2) +#define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5) +#define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6) + +/* + * We care about the following registers: + * - Standard set, below 0x40, each port can be replicated up to 8 times + * - PCA953x standard + * Input port 0x00 + 0 * bank_size R + * Output port 0x00 + 1 * bank_size RW + * Polarity Inversion port 0x00 + 2 * bank_size RW + * Configuration port 0x00 + 3 * bank_size RW + * - PCA957x with mixed up registers + * Input port 0x00 + 0 * bank_size R + * Polarity Inversion port 0x00 + 1 * bank_size RW + * Bus hold port 0x00 + 2 * bank_size RW + * Configuration port 0x00 + 4 * bank_size RW + * Output port 0x00 + 5 * bank_size RW + * + * - Extended set, above 0x40, often chip specific. + * - PCAL6524/PCAL9555A with custom PCAL IRQ handling: + * Input latch register 0x40 + 2 * bank_size RW + * Interrupt mask register 0x40 + 5 * bank_size RW + * Interrupt status register 0x40 + 6 * bank_size R + * + * - Registers with bit 0x80 set, the AI bit + * The bit is cleared and the registers fall into one of the + * categories above. + */ + +static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg, + u32 checkbank) +{ + int bank_shift = pca953x_bank_shift(chip); + int bank = (reg & REG_ADDR_MASK) >> bank_shift; + int offset = reg & (BIT(bank_shift) - 1); + + /* Special PCAL extended register check. */ + if (reg & REG_ADDR_EXT) { + if (!(chip->driver_data & PCA_PCAL)) + return false; + bank += 8; + } + + /* Register is not in the matching bank. */ + if (!(BIT(bank) & checkbank)) + return false; + + /* Register is not within allowed range of bank. */ + if (offset >= NBANK(chip)) + return false; + + return true; +} + +static bool pca953x_readable_register(struct device *dev, unsigned int reg) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + u32 bank; + + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { + bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT | + PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG; + } else { + bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT | + PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG | + PCA957x_BANK_BUSHOLD; + } + + if (chip->driver_data & PCA_PCAL) { + bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_IRQ_MASK | + PCAL9xxx_BANK_IRQ_STAT; + } + + return pca953x_check_register(chip, reg, bank); +} + +static bool pca953x_writeable_register(struct device *dev, unsigned int reg) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + u32 bank; + + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { + bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY | + PCA953x_BANK_CONFIG; + } else { + bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY | + PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD; + } + + if (chip->driver_data & PCA_PCAL) + bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_IRQ_MASK; + + return pca953x_check_register(chip, reg, bank); +} + +static bool pca953x_volatile_register(struct device *dev, unsigned int reg) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + u32 bank; + + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) + bank = PCA953x_BANK_INPUT; + else + bank = PCA957x_BANK_INPUT; + + if (chip->driver_data & PCA_PCAL) + bank |= PCAL9xxx_BANK_IRQ_STAT; + + return pca953x_check_register(chip, reg, bank); +} + +const struct regmap_config pca953x_i2c_regmap = { + .reg_bits = 8, + .val_bits = 8, + + .readable_reg = pca953x_readable_register, + .writeable_reg = pca953x_writeable_register, + .volatile_reg = pca953x_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .max_register = 0x7f, +}; + static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off, bool write, bool addrinc) { @@ -193,8 +332,7 @@ static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, u8 regaddr = pca953x_recalc_addr(chip, reg, off, false, false); int ret; - ret = i2c_smbus_read_byte_data(chip->client, regaddr); - *val = ret; + ret = regmap_read(chip->regmap, regaddr, val); if (ret < 0) { dev_err(&chip->client->dev, "failed reading register\n"); return ret; @@ -209,7 +347,7 @@ static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, u8 regaddr = pca953x_recalc_addr(chip, reg, off, true, false); int ret; - ret = i2c_smbus_write_byte_data(chip->client, regaddr, val); + ret = regmap_write(chip->regmap, regaddr, val); if (ret < 0) { dev_err(&chip->client->dev, "failed writing register\n"); return ret; @@ -223,8 +361,7 @@ static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true); int ret; - ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr, - NBANK(chip), val); + ret = regmap_bulk_write(chip->regmap, regaddr, val, NBANK(chip)); if (ret < 0) { dev_err(&chip->client->dev, "failed writing register\n"); return ret; @@ -238,8 +375,7 @@ static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true); int ret; - ret = i2c_smbus_read_i2c_block_data(chip->client, regaddr, - NBANK(chip), val); + ret = regmap_bulk_read(chip->regmap, regaddr, val, NBANK(chip)); if (ret < 0) { dev_err(&chip->client->dev, "failed reading register\n"); return ret; @@ -793,6 +929,14 @@ static int pca953x_probe(struct i2c_client *client, } } + i2c_set_clientdata(client, chip); + + chip->regmap = devm_regmap_init_i2c(client, &pca953x_i2c_regmap); + if (IS_ERR(chip->regmap)) { + ret = PTR_ERR(chip->regmap); + goto err_exit; + } + mutex_init(&chip->i2c_lock); /* * In case we have an i2c-mux controlled by a GPIO provided by an @@ -843,7 +987,6 @@ static int pca953x_probe(struct i2c_client *client, dev_warn(&client->dev, "setup failed, %d\n", ret); } - i2c_set_clientdata(client, chip); return 0; err_exit: From patchwork Sat Dec 15 14:26:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10732255 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A1A9B14DE for ; Sat, 15 Dec 2018 14:26:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 90CE22A0C8 for ; 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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id c7sm15401225wre.64.2018.12.15.06.26.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 15 Dec 2018 06:26:39 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH V3 11/14] gpio: pca953x: Zap ad-hoc reg_direction cache Date: Sat, 15 Dec 2018 15:26:02 +0100 Message-Id: <20181215142605.15397-12-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> References: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Replace the ad-hoc reg_direction direction register caching with generic regcache cache. This reduces code duplication. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- V2: Fix the IRQ handling code as well V3: No change --- drivers/gpio/gpio-pca953x.c | 55 +++++++++++++++++++++---------------- 1 file changed, 31 insertions(+), 24 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 3b845b16031e..08fd7c17fcb6 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -142,7 +142,6 @@ static const struct pca953x_reg_config pca957x_regs = { struct pca953x_chip { unsigned gpio_start; u8 reg_output[MAX_BANK]; - u8 reg_direction[MAX_BANK]; struct mutex i2c_lock; struct regmap *regmap; @@ -387,18 +386,13 @@ static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) { struct pca953x_chip *chip = gpiochip_get_data(gc); - u8 reg_val; + u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off, + true, false); + u8 bit = BIT(off % BANK_SZ); int ret; mutex_lock(&chip->i2c_lock); - reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); - - ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off); - if (ret) - goto exit; - - chip->reg_direction[off / BANK_SZ] = reg_val; -exit: + ret = regmap_write_bits(chip->regmap, dirreg, bit, bit); mutex_unlock(&chip->i2c_lock); return ret; } @@ -407,6 +401,9 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, unsigned off, int val) { struct pca953x_chip *chip = gpiochip_get_data(gc); + u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off, + true, false); + u8 bit = BIT(off % BANK_SZ); u8 reg_val; int ret; @@ -426,12 +423,7 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, chip->reg_output[off / BANK_SZ] = reg_val; /* then direction */ - reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); - ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off); - if (ret) - goto exit; - - chip->reg_direction[off / BANK_SZ] = reg_val; + ret = regmap_write_bits(chip->regmap, dirreg, bit, 0); exit: mutex_unlock(&chip->i2c_lock); return ret; @@ -483,16 +475,19 @@ static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off) { struct pca953x_chip *chip = gpiochip_get_data(gc); + u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off, + true, false); + u8 bit = BIT(off % BANK_SZ); u32 reg_val; int ret; mutex_lock(&chip->i2c_lock); - ret = pca953x_read_single(chip, chip->regs->direction, ®_val, off); + ret = regmap_read(chip->regmap, dirreg, ®_val); mutex_unlock(&chip->i2c_lock); if (ret < 0) return ret; - return !!(reg_val & (1u << (off % BANK_SZ))); + return !!(reg_val & bit); } static void pca953x_gpio_set_multiple(struct gpio_chip *gc, @@ -580,6 +575,10 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d) u8 new_irqs; int level, i; u8 invert_irq_mask[MAX_BANK]; + int reg_direction[MAX_BANK]; + + regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction, + NBANK(chip)); if (chip->driver_data & PCA_PCAL) { /* Enable latch on interrupt-enabled inputs */ @@ -595,7 +594,7 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d) /* Look for any newly setup interrupt */ for (i = 0; i < NBANK(chip); i++) { new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i]; - new_irqs &= ~chip->reg_direction[i]; + new_irqs &= reg_direction[i]; while (new_irqs) { level = __ffs(new_irqs); @@ -660,6 +659,7 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) bool pending_seen = false; bool trigger_seen = false; u8 trigger[MAX_BANK]; + int reg_direction[MAX_BANK]; int ret, i; if (chip->driver_data & PCA_PCAL) { @@ -690,8 +690,10 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) return false; /* Remove output pins from the equation */ + regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction, + NBANK(chip)); for (i = 0; i < NBANK(chip); i++) - cur_stat[i] &= chip->reg_direction[i]; + cur_stat[i] &= reg_direction[i]; memcpy(old_stat, chip->irq_stat, NBANK(chip)); @@ -745,6 +747,7 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base) { struct i2c_client *client = chip->client; + int reg_direction[MAX_BANK]; int ret, i; if (client->irq && irq_base != -1 @@ -759,8 +762,10 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, * interrupt. We have to rely on the previous read for * this purpose. */ + regmap_bulk_read(chip->regmap, chip->regs->direction, + reg_direction, NBANK(chip)); for (i = 0; i < NBANK(chip); i++) - chip->irq_stat[i] &= chip->reg_direction[i]; + chip->irq_stat[i] &= reg_direction[i]; mutex_init(&chip->irq_lock); ret = devm_request_threaded_irq(&client->dev, @@ -817,9 +822,9 @@ static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert) if (ret) goto out; - ret = pca953x_read_regs(chip, chip->regs->direction, - chip->reg_direction); - if (ret) + ret = regcache_sync_region(chip->regmap, chip->regs->direction, + chip->regs->direction + NBANK(chip)); + if (ret != 0) goto out; /* set platform specific polarity inversion */ @@ -937,6 +942,8 @@ static int pca953x_probe(struct i2c_client *client, goto err_exit; } + regcache_mark_dirty(chip->regmap); + mutex_init(&chip->i2c_lock); /* * In case we have an i2c-mux controlled by a GPIO provided by an From patchwork Sat Dec 15 14:26:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10732257 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 428B714DE for ; Sat, 15 Dec 2018 14:26:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 31D442A0C8 for ; Sat, 15 Dec 2018 14:26:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 262C42A822; Sat, 15 Dec 2018 14:26:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ADBBF2A0C8 for ; Sat, 15 Dec 2018 14:26:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730074AbeLOO0p (ORCPT ); Sat, 15 Dec 2018 09:26:45 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:36702 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729707AbeLOO0p (ORCPT ); Sat, 15 Dec 2018 09:26:45 -0500 Received: by mail-wr1-f67.google.com with SMTP id u4so7097559wrp.3; Sat, 15 Dec 2018 06:26:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=c22Xo4JerZfpW1i9fw99SYDqwzQCmVrwRe8O8Sok3NA=; b=pq9ZAtixRGc52vcLBIUW8RGIlh2+c6Z7itSnJgUVDZpt7YC9yof/OHjvrAz71l1Rgi 5qLK/8nzhQhSZHP2IQPEhQIZd8QQ8ABs677/llRwxgoPb/4+zDryClLtxQ5fNBKE5oPA 71fHhRF6G5zEIoSD8sCXDElXmlHnMF5g5+UcY1+Ui13N5ta1ccACm6Zvsq1DhsnwDA9/ ML1RsSc5SIaT3Y1mnckFUJXXpMFoU8PQS3H9nCpH/2QiNLPTTU4ytxg8ZsHt6YCUiYE1 LLkjIj7y2EPgQwrYqOHQa9a5qxjYW5tWb6xWwNgAX+5GDekiL19Vr33fPSAP9sF2vCnn OQUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=c22Xo4JerZfpW1i9fw99SYDqwzQCmVrwRe8O8Sok3NA=; b=bpm15fCQUNUSOXdxG1dBLZaXvkTcnVk8r9b0sQs6Zwln0G+fLMApiTjs1IRPmVkr5S zalN6J2Y7wAqfgsZlNJidgD13I09e3qCn/SAwGP6HmTS1oDC+g/yggHAAI6Et6rKWgnX 9CSiPZLCAJ91W6U7n/zLsENQA0zX2ftzFD7MvoaB8DVBTvN2y6r2p+6CJLC5Vw7+Bmhd I1+tkD8z3YOYPw8AkNlEuQUOLDaCFnH25geRuVMBJEPSzYnaaZXIAWaEWvpsFd02qQna fR/S5jeun9t938CjNzdEYoTyZkCZI+0m3TuRfxD9Q5X0mp1ExB46GLiOa+mfhe30cDti GClg== X-Gm-Message-State: AA+aEWYYBU7Yu46N4jSrGQmH+E3a3U48C1FtO7cRoRgHs16O3hTU20sA 0UGO6RiGw4VSf7RD7Upx41zPWwi5 X-Google-Smtp-Source: AFSGD/W+ojI0yAzmiFjFm5kADwMqY8CjzQDnjgIqc3V6YGgSVN1C8DE8WWwgZw8gHFRRBls04AfQHw== X-Received: by 2002:a5d:530a:: with SMTP id e10mr5798434wrv.151.1544884002049; Sat, 15 Dec 2018 06:26:42 -0800 (PST) Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz. [86.49.110.70]) by smtp.gmail.com with ESMTPSA id c7sm15401225wre.64.2018.12.15.06.26.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 15 Dec 2018 06:26:41 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH V3 12/14] gpio: pca953x: Zap ad-hoc reg_output cache Date: Sat, 15 Dec 2018 15:26:03 +0100 Message-Id: <20181215142605.15397-13-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> References: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Replace the ad-hoc reg_output output register caching with generic regcache cache. Drop pca953x_write_single() which is no longer used. This reduces code duplication. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- V2: No change V3: No change --- drivers/gpio/gpio-pca953x.c | 65 +++++++++---------------------------- 1 file changed, 15 insertions(+), 50 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 08fd7c17fcb6..a349f68c4025 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -141,7 +141,6 @@ static const struct pca953x_reg_config pca957x_regs = { struct pca953x_chip { unsigned gpio_start; - u8 reg_output[MAX_BANK]; struct mutex i2c_lock; struct regmap *regmap; @@ -340,21 +339,6 @@ static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, return 0; } -static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, - int off) -{ - u8 regaddr = pca953x_recalc_addr(chip, reg, off, true, false); - int ret; - - ret = regmap_write(chip->regmap, regaddr, val); - if (ret < 0) { - dev_err(&chip->client->dev, "failed writing register\n"); - return ret; - } - - return 0; -} - static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) { u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true); @@ -403,25 +387,17 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, struct pca953x_chip *chip = gpiochip_get_data(gc); u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off, true, false); + u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off, + true, false); u8 bit = BIT(off % BANK_SZ); - u8 reg_val; int ret; mutex_lock(&chip->i2c_lock); /* set output level */ - if (val) - reg_val = chip->reg_output[off / BANK_SZ] - | (1u << (off % BANK_SZ)); - else - reg_val = chip->reg_output[off / BANK_SZ] - & ~(1u << (off % BANK_SZ)); - - ret = pca953x_write_single(chip, chip->regs->output, reg_val, off); + ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); if (ret) goto exit; - chip->reg_output[off / BANK_SZ] = reg_val; - /* then direction */ ret = regmap_write_bits(chip->regmap, dirreg, bit, 0); exit: @@ -452,23 +428,12 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) { struct pca953x_chip *chip = gpiochip_get_data(gc); - u8 reg_val; - int ret; + u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off, + true, false); + u8 bit = BIT(off % BANK_SZ); mutex_lock(&chip->i2c_lock); - if (val) - reg_val = chip->reg_output[off / BANK_SZ] - | (1u << (off % BANK_SZ)); - else - reg_val = chip->reg_output[off / BANK_SZ] - & ~(1u << (off % BANK_SZ)); - - ret = pca953x_write_single(chip, chip->regs->output, reg_val, off); - if (ret) - goto exit; - - chip->reg_output[off / BANK_SZ] = reg_val; -exit: + regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); mutex_unlock(&chip->i2c_lock); } @@ -500,7 +465,10 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, int ret; mutex_lock(&chip->i2c_lock); - memcpy(reg_val, chip->reg_output, NBANK(chip)); + ret = pca953x_read_regs(chip, chip->regs->output, reg_val); + if (ret) + goto exit; + for (bank = 0; bank < NBANK(chip); bank++) { bank_mask = mask[bank / sizeof(*mask)] >> ((bank % sizeof(*mask)) * 8); @@ -512,11 +480,7 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, } } - ret = pca953x_write_regs(chip, chip->regs->output, reg_val); - if (ret) - goto exit; - - memcpy(chip->reg_output, reg_val, NBANK(chip)); + pca953x_write_regs(chip, chip->regs->output, reg_val); exit: mutex_unlock(&chip->i2c_lock); } @@ -818,8 +782,9 @@ static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert) int ret; u8 val[MAX_BANK]; - ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output); - if (ret) + ret = regcache_sync_region(chip->regmap, chip->regs->output, + chip->regs->output + NBANK(chip)); + if (ret != 0) goto out; ret = regcache_sync_region(chip->regmap, chip->regs->direction, From patchwork Sat Dec 15 14:26:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10732259 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8432014E2 for ; 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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id c7sm15401225wre.64.2018.12.15.06.26.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 15 Dec 2018 06:26:42 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH V3 13/14] gpio: pca953x: Zap single use of pca953x_read_single() Date: Sat, 15 Dec 2018 15:26:04 +0100 Message-Id: <20181215142605.15397-14-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> References: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Drop pca953x_write_single() which is used in one place. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- V2: No change V3: No change --- drivers/gpio/gpio-pca953x.c | 22 +++++----------------- 1 file changed, 5 insertions(+), 17 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index a349f68c4025..6f50cf14bb23 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -324,21 +324,6 @@ static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off, return regaddr; } -static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, - int off) -{ - u8 regaddr = pca953x_recalc_addr(chip, reg, off, false, false); - int ret; - - ret = regmap_read(chip->regmap, regaddr, val); - if (ret < 0) { - dev_err(&chip->client->dev, "failed reading register\n"); - return ret; - } - - return 0; -} - static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) { u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true); @@ -408,11 +393,14 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) { struct pca953x_chip *chip = gpiochip_get_data(gc); + u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off, + true, false); + u8 bit = BIT(off % BANK_SZ); u32 reg_val; int ret; mutex_lock(&chip->i2c_lock); - ret = pca953x_read_single(chip, chip->regs->input, ®_val, off); + ret = regmap_read(chip->regmap, inreg, ®_val); mutex_unlock(&chip->i2c_lock); if (ret < 0) { /* NOTE: diagnostic already emitted; that's all we should @@ -422,7 +410,7 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) return 0; } - return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0; + return !!(reg_val & bit); } static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) From patchwork Sat Dec 15 14:26:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10732261 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1270314E2 for ; Sat, 15 Dec 2018 14:26:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 026E92A0C8 for ; Sat, 15 Dec 2018 14:26:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EB1A52A822; Sat, 15 Dec 2018 14:26:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 862212A0C8 for ; Sat, 15 Dec 2018 14:26:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730290AbeLOO0s (ORCPT ); Sat, 15 Dec 2018 09:26:48 -0500 Received: from mail-wm1-f66.google.com ([209.85.128.66]:54409 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730119AbeLOO0s (ORCPT ); Sat, 15 Dec 2018 09:26:48 -0500 Received: by mail-wm1-f66.google.com with SMTP id a62so8244788wmh.4; Sat, 15 Dec 2018 06:26:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+mepptQUgkA8WUMVQ649aZezSvaJpTojRTTXZmGA4gs=; b=XiL2Z/SMW4KU6sV4aJDvIIUCfcNBeULeNnS9efV3+WmUFU51sb4JSbbg7cqeZfLKWH D3rWjIg3mFrplSu4QNfPVcRqAHxCPg4zuCin/RfoOdAcdA7b+LnXdOh3v9kzK9+VzKoN P94ZYYDS4ZFRITLuTt2WFWWtqjlDFRumX4sQC63RHN8QoxRgtmrKadPIiNBz2h6J74BO DLGiR8gqtQXBC9RbYQ9ggugH9uUKcolih6qbmKfX/rElP2YogVTIzpS4OIMM5or6FEnp B21pcv45wja4szk8/ArBNZCZ76Bwcl6Urgb3ZsnyGrcx9Bh0nB8PQE5OVVB0ojQdqrML j02A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+mepptQUgkA8WUMVQ649aZezSvaJpTojRTTXZmGA4gs=; b=miju1E4dKLW86034/mfA3x4o02mV4JAbTtHi5iXweaf8u6KnPqZmH9dcao7aDR6yql uPh19E1ucaaT0QAW6y4zSTeWh9FiQLu7N2sPDTx5EfMcfnCXhqIFY9SjQY0mLWEYfqrQ Ar1CvgbH2dVX0EgnkN6YuU12KgQ/CtfGq4tN6vdofDL/QYHO7mUJABiJVA3kdfX6oGMT LaMcnW8a5TMPP2tSXXrYn0eqV1QS3PpIqdRD/F0j8OT2MYxsRCeZi5J4xkN6jwyMOv9o CDm9jFxL/smeTTlgmPJDbV/6FmJJH43RPU3ssVV8/3/jPivJ4cl5zMbU1yVxDQoVfASX oi+w== X-Gm-Message-State: AA+aEWYW7eVhnZUrrMzP002S6pyyS65qWRwFxqbu7QbCOn9IOOORjrRN oNbgK9ZVGeALQcZWtFiTEzdP2sKf X-Google-Smtp-Source: AFSGD/X7FKxrLYsvp6xl+pFDiqkZqV/GHmL6xuJ09l8J2y+scmfEDwoBPs5V1+yJ2xRaVgDLpR662w== X-Received: by 2002:a1c:9ed7:: with SMTP id h206mr6036890wme.28.1544884004632; Sat, 15 Dec 2018 06:26:44 -0800 (PST) Received: from kurokawa.lan (ip-86-49-110-70.net.upcbroadband.cz. [86.49.110.70]) by smtp.gmail.com with ESMTPSA id c7sm15401225wre.64.2018.12.15.06.26.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 15 Dec 2018 06:26:43 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-gpio@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, Marek Vasut , Linus Walleij , Bartosz Golaszewski Subject: [PATCH V3 14/14] gpio: pca953x: Restore registers after suspend/resume cycle Date: Sat, 15 Dec 2018 15:26:05 +0100 Message-Id: <20181215142605.15397-15-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> References: <20181215142605.15397-1-marek.vasut+renesas@gmail.com> Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP It is possible that the PCA953x is powered down during suspend. Use regmap cache to assure the registers in the PCA953x are in line with the driver state after resume. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski --- V2: - Drop the regcache_sync() calls from suspend callback - Fix build with CONFIG_GPIO_PCA953X_IRQ V3: No change --- drivers/gpio/gpio-pca953x.c | 88 +++++++++++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 6f50cf14bb23..83617fdc661d 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -975,6 +975,91 @@ static int pca953x_remove(struct i2c_client *client) return ret; } +#ifdef CONFIG_PM_SLEEP +static int pca953x_regcache_sync(struct device *dev) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + int ret; + + /* + * The ordering between direction and output is important, + * sync these registers first and only then sync the rest. + */ + ret = regcache_sync_region(chip->regmap, chip->regs->direction, + chip->regs->direction + NBANK(chip)); + if (ret != 0) { + dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret); + return ret; + } + + ret = regcache_sync_region(chip->regmap, chip->regs->output, + chip->regs->output + NBANK(chip)); + if (ret != 0) { + dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret); + return ret; + } + +#ifdef CONFIG_GPIO_PCA953X_IRQ + if (chip->driver_data & PCA_PCAL) { + ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH, + PCAL953X_IN_LATCH + NBANK(chip)); + if (ret != 0) { + dev_err(dev, "Failed to sync INT latch registers: %d\n", + ret); + return ret; + } + + ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK, + PCAL953X_INT_MASK + NBANK(chip)); + if (ret != 0) { + dev_err(dev, "Failed to sync INT mask registers: %d\n", + ret); + return ret; + } + } +#endif + + return 0; +} + +static int pca953x_suspend(struct device *dev) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + + regcache_cache_only(chip->regmap, true); + + regulator_disable(chip->regulator); + + return 0; +} + +static int pca953x_resume(struct device *dev) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + int ret; + + ret = regulator_enable(chip->regulator); + if (ret != 0) { + dev_err(dev, "Failed to enable regulator: %d\n", ret); + return 0; + } + + regcache_cache_only(chip->regmap, false); + regcache_mark_dirty(chip->regmap); + ret = pca953x_regcache_sync(dev); + if (ret) + return ret; + + ret = regcache_sync(chip->regmap); + if (ret != 0) { + dev_err(dev, "Failed to restore register map: %d\n", ret); + return ret; + } + + return 0; +} +#endif + /* convenience to stop overlong match-table lines */ #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int) #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int) @@ -1018,9 +1103,12 @@ static const struct of_device_id pca953x_dt_ids[] = { MODULE_DEVICE_TABLE(of, pca953x_dt_ids); +static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume); + static struct i2c_driver pca953x_driver = { .driver = { .name = "pca953x", + .pm = &pca953x_pm_ops, .of_match_table = pca953x_dt_ids, .acpi_match_table = ACPI_PTR(pca953x_acpi_ids), },