From patchwork Sat Dec 15 23:38:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10732319 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9341F112C for ; Sat, 15 Dec 2018 23:46:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 74B8B29F10 for ; Sat, 15 Dec 2018 23:46:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4E5BE29F26; Sat, 15 Dec 2018 23:46:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 62B9529F0A for ; Sat, 15 Dec 2018 23:46:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727403AbeLOXqD (ORCPT ); Sat, 15 Dec 2018 18:46:03 -0500 Received: from mail-lf1-f66.google.com ([209.85.167.66]:39919 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726615AbeLOXqD (ORCPT ); Sat, 15 Dec 2018 18:46:03 -0500 Received: by mail-lf1-f66.google.com with SMTP id n18so6890553lfh.6 for ; Sat, 15 Dec 2018 15:46:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lnRc8ymuJ9J9xwnjyuJJY/ylRkGwWZNIBh2NERU4O+s=; b=fRqrfbe9m7b5noR4VCyZ/g7gQBnTMvWbD0BO9IIr5ipj3pv00pVp1FHOzlxQIWSf/s OFiYRtqpv7iGrc7/Vas1S3R5MPxCBG9/73WBzpvWxvGnxcjfH6YLk+MnD8WdWTJwPzsG uMkV8MJ/DW1Rh6SM2Wk6yqMN77O2z75+zJ8iw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lnRc8ymuJ9J9xwnjyuJJY/ylRkGwWZNIBh2NERU4O+s=; b=Fyl5WrkpX5n0uchLvT+z2kJmVYM3quqBXrXCDjNJaU1LLDHkTnt8AC59QLgwp6fjpV gq60RpWeQuNkUd4E+3OyrBOQEaZ6fBpLwCUddPG2iLjWz+etfvrlN12n+LtdIqOP7jjd Gg/rVkufplgZWfIYa55zG8C65/lz5fRhCUT1PI0qh/z9LfNuS7aZdVrFaCKp3l35pemc zGCjB0Ta6ozSAdIN5pn9u5rTexOp/5Dgs7jRd77bxmVZUmaQO03iP/S3JAsJ351b5t8Q p5XatygsreZr7euhijdGuP1BalufDUASSDPBBoBCqxeaw1TmNY5wv5HEYNKBH9LDPRe+ lrMw== X-Gm-Message-State: AA+aEWZdtscX14jUsL2d1n/rX80XO37D7uOfO3TkKcC10J4GSnGRZEb7 snAOisPScQX+bKl7mwnscqWBDw== X-Google-Smtp-Source: AFSGD/WnaPC/sespilcxMTZAuAqMW/VHo7NcKPYWsKUGDgh3k4LLyBLkn1NUTHqQpp70UlGz9K9zsQ== X-Received: by 2002:a19:2b54:: with SMTP id r81mr4755807lfr.34.1544917559999; Sat, 15 Dec 2018 15:45:59 -0800 (PST) Received: from localhost.localdomain (c-ae7b71d5.014-348-6c756e10.bbcust.telenor.se. [213.113.123.174]) by smtp.gmail.com with ESMTPSA id v19sm1709880lfe.69.2018.12.15.15.45.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 15 Dec 2018 15:45:58 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij Subject: [PATCH 1/7 v1] spi: Optionally use GPIO descriptors for CS GPIOs Date: Sun, 16 Dec 2018 00:38:17 +0100 Message-Id: <20181215233823.1042-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181215233823.1042-1-linus.walleij@linaro.org> References: <20181215233823.1042-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This augments the SPI core to optionally use GPIO descriptors for chip select on a per-master-driver opt-in basis. Drivers using this will rely on the SPI core to look up GPIO descriptors associated with the device, such as when using device tree or board files with GPIO descriptor tables. When getting descriptors from the device tree, this will in turn activate the code in gpiolib that was added in commit 6953c57ab172 ("gpio: of: Handle SPI chipselect legacy bindings") which means that these descriptors are aware of the active low semantics that is the default for SPI CS GPIO lines and we can assume that all of these are "active high" and thus assign SPI_CS_HIGH to all CS lines on the DT path. The previously used gpio_set_value() would call down into gpiod_set_raw_value() and ignore the polarity inversion semantics. It seems like many drivers go to great lengths to set up the CS GPIO line as non-asserted, respecting SPI_CS_HIGH. We pull this out of the SPI drivers and into the core, and by simply requesting the line as GPIOD_OUT_LOW when retrieveing it from the device and relying on the gpiolib to handle any inversion semantics. This way a lot of code can be simplified and removed in each converted driver. The end goal after dealing with each driver in turn, is to delete the non-descriptor path (of_spi_register_master() for example) and let the core deal with only descriptors. The different SPI drivers have complex interactions with the core so we cannot simply change them all over, we need to use a stepwise, bisectable approach so that each driver can be converted and fixed in isolation. Cc: Linuxarm Signed-off-by: Linus Walleij --- Jay, I think this patch should cover your ACPI usecase as well, as in subject "spi: add ACPI support for SPI controller chip select lines(cs-gpios)" --- drivers/spi/spi.c | 105 ++++++++++++++++++++++++++++++++++++---- include/linux/spi/spi.h | 23 +++++++-- 2 files changed, 114 insertions(+), 14 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 6ca59406b0b7..05e73290cdf3 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -509,6 +510,7 @@ struct spi_device *spi_alloc_device(struct spi_controller *ctlr) spi->dev.bus = &spi_bus_type; spi->dev.release = spidev_release; spi->cs_gpio = -ENOENT; + spi->cs_gpiod = NULL; spin_lock_init(&spi->statistics.lock); @@ -580,7 +582,10 @@ int spi_add_device(struct spi_device *spi) goto done; } - if (ctlr->cs_gpios) + /* Descriptors take precedence */ + if (ctlr->cs_gpiods) + spi->cs_gpiod = ctlr->cs_gpiods[spi->chip_select]; + else if (ctlr->cs_gpios) spi->cs_gpio = ctlr->cs_gpios[spi->chip_select]; /* Drivers may modify this initial i/o setup, but will @@ -774,10 +779,20 @@ static void spi_set_cs(struct spi_device *spi, bool enable) if (spi->mode & SPI_CS_HIGH) enable = !enable; - if (gpio_is_valid(spi->cs_gpio)) { - /* Honour the SPI_NO_CS flag */ - if (!(spi->mode & SPI_NO_CS)) - gpio_set_value(spi->cs_gpio, !enable); + if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio)) { + /* + * Honour the SPI_NO_CS flag and invert the enable line, as + * active low is default for SPI. Execution paths that handle + * polarity inversion in gpiolib (such as device tree) will + * enforce active high using the SPI_CS_HIGH resulting in a + * double inversion through the code above. + */ + if (!(spi->mode & SPI_NO_CS)) { + if (spi->cs_gpiod) + gpiod_set_value(spi->cs_gpiod, !enable); + else + gpio_set_value(spi->cs_gpio, !enable); + } /* Some SPI masters need both GPIO CS & slave_select */ if ((spi->controller->flags & SPI_MASTER_GPIO_SS) && spi->controller->set_cs) @@ -1599,13 +1614,21 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, spi->mode |= SPI_CPHA; if (of_property_read_bool(nc, "spi-cpol")) spi->mode |= SPI_CPOL; - if (of_property_read_bool(nc, "spi-cs-high")) - spi->mode |= SPI_CS_HIGH; if (of_property_read_bool(nc, "spi-3wire")) spi->mode |= SPI_3WIRE; if (of_property_read_bool(nc, "spi-lsb-first")) spi->mode |= SPI_LSB_FIRST; + /* + * For descriptors associated with the device, polarity inversion is + * handled in the gpiolib, so all chip selects are "active high" in + * the logical sense, the gpiolib will invert the line if need be. + */ + if (ctlr->use_gpio_descriptors) + spi->mode |= SPI_CS_HIGH; + else if (of_property_read_bool(nc, "spi-cs-high")) + spi->mode |= SPI_CS_HIGH; + /* Device DUAL/QUAD mode */ if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) { switch (value) { @@ -2115,6 +2138,60 @@ static int of_spi_register_master(struct spi_controller *ctlr) } #endif +/** + * spi_get_gpio_descs() - grab chip select GPIOs for the master + * @ctlr: The SPI master to grab GPIO descriptors for + */ +static int spi_get_gpio_descs(struct spi_controller *ctlr) +{ + int nb, i; + struct gpio_desc **cs; + struct device *dev = &ctlr->dev; + + nb = gpiod_count(dev, "cs"); + ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect); + + /* No GPIOs at all is fine, else return the error */ + if (nb == 0 || nb == -ENOENT) + return 0; + else if (nb < 0) + return nb; + + cs = devm_kcalloc(dev, ctlr->num_chipselect, sizeof(*cs), + GFP_KERNEL); + if (!cs) + return -ENOMEM; + ctlr->cs_gpiods = cs; + + for (i = 0; i < nb; i++) { + /* + * Most chipselects are active low, the inverted + * semantics are handled by special quirks in gpiolib, + * so initializing them GPIOD_OUT_LOW here means + * "unasserted", in most cases the will drive the physical + * line high. + */ + cs[i] = devm_gpiod_get_index_optional(dev, "cs", i, + GPIOD_OUT_LOW); + + if (cs[i]) { + /* + * If we find a CS GPIO, name it after the device and + * chip select line. + */ + char *gpioname; + + gpioname = devm_kasprintf(dev, GFP_KERNEL, "%s CS%d", + dev_name(dev), i); + if (!gpioname) + return -ENOMEM; + gpiod_set_consumer_name(cs[i], gpioname); + } + } + + return 0; +} + static int spi_controller_check_ops(struct spi_controller *ctlr) { /* @@ -2177,9 +2254,16 @@ int spi_register_controller(struct spi_controller *ctlr) return status; if (!spi_controller_is_slave(ctlr)) { - status = of_spi_register_master(ctlr); - if (status) - return status; + if (ctlr->use_gpio_descriptors) { + status = spi_get_gpio_descs(ctlr); + if (status) + return status; + } else { + /* Legacy code path for GPIOs from DT */ + status = of_spi_register_master(ctlr); + if (status) + return status; + } } /* even if it's just one always-selected device, there must @@ -2891,6 +2975,7 @@ static int __spi_validate(struct spi_device *spi, struct spi_message *message) * cs_change is set for each transfer. */ if ((spi->mode & SPI_CS_WORD) && (!(ctlr->mode_bits & SPI_CS_WORD) || + spi->cs_gpiod || gpio_is_valid(spi->cs_gpio))) { size_t maxsize; int ret; diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 6be77fa5ab90..68d77cfc8bb7 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -12,6 +12,7 @@ #include #include #include +#include struct dma_chan; struct property_entry; @@ -116,7 +117,10 @@ void spi_statistics_add_transfer_stats(struct spi_statistics *stats, * @modalias: Name of the driver to use with this device, or an alias * for that name. This appears in the sysfs "modalias" attribute * for driver coldplugging, and in uevents used for hotplugging - * @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when + * @cs_gpio: LEGACY: gpio number of the chipselect line (optional, -ENOENT when + * not using a GPIO line) use cs_gpiod in new drivers by opting in on + * the spi_master. + * @cs_gpiod: gpio descriptor of the chipselect line (optional, NULL when * not using a GPIO line) * * @statistics: statistics for the spi_device @@ -160,7 +164,8 @@ struct spi_device { void *controller_data; char modalias[SPI_NAME_SIZE]; const char *driver_override; - int cs_gpio; /* chip select gpio */ + int cs_gpio; /* LEGACY: chip select gpio */ + struct gpio_desc *cs_gpiod; /* chip select gpio desc */ /* the statistics */ struct spi_statistics statistics; @@ -373,9 +378,17 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv) * controller has native support for memory like operations. * @unprepare_message: undo any work done by prepare_message(). * @slave_abort: abort the ongoing transfer request on an SPI slave controller - * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS - * number. Any individual value may be -ENOENT for CS lines that + * @cs_gpios: LEGACY: array of GPIO descs to use as chip select lines; one per + * CS number. Any individual value may be -ENOENT for CS lines that + * are not GPIOs (driven by the SPI controller itself). Use the cs_gpiods + * in new drivers. + * @cs_gpiods: Array of GPIO descs to use as chip select lines; one per CS + * number. Any individual value may be NULL for CS lines that * are not GPIOs (driven by the SPI controller itself). + * @use_gpio_descriptors: Turns on the code in the SPI core to parse and grab + * GPIO descriptors rather than using global GPIO numbers grabbed by the + * driver. This will fill in @cs_gpiods and @cs_gpios should not be used, + * and SPI devices will have the cs_gpiod assigned rather than cs_gpio. * @statistics: statistics for the spi_controller * @dma_tx: DMA transmit channel * @dma_rx: DMA receive channel @@ -554,6 +567,8 @@ struct spi_controller { /* gpio chip select */ int *cs_gpios; + struct gpio_desc **cs_gpiods; + bool use_gpio_descriptors; /* statistics */ struct spi_statistics statistics; From patchwork Sat Dec 15 23:38:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10732321 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5ACB4112C for ; Sat, 15 Dec 2018 23:46:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 49F9B29F0A for ; Sat, 15 Dec 2018 23:46:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3D51E29F26; Sat, 15 Dec 2018 23:46:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6F37129F0A for ; Sat, 15 Dec 2018 23:46:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727216AbeLOXqE (ORCPT ); Sat, 15 Dec 2018 18:46:04 -0500 Received: from mail-lj1-f195.google.com ([209.85.208.195]:45747 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727340AbeLOXqE (ORCPT ); Sat, 15 Dec 2018 18:46:04 -0500 Received: by mail-lj1-f195.google.com with SMTP id s5-v6so7921702ljd.12 for ; Sat, 15 Dec 2018 15:46:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Bzptg/pgzZPM+HOhvWBONTGwUcMYZLne6Yt/fn2ljxc=; b=YvwXs68pv/fpflpV/OinER1MhxwUxST+z5LxNY8OERM9ie7of3xvf2sTwcjnH6MFDm zP3s6MrHnhE3Rr92h4MmPoEq7727z598xDGVIYe0zXO7Z/OCcemIOUxTLgPNjLw4kTPo dpJcx7D62YbTbZ9h0Lhap9Oscm8iimc/9GNn4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Bzptg/pgzZPM+HOhvWBONTGwUcMYZLne6Yt/fn2ljxc=; b=ZDYbLNXz1k2N+FwjZ3+PkHl0avjGthLsWQ5uKhzeZmIOZ2mLJnDGWBMGsSK5DOeTyc SIIVjslY11xw80hXLWnVPTgsbEcdqA8e8xMQbXlJNUGrFi1xHN07vQqgX671tF0Xmmux 6+XUkrzuMYwVvElmoSFYi23OWs33DBKmcvIU8zx3tniBi07yx0aXSXqQfLjaaVVWZTNa kxHVVEGCo95wfXfaj1OColcMhORS2vPB2HGfUmtGUmvsmohJWxsiBH/9jiW/g9gXBKw1 DDJ/e8xwOaFbePrckFHh4WV6q8Ul5uYpmpq5CFB4LtC9ZNvpxfuVTk0Imipfj+ec7rt+ 0+IQ== X-Gm-Message-State: AA+aEWZwzHnRggKYXhzHGHMhrS9soGzq+lCCBZV/SGrxYmEVrf7Tsebb C3nbKMx7wg/Tri+/GyatzUFuU3M3HsG6BA== X-Google-Smtp-Source: AFSGD/Wq8HFtSxLnamG23NfcbPI6GAL/Uuv6EiovcC4EfWR7hEweEooI8f6NApO2xTfvCvC/tRtdvA== X-Received: by 2002:a2e:9983:: with SMTP id w3-v6mr4974459lji.133.1544917562241; Sat, 15 Dec 2018 15:46:02 -0800 (PST) Received: from localhost.localdomain (c-ae7b71d5.014-348-6c756e10.bbcust.telenor.se. [213.113.123.174]) by smtp.gmail.com with ESMTPSA id v19sm1709880lfe.69.2018.12.15.15.46.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 15 Dec 2018 15:46:01 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Felix Fietkau , Alban Bedel Subject: [PATCH 2/7 v1] spi: ath79: Convert to use CS GPIO descriptors Date: Sun, 16 Dec 2018 00:38:18 +0100 Message-Id: <20181215233823.1042-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181215233823.1042-1-linus.walleij@linaro.org> References: <20181215233823.1042-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This converts the ATH79 SPI master driver to use GPIO descriptors for chip select handling. The ATH79 driver was requesting the GPIO and driving it from the bitbang .chipselect callback. Do not request it anymore as the SPI core will request it, remove the line inversion semantics for the GPIO case (handled by gpiolib) and let the SPI core deal with requesting the GPIO line from the device tree node of the controller. This driver can be instantiated from a board file (no device tree) but the board files only use native CS (no GPIO lines) so we should be fine just letting the SPI core grab the GPIO from the device. The fact that the driver is actively driving the GPIO in the ath79_spi_chipselect() callback is confusing since the host does not set SPI_MASTER_GPIO_SS so this should not ever get called when using GPIO CS. I put in a comment about this. Cc: Felix Fietkau Cc: Alban Bedel Cc: Linuxarm Signed-off-by: Linus Walleij --- drivers/spi/spi-ath79.c | 42 ++++++++++++++--------------------------- 1 file changed, 14 insertions(+), 28 deletions(-) diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c index 3f6b657394de..ed1068ac055f 100644 --- a/drivers/spi/spi-ath79.c +++ b/drivers/spi/spi-ath79.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include @@ -78,9 +78,16 @@ static void ath79_spi_chipselect(struct spi_device *spi, int is_active) ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); } - if (gpio_is_valid(spi->cs_gpio)) { - /* SPI is normally active-low */ - gpio_set_value_cansleep(spi->cs_gpio, cs_high); + if (spi->cs_gpiod) { + /* + * SPI chipselect is normally active-low, but + * inversion semantics are handled by gpiolib. + * + * FIXME: is this ever used? The driver doesn't + * set SPI_MASTER_GPIO_SS so this callback should not + * get called if a CS GPIO is found by the SPI core. + */ + gpiod_set_value_cansleep(spi->cs_gpiod, is_active); } else { u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select); @@ -118,21 +125,8 @@ static void ath79_spi_disable(struct ath79_spi *sp) static int ath79_spi_setup_cs(struct spi_device *spi) { struct ath79_spi *sp = ath79_spidev_to_sp(spi); - int status; - status = 0; - if (gpio_is_valid(spi->cs_gpio)) { - unsigned long flags; - - flags = GPIOF_DIR_OUT; - if (spi->mode & SPI_CS_HIGH) - flags |= GPIOF_INIT_LOW; - else - flags |= GPIOF_INIT_HIGH; - - status = gpio_request_one(spi->cs_gpio, flags, - dev_name(&spi->dev)); - } else { + if (!spi->cs_gpiod) { u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select); if (spi->mode & SPI_CS_HIGH) @@ -143,13 +137,7 @@ static int ath79_spi_setup_cs(struct spi_device *spi) ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); } - return status; -} - -static void ath79_spi_cleanup_cs(struct spi_device *spi) -{ - if (gpio_is_valid(spi->cs_gpio)) - gpio_free(spi->cs_gpio); + return 0; } static int ath79_spi_setup(struct spi_device *spi) @@ -163,15 +151,12 @@ static int ath79_spi_setup(struct spi_device *spi) } status = spi_bitbang_setup(spi); - if (status && !spi->controller_state) - ath79_spi_cleanup_cs(spi); return status; } static void ath79_spi_cleanup(struct spi_device *spi) { - ath79_spi_cleanup_cs(spi); spi_bitbang_cleanup(spi); } @@ -225,6 +210,7 @@ static int ath79_spi_probe(struct platform_device *pdev) pdata = dev_get_platdata(&pdev->dev); + master->use_gpio_descriptors = true; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); master->setup = ath79_spi_setup; master->cleanup = ath79_spi_cleanup; From patchwork Sat Dec 15 23:38:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10732323 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C84A61399 for ; Sat, 15 Dec 2018 23:46:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B71C729F0A for ; Sat, 15 Dec 2018 23:46:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id ABB5729F26; Sat, 15 Dec 2018 23:46:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E69C529F0A for ; Sat, 15 Dec 2018 23:46:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726683AbeLOXqH (ORCPT ); Sat, 15 Dec 2018 18:46:07 -0500 Received: from mail-lj1-f194.google.com ([209.85.208.194]:37111 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727340AbeLOXqH (ORCPT ); Sat, 15 Dec 2018 18:46:07 -0500 Received: by mail-lj1-f194.google.com with SMTP id e5-v6so7951120lja.4 for ; Sat, 15 Dec 2018 15:46:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=iHv29zTjPCD2odmzofUPFh/r9yEa+aBrNFMCDdhB260=; b=HOS/z83jyGPTsaj4ayCHBIdzmDrxUUuGq7x7XjaDmR9hJ3ZKCrDiNiWFaQgUtpnpxY lJxacyHGB//swcYhT3PZ72CiDcf6C5vdotFyA3opHQfA80Niqsk+bUA9Z+C16/vqehux Mqxi/Mecwp8RgfOtOhD5iP9p8eGjrs6zpzGpQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iHv29zTjPCD2odmzofUPFh/r9yEa+aBrNFMCDdhB260=; b=Fh16H9xmkD8FXmaMdSS/iapo9rCwGvXo1wM4U2ALaBjiB1FtqNocntvipXb/ccAsg+ Rbg5IxioPY2I11jh5rSxEKlM0Z22IdhlT/Q4epmSpoJ2LT4BL5mkKo0++tWr8eYXKDpr LBjZf7DL6FIjdx38FbvIXtbpLy4WcuoJwRj66XYIFttTk1e+UvuN3CPlwq5cYysdZu9U Rmr+EJtDsiuDGsZl9AhaDm4wa3r4hbXuqrjbpeffczbdXzHTxapaDlP41gUTuJnxW4jU 9SOI/mx7HAaa1DlHc72I3Z1NBBhB4CkfxB9IVxRVK2aS/AOo+hObBwV00ZEZADiPJCep jZYQ== X-Gm-Message-State: AA+aEWYmyUql0j3MvG70U0pWBJuvZAKe/ZvLTq2KeRGQC2xsxfCH08uh csBGTyFjYu7z4ruwkp3LMw/vVg== X-Google-Smtp-Source: AFSGD/UE7zV2QpVSOTXF/tWBmLKpif1bMXIogNEIvejTW39oyO1NhKQb7z/SbbDQQwocV8VV+EtslQ== X-Received: by 2002:a2e:c41:: with SMTP id o1-v6mr4646239ljd.152.1544917564103; Sat, 15 Dec 2018 15:46:04 -0800 (PST) Received: from localhost.localdomain (c-ae7b71d5.014-348-6c756e10.bbcust.telenor.se. [213.113.123.174]) by smtp.gmail.com with ESMTPSA id v19sm1709880lfe.69.2018.12.15.15.46.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 15 Dec 2018 15:46:03 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Eugen Hristev , Nicolas Ferre , Radu Pirea Subject: [PATCH 3/7 v1] spi: atmel: Convert to use CS GPIO descriptors Date: Sun, 16 Dec 2018 00:38:19 +0100 Message-Id: <20181215233823.1042-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181215233823.1042-1-linus.walleij@linaro.org> References: <20181215233823.1042-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This converts the Atmel SPI master driver to use GPIO descriptors for chip select handling. The Atmel driver has duplicate code to look up and initialize CS GPIOs from the device tree, so this is removed. It further has code to retrieve a CS GPIO from .controller_data but this seems to be completely unused in the kernel (legacy codepath?) so I deleted this support. It keeps track of polarity when switching the CS, but this is not needed anymore since we moved this over to the gpiolib. The local handling of the "npcs_pin" (I guess this might mean "negative polarity chip select pin") is preserved, but I strongly suspect this can be switched over to handling by the core and using the SPI_MASTER_GPIO_SS flag on the master to assure that the additional CS handling in the driver is also done. Cc: Eugen Hristev Cc: Nicolas Ferre Cc: Radu Pirea Cc: Linuxarm Signed-off-by: Linus Walleij --- drivers/spi/spi-atmel.c | 93 ++++++++++++----------------------------- 1 file changed, 27 insertions(+), 66 deletions(-) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 74fddcd3282b..f53f0c5e63da 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -23,8 +23,7 @@ #include #include -#include -#include +#include #include #include @@ -312,7 +311,7 @@ struct atmel_spi { /* Controller-specific per-slave state */ struct atmel_spi_device { - unsigned int npcs_pin; + struct gpio_desc *npcs_pin; u32 csr; }; @@ -355,7 +354,6 @@ static bool atmel_spi_is_v2(struct atmel_spi *as) static void cs_activate(struct atmel_spi *as, struct spi_device *spi) { struct atmel_spi_device *asd = spi->controller_state; - unsigned active = spi->mode & SPI_CS_HIGH; u32 mr; if (atmel_spi_is_v2(as)) { @@ -379,7 +377,7 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) mr = spi_readl(as, MR); if (as->use_cs_gpios) - gpio_set_value(asd->npcs_pin, active); + gpiod_set_value(asd->npcs_pin, 1); } else { u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0; int i; @@ -396,19 +394,16 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) mr = spi_readl(as, MR); mr = SPI_BFINS(PCS, ~(1 << spi->chip_select), mr); if (as->use_cs_gpios && spi->chip_select != 0) - gpio_set_value(asd->npcs_pin, active); + gpiod_set_value(asd->npcs_pin, 1); spi_writel(as, MR, mr); } - dev_dbg(&spi->dev, "activate %u%s, mr %08x\n", - asd->npcs_pin, active ? " (high)" : "", - mr); + dev_dbg(&spi->dev, "activate NPCS, mr %08x\n", mr); } static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi) { struct atmel_spi_device *asd = spi->controller_state; - unsigned active = spi->mode & SPI_CS_HIGH; u32 mr; /* only deactivate *this* device; sometimes transfers to @@ -420,14 +415,12 @@ static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi) spi_writel(as, MR, mr); } - dev_dbg(&spi->dev, "DEactivate %u%s, mr %08x\n", - asd->npcs_pin, active ? " (low)" : "", - mr); + dev_dbg(&spi->dev, "DEactivate NPCS, mr %08x\n", mr); if (!as->use_cs_gpios) spi_writel(as, CR, SPI_BIT(LASTXFER)); else if (atmel_spi_is_v2(as) || spi->chip_select != 0) - gpio_set_value(asd->npcs_pin, !active); + gpiod_set_value(asd->npcs_pin, 0); } static void atmel_spi_lock(struct atmel_spi *as) __acquires(&as->lock) @@ -1188,7 +1181,6 @@ static int atmel_spi_setup(struct spi_device *spi) struct atmel_spi_device *asd; u32 csr; unsigned int bits = spi->bits_per_word; - unsigned int npcs_pin; as = spi_master_get_devdata(spi->master); @@ -1217,25 +1209,27 @@ static int atmel_spi_setup(struct spi_device *spi) csr |= SPI_BF(DLYBS, 0); csr |= SPI_BF(DLYBCT, 0); - /* chipselect must have been muxed as GPIO (e.g. in board setup) */ - npcs_pin = (unsigned long)spi->controller_data; - - if (!as->use_cs_gpios) - npcs_pin = spi->chip_select; - else if (gpio_is_valid(spi->cs_gpio)) - npcs_pin = spi->cs_gpio; - asd = spi->controller_state; if (!asd) { asd = kzalloc(sizeof(struct atmel_spi_device), GFP_KERNEL); if (!asd) return -ENOMEM; - if (as->use_cs_gpios) - gpio_direction_output(npcs_pin, - !(spi->mode & SPI_CS_HIGH)); + /* + * If use_cs_gpios is true this means that we have "cs-gpios" + * defined in the device tree node so we should have + * gotten the GPIO lines from the device tree inside the + * SPI core. Warn if this is not the case but continue since + * CS GPIOs are after all optional. + */ + if (as->use_cs_gpios) { + if (!spi->cs_gpiod) { + dev_err(&spi->dev, + "host claims to use CS GPIOs but no CS found in DT by the SPI core\n"); + } + asd->npcs_pin = spi->cs_gpiod; + } - asd->npcs_pin = npcs_pin; spi->controller_state = asd; } @@ -1473,41 +1467,6 @@ static void atmel_get_caps(struct atmel_spi *as) as->caps.has_pdc_support = version < 0x212; } -/*-------------------------------------------------------------------------*/ -static int atmel_spi_gpio_cs(struct platform_device *pdev) -{ - struct spi_master *master = platform_get_drvdata(pdev); - struct atmel_spi *as = spi_master_get_devdata(master); - struct device_node *np = master->dev.of_node; - int i; - int ret = 0; - int nb = 0; - - if (!as->use_cs_gpios) - return 0; - - if (!np) - return 0; - - nb = of_gpio_named_count(np, "cs-gpios"); - for (i = 0; i < nb; i++) { - int cs_gpio = of_get_named_gpio(pdev->dev.of_node, - "cs-gpios", i); - - if (cs_gpio == -EPROBE_DEFER) - return cs_gpio; - - if (gpio_is_valid(cs_gpio)) { - ret = devm_gpio_request(&pdev->dev, cs_gpio, - dev_name(&pdev->dev)); - if (ret) - return ret; - } - } - - return 0; -} - static void atmel_spi_init(struct atmel_spi *as) { spi_writel(as, CR, SPI_BIT(SWRST)); @@ -1560,6 +1519,7 @@ static int atmel_spi_probe(struct platform_device *pdev) goto out_free; /* the spi->mode bits understood by this driver: */ + master->use_gpio_descriptors = true; master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 16); master->dev.of_node = pdev->dev.of_node; @@ -1592,6 +1552,11 @@ static int atmel_spi_probe(struct platform_device *pdev) atmel_get_caps(as); + /* + * If there are chip selects in the device tree, those will be + * discovered by the SPI core when registering the SPI master + * and assigned to each SPI device. + */ as->use_cs_gpios = true; if (atmel_spi_is_v2(as) && pdev->dev.of_node && @@ -1600,10 +1565,6 @@ static int atmel_spi_probe(struct platform_device *pdev) master->num_chipselect = 4; } - ret = atmel_spi_gpio_cs(pdev); - if (ret) - goto out_unmap_regs; - as->use_dma = false; as->use_pdc = false; if (as->caps.has_dma_support) { From patchwork Sat Dec 15 23:38:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10732325 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 007851399 for ; Sat, 15 Dec 2018 23:46:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E405F29F0A for ; Sat, 15 Dec 2018 23:46:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D88CD29F26; Sat, 15 Dec 2018 23:46:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 660A229F0A for ; Sat, 15 Dec 2018 23:46:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727872AbeLOXqJ (ORCPT ); Sat, 15 Dec 2018 18:46:09 -0500 Received: from mail-lj1-f194.google.com ([209.85.208.194]:41335 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727638AbeLOXqI (ORCPT ); Sat, 15 Dec 2018 18:46:08 -0500 Received: by mail-lj1-f194.google.com with SMTP id k15-v6so7949467ljc.8 for ; Sat, 15 Dec 2018 15:46:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=AdOu5d31aFQ5LgQsJ6SO2qeANRtSbPy5gK/PxN19mo4=; b=Wwr8azjRTxR4AmfuF+AR9y5O+cet2FyJTsdongPuAzLD8th8MVgBl9IQ7hfl7ARaq3 rb6NO5TjMrhOopsLLs53TrlzUP/9nhr1FZkR3fFrJF3F5X7gzc4NiFMe9Skor12dfVtY Y5bAfF3vWIrQvFmq5IVw3/lOWHEwae695ln8I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AdOu5d31aFQ5LgQsJ6SO2qeANRtSbPy5gK/PxN19mo4=; b=quvHPui3riYhzbtIhc9A9IcFS87FHkcCllZNKKSsSMS/99+KB0aJ444C1jpoPxPgkI rgPQOhN6MBqv/+f6ZuczjG0jCybQEyJjh/p1pR5Za1aFWTMiwWZNjNzAp8wYghhCW3ws pkooOJagA2mAMNu1ZqdE3q7FYjPgEqxJzqD1I+b5wx8juhnXVnIPAMM4ODlSYsBelNEr q0H2uLe+26OQfj1DNzi5HwpdPQGVnUmd81DxgPU1M5iTWx8TEWf3aXKCEdjAezWluyBX dLCe3oO3w2kEaOD0UPsLfNSDJtLo/Kt/kfr58qJRPO/R1cMNcYdCC73XfjVb9lJ6M96Z UHxg== X-Gm-Message-State: AA+aEWZx/b8Ib+PsxJoxah9CBo2wl4J2XIEsF5i6ez8zM8ZNX1S2JbVj EjkZBm9y3prWy2OAkMj/D8ZUSQ== X-Google-Smtp-Source: AFSGD/VNMbOthKMBD/k96WJINEcZV878m8QwM4gWB1T176xlnfIbT4N0jwI7zg/Bxnp1spmrbNa0MA== X-Received: by 2002:a2e:3603:: with SMTP id d3-v6mr4513112lja.46.1544917565992; Sat, 15 Dec 2018 15:46:05 -0800 (PST) Received: from localhost.localdomain (c-ae7b71d5.014-348-6c756e10.bbcust.telenor.se. [213.113.123.174]) by smtp.gmail.com with ESMTPSA id v19sm1709880lfe.69.2018.12.15.15.46.04 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 15 Dec 2018 15:46:05 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Wei Yongjun , Janek Kotas Subject: [PATCH 4/7 v1] spi: cadence: Convert to use CS GPIO descriptors Date: Sun, 16 Dec 2018 00:38:20 +0100 Message-Id: <20181215233823.1042-5-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181215233823.1042-1-linus.walleij@linaro.org> References: <20181215233823.1042-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This converts the Cadence SPI master driver to use GPIO descriptors for chip select handling. The Cadence driver was allocating a state container just to hold the requested GPIO line and contained lots of polarity inversion code. As this is all handled by gpiolib and a simple devm_* request in the core, and as the driver is fully device tree only, most of this code chunk goes away in favour of central handling. The setup/cleanup callbacks goes away. This driver does NOT drive the CS line by setting the value of the GPIO so it relies on the SPI core to do this, which should work just fine with the descriptors. Cc: Wei Yongjun Cc: Janek Kotas Cc: Linuxarm Signed-off-by: Linus Walleij --- drivers/spi/spi-cadence.c | 67 ++------------------------------------- 1 file changed, 2 insertions(+), 65 deletions(-) diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c index 7c88f74f7f47..e332d173dbf9 100644 --- a/drivers/spi/spi-cadence.c +++ b/drivers/spi/spi-cadence.c @@ -13,7 +13,7 @@ #include #include -#include +#include #include #include #include @@ -128,10 +128,6 @@ struct cdns_spi { u32 is_decoded_cs; }; -struct cdns_spi_device_data { - bool gpio_requested; -}; - /* Macros for the SPI controller read/write */ static inline u32 cdns_spi_read(struct cdns_spi *xspi, u32 offset) { @@ -469,64 +465,6 @@ static int cdns_unprepare_transfer_hardware(struct spi_master *master) return 0; } -static int cdns_spi_setup(struct spi_device *spi) -{ - - int ret = -EINVAL; - struct cdns_spi_device_data *cdns_spi_data = spi_get_ctldata(spi); - - /* this is a pin managed by the controller, leave it alone */ - if (spi->cs_gpio == -ENOENT) - return 0; - - /* this seems to be the first time we're here */ - if (!cdns_spi_data) { - cdns_spi_data = kzalloc(sizeof(*cdns_spi_data), GFP_KERNEL); - if (!cdns_spi_data) - return -ENOMEM; - cdns_spi_data->gpio_requested = false; - spi_set_ctldata(spi, cdns_spi_data); - } - - /* if we haven't done so, grab the gpio */ - if (!cdns_spi_data->gpio_requested && gpio_is_valid(spi->cs_gpio)) { - ret = gpio_request_one(spi->cs_gpio, - (spi->mode & SPI_CS_HIGH) ? - GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH, - dev_name(&spi->dev)); - if (ret) - dev_err(&spi->dev, "can't request chipselect gpio %d\n", - spi->cs_gpio); - else - cdns_spi_data->gpio_requested = true; - } else { - if (gpio_is_valid(spi->cs_gpio)) { - int mode = ((spi->mode & SPI_CS_HIGH) ? - GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH); - - ret = gpio_direction_output(spi->cs_gpio, mode); - if (ret) - dev_err(&spi->dev, "chipselect gpio %d setup failed (%d)\n", - spi->cs_gpio, ret); - } - } - - return ret; -} - -static void cdns_spi_cleanup(struct spi_device *spi) -{ - struct cdns_spi_device_data *cdns_spi_data = spi_get_ctldata(spi); - - if (cdns_spi_data) { - if (cdns_spi_data->gpio_requested) - gpio_free(spi->cs_gpio); - kfree(cdns_spi_data); - spi_set_ctldata(spi, NULL); - } - -} - /** * cdns_spi_probe - Probe method for the SPI driver * @pdev: Pointer to the platform_device structure @@ -621,13 +559,12 @@ static int cdns_spi_probe(struct platform_device *pdev) goto clk_dis_all; } + master->use_gpio_descriptors = true; master->prepare_transfer_hardware = cdns_prepare_transfer_hardware; master->prepare_message = cdns_prepare_message; master->transfer_one = cdns_transfer_one; master->unprepare_transfer_hardware = cdns_unprepare_transfer_hardware; master->set_cs = cdns_spi_chipselect; - master->setup = cdns_spi_setup; - master->cleanup = cdns_spi_cleanup; master->auto_runtime_pm = true; master->mode_bits = SPI_CPOL | SPI_CPHA; From patchwork Sat Dec 15 23:38:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10732327 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A1FCE112C for ; Sat, 15 Dec 2018 23:46:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9182429F0A for ; Sat, 15 Dec 2018 23:46:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 860AE29F26; Sat, 15 Dec 2018 23:46:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5739F29F0A for ; Sat, 15 Dec 2018 23:46:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727558AbeLOXqK (ORCPT ); Sat, 15 Dec 2018 18:46:10 -0500 Received: from mail-lf1-f67.google.com ([209.85.167.67]:43689 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727340AbeLOXqJ (ORCPT ); Sat, 15 Dec 2018 18:46:09 -0500 Received: by mail-lf1-f67.google.com with SMTP id u18so6879315lff.10 for ; Sat, 15 Dec 2018 15:46:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=uHetMijksPyCSUIw0pfFByRtDh1ZLhdoLZ37wl+MRTg=; b=Nq3Oq1UeVYctW+Bqj8cFUQZu2ty1QQ2flasO35K/x9chcsYyScmV7U8DUaV0hn3H9+ BDOpYOo/4XooB90jPTLW2vd/fErc1LmUsloL0oDdxTv6A2Q9Uw7KroI25jVr/xeXg/mH Lgbua95vHv5AKfKK8KVxuecsTXsoZXzDkPH2U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uHetMijksPyCSUIw0pfFByRtDh1ZLhdoLZ37wl+MRTg=; b=U3INdMm+Kh6bkslpSVlAncUf0A7xIBOMpDTcz52aKk8cIqntHIUA7Ot+mqaNNc73pV MVLLFO6JU5nKw/Khw+LMK405/OGc8en3dq5salry52XTobClpwULMCMEZEo4pEAzPVxe 1YLdcbx6kVjgdhbs+12iswO3fLpoPpybIIITm726WHyzgkpjX/WaVO9McgXrOsHYT07S Vu6tGZKT8n5YmZuJpa3QOUcnaqhTUdJlNQX8RKD8l3nS/2K5AU8YvWfCq9qmjEFjaiBp I3pLS90oR4OLqNayeDq4pLHzN7VQdQZ0QWmSrTDKBztiNjjsjZ/YqB/JdKlgahaUt924 D38w== X-Gm-Message-State: AA+aEWYj9zC3KRlzJOVe6WVuuy1gdWj9KFymkuQ5U+8WaBg32zWo5XHa GCMgICaXs/LqrdhFd11FcmeI9w== X-Google-Smtp-Source: AFSGD/VVtttcj/Oq9K6soNsMuS6QIPjR0ajHGIzrI6KA1+9freprOgnrvmECV+fR99jgCIon+pHVwA== X-Received: by 2002:a19:1f54:: with SMTP id f81mr4330093lff.153.1544917567934; Sat, 15 Dec 2018 15:46:07 -0800 (PST) Received: from localhost.localdomain (c-ae7b71d5.014-348-6c756e10.bbcust.telenor.se. [213.113.123.174]) by smtp.gmail.com with ESMTPSA id v19sm1709880lfe.69.2018.12.15.15.46.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 15 Dec 2018 15:46:06 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Alexander Shiyan Subject: [PATCH 5/7 v1] spi: clps711x: Convert to use CS GPIO descriptors Date: Sun, 16 Dec 2018 00:38:21 +0100 Message-Id: <20181215233823.1042-6-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181215233823.1042-1-linus.walleij@linaro.org> References: <20181215233823.1042-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This converts the CLPS711x SPI master driver to use GPIO descriptors for chip select handling. The CLPS711x driver was merely requesting the GPIO and setting the CS line non-asserted so this was a pretty straight-forward conversion. The setup callback goes away. Cc: Alexander Shiyan Cc: Linuxarm Signed-off-by: Linus Walleij --- drivers/spi/spi-clps711x.c | 23 ++--------------------- 1 file changed, 2 insertions(+), 21 deletions(-) diff --git a/drivers/spi/spi-clps711x.c b/drivers/spi/spi-clps711x.c index 18193df2eba8..8c03c409fc07 100644 --- a/drivers/spi/spi-clps711x.c +++ b/drivers/spi/spi-clps711x.c @@ -11,7 +11,7 @@ #include #include -#include +#include #include #include #include @@ -36,25 +36,6 @@ struct spi_clps711x_data { int len; }; -static int spi_clps711x_setup(struct spi_device *spi) -{ - if (!spi->controller_state) { - int ret; - - ret = devm_gpio_request(&spi->master->dev, spi->cs_gpio, - dev_name(&spi->master->dev)); - if (ret) - return ret; - - spi->controller_state = spi; - } - - /* We are expect that SPI-device is not selected */ - gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); - - return 0; -} - static int spi_clps711x_prepare_message(struct spi_master *master, struct spi_message *msg) { @@ -125,11 +106,11 @@ static int spi_clps711x_probe(struct platform_device *pdev) if (!master) return -ENOMEM; + master->use_gpio_descriptors = true; master->bus_num = -1; master->mode_bits = SPI_CPHA | SPI_CS_HIGH; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 8); master->dev.of_node = pdev->dev.of_node; - master->setup = spi_clps711x_setup; master->prepare_message = spi_clps711x_prepare_message; master->transfer_one = spi_clps711x_transfer_one; From patchwork Sat Dec 15 23:38:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10732329 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 45C611399 for ; Sat, 15 Dec 2018 23:46:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 357A829F0A for ; Sat, 15 Dec 2018 23:46:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 29D4029F26; Sat, 15 Dec 2018 23:46:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 90D7F29F0A for ; Sat, 15 Dec 2018 23:46:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728593AbeLOXqN (ORCPT ); Sat, 15 Dec 2018 18:46:13 -0500 Received: from mail-lj1-f196.google.com ([209.85.208.196]:34809 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727256AbeLOXqN (ORCPT ); Sat, 15 Dec 2018 18:46:13 -0500 Received: by mail-lj1-f196.google.com with SMTP id u6-v6so7976702ljd.1 for ; Sat, 15 Dec 2018 15:46:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+QVluDsAh2KxwyVgFTK4TpkVU9aWMBwmEKsmYxoK/Rw=; b=aG3aq7ylSyaYGwCyBe7eIqpyTzNqaGRrHhRNlSSjaHS9UJLXxicmSIp2ja6Tc0Lr0a DPzBuZMr2Ta+M4tE9Nyb5b/NCe9V0p9yJyiIjJJFG2tNYz5xJyRcptxuplcN2zOU34Nf 8cjLU0F2AKlGErr5dAUn1w2lL7KNlC3ilNj3c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+QVluDsAh2KxwyVgFTK4TpkVU9aWMBwmEKsmYxoK/Rw=; b=sY8YMhaTIurVD47b33epSb0O8df9Qo5AFof1YSk9MYwwW2GQEQ1P7eGYDQjRuVJvfx YUEZcW8R/42SBHBfGsh0sRKt+dJq0IVGiCJ2/JSJEeFLeO71bIYYSqKZ+N4ZNyL54b0f ejhWjx+8d2NTZ0agWpujcg2dh/2Utd5UDNr/j+7v1C48mME6Uan30vh/Cw33vf9xhFlO DTI/87asClv878iC/BMwTlKEkpYuTioN6PYjWADqvjXUgJ05P/yH4Nil6NBNs7CqGlOg FBsybTXFD09W8o9432kqgGkNVoN3cnWk1d5Q08Gl+vMxHCrYRj0UrVGgryaegkEFoT3n o0Tw== X-Gm-Message-State: AA+aEWYqBMEDMB9NjaVEW8ARJCJA9mShGikQyV8B0qSg3hiRgE6zzXCC tqG9SIbj6w0BfcxBwSiCMC9tZQ== X-Google-Smtp-Source: AFSGD/WHF54/4EPAcTpU4tgUYSjAg4VZwCGPMFvywnbABdLR05sIVWxGT6f9QYm5kB9w2LJyGjF7Zg== X-Received: by 2002:a2e:4601:: with SMTP id t1-v6mr5041487lja.111.1544917570088; Sat, 15 Dec 2018 15:46:10 -0800 (PST) Received: from localhost.localdomain (c-ae7b71d5.014-348-6c756e10.bbcust.telenor.se. [213.113.123.174]) by smtp.gmail.com with ESMTPSA id v19sm1709880lfe.69.2018.12.15.15.46.08 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 15 Dec 2018 15:46:08 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , David Lechner Subject: [PATCH 6/7 v1] spi: davinci: Convert to use CS GPIO descriptors Date: Sun, 16 Dec 2018 00:38:22 +0100 Message-Id: <20181215233823.1042-7-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181215233823.1042-1-linus.walleij@linaro.org> References: <20181215233823.1042-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This converts the DaVinci SPI master driver to use GPIO descriptors for chip select handling. DaVinci parses the device tree a second time for the chip select GPIOs (no relying on the parsing already happening in the SPI core) and handles inversion semantics locally. We simply drop the extra parsing and set up and move the CS handling to the core and gpiolib. The fact that the driver is actively driving the GPIO in the davinci_spi_chipselect() callback is confusing since the host does not set SPI_MASTER_GPIO_SS so this should not ever get called when using GPIO CS. I put in a comment about this. This driver also supports instantiation from board files, but these are all using native chip selects so no problem with GPIO lines here. Cc: David Lechner Cc: Bartosz Golaszewski Cc: Linuxarm Signed-off-by: Linus Walleij --- drivers/spi/spi-davinci.c | 53 ++++++++++----------------------------- 1 file changed, 13 insertions(+), 40 deletions(-) diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 56adec83f8fc..5870afe3845b 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -15,7 +15,7 @@ #include #include -#include +#include #include #include #include @@ -25,7 +25,6 @@ #include #include #include -#include #include #include #include @@ -222,12 +221,17 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) * Board specific chip select logic decides the polarity and cs * line for the controller */ - if (spi->cs_gpio >= 0) { + if (spi->cs_gpiod) { + /* + * FIXME: is this code ever executed? This host does not + * set SPI_MASTER_GPIO_SS so this chipselect callback should + * not get called from the SPI core when we are using + * GPIOs for chip select. + */ if (value == BITBANG_CS_ACTIVE) - gpio_set_value(spi->cs_gpio, spi->mode & SPI_CS_HIGH); + gpiod_set_value(spi->cs_gpiod, 1); else - gpio_set_value(spi->cs_gpio, - !(spi->mode & SPI_CS_HIGH)); + gpiod_set_value(spi->cs_gpiod, 0); } else { if (value == BITBANG_CS_ACTIVE) { if (!(spi->mode & SPI_CS_WORD)) @@ -418,7 +422,6 @@ static int davinci_spi_of_setup(struct spi_device *spi) */ static int davinci_spi_setup(struct spi_device *spi) { - int retval = 0; struct davinci_spi *dspi; struct spi_master *master = spi->master; struct device_node *np = spi->dev.of_node; @@ -427,21 +430,11 @@ static int davinci_spi_setup(struct spi_device *spi) dspi = spi_master_get_devdata(spi->master); if (!(spi->mode & SPI_NO_CS)) { - if (np && (master->cs_gpios != NULL) && (spi->cs_gpio >= 0)) { - retval = gpio_direction_output( - spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); + if (np && spi->cs_gpiod) internal_cs = false; - } - - if (retval) { - dev_err(&spi->dev, "GPIO %d setup failed (%d)\n", - spi->cs_gpio, retval); - return retval; - } - if (internal_cs) { + if (internal_cs) set_io_bits(dspi->base + SPIPC0, 1 << spi->chip_select); - } } if (spi->mode & SPI_READY) @@ -962,6 +955,7 @@ static int davinci_spi_probe(struct platform_device *pdev) if (ret) goto free_master; + master->use_gpio_descriptors = true; master->dev.of_node = pdev->dev.of_node; master->bus_num = pdev->id; master->num_chipselect = pdata->num_chipselect; @@ -980,27 +974,6 @@ static int davinci_spi_probe(struct platform_device *pdev) if (dspi->version == SPI_VERSION_2) dspi->bitbang.flags |= SPI_READY; - if (pdev->dev.of_node) { - int i; - - for (i = 0; i < pdata->num_chipselect; i++) { - int cs_gpio = of_get_named_gpio(pdev->dev.of_node, - "cs-gpios", i); - - if (cs_gpio == -EPROBE_DEFER) { - ret = cs_gpio; - goto free_clk; - } - - if (gpio_is_valid(cs_gpio)) { - ret = devm_gpio_request(&pdev->dev, cs_gpio, - dev_name(&pdev->dev)); - if (ret) - goto free_clk; - } - } - } - dspi->bitbang.txrx_bufs = davinci_spi_bufs; ret = davinci_spi_request_dma(dspi); From patchwork Sat Dec 15 23:38:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10732331 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E1E7C1399 for ; Sat, 15 Dec 2018 23:46:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D13DC29F0A for ; Sat, 15 Dec 2018 23:46:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C556A29F26; Sat, 15 Dec 2018 23:46:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4555929F0A for ; Sat, 15 Dec 2018 23:46:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727256AbeLOXqP (ORCPT ); Sat, 15 Dec 2018 18:46:15 -0500 Received: from mail-lf1-f68.google.com ([209.85.167.68]:33098 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727638AbeLOXqP (ORCPT ); Sat, 15 Dec 2018 18:46:15 -0500 Received: by mail-lf1-f68.google.com with SMTP id i26so6906160lfc.0 for ; Sat, 15 Dec 2018 15:46:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kw40h7bKx7SEAJ/VmU1uQ3cysjIgsprCi6NOYoWS84k=; b=efy9fb6EfNUs97v7ULAo/Mt8Vd8d0xmvoypOXluCnyCw5iIgIPBnLBjVvEAZqyh0TB Ao4ZilXjAOtJyWoc7KcnTzwX7Rd4qItKsT9YuiSCCv5RTW7gRVEa85COdMj0HTu1N0t/ xzgH8rom9qexaanADQZ96C9IhhmktwrZBPkMU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kw40h7bKx7SEAJ/VmU1uQ3cysjIgsprCi6NOYoWS84k=; b=iCHb+xaSKOYBaHkcdsZUoa9E8S4/UYiIowFOEW/83wSFEIWyhbZWCeV1YNk4fVmVgv dO3prv+lYdY+XZDmgjVB6/l8YT9lTe31yXjfzLAdO5hVIpb62G13dt4df3eyrMDRZb+l yfkckMjmTyabj2hRvcwaH/TJxN42OJ/2PHGgibMpfmKqwbHSXU76oh/JL8DADknScOQG tQOJRu9B8qoVVsg9YlsSEIBuzr8M0F1gdKbBO2AwwBrw9L6ibmCCXgv+/63fJ27WnLZg DuIdciJsxc/lNL16Vnz9VauVD3hMQZ1/rVPq5n5mSYClPHgeQuAiJezV8tvaZjVgiiIW cj6g== X-Gm-Message-State: AA+aEWZvu67jbF5zyFZqWmQr5vHIXgycMAl8E0HYB6OweNWP4gJDQAu7 zRhzse5k0VcsnkNJixeejVf5CyEHOpnaLQ== X-Google-Smtp-Source: AFSGD/WjmayLiNiqIEmWtuyy7Htg1PxO8uaPT1YnAgYFrWkSvQaPmfwfBXPXwO5njUyhdR5rH68utA== X-Received: by 2002:a19:3b45:: with SMTP id i66mr4792542lfa.28.1544917573595; Sat, 15 Dec 2018 15:46:13 -0800 (PST) Received: from localhost.localdomain (c-ae7b71d5.014-348-6c756e10.bbcust.telenor.se. [213.113.123.174]) by smtp.gmail.com with ESMTPSA id v19sm1709880lfe.69.2018.12.15.15.46.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 15 Dec 2018 15:46:12 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Talel Shenhar , Simon Goldschmidt , Alexandre Belloni Subject: [PATCH 7/7 v1] spi: dw: Convert to use CS GPIO descriptors Date: Sun, 16 Dec 2018 00:38:23 +0100 Message-Id: <20181215233823.1042-8-linus.walleij@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181215233823.1042-1-linus.walleij@linaro.org> References: <20181215233823.1042-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This converts the DesignWare (dw) SPI master driver to use GPIO descriptors for chip select handling. This driver has a duplicate DT parser in addition to the one in the core, sets up the line as non-asserted and relies on the core to drive the GPIOs. It is a pretty straight-forward conversion. Cc: Talel Shenhar Cc: Simon Goldschmidt Cc: Alexandre Belloni Cc: Linuxarm Signed-off-by: Linus Walleij Tested-by: Jay Fang Reviewed-by: Alexandre Belloni --- drivers/spi/spi-dw-mmio.c | 22 ---------------------- drivers/spi/spi-dw.c | 9 +-------- 2 files changed, 1 insertion(+), 30 deletions(-) diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index 3ffb6a40fe0c..00a43c19f2a4 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include #include @@ -184,27 +183,6 @@ static int dw_spi_mmio_probe(struct platform_device *pdev) dws->num_cs = num_cs; - if (pdev->dev.of_node) { - int i; - - for (i = 0; i < dws->num_cs; i++) { - int cs_gpio = of_get_named_gpio(pdev->dev.of_node, - "cs-gpios", i); - - if (cs_gpio == -EPROBE_DEFER) { - ret = cs_gpio; - goto out; - } - - if (gpio_is_valid(cs_gpio)) { - ret = devm_gpio_request(&pdev->dev, cs_gpio, - dev_name(&pdev->dev)); - if (ret) - goto out; - } - } - } - init_func = device_get_match_data(&pdev->dev); if (init_func) { ret = init_func(pdev, dwsmmio); diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c index b705f2bdb8b9..22a7998dbc08 100644 --- a/drivers/spi/spi-dw.c +++ b/drivers/spi/spi-dw.c @@ -20,7 +20,6 @@ #include #include #include -#include #include "spi-dw.h" @@ -425,13 +424,6 @@ static int dw_spi_setup(struct spi_device *spi) chip->tmode = SPI_TMOD_TR; - if (gpio_is_valid(spi->cs_gpio)) { - ret = gpio_direction_output(spi->cs_gpio, - !(spi->mode & SPI_CS_HIGH)); - if (ret) - return ret; - } - return 0; } @@ -496,6 +488,7 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws) goto err_free_master; } + master->use_gpio_descriptors = true; master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16); master->bus_num = dws->bus_num;