From patchwork Wed Nov 3 03:37:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yunfei Dong X-Patchwork-Id: 12599993 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1AE01C4332F for ; Wed, 3 Nov 2021 03:37:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EFE1760F58 for ; Wed, 3 Nov 2021 03:37:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230250AbhKCDjy (ORCPT ); Tue, 2 Nov 2021 23:39:54 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:44350 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S230059AbhKCDjw (ORCPT ); Tue, 2 Nov 2021 23:39:52 -0400 X-UUID: 865cbfb917494ae18ed211057195df6b-20211103 X-UUID: 865cbfb917494ae18ed211057195df6b-20211103 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1412010393; Wed, 03 Nov 2021 11:37:13 +0800 Received: from mtkexhb02.mediatek.inc (172.21.101.103) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 3 Nov 2021 11:37:12 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb02.mediatek.inc (172.21.101.103) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 3 Nov 2021 11:37:12 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 3 Nov 2021 11:37:10 +0800 From: Yunfei Dong To: Steve Cho , Yunfei Dong , Alexandre Courbot , Hans Verkuil , Tzung-Bi Shih , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: Hsin-Yi Wang , Fritz Koenig , Dafna Hirschfeld , Benjamin Gaignard , Daniel Vetter , dri-devel , Irui Wang , , , , , , , Subject: [PATCH v2] media: mtk-vcodec: Align width and height to 64 bytes Date: Wed, 3 Nov 2021 11:37:08 +0800 Message-ID: <20211103033708.14469-1-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Width and height need to 64 bytes aligned when setting the format. Need to make sure all is 64 bytes align when use width and height to calculate buffer size. Signed-off-by: Yunfei Dong Change-Id: I39886b1a6b433c92565ddbf297eb193456eec1d2 Acked-by: Nicolas Dufresne --- drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.h | 1 + drivers/media/platform/mtk-vcodec/vdec/vdec_h264_req_if.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.h b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.h index e30806c1faea..66cd6d2242c3 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.h +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.h @@ -11,6 +11,7 @@ #include #include +#define VCODEC_DEC_ALIGNED_64 64 #define VCODEC_CAPABILITY_4K_DISABLED 0x10 #define VCODEC_DEC_4K_CODED_WIDTH 4096U #define VCODEC_DEC_4K_CODED_HEIGHT 2304U diff --git a/drivers/media/platform/mtk-vcodec/vdec/vdec_h264_req_if.c b/drivers/media/platform/mtk-vcodec/vdec/vdec_h264_req_if.c index d402fc4bda69..e1a3011772a9 100644 --- a/drivers/media/platform/mtk-vcodec/vdec/vdec_h264_req_if.c +++ b/drivers/media/platform/mtk-vcodec/vdec/vdec_h264_req_if.c @@ -562,8 +562,8 @@ static void get_pic_info(struct vdec_h264_slice_inst *inst, { struct mtk_vcodec_ctx *ctx = inst->ctx; - ctx->picinfo.buf_w = (ctx->picinfo.pic_w + 15) & 0xFFFFFFF0; - ctx->picinfo.buf_h = (ctx->picinfo.pic_h + 31) & 0xFFFFFFE0; + ctx->picinfo.buf_w = ALIGN(ctx->picinfo.pic_w, VCODEC_DEC_ALIGNED_64); + ctx->picinfo.buf_h = ALIGN(ctx->picinfo.pic_h, VCODEC_DEC_ALIGNED_64); ctx->picinfo.fb_sz[0] = ctx->picinfo.buf_w * ctx->picinfo.buf_h; ctx->picinfo.fb_sz[1] = ctx->picinfo.fb_sz[0] >> 1; inst->vsi_ctx.dec.cap_num_planes =