From patchwork Sat Nov 6 18:37:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12606481 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02285C433F5 for ; Sat, 6 Nov 2021 18:38:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DB54E611C0 for ; Sat, 6 Nov 2021 18:38:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234288AbhKFSlP (ORCPT ); Sat, 6 Nov 2021 14:41:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58714 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230089AbhKFSlI (ORCPT ); Sat, 6 Nov 2021 14:41:08 -0400 Received: from mail-io1-xd2c.google.com (mail-io1-xd2c.google.com [IPv6:2607:f8b0:4864:20::d2c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 450E5C061570; Sat, 6 Nov 2021 11:38:27 -0700 (PDT) Received: by mail-io1-xd2c.google.com with SMTP id y73so14521749iof.4; Sat, 06 Nov 2021 11:38:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2iJtZJ59mXT9HiN2pJfQsmwuO5Ay/oLqEZ6B5Z1rez8=; b=huL1Q3RvPdZLwL1B4VD0yy5iqN7qjeLgouX1nzKV0MSpP0rVbF90g2QC8IjJNhdHjq FMq2Yd7oKI0UN9tJXgi3ggp2hHZTwWvfgV2si5l8Zr7FZGfWNS9gzLHsApN/S9JF6LvH JlqCZqSyy9ucvo33CyOiCn4ix9dm3s1isL0Kt842XKPUlbT1nEE9Rh+rlSTgxe5x8ira WFmxUTutS/OJ5TdoNIJ0/tu13QmV9anSg1HTDSADba1FpWeKugG+tp0knW25v7vddqPr 59akRJduQNwYuFo9bGvIK9JM0Whwaemcmsfhvth/NhsBplpSXOklAo9iDSlWb+01JemD bYrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2iJtZJ59mXT9HiN2pJfQsmwuO5Ay/oLqEZ6B5Z1rez8=; b=ikKM4h3F24mirtnPlVh+yIplhGobc02P86cUMZRO28I5I6MIoxXYop6ohY1I/3qyZn All03FYemXG+W+wzxD+2SHP0247H+PQl7Da8GncvG6wOqPpPpIt3ROrsKMGnnELDDMR3 h2aVHWm7g4ZSJlvBV+updD75AfDSiXXlbX4na1VFi5c520j5h8CEBQglUIIRjSAMLkZA yx5q3Z8Xjdq8mn7bZ5ghhEvjoVZP19ouBeEanRzOtkL/R6sfDqi5QKYv4IpCiv9jPg7q UEo129y2u0kjhtv3vJWudh4MQaSc2FqzSnXI4sbqGWLIk831cybscNiCLQOdM9+HmSse TOSw== X-Gm-Message-State: AOAM532LXnF+4RfqG6ulqzcLSA7H1otw8Y/4Zh59pidZr757A5SjvNI7 //bSX3tg+sxQxV8xMSvgx9ucLoccg1KVag== X-Google-Smtp-Source: ABdhPJx+3o8EMj0oD3At5r5C4UYWXVHdIWZvD5zqRZY7WaiqCTJIaEEqcNhP8aFmdRXtqKPplM1Apg== X-Received: by 2002:a05:6638:1687:: with SMTP id f7mr15382311jat.96.1636223906311; Sat, 06 Nov 2021 11:38:26 -0700 (PDT) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:64ba:1c0f:6d36:c11d]) by smtp.gmail.com with ESMTPSA id o10sm7174077ilu.49.2021.11.06.11.38.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 Nov 2021 11:38:25 -0700 (PDT) From: Adam Ford To: linux-media@vger.kernel.org Cc: tharvey@gateworks.com, frieder.schrempf@kontron.de, marek.vasut@gmail.com, jagan@amarulasolutions.com, aford@beaconembedded.com, cstevens@beaconembedded.com, Adam Ford , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , Heiko Stuebner , Lucas Stach , Joakim Zhang , Alice Guo , Peng Fan , linux-rockchip@lists.infradead.org (open list:HANTRO VPU CODEC DRIVER), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list), linux-staging@lists.linux.dev (open list:STAGING SUBSYSTEM) Subject: [RFC 1/5] media: hantro: Add support for i.MX8M Mini Date: Sat, 6 Nov 2021 13:37:57 -0500 Message-Id: <20211106183802.893285-2-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211106183802.893285-1-aford173@gmail.com> References: <20211106183802.893285-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The i.MX8M Mini has a similar implementation of the Hantro G1 and G2 decoders, but the Mini uses the vpu-blk-ctrl for handling the VPU resets through the power domain system. As such, there are functions present in the 8MQ that are not applicable to the Mini which requires the driver to have a different compatible flags. Signed-off-by: Adam Ford --- drivers/staging/media/hantro/hantro_drv.c | 2 + drivers/staging/media/hantro/hantro_hw.h | 2 + drivers/staging/media/hantro/imx8m_vpu_hw.c | 60 +++++++++++++++++++++ 3 files changed, 64 insertions(+) diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c index fb82b9297a2b..2aa1c520be50 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -592,6 +592,8 @@ static const struct of_device_id of_hantro_match[] = { { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, }, #endif #ifdef CONFIG_VIDEO_HANTRO_IMX8M + { .compatible = "nxp,imx8mm-vpu", .data = &imx8mm_vpu_variant, }, + { .compatible = "nxp,imx8mm-vpu-g2", .data = &imx8mm_vpu_g2_variant }, { .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, }, { .compatible = "nxp,imx8mq-vpu-g2", .data = &imx8mq_vpu_g2_variant }, #endif diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h index 267a6d33a47b..ae7c3fff760c 100644 --- a/drivers/staging/media/hantro/hantro_hw.h +++ b/drivers/staging/media/hantro/hantro_hw.h @@ -211,6 +211,8 @@ enum hantro_enc_fmt { ROCKCHIP_VPU_ENC_FMT_UYVY422 = 3, }; +extern const struct hantro_variant imx8mm_vpu_g2_variant; +extern const struct hantro_variant imx8mm_vpu_variant; extern const struct hantro_variant imx8mq_vpu_g2_variant; extern const struct hantro_variant imx8mq_vpu_variant; extern const struct hantro_variant px30_vpu_variant; diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c index ea919bfb9891..c819609d14d1 100644 --- a/drivers/staging/media/hantro/imx8m_vpu_hw.c +++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c @@ -242,6 +242,32 @@ static const struct hantro_codec_ops imx8mq_vpu_g2_codec_ops[] = { }, }; +static const struct hantro_codec_ops imx8mm_vpu_codec_ops[] = { + [HANTRO_MODE_MPEG2_DEC] = { + .run = hantro_g1_mpeg2_dec_run, + .init = hantro_mpeg2_dec_init, + .exit = hantro_mpeg2_dec_exit, + }, + [HANTRO_MODE_VP8_DEC] = { + .run = hantro_g1_vp8_dec_run, + .init = hantro_vp8_dec_init, + .exit = hantro_vp8_dec_exit, + }, + [HANTRO_MODE_H264_DEC] = { + .run = hantro_g1_h264_dec_run, + .init = hantro_h264_dec_init, + .exit = hantro_h264_dec_exit, + }, +}; + +static const struct hantro_codec_ops imx8mm_vpu_g2_codec_ops[] = { + [HANTRO_MODE_HEVC_DEC] = { + .run = hantro_g2_hevc_dec_run, + .init = hantro_hevc_dec_init, + .exit = hantro_hevc_dec_exit, + }, +}; + /* * VPU variants. */ @@ -257,6 +283,11 @@ static const struct hantro_irq imx8mq_g2_irqs[] = { static const char * const imx8mq_clk_names[] = { "g1", "g2", "bus" }; static const char * const imx8mq_reg_names[] = { "g1", "g2", "ctrl" }; +static const char * const imx8mm_g1_clk_names[] = { "g1", "bus" }; +static const char * const imx8mm_g1_reg_names[] = { "g1" }; +static const char * const imx8mm_g2_clk_names[] = { "g2", "bus" }; +static const char * const imx8mm_g2_reg_names[] = { "g2" }; + const struct hantro_variant imx8mq_vpu_variant = { .dec_fmts = imx8m_vpu_dec_fmts, .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_dec_fmts), @@ -289,3 +320,32 @@ const struct hantro_variant imx8mq_vpu_g2_variant = { .clk_names = imx8mq_clk_names, .num_clocks = ARRAY_SIZE(imx8mq_clk_names), }; + +const struct hantro_variant imx8mm_vpu_variant = { + .dec_fmts = imx8m_vpu_dec_fmts, + .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_dec_fmts), + .postproc_fmts = imx8m_vpu_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(imx8m_vpu_postproc_fmts), + .postproc_regs = &hantro_g1_postproc_regs, + .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | + HANTRO_H264_DECODER, + .codec_ops = imx8mm_vpu_codec_ops, + .irqs = imx8mq_irqs, + .num_irqs = ARRAY_SIZE(imx8mq_irqs), + .clk_names = imx8mm_g1_clk_names, + .num_clocks = ARRAY_SIZE(imx8mm_g1_clk_names), + .reg_names = imx8mm_g1_reg_names, + .num_regs = ARRAY_SIZE(imx8mm_g1_reg_names) +}; + +const struct hantro_variant imx8mm_vpu_g2_variant = { + .dec_offset = 0x0, + .dec_fmts = imx8m_vpu_g2_dec_fmts, + .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_g2_dec_fmts), + .codec = HANTRO_HEVC_DECODER, + .codec_ops = imx8mm_vpu_g2_codec_ops, + .irqs = imx8mq_g2_irqs, + .num_irqs = ARRAY_SIZE(imx8mq_g2_irqs), + .clk_names = imx8mm_g2_clk_names, + .num_clocks = ARRAY_SIZE(imx8mm_g2_reg_names), +}; From patchwork Sat Nov 6 18:37:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12606483 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00ABCC433FE for ; Sat, 6 Nov 2021 18:38:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D9408611C0 for ; Sat, 6 Nov 2021 18:38:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234558AbhKFSlQ (ORCPT ); Sat, 6 Nov 2021 14:41:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58734 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234299AbhKFSlL (ORCPT ); Sat, 6 Nov 2021 14:41:11 -0400 Received: from mail-il1-x12f.google.com (mail-il1-x12f.google.com [IPv6:2607:f8b0:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A04AC061208; Sat, 6 Nov 2021 11:38:30 -0700 (PDT) Received: by mail-il1-x12f.google.com with SMTP id i9so12840559ilu.8; Sat, 06 Nov 2021 11:38:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vvL0Zqkz85LYHufmiL48sAs3q5REU5bqby89EtGa5w4=; b=dQkQ7I0h/Op484A/fxCcDEaFKI1EYy9YvNnHRQz7m5jY+d+nd6+HEMfWftsfGCRii2 z+7JloOkv4G0TGEJMYeEDlf8/J+PzE059GS637NG1vDRvDAW/BiT4b/KJ39n20Yzw9xP ZZNARKwYM7LuxY2cXiHX5MNPph8SUhDbxUajDkBn73ZuK/qnTsL6omXF5eTQfCkJCPdX pLixK7CmOdpDGeW7ol2PVnV9Inaj+5mW3MAmh/vvslAzoUCfWX0tTKCwoaTmp/RBg29C OLtfjubdU5eCqBcFNXfx07fPWFrPLGogJzp6euxbkwOiYYdk3x+QnvEjEiB8j3pHcDG6 rxEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vvL0Zqkz85LYHufmiL48sAs3q5REU5bqby89EtGa5w4=; b=K3NpnL2hPRch9yP9PsOf0dgfrWOI1WoWEWwtJZTUTQJYzNfxx7b2NFOLQNBiNSU1iR TkSYY7ntXnA6HheWoA8rT7RgMcsLi7IccOyoxyem4YzvH4DSYEzbm1zAfK916g3EUbhF cihUi7sJP23Gd7qEnk23fUolz+4QhDucIEnfXM5BnPtyrnNrdT2hfAdJjXbbOPFSbQPZ jOEhncRON23gP/LWde0ldDgFELi4VqJNbCxeSoNzdc7NReUrIwcZ4iR/Fco2D4xUg4zP B7gC4y8XUqXmxXdz+UYDEQsQL0RHPD65AnvRqrrAfcWidKJ25D33ZFz01eYXQ/l+Ya7X 9YRw== X-Gm-Message-State: AOAM530AAHUd0kaykkRlwKOZrEQPW9Qw6IGLtOdBxnsvHtvpfXwCmTMm ID1lhmQBU1HaTaGT7fNs9/8ZDY7KaZNoFw== X-Google-Smtp-Source: ABdhPJzpnoPITzTG+mm95hC+TJyxENY8UqxQSr3DwH9LA8qNFBvVkGOuSJvfXac+Sgygj/rZMcJEEw== X-Received: by 2002:a92:d908:: with SMTP id s8mr25362965iln.168.1636223909120; Sat, 06 Nov 2021 11:38:29 -0700 (PDT) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:64ba:1c0f:6d36:c11d]) by smtp.gmail.com with ESMTPSA id o10sm7174077ilu.49.2021.11.06.11.38.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 Nov 2021 11:38:28 -0700 (PDT) From: Adam Ford To: linux-media@vger.kernel.org Cc: tharvey@gateworks.com, frieder.schrempf@kontron.de, marek.vasut@gmail.com, jagan@amarulasolutions.com, aford@beaconembedded.com, cstevens@beaconembedded.com, Adam Ford , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , Heiko Stuebner , Lucas Stach , Joakim Zhang , Krzysztof Kozlowski , Peng Fan , Alice Guo , linux-rockchip@lists.infradead.org (open list:HANTRO VPU CODEC DRIVER), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list), linux-staging@lists.linux.dev (open list:STAGING SUBSYSTEM) Subject: [RFC 2/5] arm64: dts: imx8mm: Enable VPU-G1 and VPU-G2 Date: Sat, 6 Nov 2021 13:37:58 -0500 Message-Id: <20211106183802.893285-3-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211106183802.893285-1-aford173@gmail.com> References: <20211106183802.893285-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Enable two hardware Hantro decoders called G1 and G2. Signed-off-by: Adam Ford --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 41 +++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 1f69c14d953f..725c3113831e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -1248,6 +1248,47 @@ gpu_2d: gpu@38008000 { power-domains = <&pgc_gpu>; }; + vpu_g1: video-codec@38300000 { + compatible = "nxp,imx8mm-vpu"; + reg = <0x38300000 0x10000>; + reg-names = "g1"; + interrupts = ; + interrupt-names = "g1"; + clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>, + <&clk IMX8MM_CLK_VPU_DEC_ROOT>; + clock-names = "g1", "bus"; + assigned-clocks = <&clk IMX8MM_CLK_VPU_G1>, + <&clk IMX8MM_CLK_VPU_BUS>, + <&clk IMX8MM_VPU_PLL_BYPASS>; + assigned-clock-parents = <&clk IMX8MM_VPU_PLL_OUT>, + <&clk IMX8MM_SYS_PLL1_800M>, + <&clk IMX8MM_VPU_PLL>; + assigned-clock-rates = <600000000>, + <800000000>, + <0>; + power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G1>; + }; + + vpu_g2: video-codec@38310000 { + compatible = "nxp,imx8mm-vpu-g2"; + reg = <0x38310000 0x10000>; + interrupts = ; + interrupt-names = "g2"; + clocks = <&clk IMX8MM_CLK_VPU_G2_ROOT>, + <&clk IMX8MM_CLK_VPU_DEC_ROOT>; + clock-names = "g2", "bus"; + assigned-clocks = <&clk IMX8MM_CLK_VPU_G2>, + <&clk IMX8MM_CLK_VPU_BUS>, + <&clk IMX8MM_VPU_PLL_BYPASS>; + assigned-clock-parents = <&clk IMX8MM_VPU_PLL_OUT>, + <&clk IMX8MM_SYS_PLL1_800M>, + <&clk IMX8MM_VPU_PLL>; + assigned-clock-rates = <600000000>, + <800000000>, + <0>; + power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G2>; + }; + vpu_blk_ctrl: blk-ctrl@38330000 { compatible = "fsl,imx8mm-vpu-blk-ctrl", "syscon"; reg = <0x38330000 0x100>; From patchwork Sat Nov 6 18:37:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12606487 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E23B2C4332F for ; Sat, 6 Nov 2021 18:38:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CD7FE611C0 for ; Sat, 6 Nov 2021 18:38:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234737AbhKFSlT (ORCPT ); Sat, 6 Nov 2021 14:41:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234324AbhKFSlO (ORCPT ); Sat, 6 Nov 2021 14:41:14 -0400 Received: from mail-io1-xd36.google.com (mail-io1-xd36.google.com [IPv6:2607:f8b0:4864:20::d36]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E05AFC061570; Sat, 6 Nov 2021 11:38:32 -0700 (PDT) Received: by mail-io1-xd36.google.com with SMTP id k22so1139943iol.13; Sat, 06 Nov 2021 11:38:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rgiz15qYX3oEufyKXbQCuXrDK3Q1VWC1lY06kwDb9uA=; b=Pdy/fAbBPGgnB9d8h7vSQwsHYEe1V9h6UucxVA1D6ty//nVA+aQoK47FPUw+STsqyI zV1brbquXV3HfSbl2qvZ6GkzN6m7wWtU6nGP2Cth4GIqTQkKYqS4mNQLCw5cMU0YUvO8 EKcFtaQ3OvTw6Cgpt4ozdrVXUMldcOEOCSQ5tVjLnTTzWALkeYayX7VWeGyZjfFQGHLy v+nmTSIXl/dRblUwLJ3XrBLwlIi3LwBwJeu4nahKUZIDltg+rh/0snEgGOhj821rbJp4 ZMi8p4ljukWYn8Iw5xDZGxlXQoSTn4JUrz9Pye9tzKcsTJQpOkQukp63azWHvEClVNrW Ky2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rgiz15qYX3oEufyKXbQCuXrDK3Q1VWC1lY06kwDb9uA=; b=O2xpFmdInES4fHTmrVplF3l5booQtKbyP1G33zCAJqpMWxDOdIQF55vR4HJwMKeNaT ejYa+aIPHrlfUNu9bN+FX3L5rr59E2nkWVFA0WcEJUNfg6PaHcnjA4y9OQwSeIw0m8ul h1A2z1RKu2WsxqRho+1e03ixWzw+jVk131PNV0AKwdAhaKL6CbA67ue3AocUs+24lAFe sqPnjRoRuI4Z2taEpspALJSw69bz9EBrQM8gYnepZzQ9YHTA0MABSdY3/hv/T689IHnk VK81CDt32ys3vg2gu7G5CNNyiWN2zzDwKsqBLroE2kG+WQeIDjj0taiLb7l/bQwtQuBt Ouvg== X-Gm-Message-State: AOAM5331q/41MTjYYxK/w5xHEVsOpbGyIrVJStq6P8x18AZymN8CXLLu WzU8zua+9KWT2ylx9FVX0MgLdgEynuTLSQ== X-Google-Smtp-Source: ABdhPJxv6RK3Ow5lFD8v0rWXtK/tue2/IC9cGteE5D1sQHZ/alZ94eoGOc8QtRyW04SbWj8D0MMetA== X-Received: by 2002:a6b:5105:: with SMTP id f5mr5060039iob.216.1636223911922; Sat, 06 Nov 2021 11:38:31 -0700 (PDT) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:64ba:1c0f:6d36:c11d]) by smtp.gmail.com with ESMTPSA id o10sm7174077ilu.49.2021.11.06.11.38.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 Nov 2021 11:38:31 -0700 (PDT) From: Adam Ford To: linux-media@vger.kernel.org Cc: tharvey@gateworks.com, frieder.schrempf@kontron.de, marek.vasut@gmail.com, jagan@amarulasolutions.com, aford@beaconembedded.com, cstevens@beaconembedded.com, Adam Ford , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , Heiko Stuebner , Lucas Stach , Joakim Zhang , Peng Fan , Alice Guo , linux-rockchip@lists.infradead.org (open list:HANTRO VPU CODEC DRIVER), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list), linux-staging@lists.linux.dev (open list:STAGING SUBSYSTEM) Subject: [RFC 3/5] media: hantro: Rename ROCKCHIP_VPU_ENC_FMT to HANTRO_VPU_ENC_FMT Date: Sat, 6 Nov 2021 13:37:59 -0500 Message-Id: <20211106183802.893285-4-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211106183802.893285-1-aford173@gmail.com> References: <20211106183802.893285-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The H1 encoder used on some Rockchip devices appears to be the same or similar H1 encoder used on the i.MX8M Mini, so let's rename the supported formats to a more generic term like HANTRO_VPU_ENC_FMT. There are no functional changes. Signed-off-by: Adam Ford --- drivers/staging/media/hantro/hantro_hw.h | 16 ++++++------ .../staging/media/hantro/rockchip_vpu_hw.c | 26 +++++++++---------- 2 files changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h index ae7c3fff760c..c276ecd57066 100644 --- a/drivers/staging/media/hantro/hantro_hw.h +++ b/drivers/staging/media/hantro/hantro_hw.h @@ -199,16 +199,16 @@ struct hantro_codec_ops { /** * enum hantro_enc_fmt - source format ID for hardware registers. * - * @ROCKCHIP_VPU_ENC_FMT_YUV420P: Y/CbCr 4:2:0 planar format - * @ROCKCHIP_VPU_ENC_FMT_YUV420SP: Y/CbCr 4:2:0 semi-planar format - * @ROCKCHIP_VPU_ENC_FMT_YUYV422: YUV 4:2:2 packed format (YUYV) - * @ROCKCHIP_VPU_ENC_FMT_UYVY422: YUV 4:2:2 packed format (UYVY) + * @HANTRO_VPU_ENC_FMT_YUV420P: Y/CbCr 4:2:0 planar format + * @HANTRO_VPU_ENC_FMT_YUV420SP: Y/CbCr 4:2:0 semi-planar format + * @HANTRO_VPU_ENC_FMT_YUYV422: YUV 4:2:2 packed format (YUYV) + * @HANTRO_VPU_ENC_FMT_UYVY422: YUV 4:2:2 packed format (UYVY) */ enum hantro_enc_fmt { - ROCKCHIP_VPU_ENC_FMT_YUV420P = 0, - ROCKCHIP_VPU_ENC_FMT_YUV420SP = 1, - ROCKCHIP_VPU_ENC_FMT_YUYV422 = 2, - ROCKCHIP_VPU_ENC_FMT_UYVY422 = 3, + HANTRO_VPU_ENC_FMT_YUV420P = 0, + HANTRO_VPU_ENC_FMT_YUV420SP = 1, + HANTRO_VPU_ENC_FMT_YUYV422 = 2, + HANTRO_VPU_ENC_FMT_UYVY422 = 3, }; extern const struct hantro_variant imx8mm_vpu_g2_variant; diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c index d4f52957cc53..7c8dc211dbc8 100644 --- a/drivers/staging/media/hantro/rockchip_vpu_hw.c +++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c @@ -21,26 +21,26 @@ * Supported formats. */ -static const struct hantro_fmt rockchip_vpu_enc_fmts[] = { +static const struct hantro_fmt HANTRO_VPU_ENC_FMTS[] = { { .fourcc = V4L2_PIX_FMT_YUV420M, .codec_mode = HANTRO_MODE_NONE, - .enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUV420P, + .enc_fmt = HANTRO_VPU_ENC_FMT_YUV420P, }, { .fourcc = V4L2_PIX_FMT_NV12M, .codec_mode = HANTRO_MODE_NONE, - .enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUV420SP, + .enc_fmt = HANTRO_VPU_ENC_FMT_YUV420SP, }, { .fourcc = V4L2_PIX_FMT_YUYV, .codec_mode = HANTRO_MODE_NONE, - .enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUYV422, + .enc_fmt = HANTRO_VPU_ENC_FMT_YUYV422, }, { .fourcc = V4L2_PIX_FMT_UYVY, .codec_mode = HANTRO_MODE_NONE, - .enc_fmt = ROCKCHIP_VPU_ENC_FMT_UYVY422, + .enc_fmt = HANTRO_VPU_ENC_FMT_UYVY422, }, { .fourcc = V4L2_PIX_FMT_JPEG, @@ -478,8 +478,8 @@ const struct hantro_variant rk3036_vpu_variant = { */ const struct hantro_variant rk3066_vpu_variant = { .enc_offset = 0x0, - .enc_fmts = rockchip_vpu_enc_fmts, - .num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts), + .enc_fmts = HANTRO_VPU_ENC_FMTS, + .num_enc_fmts = ARRAY_SIZE(HANTRO_VPU_ENC_FMTS), .dec_offset = 0x400, .dec_fmts = rk3066_vpu_dec_fmts, .num_dec_fmts = ARRAY_SIZE(rk3066_vpu_dec_fmts), @@ -498,8 +498,8 @@ const struct hantro_variant rk3066_vpu_variant = { const struct hantro_variant rk3288_vpu_variant = { .enc_offset = 0x0, - .enc_fmts = rockchip_vpu_enc_fmts, - .num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts), + .enc_fmts = HANTRO_VPU_ENC_FMTS, + .num_enc_fmts = ARRAY_SIZE(HANTRO_VPU_ENC_FMTS), .dec_offset = 0x400, .dec_fmts = rk3288_vpu_dec_fmts, .num_dec_fmts = ARRAY_SIZE(rk3288_vpu_dec_fmts), @@ -534,8 +534,8 @@ const struct hantro_variant rk3328_vpu_variant = { const struct hantro_variant rk3399_vpu_variant = { .enc_offset = 0x0, - .enc_fmts = rockchip_vpu_enc_fmts, - .num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts), + .enc_fmts = HANTRO_VPU_ENC_FMTS, + .num_enc_fmts = ARRAY_SIZE(HANTRO_VPU_ENC_FMTS), .dec_offset = 0x400, .dec_fmts = rk3399_vpu_dec_fmts, .num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts), @@ -551,8 +551,8 @@ const struct hantro_variant rk3399_vpu_variant = { const struct hantro_variant px30_vpu_variant = { .enc_offset = 0x0, - .enc_fmts = rockchip_vpu_enc_fmts, - .num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts), + .enc_fmts = HANTRO_VPU_ENC_FMTS, + .num_enc_fmts = ARRAY_SIZE(HANTRO_VPU_ENC_FMTS), .dec_offset = 0x400, .dec_fmts = rk3399_vpu_dec_fmts, .num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts), From patchwork Sat Nov 6 18:38:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12606485 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41A26C433EF for ; Sat, 6 Nov 2021 18:38:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2532F611C1 for ; Sat, 6 Nov 2021 18:38:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234821AbhKFSlU (ORCPT ); Sat, 6 Nov 2021 14:41:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234780AbhKFSlR (ORCPT ); Sat, 6 Nov 2021 14:41:17 -0400 Received: from mail-io1-xd2a.google.com (mail-io1-xd2a.google.com [IPv6:2607:f8b0:4864:20::d2a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A8E0FC061746; Sat, 6 Nov 2021 11:38:35 -0700 (PDT) Received: by mail-io1-xd2a.google.com with SMTP id r8so71481iog.7; Sat, 06 Nov 2021 11:38:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9uOWA4XNEMElIEM9Kfp+ZPqTotIf6vEqC61Tdw/xBpE=; b=Pus20zz/X6++gD509pWyYdbfUmr81QOKQz1Q5fFnd2EZofPuPGEtDbJEc3lCgSklGt WfM8lDXQngNN2RktT95FfCGYdWbZ2VwwI0EFPILec87+6aAUwf/t2QLPUIR3i1rzUbau idtTAsD/orfbgN9uaE4a6eqnfXMJR3wad5KvVdz9ng+K2ybAl3xueZsDI1xznYuajsqn nZPglItdqauSYBKee21RcWgItrC5zIaLP3cqalxd6B+kJ+QaXCHFJ4C/lXO7kaDhOcpW RywHZMQFNxsCLezbhJ66a7xx70EbLdKOZEuMjocON+btXqG73PI9eoaP5jop8fqnQiZD UzTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9uOWA4XNEMElIEM9Kfp+ZPqTotIf6vEqC61Tdw/xBpE=; b=juYYEOJNukK1RthcH8RN4471zs88/z/nfWce5d6guAPEA+w09vRedgevHWomxLxF0W FyAKy/n10Fi3I18WVVXbE6cw+6tHCI0jYzgB6rnOI10gFdKCmqnH7ZufEAYqWQU6bBJK K/HXOBBLUUZZOPxnweI4zelxsqTLzx0BbgiNzS9EEmhnBrqZm5Ij5FhDcBrE8vAK2SQM xEK+SUTlnahDNKUgHe5KEyySGRHMQHCIIW+ROFuHUDQ0NbAaVyrL6MIvHFhdjFynJj/t Qr7foDbhESjEEWEgCzcfwe/eOgbBSfGIKZ6Yiw1YrhGULYDB5dv5XN2vUXMmqV9WudfC HyUQ== X-Gm-Message-State: AOAM532/Ee7bU2XyOuOuq68zVhYv9dWnapF6rNkGRSiicFu+l1NpWEKM QdIWm7X6a0jCc4BHDpMtddcEs7lWKZAHqA== X-Google-Smtp-Source: ABdhPJx9cNAGR/phR0zJ7GVHTpSM+DtUzDDfczCzUj9OBEbbfFyRq2FpTeFqpFiHoBflFKe6JGUetg== X-Received: by 2002:a05:6602:2b83:: with SMTP id r3mr5296521iov.8.1636223914712; Sat, 06 Nov 2021 11:38:34 -0700 (PDT) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:64ba:1c0f:6d36:c11d]) by smtp.gmail.com with ESMTPSA id o10sm7174077ilu.49.2021.11.06.11.38.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 Nov 2021 11:38:34 -0700 (PDT) From: Adam Ford To: linux-media@vger.kernel.org Cc: tharvey@gateworks.com, frieder.schrempf@kontron.de, marek.vasut@gmail.com, jagan@amarulasolutions.com, aford@beaconembedded.com, cstevens@beaconembedded.com, Adam Ford , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , Heiko Stuebner , Lucas Stach , Joakim Zhang , Krzysztof Kozlowski , Alice Guo , Peng Fan , linux-rockchip@lists.infradead.org (open list:HANTRO VPU CODEC DRIVER), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list), linux-staging@lists.linux.dev (open list:STAGING SUBSYSTEM) Subject: [RFC 4/5] media: hantro: Add H1 encoder support on i.MX8M Mini Date: Sat, 6 Nov 2021 13:38:00 -0500 Message-Id: <20211106183802.893285-5-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211106183802.893285-1-aford173@gmail.com> References: <20211106183802.893285-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The i.MX8M Mini has supports the Hantro H1 encoder, so enable it using the same supported formats as other devices using the H1 encoder. Signed-off-by: Adam Ford --- drivers/staging/media/hantro/hantro_drv.c | 1 + drivers/staging/media/hantro/hantro_hw.h | 1 + drivers/staging/media/hantro/imx8m_vpu_hw.c | 83 +++++++++++++++++++++ 3 files changed, 85 insertions(+) diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c index 2aa1c520be50..29e8dc52c2e4 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -594,6 +594,7 @@ static const struct of_device_id of_hantro_match[] = { #ifdef CONFIG_VIDEO_HANTRO_IMX8M { .compatible = "nxp,imx8mm-vpu", .data = &imx8mm_vpu_variant, }, { .compatible = "nxp,imx8mm-vpu-g2", .data = &imx8mm_vpu_g2_variant }, + { .compatible = "nxp,imx8mm-vpu-h1", .data = &imx8mm_vpu_h1_variant }, { .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, }, { .compatible = "nxp,imx8mq-vpu-g2", .data = &imx8mq_vpu_g2_variant }, #endif diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h index c276ecd57066..9f6ae5bf13ee 100644 --- a/drivers/staging/media/hantro/hantro_hw.h +++ b/drivers/staging/media/hantro/hantro_hw.h @@ -212,6 +212,7 @@ enum hantro_enc_fmt { }; extern const struct hantro_variant imx8mm_vpu_g2_variant; +extern const struct hantro_variant imx8mm_vpu_h1_variant; extern const struct hantro_variant imx8mm_vpu_variant; extern const struct hantro_variant imx8mq_vpu_g2_variant; extern const struct hantro_variant imx8mq_vpu_variant; diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c index c819609d14d1..69760f88efa5 100644 --- a/drivers/staging/media/hantro/imx8m_vpu_hw.c +++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c @@ -12,6 +12,7 @@ #include "hantro_jpeg.h" #include "hantro_g1_regs.h" #include "hantro_g2_regs.h" +#include "hantro_h1_regs.h" #define CTRL_SOFT_RESET 0x00 #define RESET_G1 BIT(1) @@ -151,6 +152,43 @@ static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = { }, }; +static const struct hantro_fmt imx8m_vpu_h1_enc_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_YUV420M, + .codec_mode = HANTRO_MODE_NONE, + .enc_fmt = HANTRO_VPU_ENC_FMT_YUV420P, + }, + { + .fourcc = V4L2_PIX_FMT_NV12M, + .codec_mode = HANTRO_MODE_NONE, + .enc_fmt = HANTRO_VPU_ENC_FMT_YUV420SP, + }, + { + .fourcc = V4L2_PIX_FMT_YUYV, + .codec_mode = HANTRO_MODE_NONE, + .enc_fmt = HANTRO_VPU_ENC_FMT_YUYV422, + }, + { + .fourcc = V4L2_PIX_FMT_UYVY, + .codec_mode = HANTRO_MODE_NONE, + .enc_fmt = HANTRO_VPU_ENC_FMT_UYVY422, + }, + { + .fourcc = V4L2_PIX_FMT_JPEG, + .codec_mode = HANTRO_MODE_JPEG_ENC, + .max_depth = 2, + .header_size = JPEG_HEADER_SIZE, + .frmsize = { + .min_width = 96, + .max_width = 8192, + .step_width = MB_DIM, + .min_height = 32, + .max_height = 8192, + .step_height = MB_DIM, + }, + }, +}; + static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id) { struct hantro_dev *vpu = dev_id; @@ -187,6 +225,24 @@ static irqreturn_t imx8m_vpu_g2_irq(int irq, void *dev_id) return IRQ_HANDLED; } +static irqreturn_t imx8m_vpu_h1_irq(int irq, void *dev_id) +{ + struct hantro_dev *vpu = dev_id; + enum vb2_buffer_state state; + u32 status; + + status = vepu_read(vpu, H1_REG_INTERRUPT); + state = (status & H1_REG_INTERRUPT_FRAME_RDY) ? + VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; + + vepu_write(vpu, 0, H1_REG_INTERRUPT); + vepu_write(vpu, 0, H1_REG_AXI_CTRL); + + hantro_irq_done(vpu, state); + + return IRQ_HANDLED; +} + static int imx8mq_vpu_hw_init(struct hantro_dev *vpu) { vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1]; @@ -268,6 +324,15 @@ static const struct hantro_codec_ops imx8mm_vpu_g2_codec_ops[] = { }, }; +static const struct hantro_codec_ops imx8mm_vpu_h1_codec_ops[] = { + [HANTRO_MODE_JPEG_ENC] = { + .run = hantro_h1_jpeg_enc_run, + .init = hantro_jpeg_enc_init, + .done = hantro_jpeg_enc_done, + .exit = hantro_jpeg_enc_exit, + }, +}; + /* * VPU variants. */ @@ -280,6 +345,10 @@ static const struct hantro_irq imx8mq_g2_irqs[] = { { "g2", imx8m_vpu_g2_irq }, }; +static const struct hantro_irq imx8mq_h1_irqs[] = { + { "h1", imx8m_vpu_h1_irq }, +}; + static const char * const imx8mq_clk_names[] = { "g1", "g2", "bus" }; static const char * const imx8mq_reg_names[] = { "g1", "g2", "ctrl" }; @@ -287,6 +356,8 @@ static const char * const imx8mm_g1_clk_names[] = { "g1", "bus" }; static const char * const imx8mm_g1_reg_names[] = { "g1" }; static const char * const imx8mm_g2_clk_names[] = { "g2", "bus" }; static const char * const imx8mm_g2_reg_names[] = { "g2" }; +static const char * const imx8mm_h1_clk_names[] = { "h1", "bus" }; +static const char * const imx8mm_h1_reg_names[] = { "h1" }; const struct hantro_variant imx8mq_vpu_variant = { .dec_fmts = imx8m_vpu_dec_fmts, @@ -349,3 +420,15 @@ const struct hantro_variant imx8mm_vpu_g2_variant = { .clk_names = imx8mm_g2_clk_names, .num_clocks = ARRAY_SIZE(imx8mm_g2_reg_names), }; + +const struct hantro_variant imx8mm_vpu_h1_variant = { + .enc_offset = 0x0, + .enc_fmts = imx8m_vpu_h1_enc_fmts, + .num_enc_fmts = ARRAY_SIZE(imx8m_vpu_h1_enc_fmts), + .codec = HANTRO_JPEG_ENCODER, + .codec_ops = imx8mm_vpu_h1_codec_ops, + .irqs = imx8mq_h1_irqs, + .num_irqs = ARRAY_SIZE(imx8mq_h1_irqs), + .clk_names = imx8mm_h1_clk_names, + .num_clocks = ARRAY_SIZE(imx8mm_h1_clk_names) +}; From patchwork Sat Nov 6 18:38:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12606489 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66013C433F5 for ; Sat, 6 Nov 2021 18:38:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 495DB61037 for ; Sat, 6 Nov 2021 18:38:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234794AbhKFSlW (ORCPT ); Sat, 6 Nov 2021 14:41:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234823AbhKFSlU (ORCPT ); Sat, 6 Nov 2021 14:41:20 -0400 Received: from mail-io1-xd2d.google.com (mail-io1-xd2d.google.com [IPv6:2607:f8b0:4864:20::d2d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13F36C061746; Sat, 6 Nov 2021 11:38:39 -0700 (PDT) Received: by mail-io1-xd2d.google.com with SMTP id k22so1140166iol.13; Sat, 06 Nov 2021 11:38:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=udKl62y2x/Oh2cW97C2eKZ5L1gu+lpGXEnEESf3ayO4=; b=fF8BuidW/FPcrJ2yf9wm3QJp4AL8b8rBt6CifE+v2//RxyWSJ0hVD/OyKAhAsI5g/z hNJAwWjZen9DblNTkvtAI4ExLnad4GRPXUULPZzZHurrnwyg+MPopwjt0IhcnDhrLcYh +Nr14SsC38b+nmVhUfrkeJi5pCMxSJhnhSXgOTYBaCGJ/hWFuVdcmKFApFelUfu7fhbS osvVDZ2rbFtFgQUcnuso2Ba/OcqSDAw3vt5ahC66vP5km3HC0vuMbSaC9M6oRB5M6qMe Q6ZvkqvIVDBS69JJIxBC54fXdis+xwlSM5FzxFZ/Rn+dptLc3ax9jjvGgliZ3tSN1Ytv BZCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=udKl62y2x/Oh2cW97C2eKZ5L1gu+lpGXEnEESf3ayO4=; b=IyxEw0Nk4HSlDcA4umBNcEpwYjOJXszJb3AuHUswOb474QXKOcQkzks0oktrsYBn/F jjmxig6sSxwGEAzNccSW4nTn3WLd3kdg/HyCERacMgLpNsQpZWTbjvCpWx3g8ggxSPbC 9IS4jTX2NmkbnGHv6CDRF6990wQuoukgAmGSN5cDqcbWMsTQmvue38T4BBzimw3D2GnE kucQSPXM7CfBs96x+c2k+8AFMBgL+9DK/qZqz7UQ1AX8fX+CSkekloHvck2xSRgA4DRX rQWTNAVyh2dpTZaiLz6qFS/M29NRHmd9KnVt+CQN6cj5pIiYS2E5qpYWeSvdUovwn2gG Wmiw== X-Gm-Message-State: AOAM533B0hvkyBwb2jgPGL0dPP2q0pUsCocOM9cvQqPiHC82QXJD3qun j3/9TGaJhlgOxHJq903RNLd0CRpB917cKQ== X-Google-Smtp-Source: ABdhPJzi/tEgr5ILGu/G4uh+io+CaFv2TdlL4qlt4DJ0TsFdO3pDfvEw1qfgLCdAoScQ2u7hufdjBA== X-Received: by 2002:a05:6602:2cce:: with SMTP id j14mr5024039iow.23.1636223918087; Sat, 06 Nov 2021 11:38:38 -0700 (PDT) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:64ba:1c0f:6d36:c11d]) by smtp.gmail.com with ESMTPSA id o10sm7174077ilu.49.2021.11.06.11.38.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 Nov 2021 11:38:36 -0700 (PDT) From: Adam Ford To: linux-media@vger.kernel.org Cc: tharvey@gateworks.com, frieder.schrempf@kontron.de, marek.vasut@gmail.com, jagan@amarulasolutions.com, aford@beaconembedded.com, cstevens@beaconembedded.com, Adam Ford , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , Heiko Stuebner , Lucas Stach , Joakim Zhang , Alice Guo , Peng Fan , linux-rockchip@lists.infradead.org (open list:HANTRO VPU CODEC DRIVER), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list), linux-staging@lists.linux.dev (open list:STAGING SUBSYSTEM) Subject: [RFC 5/5] arm64: dts: imx8mm: Enable Hantro H1 Encoder Date: Sat, 6 Nov 2021 13:38:01 -0500 Message-Id: <20211106183802.893285-6-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211106183802.893285-1-aford173@gmail.com> References: <20211106183802.893285-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The i.MX8M Mini has a Hantro H1 video encoder which appears as a media device. Media device information ------------------------ driver hantro-vpu model hantro-vpu serial bus info platform: hantro-vpu hw revision 0x0 driver version 5.15.0 Device topology - entity 1: nxp,imx8mm-vpu-h1-enc-source (1 pad, 1 link) type Node subtype V4L flags 0 device node name /dev/video3 pad0: Source -> "nxp,imx8mm-vpu-h1-enc-proc":0 [ENABLED,IMMUTABLE] - entity 3: nxp,imx8mm-vpu-h1-enc-proc (2 pads, 2 links) type Node subtype Unknown flags 0 pad0: Sink <- "nxp,imx8mm-vpu-h1-enc-source":0 [ENABLED,IMMUTABLE] pad1: Source -> "nxp,imx8mm-vpu-h1-enc-sink":0 [ENABLED,IMMUTABLE] - entity 6: nxp,imx8mm-vpu-h1-enc-sink (1 pad, 1 link) type Node subtype V4L flags 0 device node name /dev/video3 pad0: Sink <- "nxp,imx8mm-vpu-h1-enc-proc":1 [ENABLED,IMMUTABLE] Signed-off-by: Adam Ford --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 725c3113831e..b4c204cbced8 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -1289,6 +1289,26 @@ vpu_g2: video-codec@38310000 { power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G2>; }; + vpu_h1: video-codec@38320000 { + compatible = "nxp,imx8mm-vpu-h1"; + reg = <0x38320000 0x10000>; + interrupts = ; + interrupt-names = "h1"; + clocks = <&clk IMX8MM_CLK_VPU_H1_ROOT>, + <&clk IMX8MM_CLK_VPU_DEC_ROOT>; + clock-names = "h1", "bus"; + assigned-clocks = <&clk IMX8MM_CLK_VPU_H1>, + <&clk IMX8MM_CLK_VPU_BUS>, + <&clk IMX8MM_VPU_PLL_BYPASS>; + assigned-clock-parents = <&clk IMX8MM_VPU_PLL_OUT>, + <&clk IMX8MM_SYS_PLL1_800M>, + <&clk IMX8MM_VPU_PLL>; + assigned-clock-rates = <600000000>, + <800000000>, + <0>; + power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_H1>; + }; + vpu_blk_ctrl: blk-ctrl@38330000 { compatible = "fsl,imx8mm-vpu-blk-ctrl", "syscon"; reg = <0x38330000 0x100>;