From patchwork Tue Dec 18 04:19:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10734719 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8213014E5 for ; Tue, 18 Dec 2018 04:19:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 724682A14F for ; Tue, 18 Dec 2018 04:19:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 639BA2A155; Tue, 18 Dec 2018 04:19:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 00E3C2A14F for ; Tue, 18 Dec 2018 04:19:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726592AbeLRETa (ORCPT ); Mon, 17 Dec 2018 23:19:30 -0500 Received: from mail-eopbgr60079.outbound.protection.outlook.com ([40.107.6.79]:61312 "EHLO EUR04-DB3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726305AbeLRETa (ORCPT ); Mon, 17 Dec 2018 23:19:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=CLaFn/5nWbwcR4KhCtZhN6G89jTJk0zh9QQ615G8x40=; b=bP/2+z8Ym6H8Olwr+MJEpjEXqEgxSOJUv9YhE8eUNpIBmzBXilQ038lwVKTD0cZzZ8l3agM65fdrenSn3SJ97dEbLv0TtT2km757adotN+50G1OOQvTFcEymzhpcYDrIdJbHB2/Lpyp2ehTqHltmxoe9CK9NoqQ2A1P+oh8vJJ4= Received: from AM6PR04MB5781.eurprd04.prod.outlook.com (20.179.2.80) by AM6PR04MB4102.eurprd04.prod.outlook.com (52.135.167.160) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1425.20; Tue, 18 Dec 2018 04:19:26 +0000 Received: from AM6PR04MB5781.eurprd04.prod.outlook.com ([fe80::4d2e:cf15:fcf7:56b2]) by AM6PR04MB5781.eurprd04.prod.outlook.com ([fe80::4d2e:cf15:fcf7:56b2%5]) with mapi id 15.20.1446.015; Tue, 18 Dec 2018 04:19:26 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "shawnguo@kernel.org" , "robh+dt@kernel.org" , "bhelgaas@google.com" , "lorenzo.pieralisi@arm.com" , "jingoohan1@gmail.com" , "gustavo.pimentel@synopsys.com" , Leo Li CC: Roy Zang , Mingkai Hu , "M.h. Lian" , "Z.q. Hou" Subject: [PATCHv3 1/5] ARM: dts: ls1021a: add num-viewport property for PCIe DT nodes Thread-Topic: [PATCHv3 1/5] ARM: dts: ls1021a: add num-viewport property for PCIe DT nodes Thread-Index: AQHUlojcaP0IJPro20GOl/AtJzrryA== Date: Tue, 18 Dec 2018 04:19:26 +0000 Message-ID: <20181218041956.41809-2-Zhiqiang.Hou@nxp.com> References: <20181218041956.41809-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181218041956.41809-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0075.apcprd03.prod.outlook.com (2603:1096:203:72::15) To AM6PR04MB5781.eurprd04.prod.outlook.com (2603:10a6:20b:aa::16) x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;AM6PR04MB4102;6:szRO7lCWL8Y4dk3rodhubZOuAzdjdpgRbltc4ZXDfLYIhU/iHjY3pXwodF7KyndFb9DWObiiMM5RoKoQFKJY9oWBSurhMkrK694Gf4a0y/Pm9BvgGUUkeYbuFd4R2Iw393Ly6s9U3V/68ieKdg8oAY/uiWOMJCQI1GQ3Fy01nPoiW2WgYLKyU96/lnSw5bcBoBBp9ErMdtO2LtsHCT8sJkoUi2oXLGL8+rqx6m6T4HGEUDvEe0+Pi14hjmcaPGrpXy1uxv1pB4zIZ6p6YVVR6blnfyJRm3WyHIJ45vLMie8/8ytz1939x0PrBTVFHtJoCJmPMhuR9BQkdNgUHIG2gyIDHYPKnqlZ/4v1uYB+vgUDesVxN4YjJZmLCRJM6+Gx3JlqKYHdQtbEJ1NaJlwiuEt4OlwsPTR1ELhFOngkZRrbgbKNe2/OLEV8/WcqN/TFyTZSGFanfBZTNXtxpzzloA==;5:iSpbjkw3yW9IM+CnIG95QPHlDxMjOnZjDIdDTzjl3ftynnSF4TnpJF3ZYp9bx8umnWSEODz4gWv1zbQqQRr91EFp0YZ/nwtT0E2BcsDRYRM/KYBkzhj5kvAsqIJ4Tc9yEEdUkihJWScX7MVg4TS0brpCB61zQHZPjqAISAK8Spw=;7:s76Puyx9HRPrHj6th61I0WQWRv2MX7HbLy8Flt4sinHR9grQXUqyHsGoyVNvWywNFCXuQO4bT8T4cXJ4WA/Rws1wepuW4SKdzL6uMwFc/O1n/CfFg7RLWGWCCaE32oIAbWgxFYSHCV9NjJ3Stfkk1g== x-ms-office365-filtering-correlation-id: 41720138-a907-443a-f35b-08d6649ffee4 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:AM6PR04MB4102; x-ms-traffictypediagnostic: AM6PR04MB4102: authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-microsoft-antispam-prvs: x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(3230021)(999002)(5005020)(6040522)(2401047)(8121501046)(93006095)(93001095)(3231475)(944501520)(52105112)(3002001)(10201501046)(6055026)(148016)(149066)(150057)(6041310)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123562045)(20161123564045)(20161123558120)(20161123560045)(201708071742011)(7699051)(76991095);SRVR:AM6PR04MB4102;BCL:0;PCL:0;RULEID:;SRVR:AM6PR04MB4102; x-forefront-prvs: 08902E536D x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(136003)(346002)(376002)(199004)(189003)(52116002)(7736002)(97736004)(7416002)(68736007)(25786009)(4326008)(36756003)(316002)(106356001)(102836004)(6636002)(105586002)(99286004)(2616005)(71200400001)(486006)(305945005)(11346002)(186003)(6506007)(386003)(110136005)(54906003)(76176011)(6486002)(1076003)(5660300001)(71190400001)(446003)(476003)(26005)(2501003)(2906002)(2201001)(86362001)(575784001)(6436002)(256004)(3846002)(6116002)(39060400002)(81166006)(66066001)(8936002)(81156014)(8676002)(478600001)(6512007)(53936002)(14454004)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:AM6PR04MB4102;H:AM6PR04MB5781.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: 2SvgwclkNAostjIRNvI70+guik3bkOESmc5KNp4FCyUUXak2uEnkX4ztL0swk9Vj5UE3IyJSSop56LOFn0yIZSIrH2+IdyaI7aAUWQoU9wliWGyRrGWZZMy4+OAqw4wPxo2d5ByvnSKfdb3XHZ7hd0GGqpWTbTl7jNR5cTKUTF83IHmSfhqs0EklDCjX64Ba/eHH1e1TAaU44uKanN/liKOT5h4yeFq2vuEZH305YIpFRZtuGNmfKM5UQgrCjorhtyhOG2EEby23udHwEvaIlgoJh4I+lmCO4xy14qH0ZqmGmv618Ynd/88aRWmyItJS spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 41720138-a907-443a-f35b-08d6649ffee4 X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Dec 2018 04:19:26.6624 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR04MB4102 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang Add num-viewport property for PCIe DT nodes to specify how many viewports are implemented. Signed-off-by: Hou Zhiqiang --- V3: - New patch arch/arm/boot/dts/ls1021a.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index b769e0e40553..b455acc7afb4 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -726,6 +726,7 @@ #size-cells = <2>; device_type = "pci"; num-lanes = <4>; + num-viewport = <6>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ @@ -750,6 +751,7 @@ #size-cells = <2>; device_type = "pci"; num-lanes = <4>; + num-viewport = <6>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ From patchwork Tue Dec 18 04:19:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10734731 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9BE0A6C2 for ; Tue, 18 Dec 2018 04:20:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 880AE2A737 for ; Tue, 18 Dec 2018 04:20:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 06BFB2A1B3; Tue, 18 Dec 2018 04:20:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 635C82A191 for ; Tue, 18 Dec 2018 04:20:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726575AbeLREUR (ORCPT ); Mon, 17 Dec 2018 23:20:17 -0500 Received: from mail-eopbgr60046.outbound.protection.outlook.com ([40.107.6.46]:52304 "EHLO EUR04-DB3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726305AbeLREUQ (ORCPT ); Mon, 17 Dec 2018 23:20:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=VKRZFZ5xklRUsDW/ETgpbKc1ANi3Rst1a2gdEAK2MjM=; b=pzqJ8QiRKmeO0JdiLCpaQV5OjdnNfX7HBIYqhuUuEUaYjcRTSH+0e7fAh2wHkb5LHN8idFHwlvHH6wAcxJ5JfNAEPbCySrXoOSKjveTJVxAvb2wBGgdyeY1005ZHOCb5edD3qgv0wrJsYjLAResji33MZC65SWua8+SkSVVkCFY= Received: from AM6PR04MB5781.eurprd04.prod.outlook.com (20.179.2.80) by AM6PR04MB4102.eurprd04.prod.outlook.com (52.135.167.160) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1425.20; Tue, 18 Dec 2018 04:19:32 +0000 Received: from AM6PR04MB5781.eurprd04.prod.outlook.com ([fe80::4d2e:cf15:fcf7:56b2]) by AM6PR04MB5781.eurprd04.prod.outlook.com ([fe80::4d2e:cf15:fcf7:56b2%5]) with mapi id 15.20.1446.015; Tue, 18 Dec 2018 04:19:32 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "shawnguo@kernel.org" , "robh+dt@kernel.org" , "bhelgaas@google.com" , "lorenzo.pieralisi@arm.com" , "jingoohan1@gmail.com" , "gustavo.pimentel@synopsys.com" , Leo Li CC: Roy Zang , Mingkai Hu , "M.h. Lian" , "Z.q. Hou" Subject: [PATCHv3 2/5] arm64: dts: layerscape: add num-viewport property for PCIe DT nodes Thread-Topic: [PATCHv3 2/5] arm64: dts: layerscape: add num-viewport property for PCIe DT nodes Thread-Index: AQHUlojgKIgvtm9vJk+CrhOvDCDM7A== Date: Tue, 18 Dec 2018 04:19:32 +0000 Message-ID: <20181218041956.41809-3-Zhiqiang.Hou@nxp.com> References: <20181218041956.41809-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181218041956.41809-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0075.apcprd03.prod.outlook.com (2603:1096:203:72::15) To AM6PR04MB5781.eurprd04.prod.outlook.com (2603:10a6:20b:aa::16) x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;AM6PR04MB4102;6:kEZXJ6w1RiHwSxWsgi14qQcgk6+61b6ClhkdvkMdNLuu0DkdciY2dGKs1OLpyXswWNUtaAne6RLsi8GVKK00GptNU2mlOUubY3ELoneenb1wPBtWCUkcrqjdr3EI4UekbmmUNEK0gjYXlypIlqPVLJ9/wcpzIuVHfqf23I2E7Skv1ekkHPQfzDe2HnjryonX1HCgml2uohjomuSf3hhQrbF8IB2Vh/W4fk607LCG5xmX7imzlFKGqkEkQDqdCge6OJbeO1eZsGA4NW1QeKC8WlckfvImEAIu57VTBmDm/p/HTmbQFnPm0+fVlvfrJUq+0OFq03niv+QNQjodLwP8VblT99QXASSVcGLBIans5b/le+kmzbmkuL/8F2KPJhaSXSKz8+FiOSbC3QziZPkmXF7meoaWudn2JeI6W34YtOaGxuIOkDPxzmJtcJEf8KyCk8HhIDXvrM5xYn7dgyHVKw==;5:sN+D8+iByAJyji6efT53cuWFjFc+MMXsYu/YS99auRZMhhgCUsiGuNcVmM7v1ajlSOBEmSbTzw9aQ8kOuIoZzmQ/r0lmbd1YmvQTuQteXguzFLwyaFei1TLL1/qCqhtzEd0N/hwIn9/Aab8+XEsHm8UewOBcFR6rKWWj1ak49+E=;7:3kujN/iJqllK8i9g3XvZSAx4Di76XYE4cimyVSFbWytoth8D1XZT2TpEyUQhsbGQJDZiTgOStUqKDqQq+E3uxs7fX78+dXF622q144kopaSlql9ghV+zaxlGGa08FZfsiL4AIqWtiGunLQT3caD7Wg== x-ms-office365-filtering-correlation-id: 1a838ac3-28db-4fdc-d37d-08d664a00283 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:AM6PR04MB4102; x-ms-traffictypediagnostic: AM6PR04MB4102: authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-microsoft-antispam-prvs: x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(3230021)(999002)(5005020)(6040522)(2401047)(8121501046)(93006095)(93001095)(3231475)(944501520)(52105112)(3002001)(10201501046)(6055026)(148016)(149066)(150057)(6041310)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123562045)(20161123564045)(20161123558120)(20161123560045)(201708071742011)(7699051)(76991095);SRVR:AM6PR04MB4102;BCL:0;PCL:0;RULEID:;SRVR:AM6PR04MB4102; x-forefront-prvs: 08902E536D x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(136003)(346002)(376002)(199004)(189003)(52116002)(7736002)(97736004)(7416002)(68736007)(25786009)(4326008)(36756003)(316002)(106356001)(102836004)(6636002)(105586002)(99286004)(2616005)(71200400001)(486006)(305945005)(11346002)(186003)(6506007)(386003)(110136005)(54906003)(76176011)(6486002)(1076003)(5660300001)(71190400001)(446003)(476003)(26005)(2501003)(2906002)(2201001)(86362001)(575784001)(6436002)(256004)(3846002)(6116002)(39060400002)(81166006)(66066001)(8936002)(81156014)(8676002)(478600001)(6512007)(53936002)(14454004)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:AM6PR04MB4102;H:AM6PR04MB5781.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: 0wvlBQKhhTrDZrWgiNPkK9PAAqRljIvb2HRChTF0D0vS5UdgNNt3u1UnG4YOnAoe2ewDgdOeFYDm94Bf74G8mF0TxRVbA1uoa8s/jyQWVtQb1x65viujA2ZIURcBC5cZ+SyRLD1mAyGwQKsZaSLDevxdy0SNcXfVDrLatmRvVMI5DhWJbqqmDqbk30UmTYHweaNNirZhBwnbUvWZkKUZrRF94jmIhtEmppZJeX2S9LdgJAxdfAnByqj5BsmRt9l3erKRDBZrB8zZIvh6RYLGOB4VxxaT8nyy+QGQ6zZIcCNK0OMG+9UevEYXiLuxaDiD spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1a838ac3-28db-4fdc-d37d-08d664a00283 X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Dec 2018 04:19:32.1894 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR04MB4102 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang Add num-viewport property for PCIe DT nodes to specify how many viewports are implemented. Signed-off-by: Hou Zhiqiang --- V3: - New patch arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 1 + arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 3 +++ arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 3 +++ arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 3 +++ arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 4 ++++ 5 files changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index 21f2b3ba6b58..7ce0aa52292c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -486,6 +486,7 @@ #size-cells = <2>; device_type = "pci"; num-lanes = <4>; + num-viewport = <2>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi index 760d510d78de..f42368afeea9 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi @@ -673,6 +673,7 @@ device_type = "pci"; dma-coherent; num-lanes = <4>; + num-viewport = <6>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ @@ -699,6 +700,7 @@ device_type = "pci"; dma-coherent; num-lanes = <2>; + num-viewport = <6>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ @@ -725,6 +727,7 @@ device_type = "pci"; dma-coherent; num-lanes = <2>; + num-viewport = <6>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 64d334c6b0b4..10be89168793 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -642,6 +642,7 @@ device_type = "pci"; dma-coherent; num-lanes = <4>; + num-viewport = <8>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ @@ -668,6 +669,7 @@ device_type = "pci"; dma-coherent; num-lanes = <2>; + num-viewport = <8>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ @@ -694,6 +696,7 @@ device_type = "pci"; dma-coherent; num-lanes = <2>; + num-viewport = <8>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi index 9deb9cb83046..7d303bd40047 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi @@ -523,6 +523,7 @@ device_type = "pci"; dma-coherent; num-lanes = <4>; + num-viewport = <256>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ @@ -548,6 +549,7 @@ device_type = "pci"; dma-coherent; num-lanes = <4>; + num-viewport = <6>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ @@ -573,6 +575,7 @@ device_type = "pci"; dma-coherent; num-lanes = <8>; + num-viewport = <6>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi index 5732e3b48be7..4bb9aa2dd8b2 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi @@ -640,6 +640,7 @@ device_type = "pci"; dma-coherent; num-lanes = <4>; + num-viewport = <6>; bus-range = <0x0 0xff>; msi-parent = <&its>; #interrupt-cells = <1>; @@ -662,6 +663,7 @@ device_type = "pci"; dma-coherent; num-lanes = <4>; + num-viewport = <6>; bus-range = <0x0 0xff>; msi-parent = <&its>; #interrupt-cells = <1>; @@ -684,6 +686,7 @@ device_type = "pci"; dma-coherent; num-lanes = <8>; + num-viewport = <256>; bus-range = <0x0 0xff>; msi-parent = <&its>; #interrupt-cells = <1>; @@ -706,6 +709,7 @@ device_type = "pci"; dma-coherent; num-lanes = <4>; + num-viewport = <6>; bus-range = <0x0 0xff>; msi-parent = <&its>; #interrupt-cells = <1>; From patchwork Tue Dec 18 04:19:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10734727 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 78CCE14E2 for ; Tue, 18 Dec 2018 04:20:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6997F2A6F4 for ; Tue, 18 Dec 2018 04:20:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5DEA32A47B; Tue, 18 Dec 2018 04:20:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D95832A358 for ; Tue, 18 Dec 2018 04:20:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726481AbeLREUO (ORCPT ); Mon, 17 Dec 2018 23:20:14 -0500 Received: from mail-eopbgr60044.outbound.protection.outlook.com ([40.107.6.44]:52896 "EHLO EUR04-DB3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726296AbeLREUO (ORCPT ); Mon, 17 Dec 2018 23:20:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=PaarYOSHenwYGQmPvPX8P11jD19ca6sC4p7nSzWqk2A=; b=XyPiFQs7f8p/55D6Xx4RolH4g797ajW8gOtHbZGoA7QyCFWmNTiNFHFe0jnk12IO2KGLLmFhKY4khsrqPdu0BReFkMOMnBqrC0kKU+63syP4UP+vrwwHJTO6fSAmYpKlrspX0BiWILUPBoQ+D2jZ2UbL602caLEqKInmBY6VRlw= Received: from AM6PR04MB5781.eurprd04.prod.outlook.com (20.179.2.80) by AM6PR04MB4102.eurprd04.prod.outlook.com (52.135.167.160) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1425.20; Tue, 18 Dec 2018 04:19:37 +0000 Received: from AM6PR04MB5781.eurprd04.prod.outlook.com ([fe80::4d2e:cf15:fcf7:56b2]) by AM6PR04MB5781.eurprd04.prod.outlook.com ([fe80::4d2e:cf15:fcf7:56b2%5]) with mapi id 15.20.1446.015; Tue, 18 Dec 2018 04:19:37 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "shawnguo@kernel.org" , "robh+dt@kernel.org" , "bhelgaas@google.com" , "lorenzo.pieralisi@arm.com" , "jingoohan1@gmail.com" , "gustavo.pimentel@synopsys.com" , Leo Li CC: Roy Zang , Mingkai Hu , "M.h. Lian" , "Z.q. Hou" Subject: [PATCHv3 3/5] PCI: dwc: fix potential memory leak Thread-Topic: [PATCHv3 3/5] PCI: dwc: fix potential memory leak Thread-Index: AQHUlojjRQR4wIQbqU6X3IfQXDLFig== Date: Tue, 18 Dec 2018 04:19:37 +0000 Message-ID: <20181218041956.41809-4-Zhiqiang.Hou@nxp.com> References: <20181218041956.41809-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181218041956.41809-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0075.apcprd03.prod.outlook.com (2603:1096:203:72::15) To AM6PR04MB5781.eurprd04.prod.outlook.com (2603:10a6:20b:aa::16) x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;AM6PR04MB4102;6:cq/frfSD6DmuOpgYEuTf/AmrniiqYJIRAUnjbibIezhWi2L57jbXQOHbtj2402lDUrNW077LCmwEVv6+MlbONMaxEqzVsCogoObzfk940zJgpwJFvSafKxZC4O+3yA3i7YYhGyPzN5kQF8xwLHG6mFLLCKXay1QCSzZY9hEOfCBvEoBWQjA/e4YV3iADzDOYVdAdoeUuwsxUN9o2T3/wK9ecEdrywf4d1NyT6a7oDSw3G9Z0nZx0xq+ULgQFXoueF2TwOAgePoKtn+rDrftc8diym2xs1KyYvuYPSLb4u0umne+oQfhd/cvUxIy1X/aUgbosLgKNQx2GMKFOI819Luy4rNT1/eFoZRyTpsewSv5fOq3d6DL63m9mM803w3AB067qdzM6jBTVhqB/5JwpnzkkIN92w2DpiXV7dMMtjKifvxbul9DHE34kkDQT7e3lxGtVxAu8T2S8QRbzMRWmpA==;5:/iQcj46gWPgFhsohePq2o+2fA+3EjDHL5Afm41IyqBW694OUfyM1wUKBrg3i9LUJb0uIoNIGUfWhW7FtrqEXQyXVkXQhn57Qv6pwws8YvdUz/j1oY50qScCoK/CozEjsyDlHY3Fp4mCubYjLeITJ7zmNuuKdCALP/GHcMYO03IU=;7:r1w+ZeZRTIDGlqpwWWpk0gZ920Nhy2htH3YHvcFebXt50aV29rik8eEgId5ToyaEkzQ8+jBFuLyL7tylfjaa23wU06vwh5cVlm20wCM58ka//Vcy0GqV0tWgedHvy/0Yb7dNntDzbxkGAmdQCkm2yg== x-ms-office365-filtering-correlation-id: f9f2d90d-d222-4485-5bf2-08d664a005cb x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:AM6PR04MB4102; x-ms-traffictypediagnostic: AM6PR04MB4102: authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-microsoft-antispam-prvs: x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(3230021)(999002)(5005020)(6040522)(2401047)(8121501046)(93006095)(93001095)(3231475)(944501520)(52105112)(3002001)(10201501046)(6055026)(148016)(149066)(150057)(6041310)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123562045)(20161123564045)(20161123558120)(20161123560045)(201708071742011)(7699051)(76991095);SRVR:AM6PR04MB4102;BCL:0;PCL:0;RULEID:;SRVR:AM6PR04MB4102; x-forefront-prvs: 08902E536D x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(136003)(346002)(376002)(199004)(189003)(52116002)(7736002)(97736004)(7416002)(68736007)(25786009)(4326008)(36756003)(316002)(106356001)(102836004)(6636002)(105586002)(99286004)(2616005)(71200400001)(486006)(305945005)(11346002)(186003)(6506007)(386003)(110136005)(54906003)(76176011)(6486002)(1076003)(5660300001)(71190400001)(446003)(476003)(26005)(2501003)(2906002)(2201001)(86362001)(6436002)(256004)(14444005)(3846002)(6116002)(39060400002)(81166006)(66066001)(8936002)(81156014)(8676002)(478600001)(6512007)(53936002)(14454004)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:AM6PR04MB4102;H:AM6PR04MB5781.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: zzm4wtj58tPQ01iUbw+h6eXAuL9/VKzlQs0UPha0ybXfMv0puZz66vGvc0cXw6S3X11zcn9HyvSGOMYAEhDcCPwT/dLhGl/ryE2hOe8t9EzbVGi2WjioiCEeMgLNQSrD4NmDe7MRovJ1wnHEg30Np/19DFCxaOw88L2vHkukxQAY5ujSv4SlGKsd1WhDLxpnL8IJiFDY1+EXF9Pxf1nlwTgPaJC85mDgEzKcTM3epO4ULtl/tV5oeQwGNDA5BDkp6spwhSlninxitE7+9O00GwpP+etuShTDORq0cNWzunMJknmFZ5vwSsp8BrseR9jC spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f9f2d90d-d222-4485-5bf2-08d664a005cb X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Dec 2018 04:19:37.8585 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR04MB4102 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang To avoid memory leak on error return of the adjacent function devm_of_pci_get_host_bridge_resources(), change to use devm_pci_alloc_host_bridge() to allocate host bridge structure, then it will be managed automatically. Fixes: 295aeb98a322 ("PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()") Signed-off-by: Hou Zhiqiang --- V3: - Changed to use devm_* to allocate host bridge. - Added Fixes info. .../pci/controller/dwc/pcie-designware-host.c | 28 ++++++++----------- 1 file changed, 11 insertions(+), 17 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 29a05759a294..33b5a3815d24 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -346,7 +346,7 @@ int dw_pcie_host_init(struct pcie_port *pp) dev_err(dev, "Missing *config* reg space\n"); } - bridge = pci_alloc_host_bridge(0); + bridge = devm_pci_alloc_host_bridge(dev, 0); if (!bridge) return -ENOMEM; @@ -357,7 +357,7 @@ int dw_pcie_host_init(struct pcie_port *pp) ret = devm_request_pci_bus_resources(dev, &bridge->windows); if (ret) - goto error; + return ret; /* Get the I/O and memory ranges from DT */ resource_list_for_each_entry_safe(win, tmp, &bridge->windows) { @@ -401,8 +401,7 @@ int dw_pcie_host_init(struct pcie_port *pp) resource_size(pp->cfg)); if (!pci->dbi_base) { dev_err(dev, "Error with ioremap\n"); - ret = -ENOMEM; - goto error; + return -ENOMEM; } } @@ -413,8 +412,7 @@ int dw_pcie_host_init(struct pcie_port *pp) pp->cfg0_base, pp->cfg0_size); if (!pp->va_cfg0_base) { dev_err(dev, "Error with ioremap in function\n"); - ret = -ENOMEM; - goto error; + return -ENOMEM; } } @@ -424,8 +422,7 @@ int dw_pcie_host_init(struct pcie_port *pp) pp->cfg1_size); if (!pp->va_cfg1_base) { dev_err(dev, "Error with ioremap\n"); - ret = -ENOMEM; - goto error; + return -ENOMEM; } } @@ -448,14 +445,14 @@ int dw_pcie_host_init(struct pcie_port *pp) pp->num_vectors == 0) { dev_err(dev, "Invalid number of vectors\n"); - goto error; + return -EINVAL; } } if (!pp->ops->msi_host_init) { ret = dw_pcie_allocate_domains(pp); if (ret) - goto error; + return ret; if (pp->msi_irq) irq_set_chained_handler_and_data(pp->msi_irq, @@ -464,14 +461,14 @@ int dw_pcie_host_init(struct pcie_port *pp) } else { ret = pp->ops->msi_host_init(pp); if (ret < 0) - goto error; + return ret; } } if (pp->ops->host_init) { ret = pp->ops->host_init(pp); if (ret) - goto error; + return ret; } pp->root_bus_nr = pp->busn->start; @@ -485,7 +482,7 @@ int dw_pcie_host_init(struct pcie_port *pp) ret = pci_scan_root_bus_bridge(bridge); if (ret) - goto error; + return ret; bus = bridge->bus; @@ -499,11 +496,8 @@ int dw_pcie_host_init(struct pcie_port *pp) pcie_bus_configure_settings(child); pci_bus_add_devices(bus); - return 0; -error: - pci_free_host_bridge(bridge); - return ret; + return 0; } static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, From patchwork Tue Dec 18 04:19:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10734735 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C002A14E2 for ; Tue, 18 Dec 2018 04:20:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AF8F52A15A for ; Tue, 18 Dec 2018 04:20:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A2B382A64B; Tue, 18 Dec 2018 04:20:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2E4EA2A15A for ; Tue, 18 Dec 2018 04:20:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726723AbeLREU3 (ORCPT ); Mon, 17 Dec 2018 23:20:29 -0500 Received: from mail-eopbgr60044.outbound.protection.outlook.com ([40.107.6.44]:52896 "EHLO EUR04-DB3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726420AbeLREU3 (ORCPT ); Mon, 17 Dec 2018 23:20:29 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=itSbUbwJO4gh1NyCHxixBJtwwWhH3T1namaQemAx6BM=; b=Hb9R6Z1/4O0SEaOGFjL/Gq+pOo9gHw7uBSLqaZ4jNY70we0vyo8UFM1N7A5bhAlntbTOxY6qcJhwrU9oBYG812oH2Xtjwny8ADHKxG8NIi4Um4wSdyNcbdpiPWlSExZaCK1HcJHC3i0wQQ7N7TQC+SnMEAS/FNkB8A7P4AG5VpU= Received: from AM6PR04MB5781.eurprd04.prod.outlook.com (20.179.2.80) by AM6PR04MB4102.eurprd04.prod.outlook.com (52.135.167.160) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1425.20; Tue, 18 Dec 2018 04:19:43 +0000 Received: from AM6PR04MB5781.eurprd04.prod.outlook.com ([fe80::4d2e:cf15:fcf7:56b2]) by AM6PR04MB5781.eurprd04.prod.outlook.com ([fe80::4d2e:cf15:fcf7:56b2%5]) with mapi id 15.20.1446.015; Tue, 18 Dec 2018 04:19:43 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "shawnguo@kernel.org" , "robh+dt@kernel.org" , "bhelgaas@google.com" , "lorenzo.pieralisi@arm.com" , "jingoohan1@gmail.com" , "gustavo.pimentel@synopsys.com" , Leo Li CC: Roy Zang , Mingkai Hu , "M.h. Lian" , "Z.q. Hou" Subject: [PATCHv3 4/5] PCI: dwc: fix 4GiB outbound window size truncated to zero issue Thread-Topic: [PATCHv3 4/5] PCI: dwc: fix 4GiB outbound window size truncated to zero issue Thread-Index: AQHUlojmUkIA7a60GkSJjdnCHK63jw== Date: Tue, 18 Dec 2018 04:19:43 +0000 Message-ID: <20181218041956.41809-5-Zhiqiang.Hou@nxp.com> References: <20181218041956.41809-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181218041956.41809-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0075.apcprd03.prod.outlook.com (2603:1096:203:72::15) To AM6PR04MB5781.eurprd04.prod.outlook.com (2603:10a6:20b:aa::16) x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;AM6PR04MB4102;6:MFGbp92SPs559GwyiSY6WdBN1AA0ztUlkE9HZ0IUaC/Q9JpAHZbxBD7upGOy1qmYZRqoIbRVfrK7xCfv5ORIgmbrTAuMRPYgQFSH/da6imBcXdWsFTLvVCn6J0nnwK9OWK6kvPKbMopW7gciYX83e3nVjaROL/ygpZ7SGlYBrdLCFWaCD/3GOqIMVTOr/0euqoEp2YwvHcDxTjDMssfQ7n97xXhCfMnbPmGGog6sySnp9tGcKdTjFbup4qakkqml3gcDMBG681FT2CTLjwFh0kGNK5XEcci8ybMNhev6mAgOc61jCTpSZSp+WUIesMBacWV+cY3fjW6mrL8L8xTMrTYEagSduHN4MYU4H/F0gR35TEuHrFoE+UwzLyq+D1mgkbtR2ubmZCr2xpaI8FepKVtQqXJKolWRItykSLqUS0vCKYIlHs3FlpLZKzdZA89kMx2+vMNAURMEDrWuF5IY4Q==;5:hxUuVCyCX43spcalYaYhVhBQj1r87ywV7R4YQOe9OYxozjtFz0fySSu4/zqXPGMuyf/js7/PlpI/fTDw2E3ZDN60xi+Qg9cg9qPkopUxrkDL7LlkAbUYQIIQ//rEUNvnVRvELVMv+tIo9cCLXkJ+thMNAh/brsZbnNVXKPOiNMs=;7:pX9P3rmDnUoVss8Lxk/u6VXMNmy8T5ZScQUPhjBT66Xo4/uKneWX3hMBStetudpQ79yUjNuwEpY/SazT5qxuGNSfUVbISOz7G1pfoRUEQb3++LLl10Sx0MYFY8b79ZsGx9PH5lL/PMMQ2T4BWZfgUg== x-ms-office365-filtering-correlation-id: feb3f5d1-5a56-419a-4748-08d664a00931 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:AM6PR04MB4102; x-ms-traffictypediagnostic: AM6PR04MB4102: authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-microsoft-antispam-prvs: x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(3230021)(999002)(5005020)(6040522)(2401047)(8121501046)(93006095)(93001095)(3231475)(944501520)(52105112)(3002001)(10201501046)(6055026)(148016)(149066)(150057)(6041310)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123562045)(20161123564045)(20161123558120)(20161123560045)(201708071742011)(7699051)(76991095);SRVR:AM6PR04MB4102;BCL:0;PCL:0;RULEID:;SRVR:AM6PR04MB4102; x-forefront-prvs: 08902E536D x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(136003)(346002)(376002)(199004)(189003)(52116002)(7736002)(97736004)(7416002)(68736007)(25786009)(4326008)(36756003)(316002)(106356001)(102836004)(6636002)(105586002)(99286004)(2616005)(71200400001)(486006)(305945005)(11346002)(186003)(6506007)(386003)(110136005)(54906003)(76176011)(6486002)(1076003)(5660300001)(71190400001)(446003)(476003)(26005)(2501003)(2906002)(2201001)(86362001)(575784001)(6436002)(256004)(3846002)(6116002)(39060400002)(81166006)(66066001)(8936002)(81156014)(8676002)(478600001)(6512007)(53936002)(14454004)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:AM6PR04MB4102;H:AM6PR04MB5781.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: LZaEiIP6v+WO0HBfYRyyNYyBDhVdnP2E/50D3C52Vf0cbj6A1bMqkvIyK/hErTX/S3DM+yKTXkqbBueKekrJV0k2C7m3+eAZCH5nkPdUg11f9BCGm8xG1zdlBoiAcWUg4bcarikvTpirfSQNnx2Ih3oraLn0gh5IWl1FQEninwkq1ICYYmnNPoGldAYADiG4bds1unMpMnklgkhVm9mdz8JNTWD7ewR7Nfyp3O79G2zBQTylOmUmRSZY+r6hWY9gwmpCsT3JeExrgZRzPm+GlhhWGyY7g0KTXdfzgd6efmFsmeTfvLUGqpd9/lhfRAie spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: feb3f5d1-5a56-419a-4748-08d664a00931 X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Dec 2018 04:19:43.3775 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR04MB4102 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang The current type of mem_size is 'u32', so when resource_size() return 4G it will be truncated to zero. This patch fix it by changing its type to 'u64'. Fixes: 340cba6092c2 ("pci: Add PCIe driver for Samsung Exynos") Signed-off-by: Hou Zhiqiang Acked-by: Gustavo Pimentel --- V3: - No change drivers/pci/controller/dwc/pcie-designware.c | 4 ++-- drivers/pci/controller/dwc/pcie-designware.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 2153956a0b20..7ac5989c23ef 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -106,7 +106,7 @@ static void dw_pcie_writel_ob_unroll(struct dw_pcie *pci, u32 index, u32 reg, static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index, int type, u64 cpu_addr, - u64 pci_addr, u32 size) + u64 pci_addr, u64 size) { u32 retries, val; @@ -141,7 +141,7 @@ static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index, } void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type, - u64 cpu_addr, u64 pci_addr, u32 size) + u64 cpu_addr, u64 pci_addr, u64 size) { u32 retries, val; diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 0989d880ac46..25604387d13e 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -157,7 +157,7 @@ struct pcie_port { u32 io_size; u64 mem_base; phys_addr_t mem_bus_addr; - u32 mem_size; + u64 mem_size; struct resource *cfg; struct resource *io; struct resource *mem; @@ -242,7 +242,7 @@ int dw_pcie_link_up(struct dw_pcie *pci); int dw_pcie_wait_for_link(struct dw_pcie *pci); void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type, u64 cpu_addr, u64 pci_addr, - u32 size); + u64 size); int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar, u64 cpu_addr, enum dw_pcie_as_type as_type); void dw_pcie_disable_atu(struct dw_pcie *pci, int index, From patchwork Tue Dec 18 04:19:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 10734729 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8D62114E2 for ; Tue, 18 Dec 2018 04:20:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 399F62A71F for ; Tue, 18 Dec 2018 04:20:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3736E2A155; Tue, 18 Dec 2018 04:20:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 862F42A7A9 for ; Tue, 18 Dec 2018 04:20:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726702AbeLREUU (ORCPT ); Mon, 17 Dec 2018 23:20:20 -0500 Received: from mail-eopbgr60046.outbound.protection.outlook.com ([40.107.6.46]:52304 "EHLO EUR04-DB3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726296AbeLREUT (ORCPT ); Mon, 17 Dec 2018 23:20:19 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=EsuyWdJkNxk6PApjsWCbCwRzy+IG8RnH5hWgdRKeS7o=; b=qXCwJ3Sf6aqF7G8KwcCy4UntfW/iOs6ZCldtyAiEqZ6Q8yQF+6brYdskpufrXjad6S7My6z19vzs9NggSYvkf/NUVOksYnuxkO3ERO4bUukxpRqMvkkgxN/YtQ9X6Hh0as8xQmhMKq3aw7Xs0Wrid8EJBYsvFbcLlQ5wpMnKl/0= Received: from AM6PR04MB5781.eurprd04.prod.outlook.com (20.179.2.80) by AM6PR04MB4102.eurprd04.prod.outlook.com (52.135.167.160) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1425.20; Tue, 18 Dec 2018 04:19:48 +0000 Received: from AM6PR04MB5781.eurprd04.prod.outlook.com ([fe80::4d2e:cf15:fcf7:56b2]) by AM6PR04MB5781.eurprd04.prod.outlook.com ([fe80::4d2e:cf15:fcf7:56b2%5]) with mapi id 15.20.1446.015; Tue, 18 Dec 2018 04:19:48 +0000 From: "Z.q. Hou" To: "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "shawnguo@kernel.org" , "robh+dt@kernel.org" , "bhelgaas@google.com" , "lorenzo.pieralisi@arm.com" , "jingoohan1@gmail.com" , "gustavo.pimentel@synopsys.com" , Leo Li CC: Roy Zang , Mingkai Hu , "M.h. Lian" , "Z.q. Hou" Subject: [PATCHv3 5/5] PCI: dwc: add prefetchable memory range support Thread-Topic: [PATCHv3 5/5] PCI: dwc: add prefetchable memory range support Thread-Index: AQHUlojqcT/kWN1oFkqB3BqcFGu4pA== Date: Tue, 18 Dec 2018 04:19:48 +0000 Message-ID: <20181218041956.41809-6-Zhiqiang.Hou@nxp.com> References: <20181218041956.41809-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181218041956.41809-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0075.apcprd03.prod.outlook.com (2603:1096:203:72::15) To AM6PR04MB5781.eurprd04.prod.outlook.com (2603:10a6:20b:aa::16) x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;AM6PR04MB4102;6:7hm1NPNbRBKuvSBMoSehlmtz7pdDKvd1WfKhvSeeJLmhub7SjdKli7uGqkd7slvhfPnUdnDyzNLzZ6ViE/Gnh/nSEd5GTJrSeQQZ0UWDoA5DomA0YB5LOAHzAirOA4rpWwJBAgRitnrEdeoRRzqTOQvsoFW2G63Bjp/s+3jvtoJ7xv7w6VxPROg7QFATAZGKFpMG5hzH/UteFDXT/YLN+By6xQq5/H64OTX3Dck4CEhuRT6LbYIghHNXF9PHXvxO65hT47/uCFBn1MyNN8m5+u9K+YGIth1+Wy4XSfMYRHQq3Bp5OL/ZI7zNUP2QcWxtvnykgrLZXZMYfTZtKC4dmM7sdsNsxETU/mJq9VFlXxMNOPKNLvgLTgtMc5momHo7y1x6wVX/d+wAkuf0xgzxMW5ok4133adKVjJUgY64chdq0zhrn9Zqpcepm4m11zLn/fp5DuB649krfjxeKq2AHw==;5:44R9MnZIOxg2STiPR1yVJ1BO6ervQ3fhBDxSkg9z8m4pna9PIyyeNhKia6cDNNCq6gkd23gbe7yCq/grtsxF+A254creBlfu9bEgTtyBGZlpCM+pBslJgFtf169MBQtCawEMwks2DKh5iak/PUU9YH7OyminOSHmIlaLpDEJMw8=;7:seqLMJXUscFKnpZVE2H5ErlkN8GBYn3FEnu8EfpfHm+PQ84TwpNjwVqIu732Zq0ghpK2YuwaUQ7XXp0Jw3MBF4fzjN+oFtSJXsA3O/Q+m88/+Y0JiUB2Zw65LxxqgPKINdAzTpH9EDSePslucz64YA== x-ms-office365-filtering-correlation-id: ac83a572-9716-45e9-30cc-08d664a00c6f x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:AM6PR04MB4102; x-ms-traffictypediagnostic: AM6PR04MB4102: authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-microsoft-antispam-prvs: x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(8211001083)(3230021)(999002)(5005020)(6040522)(2401047)(8121501046)(93006095)(93001095)(3231475)(944501520)(52105112)(3002001)(10201501046)(6055026)(148016)(149066)(150057)(6041310)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123562045)(20161123564045)(20161123558120)(20161123560045)(201708071742011)(7699051)(76991095);SRVR:AM6PR04MB4102;BCL:0;PCL:0;RULEID:;SRVR:AM6PR04MB4102; x-forefront-prvs: 08902E536D x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(39860400002)(366004)(396003)(136003)(346002)(376002)(199004)(189003)(52116002)(7736002)(97736004)(7416002)(68736007)(25786009)(4326008)(36756003)(316002)(106356001)(102836004)(6636002)(105586002)(99286004)(2616005)(71200400001)(486006)(305945005)(11346002)(186003)(6506007)(386003)(110136005)(54906003)(76176011)(6486002)(1076003)(5660300001)(71190400001)(446003)(476003)(26005)(2501003)(2906002)(2201001)(86362001)(6436002)(256004)(14444005)(3846002)(6116002)(39060400002)(81166006)(66066001)(8936002)(81156014)(8676002)(478600001)(6512007)(53936002)(14454004)(921003)(1121003);DIR:OUT;SFP:1101;SCL:1;SRVR:AM6PR04MB4102;H:AM6PR04MB5781.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: aCvTiePjbLbAyk08w9s/7mSaypvs8541EydryMQop4IZ910YYI2s1hQrYjg8A69kXFKf0/ymq3nJTsr4nZSM3JF32Kj318jOmEICB/4+Dup3bPWmmly/G3ClPYFnW4sg7Kz+dbwLLw+rEzDNOtMm9P2n6uwWa3jQWth4BUWd26+xBESYvxFHqR9cJQdedzLXMtJt31juY8lUKXg8RAIQzdHsrXQuUm5n3SyDyW1XjhFg3gVtAttR/Cg3d905NvN2H5mQVnGzW65MlYkjWOsn2vcfGSy/sreerJaW9qblOuvLlM/+u49l9zJb0PHCu+Co spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: ac83a572-9716-45e9-30cc-08d664a00c6f X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Dec 2018 04:19:48.8534 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR04MB4102 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang The current code only support non-prefetchable memory range, as the non-prefetchable memory range must not be greater than 4GiB, one viewport can cover it, which supports upto 4GiB. To support prefetchable memory range, which is upto 64-bit memory space and can be greater than 4GiB, so we need multiple viewports. And added separate vars to store prefetchable memory range info to prevent overriding the non-prefetchable memory range info. And this patch explicitly assigned the last (if there are only 2 viewports) or last 2 viewports for CFG and I/O windows and the rests for MEM windows. Signed-off-by: Hou Zhiqiang --- V3: - Changed back to get num-viewport from DTS. - Added print info upon non-pref memory truncated. - Corrected typo. .../pci/controller/dwc/pcie-designware-host.c | 107 +++++++++++++++--- drivers/pci/controller/dwc/pcie-designware.h | 7 ++ 2 files changed, 97 insertions(+), 17 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 33b5a3815d24..2d1dd3dba1ba 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -346,6 +346,28 @@ int dw_pcie_host_init(struct pcie_port *pp) dev_err(dev, "Missing *config* reg space\n"); } + ret = of_property_read_u32(np, "num-viewport", &pci->num_viewport); + if (ret || pci->num_viewport < 2) + pci->num_viewport = 2; + + /* + * if there are only 2 viewports, assign the last viewport for + * both CFG and IO window, otherwise assign the last 2 viewport + * for CFG and IO window specific. And the rest viewports are + * assigned to MEM windows. + */ + if (pci->num_viewport == 2) { + pp->cfg_idx = pp->io_idx = PCIE_ATU_REGION_INDEX1; + pp->mem_wins = 1; + } else { + pp->cfg_idx = pci->num_viewport - 1; + pp->io_idx = pci->num_viewport - 2; + pp->mem_wins = pci->num_viewport - 2; + } + + dev_dbg(dev, "CFG win id: %d, I/O win id: %d, Total MEM win: %d\n", + pp->cfg_idx, pp->io_idx, pp->mem_wins); + bridge = devm_pci_alloc_host_bridge(dev, 0); if (!bridge) return -ENOMEM; @@ -377,10 +399,20 @@ int dw_pcie_host_init(struct pcie_port *pp) } break; case IORESOURCE_MEM: - pp->mem = win->res; - pp->mem->name = "MEM"; - pp->mem_size = resource_size(pp->mem); - pp->mem_bus_addr = pp->mem->start - win->offset; + if (win->res->flags & IORESOURCE_PREFETCH) { + pp->mem_pref = win->res; + pp->mem_pref->name = "MEM pref"; + pp->mem_pref_size = resource_size(pp->mem_pref); + pp->mem_pref_bus_addr = pp->mem_pref->start - + win->offset; + pp->mem_pref_base = pp->mem_pref->start; + } else { + pp->mem = win->res; + pp->mem->name = "MEM"; + pp->mem_size = resource_size(pp->mem); + pp->mem_bus_addr = pp->mem->start - win->offset; + pp->mem_base = pp->mem->start; + } break; case 0: pp->cfg = win->res; @@ -405,8 +437,6 @@ int dw_pcie_host_init(struct pcie_port *pp) } } - pp->mem_base = pp->mem->start; - if (!pp->va_cfg0_base) { pp->va_cfg0_base = devm_pci_remap_cfgspace(dev, pp->cfg0_base, pp->cfg0_size); @@ -527,12 +557,12 @@ static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, va_cfg_base = pp->va_cfg1_base; } - dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1, + dw_pcie_prog_outbound_atu(pci, pp->cfg_idx, type, cpu_addr, busdev, cfg_size); ret = dw_pcie_read(va_cfg_base + where, size, val); - if (pci->num_viewport <= 2) - dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1, + if (pp->cfg_idx == pp->io_idx) + dw_pcie_prog_outbound_atu(pci, pp->io_idx, PCIE_ATU_TYPE_IO, pp->io_base, pp->io_bus_addr, pp->io_size); @@ -566,12 +596,12 @@ static int dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus, va_cfg_base = pp->va_cfg1_base; } - dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1, + dw_pcie_prog_outbound_atu(pci, pp->cfg_idx, type, cpu_addr, busdev, cfg_size); ret = dw_pcie_write(va_cfg_base + where, size, val); - if (pci->num_viewport <= 2) - dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1, + if (pp->cfg_idx == pp->io_idx) + dw_pcie_prog_outbound_atu(pci, pp->io_idx, PCIE_ATU_TYPE_IO, pp->io_base, pp->io_bus_addr, pp->io_size); @@ -645,6 +675,9 @@ static u8 dw_pcie_iatu_unroll_enabled(struct dw_pcie *pci) void dw_pcie_setup_rc(struct pcie_port *pp) { u32 val, ctrl, num_ctrls; + u64 unmapped_size, base, win_size; + phys_addr_t bus_addr; + int i; struct dw_pcie *pci = to_dw_pcie_from_pp(pp); dw_pcie_setup(pci); @@ -693,13 +726,53 @@ void dw_pcie_setup_rc(struct pcie_port *pp) dev_dbg(pci->dev, "iATU unroll: %s\n", pci->iatu_unroll_enabled ? "enabled" : "disabled"); + /* + * The maximum region size is 4 GB, and a region + * must not cross a 4 GB boundary. + */ + win_size = SZ_4G - (pp->mem_base & (SZ_4G - 1)); + win_size = min(win_size, pp->mem_size); + if (win_size < pp->mem_size) + dev_info(pci->dev, + "iATU: non-pref MEM size is truncated to 0x%llx\n", + win_size); + dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX0, PCIE_ATU_TYPE_MEM, pp->mem_base, - pp->mem_bus_addr, pp->mem_size); - if (pci->num_viewport > 2) - dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX2, - PCIE_ATU_TYPE_IO, pp->io_base, - pp->io_bus_addr, pp->io_size); + pp->mem_bus_addr, win_size); + dev_dbg(pci->dev, + "iATU: non-pref MEM: win = %d: base = 0x%llx, bus_addr = %pa, size = 0x%llx\n", + 0, pp->mem_base, &pp->mem_bus_addr, win_size); + + /* + * Prefetchable memory range can be 64bit space, + * so may need multiple viewports. + */ + unmapped_size = pp->mem_pref_size; + base = pp->mem_pref_base; + bus_addr = pp->mem_pref_bus_addr; + for (i = PCIE_ATU_REGION_INDEX1; + unmapped_size > 0 && i < pp->mem_wins; i++) { + win_size = SZ_4G - (base & (SZ_4G - 1)); + win_size = min(win_size, unmapped_size); + dw_pcie_prog_outbound_atu(pci, i, PCIE_ATU_TYPE_MEM, + base, bus_addr, win_size); + dev_dbg(pci->dev, + "iATU: pref MEM: win = %d: base = 0x%llx, bus_addr = %pa, size = 0x%llx\n", + i, base, &bus_addr, win_size); + + base += win_size; + bus_addr += win_size; + unmapped_size -= win_size; + } + + if (unmapped_size > 0) + dev_info(pci->dev, + "iATU: can't cover pref memory range\n"); + + dw_pcie_prog_outbound_atu(pci, pp->io_idx, PCIE_ATU_TYPE_IO, + pp->io_base, pp->io_bus_addr, + pp->io_size); } dw_pcie_wr_own_conf(pp, PCI_BASE_ADDRESS_0, 4, 0); diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 25604387d13e..1e87f18bc417 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -152,15 +152,22 @@ struct pcie_port { u64 cfg1_base; void __iomem *va_cfg1_base; u32 cfg1_size; + u32 cfg_idx; resource_size_t io_base; phys_addr_t io_bus_addr; u32 io_size; + u32 io_idx; u64 mem_base; phys_addr_t mem_bus_addr; u64 mem_size; + phys_addr_t mem_pref_base; + pci_bus_addr_t mem_pref_bus_addr; + u64 mem_pref_size; + u32 mem_wins; struct resource *cfg; struct resource *io; struct resource *mem; + struct resource *mem_pref; struct resource *busn; int irq; const struct dw_pcie_host_ops *ops;