From patchwork Sat Nov 20 21:42:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 12630603 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDA01C433FE for ; Sat, 20 Nov 2021 21:42:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233772AbhKTVpz (ORCPT ); Sat, 20 Nov 2021 16:45:55 -0500 Received: from mx1.riseup.net ([198.252.153.129]:48828 "EHLO mx1.riseup.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234227AbhKTVpx (ORCPT ); Sat, 20 Nov 2021 16:45:53 -0500 Received: from fews1.riseup.net (fews1-pn.riseup.net [10.0.1.83]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "mail.riseup.net", Issuer "R3" (not verified)) by mx1.riseup.net (Postfix) with ESMTPS id 4HxRpc6hjRzF4HN; Sat, 20 Nov 2021 13:42:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1637444569; bh=Tb9BXhWjM8ETEr9rbF//OKUG6q3GkHqxrZkAdfraSgU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FeR43TGc1Mei4bcqpKYqPwhuzzxcbDNsjjPMiJPlAuLJ4MKpgw/fHWh7FJTEihjzJ iT0T51k0awjbZHMcFi4zepqCE83OozkOgPCzDz32Chir/MXjhOCkLA1pgZ2okaF/uh Jz4fLhmB/Zu05GX19lRazOkebaq8uxlJqio7uj70= X-Riseup-User-ID: A8F7261A8CE9C5B1397C1FF3101A29FD34C8F52E7127B6FCF6D8F740BF1D9AB7 Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews1.riseup.net (Postfix) with ESMTPSA id 4HxRpY5QwKz5vkF; Sat, 20 Nov 2021 13:42:45 -0800 (PST) From: Dang Huynh To: Dang Huynh Cc: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alexey Min , Caleb Connolly , Martin Botka , Konrad Dybcio Subject: [PATCH v4 1/8] arm64: dts: qcom: sdm630: Assign numbers to eMMC and SD Date: Sun, 21 Nov 2021 04:42:20 +0700 Message-Id: <20211120214227.779742-2-danct12@riseup.net> In-Reply-To: <20211120214227.779742-1-danct12@riseup.net> References: <20211120214227.779742-1-danct12@riseup.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This makes eMMC/SD device number consistent. Reviewed-by: Martin Botka Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 3e0165bb61c5..b75bb87ed290 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -19,6 +19,11 @@ / { #address-cells = <2>; #size-cells = <2>; + aliases { + mmc1 = &sdhc_1; + mmc2 = &sdhc_2; + }; + chosen { }; clocks { From patchwork Sat Nov 20 21:42:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 12630605 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08069C433F5 for ; Sat, 20 Nov 2021 21:42:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236660AbhKTVp6 (ORCPT ); Sat, 20 Nov 2021 16:45:58 -0500 Received: from mx1.riseup.net ([198.252.153.129]:51956 "EHLO mx1.riseup.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236317AbhKTVp4 (ORCPT ); Sat, 20 Nov 2021 16:45:56 -0500 Received: from fews1.riseup.net (fews1-pn.riseup.net [10.0.1.83]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "mail.riseup.net", Issuer "R3" (not verified)) by mx1.riseup.net (Postfix) with ESMTPS id 4HxRph4Rb4zF3Q7; Sat, 20 Nov 2021 13:42:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1637444572; bh=qEi8whvyibBvrjsfAeCymyE5J6SczEwhMEi9FSO9TXU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Gh9NwXUU2PhVWj0PL1kz9nkLP0GptWCTlI3k0ebpeS7T65iUccmsI4YYkrdXx9zS6 VUruvyQKMxc3T6XO7O0rtv2iLilJ5yTbAWvhaQwpdXrzK0oHD1C665uHb0fOgqCY+0 hWVQpj4iR4tjNiGF1j/oF1wDCSNLfXHW/WCFGiD4= X-Riseup-User-ID: F5DD54F88169A2B44A54C2AE36F433857F9A5828D974BA2418A0793B890C034C Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews1.riseup.net (Postfix) with ESMTPSA id 4HxRpd1yZfz5vkF; Sat, 20 Nov 2021 13:42:49 -0800 (PST) From: Dang Huynh To: Dang Huynh Cc: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alexey Min , Caleb Connolly , Martin Botka , Konrad Dybcio , Konrad Dybcio Subject: [PATCH v4 2/8] arm64: dts: qcom: sdm630-pm660: Move RESIN to pm660 dtsi Date: Sun, 21 Nov 2021 04:42:21 +0700 Message-Id: <20211120214227.779742-3-danct12@riseup.net> In-Reply-To: <20211120214227.779742-1-danct12@riseup.net> References: <20211120214227.779742-1-danct12@riseup.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org It's not worth duplicating the same node over and over again, so let's keep the common bits in the pm660 DTSI, making only changing the status and keycode necessary. Also, disable RESIN/PWR by default just in case if there are devices that doesn't use them. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh Reviewed-by: Caleb Connolly --- arch/arm64/boot/dts/qcom/pm660.dtsi | 12 +++++++++++- .../boot/dts/qcom/sdm630-sony-xperia-nile.dtsi | 16 ++++++++-------- 2 files changed, 19 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/pm660.dtsi b/arch/arm64/boot/dts/qcom/pm660.dtsi index d0ef8a1675e2..c482663aad56 100644 --- a/arch/arm64/boot/dts/qcom/pm660.dtsi +++ b/arch/arm64/boot/dts/qcom/pm660.dtsi @@ -54,14 +54,24 @@ pon: pon@800 { mode-bootloader = <0x2>; mode-recovery = <0x1>; - pwrkey { + pon_pwrkey: pwrkey { compatible = "qcom,pm8941-pwrkey"; interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; debounce = <15625>; bias-pull-up; linux,code = ; + + status = "disabled"; }; + pon_resin: resin { + compatible = "qcom,pm8941-resin"; + interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + + status = "disabled"; + }; }; pm660_temp: temp-alarm@2400 { diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi index 11d0a8c1cf35..e90c9ec84675 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi @@ -215,14 +215,14 @@ &blsp2_uart1 { /* HCI Bluetooth */ }; -&pon { - volup { - compatible = "qcom,pm8941-resin"; - interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; - debounce = <15625>; - bias-pull-up; - linux,code = ; - }; +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + status = "okay"; + + linux,code = ; }; &qusb2phy { From patchwork Sat Nov 20 21:42:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 12630607 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BFF8FC433EF for ; Sat, 20 Nov 2021 21:43:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236294AbhKTVqC (ORCPT ); Sat, 20 Nov 2021 16:46:02 -0500 Received: from mx1.riseup.net ([198.252.153.129]:54688 "EHLO mx1.riseup.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236461AbhKTVqA (ORCPT ); Sat, 20 Nov 2021 16:46:00 -0500 Received: from fews1.riseup.net (fews1-pn.riseup.net [10.0.1.83]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "mail.riseup.net", Issuer "R3" (not verified)) by mx1.riseup.net (Postfix) with ESMTPS id 4HxRpm0bWrzF3Q7; Sat, 20 Nov 2021 13:42:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1637444576; bh=aPAHf70ldIAViOBtaiwWlWMtBRNCVLmA7mu3mNbTW8M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QDl9l0EV5oBtnCwUcGuj6995k94fvy5bAiCwt2fqHxOPRtkhGi3aZs9Yp4d1ch6lF NsVqwhjQ6OpcK6gvbwGm8QX8xkeo8igQ3p19002p/aV0Buzw3n7Wukrr5C00QVZxFm CJYJmFSLU7XKMyuXZxfGyhsm4SMxFiglLaAA8qag= X-Riseup-User-ID: D63DDFE75044F1592968A44F1C285406657807AA9D352A7D2F2DFD072452633E Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews1.riseup.net (Postfix) with ESMTPSA id 4HxRph6xmCz5vkF; Sat, 20 Nov 2021 13:42:52 -0800 (PST) From: Dang Huynh To: Dang Huynh Cc: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alexey Min , Caleb Connolly , Martin Botka , Konrad Dybcio Subject: [PATCH v4 3/8] arm64: dts: qcom: sdm660-xiaomi-lavender: Add RPM and fixed regulators Date: Sun, 21 Nov 2021 04:42:22 +0700 Message-Id: <20211120214227.779742-4-danct12@riseup.net> In-Reply-To: <20211120214227.779742-1-danct12@riseup.net> References: <20211120214227.779742-1-danct12@riseup.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add most of the RPM PM660/PM660L regulators and the fixed ones, defining the common electrical part of this platform. Signed-off-by: Dang Huynh Reviewed-by: Caleb Connolly --- .../boot/dts/qcom/sdm660-xiaomi-lavender.dts | 266 ++++++++++++++++++ 1 file changed, 266 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts index 1edc53fd6941..eccbeecef192 100644 --- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts @@ -1,11 +1,14 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020, Alexey Minnekhanov + * Copyright (c) 2021, Dang Huynh */ /dts-v1/; #include "sdm660.dtsi" +#include "pm660.dtsi" +#include "pm660l.dtsi" / { model = "Xiaomi Redmi Note 7"; @@ -20,6 +23,16 @@ chosen { stdout-path = "serial0:115200n8"; }; + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + + regulator-always-on; + regulator-boot-on; + }; + reserved-memory { #address-cells = <2>; #size-cells = <2>; @@ -40,6 +53,259 @@ &blsp1_uart2 { status = "okay"; }; +&rpm_requests { + pm660l-regulators { + compatible = "qcom,rpm-pm660l-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>; + vdd_l2-supply = <&vreg_bob>; + vdd_l3_l5_l7_l8-supply = <&vreg_bob>; + vdd_l4_l6-supply = <&vreg_bob>; + vdd_bob-supply = <&vph_pwr>; + + vreg_s1b_1p125: s1 { + regulator-min-microvolt = <1125000>; + regulator-max-microvolt = <1125000>; + regulator-enable-ramp-delay = <200>; + }; + + vreg_s2b_1p05: s2 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-enable-ramp-delay = <200>; + }; + + /* LDOs */ + vreg_l1b_0p925: l1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <925000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + /* SDHCI 3.3V signal doesn't seem to be supported. */ + vreg_l2b_2p95: l2 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2696000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l3b_3p3: l3 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l4b_2p95: l4 { + regulator-min-microvolt = <2944000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + + regulator-min-microamp = <200>; + regulator-max-microamp = <600000>; + regulator-system-load = <570000>; + regulator-allow-set-load; + }; + + /* + * Downstream specifies a range of 1721-3600mV, + * but the only assigned consumers are SDHCI2 VMMC + * and Coresight QPDI that both request pinned 2.95V. + * Tighten the range to 1.8-3.328 (closest to 3.3) to + * make the mmc driver happy. + */ + vreg_l5b_2p95: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3328000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + regulator-system-load = <800000>; + }; + + vreg_l7b_3p125: l7 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3125000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l8b_3p3: l8 { + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_bob: bob { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3600000>; + regulator-enable-ramp-delay = <500>; + }; + }; + + pm660-regulators { + compatible = "qcom,rpm-pm660-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3-supply = <&vph_pwr>; + vdd_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>; + vdd_l2_l3-supply = <&vreg_s2b_1p05>; + vdd_l5-supply = <&vreg_s2b_1p05>; + vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>; + vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>; + + /* + * S1A (FTAPC0), S2A (FTAPC1), S3A (HFAPC1) are managed + * by the Core Power Reduction hardened (CPRh) and the + * Operating State Manager (OSM) HW automatically. + */ + + vreg_s4a_2p04: s4 { + regulator-min-microvolt = <1805000>; + regulator-max-microvolt = <2040000>; + regulator-enable-ramp-delay = <200>; + regulator-always-on; + }; + + vreg_s5a_1p35: s5 { + regulator-min-microvolt = <1224000>; + regulator-max-microvolt = <1350000>; + regulator-enable-ramp-delay = <200>; + }; + + vreg_s6a_0p87: s6 { + regulator-min-microvolt = <504000>; + regulator-max-microvolt = <992000>; + regulator-enable-ramp-delay = <150>; + }; + + /* LDOs */ + vreg_l1a_1p225: l1 { + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1250000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l2a_1p0: l2 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1010000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l3a_1p0: l3 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1010000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l5a_0p848: l5 { + regulator-min-microvolt = <525000>; + regulator-max-microvolt = <950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l6a_1p3: l6 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1370000>; + regulator-allow-set-load; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l7a_1p2: l7 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l8a_1p8: l8 { + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <250>; + regulator-system-load = <325000>; + regulator-allow-set-load; + }; + + vreg_l9a_1p8: l9 { + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l10a_1p8: l10 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l11a_1p8: l11 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l12a_1p8: l12 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + }; + + /* This gives power to the LPDDR4: never turn it off! */ + vreg_l13a_1p8: l13 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + regulator-boot-on; + regulator-always-on; + }; + + vreg_l14a_1p8: l14 { + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l15a_1p8: l15 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l16a_2p7: l16 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <250>; + regulator-always-on; + }; + + vreg_l17a_1p8: l17 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l19a_3p3: l19 { + regulator-min-microvolt = <3312000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + }; +}; + &tlmm { gpio-reserved-ranges = <8 4>; }; From patchwork Sat Nov 20 21:42:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 12630609 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDC3DC43217 for ; Sat, 20 Nov 2021 21:43:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236745AbhKTVqH (ORCPT ); Sat, 20 Nov 2021 16:46:07 -0500 Received: from mx1.riseup.net ([198.252.153.129]:59368 "EHLO mx1.riseup.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236734AbhKTVqD (ORCPT ); Sat, 20 Nov 2021 16:46:03 -0500 Received: from fews1.riseup.net (fews1-pn.riseup.net [10.0.1.83]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "mail.riseup.net", Issuer "R3" (not verified)) by mx1.riseup.net (Postfix) with ESMTPS id 4HxRpq5HKYzF3Q7; Sat, 20 Nov 2021 13:42:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1637444579; bh=jB6Z5Xk7dWXO4aRqQJFhfKH0pdlZhdOgLWbyeX4szT8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=E8V1eVx2rG8iJEMiBJOfQ3/5QpjKCmBOMaieDB51CNwNthSsB08CQjV3OU6l07rqj 97X7ybGRhgBUT359yYcMZ4Fmbx5tS/0IXCspQ3D6v1v19MyTwZwEsUnuCsSye+aME3 56iaitgKvjFQtlhwX+E8fQnmD4GCU3YSIzy1+aUc= X-Riseup-User-ID: 4A7C57A8177B8FD96597013CA80BF7AB210D5CDFED230CF774269D3590A81168 Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews1.riseup.net (Postfix) with ESMTPSA id 4HxRpm37rnz5vkT; Sat, 20 Nov 2021 13:42:56 -0800 (PST) From: Dang Huynh To: Dang Huynh Cc: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alexey Min , Caleb Connolly , Martin Botka , Konrad Dybcio , Konrad Dybcio Subject: [PATCH v4 4/8] arm64: dts: qcom: sdm660-xiaomi-lavender: Add PWRKEY and RESIN Date: Sun, 21 Nov 2021 04:42:23 +0700 Message-Id: <20211120214227.779742-5-danct12@riseup.net> In-Reply-To: <20211120214227.779742-1-danct12@riseup.net> References: <20211120214227.779742-1-danct12@riseup.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This enables the volume down key as well as the power button. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh Reviewed-by: Caleb Connolly --- arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts index eccbeecef192..9a6684922804 100644 --- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts @@ -53,6 +53,16 @@ &blsp1_uart2 { status = "okay"; }; +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + status = "okay"; + + linux,code = ; +}; + &rpm_requests { pm660l-regulators { compatible = "qcom,rpm-pm660l-regulators"; From patchwork Sat Nov 20 21:42:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 12630611 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 600EAC433FE for ; Sat, 20 Nov 2021 21:43:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236814AbhKTVqJ (ORCPT ); Sat, 20 Nov 2021 16:46:09 -0500 Received: from mx1.riseup.net ([198.252.153.129]:33408 "EHLO mx1.riseup.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236781AbhKTVqH (ORCPT ); Sat, 20 Nov 2021 16:46:07 -0500 Received: from fews1.riseup.net (fews1-pn.riseup.net [10.0.1.83]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "mail.riseup.net", Issuer "R3" (not verified)) by mx1.riseup.net (Postfix) with ESMTPS id 4HxRpv1lfzzF3Ks; Sat, 20 Nov 2021 13:43:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1637444583; bh=x/ea+/oxu/oKF7WVlF+RpqT7RNryIx5u1m6NAWeE1Ko=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZKwxxUwbEAHqb2WvhsVRHp1TIZKnzmeKeKBskMlyUTO9JGjwmTKzRtqfcimEID++f 7IMReFe+WiEAe4zssToTPuh1l6lFPZqwJezw6BcD58Hk0Zi3WLLPErgGuvQ/sfXGUD I6zkHOwCbS8gBT75PFDJIAqohvHZ/ELOjCYIgirQ= X-Riseup-User-ID: DCC6C7003F831291F09D12CCE2E7B376B5EDB4259107D324F490128294E4F222 Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews1.riseup.net (Postfix) with ESMTPSA id 4HxRpr0q3wz5vkF; Sat, 20 Nov 2021 13:42:59 -0800 (PST) From: Dang Huynh To: Dang Huynh Cc: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alexey Min , Caleb Connolly , Martin Botka , Konrad Dybcio Subject: [PATCH v4 5/8] arm64: dts: qcom: sdm660-xiaomi-lavender: Add volume up button Date: Sun, 21 Nov 2021 04:42:24 +0700 Message-Id: <20211120214227.779742-6-danct12@riseup.net> In-Reply-To: <20211120214227.779742-1-danct12@riseup.net> References: <20211120214227.779742-1-danct12@riseup.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This enables the volume up key. Signed-off-by: Dang Huynh --- .../arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts index 9a6684922804..c7bdf4c28be4 100644 --- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts @@ -9,6 +9,8 @@ #include "sdm660.dtsi" #include "pm660.dtsi" #include "pm660l.dtsi" +#include +#include / { model = "Xiaomi Redmi Note 7"; @@ -33,6 +35,18 @@ vph_pwr: vph-pwr-regulator { regulator-boot-on; }; + gpio-keys { + compatible = "gpio-keys"; + input-name = "gpio-keys"; + + volup { + label = "Volume Up"; + gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + }; + }; + reserved-memory { #address-cells = <2>; #size-cells = <2>; From patchwork Sat Nov 20 21:42:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 12630613 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E26FC43219 for ; Sat, 20 Nov 2021 21:43:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236712AbhKTVqN (ORCPT ); Sat, 20 Nov 2021 16:46:13 -0500 Received: from mx1.riseup.net ([198.252.153.129]:33524 "EHLO mx1.riseup.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237082AbhKTVqK (ORCPT ); Sat, 20 Nov 2021 16:46:10 -0500 Received: from fews1.riseup.net (fews1-pn.riseup.net [10.0.1.83]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "mail.riseup.net", Issuer "R3" (not verified)) by mx1.riseup.net (Postfix) with ESMTPS id 4HxRpy4ybmzF4HN; Sat, 20 Nov 2021 13:43:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1637444586; bh=xOne6r4MCQlqwzspLff6MRj6uP2PCQV8Tpd+HyioF0k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=M+sSVFBQVqb1xQZ1HtiuwFmzWKgeiJ6/m8ZGf3XMnWqw/mCq870JJ5EJkGytbFGoy u0Bts+aWg6jONDyULQaXrQXyoxu+5BRYE4WiuWgmBnCmMsH4G70lh87Eh6IRAFIV51 jfkPf7xLQIKdcLePTNa8pKJvjCv1LFb9DjFLezmA= X-Riseup-User-ID: F9EA481DBD6634C39350EADBD8C8B6A79CC5D7CD6A6EDFA9B6CFDF36F6FF92FE Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews1.riseup.net (Postfix) with ESMTPSA id 4HxRpv47P4z5vkF; Sat, 20 Nov 2021 13:43:03 -0800 (PST) From: Dang Huynh To: Dang Huynh Cc: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alexey Min , Caleb Connolly , Martin Botka , Konrad Dybcio Subject: [PATCH v4 6/8] arm64: dts: qcom: sdm660-xiaomi-lavender: Add eMMC and SD Date: Sun, 21 Nov 2021 04:42:25 +0700 Message-Id: <20211120214227.779742-7-danct12@riseup.net> In-Reply-To: <20211120214227.779742-1-danct12@riseup.net> References: <20211120214227.779742-1-danct12@riseup.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This commit enable the SD card slot and internal MMC. Signed-off-by: Dang Huynh Reviewed-by: Caleb Connolly --- .../boot/dts/qcom/sdm660-xiaomi-lavender.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts index c7bdf4c28be4..d30cdc6c160a 100644 --- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts @@ -330,6 +330,25 @@ vreg_l19a_3p3: l19 { }; }; +&sdhc_1 { + status = "okay"; + supports-cqe; + + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + + vmmc-supply = <&vreg_l4b_2p95>; + vqmmc-supply = <&vreg_l8a_1p8>; +}; + +&sdhc_2 { + status = "okay"; + + vmmc-supply = <&vreg_l5b_2p95>; + vqmmc-supply = <&vreg_l2b_2p95>; +}; + &tlmm { gpio-reserved-ranges = <8 4>; }; From patchwork Sat Nov 20 21:42:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 12630615 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40C42C433F5 for ; Sat, 20 Nov 2021 21:43:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237259AbhKTVqR (ORCPT ); Sat, 20 Nov 2021 16:46:17 -0500 Received: from mx1.riseup.net ([198.252.153.129]:35072 "EHLO mx1.riseup.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236757AbhKTVqO (ORCPT ); Sat, 20 Nov 2021 16:46:14 -0500 Received: from fews1.riseup.net (fews1-pn.riseup.net [10.0.1.83]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "mail.riseup.net", Issuer "R3" (not verified)) by mx1.riseup.net (Postfix) with ESMTPS id 4HxRq22wK7zDxdG; Sat, 20 Nov 2021 13:43:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1637444590; bh=WzkZEcD5avE32e0su8uiWwZNX6ahY7VDSnX4dX0g7U0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=T0XrAfJOnBfFqCcARwCt/iwyAkwue807mqyMBneKp1KW3IP6Y/RqnielgyBeQXksd WYKGyj+usWMn9PiThRrQIAz5j+gJEbiN6BLoA3S1UL21wS3+HlVkRiwMB3e9rZyYfx 3zzUwOv36aukfoeIKCBFnmykwoWMQmm9xZZWUIhw= X-Riseup-User-ID: 38C260EA064F2808479180D3F9FE42A45A8678165BE6A6C8E291158A89D10926 Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews1.riseup.net (Postfix) with ESMTPSA id 4HxRpz0MF8z5vkF; Sat, 20 Nov 2021 13:43:06 -0800 (PST) From: Dang Huynh To: Dang Huynh Cc: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alexey Min , Caleb Connolly , Martin Botka , Konrad Dybcio , Konrad Dybcio Subject: [PATCH v4 7/8] arm64: dts: qcom: sdm660-xiaomi-lavender: Enable Simple Framebuffer Date: Sun, 21 Nov 2021 04:42:26 +0700 Message-Id: <20211120214227.779742-8-danct12@riseup.net> In-Reply-To: <20211120214227.779742-1-danct12@riseup.net> References: <20211120214227.779742-1-danct12@riseup.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This lets the user sees the framebuffer console. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh Reviewed-by: Caleb Connolly --- .../boot/dts/qcom/sdm660-xiaomi-lavender.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts index d30cdc6c160a..45e58714af71 100644 --- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts @@ -22,7 +22,20 @@ aliases { }; chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + stdout-path = "serial0:115200n8"; + + framebuffer0: framebuffer@9d400000 { + compatible = "simple-framebuffer"; + reg = <0 0x9d400000 0 (1080 * 2340 * 4)>; + width = <1080>; + height = <2340>; + stride = <(1080 * 4)>; + format = "a8r8g8b8"; + }; }; vph_pwr: vph-pwr-regulator { @@ -60,6 +73,11 @@ ramoops@a0000000 { ftrace-size = <0x0>; pmsg-size = <0x20000>; }; + + framebuffer_mem: memory@9d400000 { + reg = <0x0 0x9d400000 0x0 0x23ff000>; + no-map; + }; }; }; From patchwork Sat Nov 20 21:42:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 12630617 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDC2BC433EF for ; Sat, 20 Nov 2021 21:43:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237436AbhKTVqW (ORCPT ); Sat, 20 Nov 2021 16:46:22 -0500 Received: from mx1.riseup.net ([198.252.153.129]:36286 "EHLO mx1.riseup.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237312AbhKTVqS (ORCPT ); Sat, 20 Nov 2021 16:46:18 -0500 Received: from fews1.riseup.net (fews1-pn.riseup.net [10.0.1.83]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "mail.riseup.net", Issuer "R3" (not verified)) by mx1.riseup.net (Postfix) with ESMTPS id 4HxRq60d5CzDxdG; Sat, 20 Nov 2021 13:43:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1637444594; bh=/NQcDFAG6TqWRFbBGO09JVnM62VapUiR/NIgI3+epos=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ACNB4zfPcEe2FWMZXAZE0L/Ok9ZXcspJjQIeMatWKqAo+9CLzXyWmY9+ArnJKLmZ4 Jax/bnLhr/oV6MnhJYKZ6Jendul6Olvv1I0+iP9VD9e7TVnIpYnh1DgPy8q6jaAHAy w5Y8mif9wHaUx6zJnoqSktwUkIF98pRetdb/2+is= X-Riseup-User-ID: 38D232F63910FE9218708176047DAB813C19114A1B9527BC0A1893FAC2E0C1EA Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews1.riseup.net (Postfix) with ESMTPSA id 4HxRq25KpVz5vkF; Sat, 20 Nov 2021 13:43:10 -0800 (PST) From: Dang Huynh To: Dang Huynh Cc: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alexey Min , Caleb Connolly , Martin Botka , Konrad Dybcio , Konrad Dybcio Subject: [PATCH v4 8/8] arm64: dts: qcom: sdm660-xiaomi-lavender: Add USB Date: Sun, 21 Nov 2021 04:42:27 +0700 Message-Id: <20211120214227.779742-9-danct12@riseup.net> In-Reply-To: <20211120214227.779742-1-danct12@riseup.net> References: <20211120214227.779742-1-danct12@riseup.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Alexey Min Enable and configure DWC3 and QUSB2 PHY to enable USB functionality on the Redmi Note 7. Signed-off-by: Alexey Min Co-developed-by: Dang Huynh Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh Reviewed-by: Caleb Connolly --- .../boot/dts/qcom/sdm660-xiaomi-lavender.dts | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts index 45e58714af71..6cdd9f7c864b 100644 --- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts @@ -79,6 +79,15 @@ framebuffer_mem: memory@9d400000 { no-map; }; }; + + /* + * Until we hook up type-c detection, we + * have to stick with this. But it works. + */ + extcon_usb: extcon-usb { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>; + }; }; &blsp1_uart2 { @@ -95,6 +104,13 @@ &pon_resin { linux,code = ; }; +&qusb2phy { + status = "okay"; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; +}; + &rpm_requests { pm660l-regulators { compatible = "qcom,rpm-pm660l-regulators"; @@ -370,3 +386,12 @@ &sdhc_2 { &tlmm { gpio-reserved-ranges = <8 4>; }; + +&usb3 { + status = "okay"; +}; + +&usb3_dwc3 { + dr_mode = "peripheral"; + extcon = <&extcon_usb>; +};