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[194.90.138.234]) by smtp.gmail.com with ESMTPSA id d8-v6sm10613813wrv.68.2018.08.06.12.43.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 06 Aug 2018 12:43:38 -0700 (PDT) From: Kosta Zertsekel To: Mark Brown , Andrew Lunn , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Kosta Zertsekel , =?utf-8?q?Jan_Kundr=C3=A1t?= , Stefan Roese , Ken Wilson Subject: [PATCH v2] spi: orion: cosmetics - alias long direct_access variables Date: Mon, 6 Aug 2018 22:43:27 +0300 Message-Id: <20180806194327.13389-1-zertsekel@gmail.com> X-Mailer: git-send-email 2.17.1 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This change increases the source code readability. Instead of using `spi->child[cs].direct_access.XXX` use `dacc->XXX`. Instead of using `orion_spi->child[cs].direct_access.vaddr` use `vaddr`. Signed-off-by: Kosta Zertsekel --- drivers/spi/spi-orion.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c index d01a6adc726e..184ba91abeee 100644 --- a/drivers/spi/spi-orion.c +++ b/drivers/spi/spi-orion.c @@ -430,6 +430,7 @@ orion_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer) int word_len; struct orion_spi *orion_spi; int cs = spi->chip_select; + void __iomem *vaddr; word_len = spi->bits_per_word; count = xfer->len; @@ -440,8 +441,9 @@ orion_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer) * Use SPI direct write mode if base address is available. Otherwise * fall back to PIO mode for this transfer. */ - if ((orion_spi->child[cs].direct_access.vaddr) && (xfer->tx_buf) && - (word_len == 8)) { + vaddr = orion_spi->child[cs].direct_access.vaddr; + + if (vaddr && xfer->tx_buf && word_len == 8) { unsigned int cnt = count / 4; unsigned int rem = count % 4; @@ -449,13 +451,11 @@ orion_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer) * Send the TX-data to the SPI device via the direct * mapped address window */ - iowrite32_rep(orion_spi->child[cs].direct_access.vaddr, - xfer->tx_buf, cnt); + iowrite32_rep(vaddr, xfer->tx_buf, cnt); if (rem) { u32 *buf = (u32 *)xfer->tx_buf; - iowrite8_rep(orion_spi->child[cs].direct_access.vaddr, - &buf[cnt], rem); + iowrite8_rep(vaddr, &buf[cnt], rem); } return count; @@ -683,6 +683,7 @@ static int orion_spi_probe(struct platform_device *pdev) /* Scan all SPI devices of this controller for direct mapped devices */ for_each_available_child_of_node(pdev->dev.of_node, np) { + struct orion_direct_acc *dir_acc; u32 cs; /* Get chip-select number from the "reg" property */ @@ -711,14 +712,13 @@ static int orion_spi_probe(struct platform_device *pdev) * This needs to get extended for the direct SPI-NOR / SPI-NAND * support, once this gets implemented. */ - spi->child[cs].direct_access.vaddr = devm_ioremap(&pdev->dev, - r->start, - PAGE_SIZE); - if (!spi->child[cs].direct_access.vaddr) { + dir_acc = &spi->child[cs].direct_access; + dir_acc->vaddr = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE); + if (!dir_acc->vaddr) { status = -ENOMEM; goto out_rel_axi_clk; } - spi->child[cs].direct_access.size = PAGE_SIZE; + dir_acc->size = PAGE_SIZE; dev_info(&pdev->dev, "CS%d configured for direct access\n", cs); }