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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT058.mail.protection.outlook.com (10.13.177.58) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4713.20 via Frontend Transport; Tue, 23 Nov 2021 21:16:30 +0000 Received: from [127.0.1.1] (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Tue, 23 Nov 2021 15:16:28 -0600 Subject: [PATCH 1/2] hwmon: (k10temp) Move the CCD limit info inside k10temp_data structure From: Babu Moger To: , , CC: , Date: Tue, 23 Nov 2021 15:16:28 -0600 Message-ID: <163770216907.777059.6947726637265961161.stgit@bmoger-ubuntu> User-Agent: StGit/1.1.dev103+g5369f4c MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 856ad192-4615-4571-1c35-08d9aec68526 X-MS-TrafficTypeDiagnostic: MN2PR12MB3390: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4502; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Nov 2021 21:16:30.9821 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 856ad192-4615-4571-1c35-08d9aec68526 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT058.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3390 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org It seems appropriate to move the CCD specific information inside the k10temp_data structure. Signed-off-by: Babu Moger --- Note: Generated the patch on top of hwmon-next. drivers/hwmon/k10temp.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c index 880990fa4795..bd436b380a02 100644 --- a/drivers/hwmon/k10temp.c +++ b/drivers/hwmon/k10temp.c @@ -85,6 +85,7 @@ struct k10temp_data { u32 show_temp; bool is_zen; u32 ccd_offset; + u32 ccd_limit; }; #define TCTL_BIT 0 @@ -357,12 +358,12 @@ static const struct hwmon_chip_info k10temp_chip_info = { }; static void k10temp_get_ccd_support(struct pci_dev *pdev, - struct k10temp_data *data, int limit) + struct k10temp_data *data) { u32 regval; int i; - for (i = 0; i < limit; i++) { + for (i = 0; i < data->ccd_limit; i++) { amd_smn_read(amd_pci_dev_to_node_id(pdev), ZEN_CCD_TEMP(data->ccd_offset, i), ®val); if (regval & ZEN_CCD_TEMP_VALID) @@ -411,14 +412,16 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id) case 0x11: /* Zen APU */ case 0x18: /* Zen+ APU */ data->ccd_offset = 0x154; - k10temp_get_ccd_support(pdev, data, 4); + data->ccd_limit = 4; + k10temp_get_ccd_support(pdev, data); break; case 0x31: /* Zen2 Threadripper */ case 0x60: /* Renoir */ case 0x68: /* Lucienne */ case 0x71: /* Zen2 */ data->ccd_offset = 0x154; - k10temp_get_ccd_support(pdev, data, 8); + data->ccd_limit = 8; + k10temp_get_ccd_support(pdev, data); break; } } else if (boot_cpu_data.x86 == 0x19) { @@ -431,13 +434,15 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id) case 0x21: /* Zen3 Ryzen Desktop */ case 0x50 ... 0x5f: /* Green Sardine */ data->ccd_offset = 0x154; - k10temp_get_ccd_support(pdev, data, 8); + data->ccd_limit = 8; + k10temp_get_ccd_support(pdev, data); break; case 0x10 ... 0x1f: case 0x40 ... 0x4f: /* Yellow Carp */ case 0xa0 ... 0xaf: data->ccd_offset = 0x300; - k10temp_get_ccd_support(pdev, data, 8); + data->ccd_limit = 8; + k10temp_get_ccd_support(pdev, data); break; } } else { From patchwork Tue Nov 23 21:16:44 2021 Content-Type: text/plain; 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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT058.mail.protection.outlook.com (10.13.177.58) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4713.20 via Frontend Transport; Tue, 23 Nov 2021 21:16:45 +0000 Received: from [127.0.1.1] (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Tue, 23 Nov 2021 15:16:44 -0600 Subject: [PATCH 2/2] hwmon: (k10temp) Support up to 12 CCDs on AMD Family of processors From: Babu Moger To: , , CC: , Date: Tue, 23 Nov 2021 15:16:44 -0600 Message-ID: <163770219414.777059.5794961910830381329.stgit@bmoger-ubuntu> In-Reply-To: <163770216907.777059.6947726637265961161.stgit@bmoger-ubuntu> References: <163770216907.777059.6947726637265961161.stgit@bmoger-ubuntu> User-Agent: StGit/1.1.dev103+g5369f4c MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: f9bd9a34-bfd5-49c2-66a1-08d9aec68dee X-MS-TrafficTypeDiagnostic: CH2PR12MB3989: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3826; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Nov 2021 21:16:45.7165 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f9bd9a34-bfd5-49c2-66a1-08d9aec68dee X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT058.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB3989 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org The current driver can read the temperatures from upto 8 CCDs (Core-Complex Die). The newer AMD Family 19h Models 10h-1Fh and A0h-AFh can support up to 12 CCDs. Update the driver to read up to 12 CCDs. Signed-off-by: Babu Moger --- Note: Generated the patch on top of hwmon-next drivers/hwmon/k10temp.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c index bd436b380a02..d20159e082ab 100644 --- a/drivers/hwmon/k10temp.c +++ b/drivers/hwmon/k10temp.c @@ -172,6 +172,10 @@ static const char *k10temp_temp_label[] = { "Tccd6", "Tccd7", "Tccd8", + "Tccd9", + "Tccd10", + "Tccd11", + "Tccd12", }; static int k10temp_read_labels(struct device *dev, @@ -207,7 +211,7 @@ static int k10temp_read_temp(struct device *dev, u32 attr, int channel, if (*val < 0) *val = 0; break; - case 2 ... 9: /* Tccd{1-8} */ + case 2 ... 13: /* Tccd{1-12} */ amd_smn_read(amd_pci_dev_to_node_id(data->pdev), ZEN_CCD_TEMP(data->ccd_offset, channel - 2), ®val); @@ -342,6 +346,10 @@ static const struct hwmon_channel_info *k10temp_info[] = { HWMON_T_INPUT | HWMON_T_LABEL, HWMON_T_INPUT | HWMON_T_LABEL, HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL, HWMON_T_INPUT | HWMON_T_LABEL), NULL }; @@ -437,13 +445,17 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id) data->ccd_limit = 8; k10temp_get_ccd_support(pdev, data); break; - case 0x10 ... 0x1f: case 0x40 ... 0x4f: /* Yellow Carp */ - case 0xa0 ... 0xaf: data->ccd_offset = 0x300; data->ccd_limit = 8; k10temp_get_ccd_support(pdev, data); break; + case 0x10 ... 0x1f: + case 0xa0 ... 0xaf: + data->ccd_offset = 0x300; + data->ccd_limit = 12; + k10temp_get_ccd_support(pdev, data); + break; } } else { data->read_htcreg = read_htcreg_pci;