From patchwork Sat Nov 27 22:32:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 12642549 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1EFEC433EF for ; Sat, 27 Nov 2021 22:36:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356505AbhK0WkL (ORCPT ); Sat, 27 Nov 2021 17:40:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352456AbhK0WiL (ORCPT ); Sat, 27 Nov 2021 17:38:11 -0500 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E4C86C06175B for ; Sat, 27 Nov 2021 14:32:57 -0800 (PST) Received: by mail-wr1-x431.google.com with SMTP id v11so27247953wrw.10 for ; Sat, 27 Nov 2021 14:32:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8NdHBjQVRIYGsKW2yKV0OuAhmnZpLbolKeCpmly7RWg=; b=l4yZmcmZTr7edwfbUcKL115b0MYsPssmDPCQRsyDw5bHhQmV6ar6pK4jAxrDUMK30L DhI/JggGzkpZLmknG0AUgMB3oDQ8doG8ujlkjNdlxeJUm/nPpXoFDJXqO1rmQJrTfCzB 2sPgGDOXV+Jr0yHhAsZ+zJbOQYVOUnJppTaAmjTQUHkQA7HOJCXiDbuCGCezUhVy1dgp KeA9+zZ3EKSGbINZGPTVNbsa1MuM3LAZHRj1MEhzDNYGM/KHsV8kd+dpqxs8vEnuqs2C thVZHM91MdLG4lWx/cfTcnpHev4yB/26XYz6xouUDmRTaMeXRQ4VmWKen96INpBdT+Kr O0Eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8NdHBjQVRIYGsKW2yKV0OuAhmnZpLbolKeCpmly7RWg=; b=1x8sW6ZgHfxG8x5AU7Nhnt671ffiuoUpCwkxcxAytDu8KOzrp0kuLX70gLPTCRpZZh R7bbk/TuBbU2XhMGIUEaTPSQbizCDKQ7aKh7JPI/clO22rTDCPt5oRCQJayJsd19sc3Y 2sGs/LzhirtzNgITlU7ibfP+aYhalumG3ntJn4dmJYEBjLYkM7L59TvMlhkqVylwIKoF vnQ2aPALUsIIgnnwXd/tmGqetO2dXBL3O12lN7d1gwlgklGrL5EwWiSuu0zBh5mZCY3Y KgZwyFdEmssdx+e7rhMHVsMpBbbd6+ejh1FW0Yh4Qx3KgzHdvYSyU4Qu08PysYslQiFK zhaA== X-Gm-Message-State: AOAM533tEuvfHo0J2cb1z3W3/M32jDxRN1cPTS4S9YBhQVK5IkytW6wn m8N1EoW/Hde5Sdm8CzygLtdm4A== X-Google-Smtp-Source: ABdhPJxdLlhFGvAhG6wOiBarzCyE+9iYgVuhsqXhujvzcBgC7mGFjVW53Xkg0QseOIg6FsybsHzQUg== X-Received: by 2002:a5d:4107:: with SMTP id l7mr23094058wrp.209.1638052376446; Sat, 27 Nov 2021 14:32:56 -0800 (PST) Received: from localhost ([31.134.121.151]) by smtp.gmail.com with ESMTPSA id y142sm10355694wmc.40.2021.11.27.14.32.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 Nov 2021 14:32:56 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring , Mark Brown , Greg Kroah-Hartman Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH 1/8] dt-bindings: soc: samsung: Add Exynos USIv2 bindings Date: Sun, 28 Nov 2021 00:32:46 +0200 Message-Id: <20211127223253.19098-2-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211127223253.19098-1-semen.protsenko@linaro.org> References: <20211127223253.19098-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Add constants for choosing USIv2 configuration mode in device tree. Those are further used in USIv2 driver to figure out which value to write into SW_CONF register. Signed-off-by: Sam Protsenko --- include/dt-bindings/soc/samsung,exynos-usi-v2.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 include/dt-bindings/soc/samsung,exynos-usi-v2.h diff --git a/include/dt-bindings/soc/samsung,exynos-usi-v2.h b/include/dt-bindings/soc/samsung,exynos-usi-v2.h new file mode 100644 index 000000000000..b406c6f6f89e --- /dev/null +++ b/include/dt-bindings/soc/samsung,exynos-usi-v2.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (C) 2021 Linaro Ltd. + * Author: Sam Protsenko + * + * Device Tree bindings for Samsung Exynos USI v2 (Universal Serial Interface). + */ + +#ifndef __DT_BINDINGS_SAMSUNG_EXYNOS_USI_V2_H +#define __DT_BINDINGS_SAMSUNG_EXYNOS_USI_V2_H + +#define USI_V2_UART 0 +#define USI_V2_SPI 1 +#define USI_V2_I2C 2 + +#endif /* __DT_BINDINGS_SAMSUNG_EXYNOS_USI_V2_H */ From patchwork Sat Nov 27 22:32:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 12642551 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 821B8C433FE for ; Sat, 27 Nov 2021 22:38:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356375AbhK0Wla (ORCPT ); Sat, 27 Nov 2021 17:41:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57842 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1356468AbhK0Wja (ORCPT ); Sat, 27 Nov 2021 17:39:30 -0500 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 938B0C061763 for ; Sat, 27 Nov 2021 14:32:59 -0800 (PST) Received: by mail-wr1-x42b.google.com with SMTP id t9so10303424wrx.7 for ; Sat, 27 Nov 2021 14:32:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6M4A/tb5uMp/41DxndVqEzSE2hGblNz4wYiEfFPyfnc=; b=hwCAOxXXwF6ism7IqxUqUx5YEWM699I2gzxWPjLbsuhqAxeANw0tyg2ZkoEsmxQhBM 0b9iSdg7x66rGyWrLH6auVrWWQH3b6wJHVYutnVJGMcpWtEWhVcKQ1KljEf74zibFqOA puBg08DDqOC3z87KQ50CkrfgL9gPq+6CAqIoKygr48PdbKBFJNjqnbNo9WATYhpe3bE6 lrMKH8RO+IdMTR+m3qWxiP/CFKtgNSdTXcw64hF/0TC4NwQcnOBcaPDVhH5ypKx//uqa PgaLKZK70je7WrCZ+0G55F2vKk1OFzLy2L7p1Vxi9s3gVQz9W14deADmTszNCUGxKFMJ Viow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6M4A/tb5uMp/41DxndVqEzSE2hGblNz4wYiEfFPyfnc=; b=tTqpSuM6CaQUV/cKnLBC5LD6ehRLXBM/LpxCxs+yFGuO3Ff7qJ3TFPl2gzyfzZCoLg yyDOXvSMRRQJdmPDc5hpiCjPhkWaQi3G5FraK1rmC1DaT3KJloLxutbTF+yGsQ1tEk5b CQhOxrSd3mkdR/Neo7JtLL2mChBGpqjfmYn/LtC/Cj/kpW5dpNBJ6yDrx7cv3M0G6bXT Dti86FFS178vTqefFYwvjc1Am8mkjnoZIWTtNYoYZrQZfgb7G4Acfy7H9VblshqBFglz vcnprlD+BLGTm68YuqUMFU7YE8yxJAbGN0WRGQaYx7zkMwerAHd38DHAOjhK2NTlaO9O 2FOg== X-Gm-Message-State: AOAM531ckpdNcPyhMYiL1itcSz+2AFd5+Bhlmcqs2EcUJVY60xZ6oAMV /NqWkvOXqDXN2xQj63ZKWSNB/Vslsl2pku48 X-Google-Smtp-Source: ABdhPJwdbLpH8JwPS05Q7nu7RvXbREcA2Cct0x3S38Z74xtvi6I8L2Y3D4yJGspddD2iZgy5JeAMBw== X-Received: by 2002:a5d:6091:: with SMTP id w17mr23285781wrt.65.1638052378118; Sat, 27 Nov 2021 14:32:58 -0800 (PST) Received: from localhost ([31.134.121.151]) by smtp.gmail.com with ESMTPSA id v6sm14801124wmh.8.2021.11.27.14.32.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 Nov 2021 14:32:57 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring , Mark Brown , Greg Kroah-Hartman Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH 2/8] dt-bindings: soc: samsung: Add Exynos USIv2 bindings doc Date: Sun, 28 Nov 2021 00:32:47 +0200 Message-Id: <20211127223253.19098-3-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211127223253.19098-1-semen.protsenko@linaro.org> References: <20211127223253.19098-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Document USIv2 IP-core bindings. Signed-off-by: Sam Protsenko --- .../bindings/soc/samsung/exynos-usi-v2.yaml | 124 ++++++++++++++++++ 1 file changed, 124 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/samsung/exynos-usi-v2.yaml diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi-v2.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi-v2.yaml new file mode 100644 index 000000000000..d7466aa463dc --- /dev/null +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-usi-v2.yaml @@ -0,0 +1,124 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/samsung/exynos-usi-v2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung's Exynos USIv2 (Universal Serial Interface) binding + +maintainers: + - Sam Protsenko + - Krzysztof Kozlowski + +description: | + USIv2 IP-core provides selectable serial protocol (UART, SPI or High-Speed + I2C); only one can be chosen at a time. It is modeled as a node with zero or + more child nodes, each representing a serial sub-node device. The mode setting + selects which particular function will be used. + + Refer to next bindings documentation for information on protocol subnodes that + can exist under USI node: + + [1] Documentation/devicetree/bindings/serial/samsung_uart.yaml + [2] Documentation/devicetree/bindings/i2c/i2c-exynos5.txt + [3] Documentation/devicetree/bindings/spi/spi-samsung.txt + +properties: + $nodename: + pattern: "^usi@[0-9a-f]+$" + + compatible: + const: samsung,exynos-usi-v2 + + reg: + maxItems: 1 + + clocks: + items: + - description: Bus (APB) clock + - description: Operating clock for UART/SPI/I2C protocol + + clock-names: + items: + - const: pclk + - const: ipclk + + ranges: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + samsung,sysreg: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Should be phandle/offset pair. The phandle to System Register syscon node + (for the same domain where this USIv2 controller resides) and the offset + of SW_CONF register for this USIv2 controller. + + samsung,mode: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Selects USIv2 function (which serial protocol to use). Refer to + for valid USI mode + values. + + samsung,clkreq-on: + type: boolean + description: + Enable this property if underlying protocol requires the clock to be + continuously provided without automatic gating. As suggested by SoC + manual, it should be set in case of SPI/I2C slave, UART Rx and I2C + multi-master mode. Usually this property is needed if USI mode is set + to "UART". + + This property is optional. + +patternProperties: + # All other properties should be child nodes + "^.*@[0-9a-f]+$": + type: object + description: Child node describing underlying USIv2 serial protocol + +required: + - compatible + - reg + - clocks + - clock-names + - ranges + - "#address-cells" + - "#size-cells" + - samsung,sysreg + - samsung,mode + +additionalProperties: false + +examples: + - | + #include + #include + + usi_uart: usi@138200c0 { + compatible = "samsung,exynos-usi-v2"; + reg = <0x138200c0 0x20>; + samsung,sysreg = <&sysreg_peri 0x1010>; + samsung,mode = ; + samsung,clkreq-on; /* needed for UART mode */ + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&cmu_peri 32>, <&cmu_peri 31>; + clock-names = "pclk", "ipclk"; + status = "disabled"; + + serial_0: serial@13820000 { + compatible = "samsung,exynos850-uart"; + reg = <0x13820000 0xc0>; + interrupts = ; + clocks = <&cmu_peri 32>, <&cmu_peri 31>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + }; From patchwork Sat Nov 27 22:32:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 12642565 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3277C433F5 for ; Sat, 27 Nov 2021 22:38:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356568AbhK0WmM (ORCPT ); Sat, 27 Nov 2021 17:42:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57552 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240789AbhK0WkL (ORCPT ); Sat, 27 Nov 2021 17:40:11 -0500 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [IPv6:2a00:1450:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 43415C0613F2 for ; Sat, 27 Nov 2021 14:33:01 -0800 (PST) Received: by mail-wr1-x42d.google.com with SMTP id l16so27257607wrp.11 for ; Sat, 27 Nov 2021 14:33:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=C2fYlu8o+hwcxca3MmfB8F34BJEFc2MVtDi8Tro0yVw=; b=g/kFSwDIdL1FGgt1BJxzECWQhS0/gPGYvTY6e8feqhelTX/YQoFIHwFaYiLU0UVNQN ZjPNdIpjKptq9BX3NIrhh+GggTZujZOcfu6xOveqin1mzGw4+fOUuVtwBsd/pnMSMXp8 k9avuikBejMseB+a8Wx1CUuxq5FGgvLH0OcZZUJPYSKgY7Ko8WeMxbP0/qUi09tN12NS NH01kdZBq48WRdQXd/GLIaKeMfa3UBCz193RF1u0jgCgtLBqAO+YMNIB5wY/wayMfTM1 vn+MdY+dJlZO9INbS48E1bhSz7y1AVYDlAPObUcrFZig1nKsRc2NWA2CQjyBLLnsOKgf feFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=C2fYlu8o+hwcxca3MmfB8F34BJEFc2MVtDi8Tro0yVw=; b=Ho+IwZR3SuanRUlESzlE9QB67tiJAPXRVYfEACxjBb0QXgSzDQTwalbNf/Yk93OdqH RqGX27yMekoe7zkPNqbOrxAVmBsd+AEeTJ06nUaHKWm7o/CXlMaFa1hm71KC0jrIH43y lyEqfM9SryMCZHdgx+Zq60shyw1QVC4gqk4EjEmoqFqVzakponKNM6yHCg7yRcRtfyde VLc8HPExumV8EU9HPb46GoYEOvJgV1fET0NcRwUDN/8J5P2pj5Kp5NZEToSSiur4rczj f0PPkcjfxzmJTKbxEobLplF39Bqxe7BPvNWKcraRKi8FRuTG4EpTAMM++vW55oYoEPnd m0KQ== X-Gm-Message-State: AOAM53149LaI9Khp7WVCNiGESMclIdHLGRTYXXDV5HmWLxzS3d6mcNRy obMTU7010xvBi2aFcur28TpqGQ== X-Google-Smtp-Source: ABdhPJx7eV8hM34GzyVKeh1ASY8Ddgr8Crg8v9waCtcv3gEYGBOYuXiNVN1OMn2OWc/XXLNQSJc8Jg== X-Received: by 2002:adf:f907:: with SMTP id b7mr23385258wrr.5.1638052379807; Sat, 27 Nov 2021 14:32:59 -0800 (PST) Received: from localhost ([31.134.121.151]) by smtp.gmail.com with ESMTPSA id h2sm9169578wrz.23.2021.11.27.14.32.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 Nov 2021 14:32:59 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring , Mark Brown , Greg Kroah-Hartman Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH 3/8] soc: samsung: Add USIv2 driver Date: Sun, 28 Nov 2021 00:32:48 +0200 Message-Id: <20211127223253.19098-4-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211127223253.19098-1-semen.protsenko@linaro.org> References: <20211127223253.19098-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org USIv2 IP-core is found on modern ARM64 Exynos SoCs (like Exynos850) and provides selectable serial protocol (one of: UART, SPI, I2C). USIv2 registers usually reside in the same register map as a particular underlying protocol it implements, but have some particular offset. E.g. on Exynos850 the USI_UART has 0x13820000 base address, where UART registers have 0x00..0x40 offsets, and USI registers have 0xc0..0xdc offsets. Desired protocol can be chosen via SW_CONF register from System Register block of the same domain as USI. Before starting to use a particular protocol, USIv2 must be configured properly: 1. Select protocol to be used via System Register 2. Clear "reset" flag in USI_CON 3. Configure HWACG behavior (e.g. for UART Rx the HWACG must be disabled, so that the IP clock is not gated automatically); this is done using USI_OPTION register 4. Keep both USI clocks (PCLK and IPCLK) running during USI registers modification This driver implements above behavior. Of course, USIv2 driver should be probed before UART/I2C/SPI drivers. It can be achived by embedding UART/I2C/SPI nodes inside of USI node (in Device Tree); driver then walks underlying nodes and instantiates those. Driver also handles USI configuration on PM resume, as register contents can be lost during CPU suspend. Signed-off-by: Sam Protsenko --- drivers/soc/samsung/Kconfig | 14 ++ drivers/soc/samsung/Makefile | 2 + drivers/soc/samsung/exynos-usi-v2.c | 242 ++++++++++++++++++++++++++++ 3 files changed, 258 insertions(+) create mode 100644 drivers/soc/samsung/exynos-usi-v2.c diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig index e2cedef1e8d1..b168973c887f 100644 --- a/drivers/soc/samsung/Kconfig +++ b/drivers/soc/samsung/Kconfig @@ -23,6 +23,20 @@ config EXYNOS_CHIPID Support for Samsung Exynos SoC ChipID and Adaptive Supply Voltage. This driver can also be built as module (exynos_chipid). +config EXYNOS_USI_V2 + tristate "Exynos USIv2 (Universal Serial Interface) driver" + default ARCH_EXYNOS && ARM64 + depends on ARCH_EXYNOS || COMPILE_TEST + select MFD_SYSCON + help + Enable support for USIv2 block. USI (Universal Serial Interface) is an + IP-core found in modern Samsung Exynos SoCs, like Exynos850 and + ExynosAutoV0. USI block can be configured to provide one of the + following serial protocols: UART, SPI or High Speed I2C. + + This driver allows one to configure USI for desired protocol, which + is usually done in USI node in Device Tree. + config EXYNOS_PMU bool "Exynos PMU controller driver" if COMPILE_TEST depends on ARCH_EXYNOS || ((ARM || ARM64) && COMPILE_TEST) diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile index 2ae4bea804cf..0b746b2fd78f 100644 --- a/drivers/soc/samsung/Makefile +++ b/drivers/soc/samsung/Makefile @@ -4,6 +4,8 @@ obj-$(CONFIG_EXYNOS_ASV_ARM) += exynos5422-asv.o obj-$(CONFIG_EXYNOS_CHIPID) += exynos_chipid.o exynos_chipid-y += exynos-chipid.o exynos-asv.o +obj-$(CONFIG_EXYNOS_USI_V2) += exynos-usi-v2.o + obj-$(CONFIG_EXYNOS_PMU) += exynos-pmu.o obj-$(CONFIG_EXYNOS_PMU_ARM_DRIVERS) += exynos3250-pmu.o exynos4-pmu.o \ diff --git a/drivers/soc/samsung/exynos-usi-v2.c b/drivers/soc/samsung/exynos-usi-v2.c new file mode 100644 index 000000000000..5a315890e4ec --- /dev/null +++ b/drivers/soc/samsung/exynos-usi-v2.c @@ -0,0 +1,242 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021 Linaro Ltd. + * Author: Sam Protsenko + * + * Samsung Exynos USI v2 driver (Universal Serial Interface). + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +/* System Register: SW_CONF register bits */ +#define SW_CONF_UART BIT(0) +#define SW_CONF_SPI BIT(1) +#define SW_CONF_I2C BIT(2) +#define SW_CONF_MASK (SW_CONF_UART | SW_CONF_SPI | SW_CONF_I2C) + +/* USI register offsets */ +#define USI_CON 0x04 +#define USI_OPTION 0x08 + +/* USI register bits */ +#define USI_CON_RESET BIT(0) +#define USI_OPTION_CLKREQ_ON BIT(1) +#define USI_OPTION_CLKSTOP_ON BIT(2) + +struct usi_v2_mode { + const char *name; /* mode name */ + unsigned int val; /* mode register value */ +}; + +struct usi_v2 { + struct device *dev; + void __iomem *regs; /* USI register map */ + struct clk *pclk; /* USI bus clock */ + struct clk *ipclk; /* USI operating clock */ + + size_t mode; /* current USI SW_CONF mode index */ + bool clkreq_on; /* always provide clock to IP */ + + /* System Register */ + struct regmap *sysreg; /* System Register map */ + unsigned int sw_conf; /* SW_CONF register offset in sysreg */ +}; + +static const struct usi_v2_mode usi_v2_modes[] = { + [USI_V2_UART] = { .name = "uart", .val = SW_CONF_UART }, + [USI_V2_SPI] = { .name = "spi", .val = SW_CONF_SPI }, + [USI_V2_I2C] = { .name = "i2c", .val = SW_CONF_I2C }, +}; + +/** + * usi_v2_set_sw_conf - Set USI block configuration mode + * @usi: USI driver object + * @mode: Mode index + * + * Select underlying serial protocol (UART/SPI/I2C) in USI IP-core. + * + * Return: 0 on success, or negative error code on failure. + */ +static int usi_v2_set_sw_conf(struct usi_v2 *usi, size_t mode) +{ + unsigned int val; + int ret; + + if (mode >= ARRAY_SIZE(usi_v2_modes)) + return -EINVAL; + + val = usi_v2_modes[mode].val; + ret = regmap_update_bits(usi->sysreg, usi->sw_conf, SW_CONF_MASK, val); + if (ret) + return ret; + + usi->mode = mode; + dev_dbg(usi->dev, "USIv2 protocol: %s\n", usi_v2_modes[usi->mode].name); + + return 0; +} + +/** + * usi_v2_enable - Initialize USI block + * @usi: USI driver object + * + * USI IP-core start state is "reset" (on startup and after CPU resume). This + * routine enables USI block by clearing the reset flag. It also configures + * HWACG behavior (needed e.g. for UART Rx). It should be performed before + * underlying protocol becomes functional. + * + * Both 'pclk' and 'ipclk' clocks should be enabled when running this function. + */ +static void usi_v2_enable(const struct usi_v2 *usi) +{ + u32 val; + + /* Enable USI block */ + val = readl(usi->regs + USI_CON); + val &= ~USI_CON_RESET; + writel(val, usi->regs + USI_CON); + udelay(1); + + /* Continuously provide the clock to USI IP w/o gating */ + if (usi->clkreq_on) { + val = readl(usi->regs + USI_OPTION); + val &= ~USI_OPTION_CLKSTOP_ON; + val |= USI_OPTION_CLKREQ_ON; + writel(val, usi->regs + USI_OPTION); + } +} + +static int usi_v2_configure(struct usi_v2 *usi) +{ + int ret; + + ret = clk_prepare_enable(usi->pclk); + if (ret) + return ret; + + ret = clk_prepare_enable(usi->ipclk); + if (ret) + goto err_pclk; + + ret = usi_v2_set_sw_conf(usi, usi->mode); + if (ret) + goto err_ipclk; + + usi_v2_enable(usi); + +err_ipclk: + clk_disable_unprepare(usi->ipclk); +err_pclk: + clk_disable_unprepare(usi->pclk); + return ret; +} + +static int usi_v2_parse_dt(struct device_node *np, struct usi_v2 *usi) +{ + int ret; + u32 mode; + + ret = of_property_read_u32(np, "samsung,mode", &mode); + if (ret) + return ret; + usi->mode = mode; + + usi->clkreq_on = of_property_read_bool(np, "samsung,clkreq-on"); + + usi->sysreg = syscon_regmap_lookup_by_phandle(np, "samsung,sysreg"); + if (IS_ERR(usi->sysreg)) + return PTR_ERR(usi->sysreg); + + return of_property_read_u32_index(np, "samsung,sysreg", 1, + &usi->sw_conf); +} + +static int usi_v2_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + struct usi_v2 *usi; + int ret; + + usi = devm_kzalloc(dev, sizeof(*usi), GFP_KERNEL); + if (!usi) + return -ENOMEM; + + usi->dev = dev; + platform_set_drvdata(pdev, usi); + + usi->regs = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(usi->regs)) + return PTR_ERR(usi->regs); + + ret = usi_v2_parse_dt(np, usi); + if (ret) + return ret; + + usi->pclk = devm_clk_get(dev, "pclk"); + if (IS_ERR(usi->pclk)) + return PTR_ERR(usi->pclk); + + usi->ipclk = devm_clk_get(dev, "ipclk"); + if (IS_ERR(usi->ipclk)) + return PTR_ERR(usi->ipclk); + + ret = usi_v2_configure(usi); + if (ret) + return ret; + + /* Make it possible to embed protocol nodes into USI np */ + return of_platform_populate(np, NULL, NULL, dev); +} + +#ifdef CONFIG_PM_SLEEP +static int usi_v2_resume_noirq(struct device *dev) +{ + struct usi_v2 *usi = dev_get_drvdata(dev); + + return usi_v2_configure(usi); +} +#endif + +static const struct dev_pm_ops usi_v2_pm = { + SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(NULL, usi_v2_resume_noirq) +}; + +static const struct of_device_id usi_v2_dt_match[] = { + { .compatible = "samsung,exynos-usi-v2", }, + { }, +}; +MODULE_DEVICE_TABLE(of, usi_v2_dt_match); + +static struct platform_driver usi_v2_driver = { + .driver = { + .name = "exynos-usi-v2", + .pm = &usi_v2_pm, + .of_match_table = usi_v2_dt_match, + }, + .probe = usi_v2_probe, +}; + +static int __init usi_v2_init(void) +{ + return platform_driver_register(&usi_v2_driver); +} +arch_initcall(usi_v2_init); + +static void __exit usi_v2_exit(void) +{ + platform_driver_unregister(&usi_v2_driver); +} +module_exit(usi_v2_exit); + +MODULE_DESCRIPTION("Samsung USI v2 driver"); +MODULE_AUTHOR("Sam Protsenko "); +MODULE_LICENSE("GPL"); From patchwork Sat Nov 27 22:32:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 12642567 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E17C7C43219 for ; Sat, 27 Nov 2021 22:38:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344468AbhK0WmM (ORCPT ); Sat, 27 Nov 2021 17:42:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57998 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1356496AbhK0WkL (ORCPT ); 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Sat, 27 Nov 2021 14:33:01 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring , Mark Brown , Greg Kroah-Hartman Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH 4/8] tty: serial: samsung: Remove USI initialization Date: Sun, 28 Nov 2021 00:32:49 +0200 Message-Id: <20211127223253.19098-5-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211127223253.19098-1-semen.protsenko@linaro.org> References: <20211127223253.19098-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org USI control is now extracted to dedicated USIv2 driver. Remove USI related code from serial driver to avoid conflicts and code duplication. Signed-off-by: Sam Protsenko --- drivers/tty/serial/samsung_tty.c | 36 ++++---------------------------- include/linux/serial_s3c.h | 9 -------- 2 files changed, 4 insertions(+), 41 deletions(-) diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c index ca084c10d0bb..f986a9253dc8 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -65,7 +65,6 @@ enum s3c24xx_port_type { struct s3c24xx_uart_info { char *name; enum s3c24xx_port_type type; - bool has_usi; unsigned int port_type; unsigned int fifosize; unsigned long rx_fifomask; @@ -1357,28 +1356,6 @@ static int apple_s5l_serial_startup(struct uart_port *port) return ret; } -static void exynos_usi_init(struct uart_port *port) -{ - struct s3c24xx_uart_port *ourport = to_ourport(port); - struct s3c24xx_uart_info *info = ourport->info; - unsigned int val; - - if (!info->has_usi) - return; - - /* Clear the software reset of USI block (it's set at startup) */ - val = rd_regl(port, USI_CON); - val &= ~USI_CON_RESET_MASK; - wr_regl(port, USI_CON, val); - udelay(1); - - /* Continuously provide the clock to USI IP w/o gating (for Rx mode) */ - val = rd_regl(port, USI_OPTION); - val &= ~USI_OPTION_HWACG_MASK; - val |= USI_OPTION_HWACG_CLKREQ_ON; - wr_regl(port, USI_OPTION, val); -} - /* power power management control */ static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level, @@ -1405,8 +1382,6 @@ static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level, if (!IS_ERR(ourport->baudclk)) clk_prepare_enable(ourport->baudclk); - - exynos_usi_init(port); break; default: dev_err(port->dev, "s3c24xx_serial: unknown pm %d\n", level); @@ -2130,8 +2105,6 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport, if (ret) pr_warn("uart: failed to enable baudclk\n"); - exynos_usi_init(port); - /* Keep all interrupts masked and cleared */ switch (ourport->info->type) { case TYPE_S3C6400: @@ -2780,11 +2753,10 @@ static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = { #endif #if defined(CONFIG_ARCH_EXYNOS) -#define EXYNOS_COMMON_SERIAL_DRV_DATA(_has_usi) \ +#define EXYNOS_COMMON_SERIAL_DRV_DATA() \ .info = &(struct s3c24xx_uart_info) { \ .name = "Samsung Exynos UART", \ .type = TYPE_S3C6400, \ - .has_usi = _has_usi, \ .port_type = PORT_S3C6400, \ .has_divslot = 1, \ .rx_fifomask = S5PV210_UFSTAT_RXMASK, \ @@ -2805,17 +2777,17 @@ static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = { } \ static struct s3c24xx_serial_drv_data exynos4210_serial_drv_data = { - EXYNOS_COMMON_SERIAL_DRV_DATA(false), + EXYNOS_COMMON_SERIAL_DRV_DATA(), .fifosize = { 256, 64, 16, 16 }, }; static struct s3c24xx_serial_drv_data exynos5433_serial_drv_data = { - EXYNOS_COMMON_SERIAL_DRV_DATA(false), + EXYNOS_COMMON_SERIAL_DRV_DATA(), .fifosize = { 64, 256, 16, 256 }, }; static struct s3c24xx_serial_drv_data exynos850_serial_drv_data = { - EXYNOS_COMMON_SERIAL_DRV_DATA(true), + EXYNOS_COMMON_SERIAL_DRV_DATA(), .fifosize = { 256, 64, 64, 64 }, }; diff --git a/include/linux/serial_s3c.h b/include/linux/serial_s3c.h index cf0de4a86640..f6c3323fc4c5 100644 --- a/include/linux/serial_s3c.h +++ b/include/linux/serial_s3c.h @@ -27,15 +27,6 @@ #define S3C2410_UERSTAT (0x14) #define S3C2410_UFSTAT (0x18) #define S3C2410_UMSTAT (0x1C) -#define USI_CON (0xC4) -#define USI_OPTION (0xC8) - -#define USI_CON_RESET (1<<0) -#define USI_CON_RESET_MASK (1<<0) - -#define USI_OPTION_HWACG_CLKREQ_ON (1<<1) -#define USI_OPTION_HWACG_CLKSTOP_ON (1<<2) -#define USI_OPTION_HWACG_MASK (3<<1) #define S3C2410_LCON_CFGMASK ((0xF<<3)|(0x3)) From patchwork Sat Nov 27 22:32:50 2021 Content-Type: text/plain; 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Sat, 27 Nov 2021 14:33:03 -0800 (PST) Received: from localhost ([31.134.121.151]) by smtp.gmail.com with ESMTPSA id i15sm17872965wmq.18.2021.11.27.14.33.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 Nov 2021 14:33:02 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring , Mark Brown , Greg Kroah-Hartman Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH 5/8] tty: serial: samsung: Enable console as module Date: Sun, 28 Nov 2021 00:32:50 +0200 Message-Id: <20211127223253.19098-6-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211127223253.19098-1-semen.protsenko@linaro.org> References: <20211127223253.19098-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Enable serial driver to be built as a module. To do so, init the console support on driver/module load instead of using console_initcall(). This is needed for proper support of USIv2 driver (which can be built as a module, which in turn makes SERIAL_SAMSUNG be a module too). It also might be useful for Android GKI modularization efforts. Inspired by commit 87a0b9f98ac5 ("tty: serial: meson: enable console as module"). Signed-off-by: Sam Protsenko --- drivers/tty/serial/Kconfig | 2 +- drivers/tty/serial/samsung_tty.c | 21 +++++++++++++++++++-- 2 files changed, 20 insertions(+), 3 deletions(-) diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index fc543ac97c13..0e5ccb25bdb1 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -263,7 +263,7 @@ config SERIAL_SAMSUNG_UARTS config SERIAL_SAMSUNG_CONSOLE bool "Support for console on Samsung SoC serial port" - depends on SERIAL_SAMSUNG=y + depends on SERIAL_SAMSUNG select SERIAL_CORE_CONSOLE select SERIAL_EARLYCON help diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c index f986a9253dc8..92a63e9392ed 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -1720,10 +1720,10 @@ static int __init s3c24xx_serial_console_init(void) register_console(&s3c24xx_serial_console); return 0; } -console_initcall(s3c24xx_serial_console_init); #define S3C24XX_SERIAL_CONSOLE &s3c24xx_serial_console #else +static inline int s3c24xx_serial_console_init(void) { return 0; } #define S3C24XX_SERIAL_CONSOLE NULL #endif @@ -2898,7 +2898,24 @@ static struct platform_driver samsung_serial_driver = { }, }; -module_platform_driver(samsung_serial_driver); +static int __init samsung_serial_init(void) +{ + int ret; + + ret = s3c24xx_serial_console_init(); + if (ret) + return ret; + + return platform_driver_register(&samsung_serial_driver); +} + +static void __exit samsung_serial_exit(void) +{ + platform_driver_unregister(&samsung_serial_driver); +} + +module_init(samsung_serial_init); +module_exit(samsung_serial_exit); #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE /* From patchwork Sat Nov 27 22:32:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 12642571 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B35B1C4167B for ; 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Sat, 27 Nov 2021 14:33:04 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring , Mark Brown , Greg Kroah-Hartman Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH 6/8] tty: serial: Make SERIAL_SAMSUNG=y impossible when EXYNOS_USI_V2=m Date: Sun, 28 Nov 2021 00:32:51 +0200 Message-Id: <20211127223253.19098-7-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211127223253.19098-1-semen.protsenko@linaro.org> References: <20211127223253.19098-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org When UART is encapsulated in USIv2 block (e.g. in Exynos850), USIv2 driver must be loaded first, as it's preparing USI hardware for particular protocol use. Make it impossible for Samsung serial driver to be built-in when USIv2 driver is built as a module, to prevent incorrect booting order for those drivers. Signed-off-by: Sam Protsenko --- drivers/tty/serial/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 0e5ccb25bdb1..47bc24e74041 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -237,6 +237,7 @@ config SERIAL_CLPS711X_CONSOLE config SERIAL_SAMSUNG tristate "Samsung SoC serial support" depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || ARCH_APPLE || COMPILE_TEST + depends on EXYNOS_USI_V2 || !EXYNOS_USI_V2 select SERIAL_CORE help Support for the on-chip UARTs on the Samsung From patchwork Sat Nov 27 22:32:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 12642573 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9A90C43217 for ; Sat, 27 Nov 2021 22:40:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356559AbhK0WoM (ORCPT ); Sat, 27 Nov 2021 17:44:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57562 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1356566AbhK0WmM (ORCPT ); Sat, 27 Nov 2021 17:42:12 -0500 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DEF39C061395 for ; Sat, 27 Nov 2021 14:33:07 -0800 (PST) Received: by mail-wm1-x334.google.com with SMTP id y196so11270006wmc.3 for ; Sat, 27 Nov 2021 14:33:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hN+6gbYdyGAjVnMlgQrBqQi/CF2WLkIegNLftvsH2gY=; b=DlVHEKe1sf9t1x3J3dV5oUzT5laj66uD+D8FcpDAJGtTw7W6R/G6/4i/1FsAegGaC4 DW4mVPYOPZZa1fR+gJVNcxrDMoGaTpCFO3BS6HqLDhV685L/RFi8oZ3uCTMIVamCk/rH Gbm13j/4qRRRpYZNvl7glovJJVa4VSthBqDZ1Emi172S1esenJHvEmYHb1eH0HfsP46I EIUfXDANPd+JKuTHyKrw/fL7UZ2YD9yL22xJNnjsCng73w0MP+ZI7cfIWty5543aPlMg jYSBaNQJ2WS81kRXrTK+CKnleaWNOIepZa+TUGt8DNK8znwRi+QHw0uezn0wfC/HRYbd ewkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hN+6gbYdyGAjVnMlgQrBqQi/CF2WLkIegNLftvsH2gY=; b=7DxjXn0UuIQ21qmgh7Lj9fgMFnnXQSDyUEKPrzfNQ5fXoCQNksn9IUQsQaSt/LMacY A+xfJh8kIOs+rrMMexdIsl6ViCULMxFoxdHMlTyeOHQjivsVQedVeHYEpf5xy6WXhOO6 TLNldoeL7Bkrq488kQ+uq0B40Ft0eehBYgeXakFNN7x4fXcla957VjMbT7+mVTJlqm9H Byav6eQ3vnF29fdNYVo9fbn9aUmxbzS2LXPDnOGM/BaOGo76sYppEjbl3tvezkDxkXf7 FYVSLOq6yn6u0dzEscGZieMLyXpI3tbde8OqyVaZO4f8hiZzcJ4Y/a2YSKxQOG151riN A/2Q== X-Gm-Message-State: AOAM530YbZtANCTCVt/AuFs06lQ9OettVxUhLPGqsQ9Cuj+ozbxODgg7 7QITISMCoAFWrRFAHbkcf0zrEQ== X-Google-Smtp-Source: ABdhPJxR6Q7r+leY9cj8FBiR+YQOouaiZQ2fWT9sTrdBPHYHb+gpo78GRNNQbc1FsqSfzm0h3WuhFg== X-Received: by 2002:a05:600c:4f87:: with SMTP id n7mr25568893wmq.63.1638052386493; Sat, 27 Nov 2021 14:33:06 -0800 (PST) Received: from localhost ([31.134.121.151]) by smtp.gmail.com with ESMTPSA id w4sm10078421wrs.88.2021.11.27.14.33.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 Nov 2021 14:33:05 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring , Mark Brown , Greg Kroah-Hartman Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH 7/8] i2c: Make I2C_EXYNOS5=y impossible when EXYNOS_USI_V2=m Date: Sun, 28 Nov 2021 00:32:52 +0200 Message-Id: <20211127223253.19098-8-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211127223253.19098-1-semen.protsenko@linaro.org> References: <20211127223253.19098-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org When HSI2C is encapsulated in USIv2 block (e.g. in Exynos850), USIv2 driver must be loaded first, as it's preparing USI hardware for particular protocol use. Make it impossible for i2c-exynos5 driver to be built-in when USIv2 driver is built as a module, to prevent incorrect booting order for those drivers. Signed-off-by: Sam Protsenko --- drivers/i2c/busses/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index df89cb809330..e815a9dffb2c 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -613,6 +613,7 @@ config I2C_EXYNOS5 tristate "Exynos high-speed I2C driver" depends on OF depends on ARCH_EXYNOS || COMPILE_TEST + depends on EXYNOS_USI_V2 || !EXYNOS_USI_V2 default y if ARCH_EXYNOS help High-speed I2C controller on Samsung Exynos5 and newer Samsung SoCs: From patchwork Sat Nov 27 22:32:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 12642575 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00B7EC4167D for ; Sat, 27 Nov 2021 22:40:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356668AbhK0WoN (ORCPT ); Sat, 27 Nov 2021 17:44:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58000 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1356576AbhK0WmM (ORCPT ); Sat, 27 Nov 2021 17:42:12 -0500 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E569C061398 for ; Sat, 27 Nov 2021 14:33:09 -0800 (PST) Received: by mail-wm1-x336.google.com with SMTP id p3-20020a05600c1d8300b003334fab53afso13534686wms.3 for ; Sat, 27 Nov 2021 14:33:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LJ8LcarI7xqEtvO5iVdRS56QktsqqAOlLhc5CcWcfZQ=; b=r/qaO9nQajEHTbRAiXJq5PBzELxh5SYcoGDHjkN5FwgvsS/VnF/bAOJx+7tp53JVEF i/t/XIzQCEyV+pEoUklfZrciszvg94BS/pQNz2A3MeVo01sPBNRVRbaCye70p75cV+t9 2oGmdCE46DQUSKfznDj4vh4OXQcT07HJryqQcYO4iYmdkQ/1tVg3+0Bz7ZKCVenrVQZg vIfZzm/thV8mBebncIzTNzu9qDfvmdD2lo9EjUEneA0fuKw8zj2ExbnSqJ6jRQaStZoS yKcNUcq0cYJ4y0FKW61tt2FFcZ/imS6ZDC8X4XwoOYa1SAb+cLLcZsFVTzXL0GcdSW3g Y7JQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LJ8LcarI7xqEtvO5iVdRS56QktsqqAOlLhc5CcWcfZQ=; b=ijVanpmE7oNb8u3AwMnocXZM+45lAW0Ut/8vQZzDJRgOaJwquBCdJaJB/nxiy7JjtS A80TKhFgFZV10q5rze864WjsdO4lsM+GZ7uS975Rk7LwBWBIfmZSj2R8zApHEALmuK7E kThXClc/nvx87Gl4g66WNAHJtrwjrrS1IjlDMT9FGcwkHTH9xGyVLlAP5SOqHqUvKNeD fJRjoFev7L7fR+urijQs/h8t6w00SJx/8Gl2iWI/I+c1bEdyg4f/lG0/3RKMbcyh1Mnl 0HfoMpX2+RDmdbZ8x7Pkz20++Kd75ro2YeS6jWz2C9E1xvaYXNkDQ7jCc0UWXimGjgtI 0hjQ== X-Gm-Message-State: AOAM530cEbQwGtFfmLZ4XK/ChofFvJ5BsdPkQoT5CMhgZHOWlCLXdZr+ CWNCQZzVgw8OWIkWsuIl4jtvYHcx8fi/xtz9 X-Google-Smtp-Source: ABdhPJybLPuiYuY26o40e1ovZYC7Flhu8vSAfHRGwdZ9hn+tl2NYlm7OSVmgTPh6Mb5T6RqHSb/bIA== X-Received: by 2002:a1c:770e:: with SMTP id t14mr24560888wmi.173.1638052388201; Sat, 27 Nov 2021 14:33:08 -0800 (PST) Received: from localhost ([31.134.121.151]) by smtp.gmail.com with ESMTPSA id g13sm13152129wrd.57.2021.11.27.14.33.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 Nov 2021 14:33:07 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring , Mark Brown , Greg Kroah-Hartman Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH 8/8] spi: Make SPI_S3C64XX=y impossible when EXYNOS_USI_V2=m Date: Sun, 28 Nov 2021 00:32:53 +0200 Message-Id: <20211127223253.19098-9-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211127223253.19098-1-semen.protsenko@linaro.org> References: <20211127223253.19098-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org When S3C64XX SPI is encapsulated in USIv2 block (e.g. in Exynos850), USIv2 driver must be loaded first, as it's preparing USI hardware for particular protocol use. Make it impossible for spi-s3c64xx driver to be built-in when USIv2 driver is built as a module, to prevent incorrect booting order for those drivers. Signed-off-by: Sam Protsenko --- drivers/spi/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index b2a8821971e1..fbdf901248be 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -761,6 +761,7 @@ config SPI_S3C24XX_FIQ config SPI_S3C64XX tristate "Samsung S3C64XX/Exynos SoC series type SPI" depends on (PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST) + depends on EXYNOS_USI_V2 || !EXYNOS_USI_V2 help SPI driver for Samsung S3C64XX, S5Pv210 and Exynos SoCs. Choose Y/M here only if you build for such Samsung SoC.