From patchwork Sun Dec 5 20:26:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657269 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C48EC433F5 for ; Sun, 5 Dec 2021 20:22:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238491AbhLEUZj (ORCPT ); Sun, 5 Dec 2021 15:25:39 -0500 Received: from ams.source.kernel.org ([145.40.68.75]:43778 "EHLO ams.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238388AbhLEUZi (ORCPT ); Sun, 5 Dec 2021 15:25:38 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 809C5B80EE1 for ; Sun, 5 Dec 2021 20:22:10 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 86A6EC341C5; Sun, 5 Dec 2021 20:22:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735729; bh=wq6OAWf8p6jJu+9bxdyQGlkxojQH7pOOrvg1D21ji+k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FK7LKlroxACiJEeLfrKksFVGLrQoR+Qo42FF8V663n9I8a8JzMpBZyklSmTTiwyRO r1ONkj+WGGKR+1K/EFZXx5CSopgBpi7W/gZdWgu4vrsXuS0F73VX1IkfYHfvfGcH2r U4cwgBezVe1gFtosL0l8tcagnlwBpqybhnA0RfSairK56kBctzfPJCE2RFJMZs6x+n Ebq0HTywUqdvtDGAupxv2pPwIVrJe4h+ZOVuAlbPy4DwxwGkDPtejzXV1ujvopw+RN amT5i/Wm6WhyifjOCYgaBskypsSgLcEq0F18lhdFGRDOHBSXI4R8i85LSr60fHGRSI mAXILbQxmHQ6w== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 01/17] staging:iio:adc:ad7280a: Fix handing of device address bit reversing. Date: Sun, 5 Dec 2021 20:26:54 +0000 Message-Id: <20211205202710.2847005-2-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron The bit reversal was wrong for bits 1 and 3 of the 5 bits. Result is driver failure to probe if you have more than 2 daisy-chained devices. Discovered via QEMU based device emulation. Fixes tag is for when this moved from a macro to a function, but it was broken before that. Signed-off-by: Jonathan Cameron Fixes: 065a7c0b1fec ("Staging: iio: adc: ad7280a.c: Fixed Macro argument reuse") Reviewed-by: Marcelo Schmitt --- drivers/staging/iio/adc/ad7280a.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index fef0055b8990..20183b2ea127 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -107,9 +107,9 @@ static unsigned int ad7280a_devaddr(unsigned int addr) { return ((addr & 0x1) << 4) | - ((addr & 0x2) << 3) | + ((addr & 0x2) << 2) | (addr & 0x4) | - ((addr & 0x8) >> 3) | + ((addr & 0x8) >> 2) | ((addr & 0x10) >> 4); } From patchwork Sun Dec 5 20:26:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657271 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FBE6C433FE for ; Sun, 5 Dec 2021 20:22:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238493AbhLEUZk (ORCPT ); Sun, 5 Dec 2021 15:25:40 -0500 Received: from dfw.source.kernel.org ([139.178.84.217]:38536 "EHLO dfw.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238388AbhLEUZj (ORCPT ); Sun, 5 Dec 2021 15:25:39 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D5BC56114B for ; Sun, 5 Dec 2021 20:22:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DD5C6C00446; Sun, 5 Dec 2021 20:22:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735731; bh=N3TBDHapqgjafH4k+vkzsbglLQApCnMO8ew+GoLd6N4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bJ4kDJAssbfU61yZuDQSWJnJB1AhDNahSGSv4bzDrHpJ/GXOUagimm/Dx49q67jwI G+fdVEMGjHA7czYkK+BHnFXOwvCtHvEG4Nwu67fADGfTKpTJKtQ3eMahvaWDD1sBXB hwXnePd70lvqQg8JuAoMd81CFRxR6n7OLCaAJOdADJEJ/5soihaz4hi5sVG/kUaXv4 qC48celbzH9jNEEEn7cyxp/9sX3dJlapvWXCyXe4SSV5fRovWwr6IUX3pW147s6N2w DJgMC3SCVfRvJBajz5hOtyxg0+j4/hY7LVxQXP0VWkWSri1VJL/jFeNl0ck4KcFew9 l4RprR1ldiFIw== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 02/17] staging:iio:adc:ad7280a: Register define cleanup. Date: Sun, 5 Dec 2021 20:26:55 +0000 Message-Id: <20211205202710.2847005-3-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron 1. Postfix register addresses with _REG to distinguish them from fields within the registers 2. Switch to using FIELD_PREP and masks to aid readability. 3. Shorten a few defines to make the lines remain a sensible length. 4. Fix an issue whether where an CTRL_LB field is set in CTRL_HB. Signed-off-by: Jonathan Cameron Reviewed-by: Marcelo Schmitt --- drivers/staging/iio/adc/ad7280a.c | 299 ++++++++++++++++-------------- 1 file changed, 161 insertions(+), 138 deletions(-) diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 20183b2ea127..d169c8a7b5f1 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -23,78 +24,86 @@ #include "ad7280a.h" /* Registers */ -#define AD7280A_CELL_VOLTAGE_1 0x0 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_2 0x1 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_3 0x2 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_4 0x3 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_5 0x4 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_6 0x5 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_1 0x6 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_2 0x7 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_3 0x8 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_4 0x9 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_5 0xA /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_6 0xB /* D11 to D0, Read only */ -#define AD7280A_SELF_TEST 0xC /* D11 to D0, Read only */ -#define AD7280A_CONTROL_HB 0xD /* D15 to D8, Read/write */ -#define AD7280A_CONTROL_LB 0xE /* D7 to D0, Read/write */ -#define AD7280A_CELL_OVERVOLTAGE 0xF /* D7 to D0, Read/write */ -#define AD7280A_CELL_UNDERVOLTAGE 0x10 /* D7 to D0, Read/write */ -#define AD7280A_AUX_ADC_OVERVOLTAGE 0x11 /* D7 to D0, Read/write */ -#define AD7280A_AUX_ADC_UNDERVOLTAGE 0x12 /* D7 to D0, Read/write */ -#define AD7280A_ALERT 0x13 /* D7 to D0, Read/write */ -#define AD7280A_CELL_BALANCE 0x14 /* D7 to D0, Read/write */ -#define AD7280A_CB1_TIMER 0x15 /* D7 to D0, Read/write */ -#define AD7280A_CB2_TIMER 0x16 /* D7 to D0, Read/write */ -#define AD7280A_CB3_TIMER 0x17 /* D7 to D0, Read/write */ -#define AD7280A_CB4_TIMER 0x18 /* D7 to D0, Read/write */ -#define AD7280A_CB5_TIMER 0x19 /* D7 to D0, Read/write */ -#define AD7280A_CB6_TIMER 0x1A /* D7 to D0, Read/write */ -#define AD7280A_PD_TIMER 0x1B /* D7 to D0, Read/write */ -#define AD7280A_READ 0x1C /* D7 to D0, Read/write */ -#define AD7280A_CNVST_CONTROL 0x1D /* D7 to D0, Read/write */ - -/* Bits and Masks */ -#define AD7280A_CTRL_HB_CONV_INPUT_ALL 0 -#define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4 BIT(6) -#define AD7280A_CTRL_HB_CONV_INPUT_6CELL BIT(7) -#define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST (BIT(7) | BIT(6)) -#define AD7280A_CTRL_HB_CONV_RES_READ_ALL 0 -#define AD7280A_CTRL_HB_CONV_RES_READ_6CELL_AUX1_3_4 BIT(4) -#define AD7280A_CTRL_HB_CONV_RES_READ_6CELL BIT(5) -#define AD7280A_CTRL_HB_CONV_RES_READ_NO (BIT(5) | BIT(4)) -#define AD7280A_CTRL_HB_CONV_START_CNVST 0 -#define AD7280A_CTRL_HB_CONV_START_CS BIT(3) -#define AD7280A_CTRL_HB_CONV_AVG_DIS 0 -#define AD7280A_CTRL_HB_CONV_AVG_2 BIT(1) -#define AD7280A_CTRL_HB_CONV_AVG_4 BIT(2) -#define AD7280A_CTRL_HB_CONV_AVG_8 (BIT(2) | BIT(1)) -#define AD7280A_CTRL_HB_CONV_AVG(x) ((x) << 1) -#define AD7280A_CTRL_HB_PWRDN_SW BIT(0) - -#define AD7280A_CTRL_LB_SWRST BIT(7) -#define AD7280A_CTRL_LB_ACQ_TIME_400ns 0 -#define AD7280A_CTRL_LB_ACQ_TIME_800ns BIT(5) -#define AD7280A_CTRL_LB_ACQ_TIME_1200ns BIT(6) -#define AD7280A_CTRL_LB_ACQ_TIME_1600ns (BIT(6) | BIT(5)) -#define AD7280A_CTRL_LB_ACQ_TIME(x) ((x) << 5) -#define AD7280A_CTRL_LB_MUST_SET BIT(4) -#define AD7280A_CTRL_LB_THERMISTOR_EN BIT(3) -#define AD7280A_CTRL_LB_LOCK_DEV_ADDR BIT(2) -#define AD7280A_CTRL_LB_INC_DEV_ADDR BIT(1) -#define AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN BIT(0) - -#define AD7280A_ALERT_GEN_STATIC_HIGH BIT(6) -#define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (BIT(7) | BIT(6)) +#define AD7280A_CELL_VOLTAGE_1_REG 0x0 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_2_REG 0x1 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_3_REG 0x2 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_4_REG 0x3 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_5_REG 0x4 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_6_REG 0x5 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_1_REG 0x6 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_2_REG 0x7 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_3_REG 0x8 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_4_REG 0x9 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_5_REG 0xA /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_6_REG 0xB /* D11 to D0, Read only */ +#define AD7280A_SELF_TEST_REG 0xC /* D11 to D0, Read only */ + +#define AD7280A_CTRL_HB_REG 0xD /* D15 to D8, Read/write */ +#define AD7280A_CTRL_HB_CONV_INPUT_MSK GENMASK(7, 6) +#define AD7280A_CTRL_HB_CONV_INPUT_ALL 0 +#define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4 1 +#define AD7280A_CTRL_HB_CONV_INPUT_6CELL 2 +#define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST 3 +#define AD7280A_CTRL_HB_CONV_RREAD_MSK GENMASK(5, 4) +#define AD7280A_CTRL_HB_CONV_RREAD_ALL 0 +#define AD7280A_CTRL_HB_CONV_RREAD_6CELL_AUX1_3_4 1 +#define AD7280A_CTRL_HB_CONV_RREAD_6CELL 2 +#define AD7280A_CTRL_HB_CONV_RREAD_NO 3 +#define AD7280A_CTRL_HB_CONV_START_MSK BIT(3) +#define AD7280A_CTRL_HB_CONV_START_CNVST 0 +#define AD7280A_CTRL_HB_CONV_START_CS 1 +#define AD7280A_CTRL_HB_CONV_AVG_MSK GENMASK(2, 1) +#define AD7280A_CTRL_HB_CONV_AVG_DIS 0 +#define AD7280A_CTRL_HB_CONV_AVG_2 1 +#define AD7280A_CTRL_HB_CONV_AVG_4 2 +#define AD7280A_CTRL_HB_CONV_AVG_8 3 +#define AD7280A_CTRL_HB_PWRDN_SW BIT(0) + +#define AD7280A_CTRL_LB_REG 0xE /* D7 to D0, Read/write */ +#define AD7280A_CTRL_LB_SWRST_MSK BIT(7) +#define AD7280A_CTRL_LB_ACQ_TIME_MSK GENMASK(6, 5) +#define AD7280A_CTRL_LB_ACQ_TIME_400ns 0 +#define AD7280A_CTRL_LB_ACQ_TIME_800ns 1 +#define AD7280A_CTRL_LB_ACQ_TIME_1200ns 2 +#define AD7280A_CTRL_LB_ACQ_TIME_1600ns 3 +#define AD7280A_CTRL_LB_MUST_SET BIT(4) +#define AD7280A_CTRL_LB_THERMISTOR_MSK BIT(3) +#define AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK BIT(2) +#define AD7280A_CTRL_LB_INC_DEV_ADDR_MSK BIT(1) +#define AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK BIT(0) + +#define AD7280A_CELL_OVERVOLTAGE_REG 0xF /* D7 to D0, Read/write */ +#define AD7280A_CELL_UNDERVOLTAGE_REG 0x10 /* D7 to D0, Read/write */ +#define AD7280A_AUX_ADC_OVERVOLTAGE_REG 0x11 /* D7 to D0, Read/write */ +#define AD7280A_AUX_ADC_UNDERVOLTAGE_REG 0x12 /* D7 to D0, Read/write */ + +#define AD7280A_ALERT_REG 0x13 /* D7 to D0, Read/write */ +#define AD7280A_ALERT_GEN_STATIC_HIGH BIT(6) +#define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (BIT(7) | BIT(6)) + +#define AD7280A_CELL_BALANCE_REG 0x14 /* D7 to D0, Read/write */ +#define AD7280A_CB1_TIMER_REG 0x15 /* D7 to D0, Read/write */ +#define AD7280A_CB_TIMER_VAL_MSK GENMASK(7, 3) +#define AD7280A_CB2_TIMER_REG 0x16 /* D7 to D0, Read/write */ +#define AD7280A_CB3_TIMER_REG 0x17 /* D7 to D0, Read/write */ +#define AD7280A_CB4_TIMER_REG 0x18 /* D7 to D0, Read/write */ +#define AD7280A_CB5_TIMER_REG 0x19 /* D7 to D0, Read/write */ +#define AD7280A_CB6_TIMER_REG 0x1A /* D7 to D0, Read/write */ +#define AD7280A_PD_TIMER_REG 0x1B /* D7 to D0, Read/write */ +#define AD7280A_READ_REG 0x1C /* D7 to D0, Read/write */ +#define AD7280A_READ_ADDR_MSK GENMASK(7, 2) +#define AD7280A_CNVST_CTRL_REG 0x1D /* D7 to D0, Read/write */ + +/* Magic value used to indicate this special case */ #define AD7280A_ALL_CELLS (0xAD << 16) #define AD7280A_MAX_SPI_CLK_HZ 700000 /* < 1MHz */ #define AD7280A_MAX_CHAIN 8 #define AD7280A_CELLS_PER_DEV 6 #define AD7280A_BITS 12 -#define AD7280A_NUM_CH (AD7280A_AUX_ADC_6 - \ - AD7280A_CELL_VOLTAGE_1 + 1) +#define AD7280A_NUM_CH (AD7280A_AUX_ADC_6_REG - \ + AD7280A_CELL_VOLTAGE_1_REG + 1) #define AD7280A_CALC_VOLTAGE_CHAN_NUM(d, c) (((d) * AD7280A_CELLS_PER_DEV) + \ (c)) @@ -222,23 +231,28 @@ static int ad7280_read(struct ad7280_state *st, unsigned int devaddr, unsigned int tmp; /* turns off the read operation on all parts */ - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, - AD7280A_CTRL_HB_CONV_INPUT_ALL | - AD7280A_CTRL_HB_CONV_RES_READ_NO | + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_NO) | st->ctrl_hb); if (ret) return ret; /* turns on the read operation on the addressed part */ - ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0, - AD7280A_CTRL_HB_CONV_INPUT_ALL | - AD7280A_CTRL_HB_CONV_RES_READ_ALL | + ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_ALL) | st->ctrl_hb); if (ret) return ret; /* Set register address on the part to be read from */ - ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2); + ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0, + FIELD_PREP(AD7280A_READ_ADDR_MSK, addr)); if (ret) return ret; @@ -261,21 +275,27 @@ static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, int ret; unsigned int tmp; - ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2); + ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0, + FIELD_PREP(AD7280A_READ_ADDR_MSK, addr)); if (ret) return ret; - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, - AD7280A_CTRL_HB_CONV_INPUT_ALL | - AD7280A_CTRL_HB_CONV_RES_READ_NO | + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_NO) | st->ctrl_hb); if (ret) return ret; - ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0, - AD7280A_CTRL_HB_CONV_INPUT_ALL | - AD7280A_CTRL_HB_CONV_RES_READ_ALL | - AD7280A_CTRL_HB_CONV_START_CS | + ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, + AD7280A_CTRL_HB_CONV_START_CS) | st->ctrl_hb); if (ret) return ret; @@ -301,15 +321,18 @@ static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, int i, ret; unsigned int tmp, sum = 0; - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1, - AD7280A_CELL_VOLTAGE_1 << 2); + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1, + AD7280A_CELL_VOLTAGE_1_REG << 2); if (ret) return ret; - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, - AD7280A_CTRL_HB_CONV_INPUT_ALL | - AD7280A_CTRL_HB_CONV_RES_READ_ALL | - AD7280A_CTRL_HB_CONV_START_CS | + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, + AD7280A_CTRL_HB_CONV_START_CS) | st->ctrl_hb); if (ret) return ret; @@ -327,7 +350,7 @@ static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, if (array) array[i] = tmp; /* only sum cell voltages */ - if (((tmp >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6) + if (((tmp >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6_REG) sum += ((tmp >> 11) & 0xFFF); } @@ -338,7 +361,7 @@ static void ad7280_sw_power_down(void *data) { struct ad7280_state *st = data; - ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, + ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb); } @@ -347,25 +370,26 @@ static int ad7280_chain_setup(struct ad7280_state *st) unsigned int val, n; int ret; - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1, - AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN | - AD7280A_CTRL_LB_LOCK_DEV_ADDR | + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1, + FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) | + FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) | AD7280A_CTRL_LB_MUST_SET | - AD7280A_CTRL_LB_SWRST | + FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 1) | st->ctrl_lb); if (ret) return ret; - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1, - AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN | - AD7280A_CTRL_LB_LOCK_DEV_ADDR | + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1, + FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) | + FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) | AD7280A_CTRL_LB_MUST_SET | + FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 0) | st->ctrl_lb); if (ret) goto error_power_down; - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1, - AD7280A_CONTROL_LB << 2); + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1, + FIELD_PREP(AD7280A_READ_ADDR_MSK, AD7280A_CTRL_LB_REG)); if (ret) goto error_power_down; @@ -390,7 +414,7 @@ static int ad7280_chain_setup(struct ad7280_state *st) ret = -EFAULT; error_power_down: - ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, + ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb); return ret; @@ -434,7 +458,7 @@ static ssize_t ad7280_store_balance_sw(struct device *dev, else st->cb_mask[devaddr] &= ~(1 << (ch + 2)); - ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE, + ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE_REG, 0, st->cb_mask[devaddr]); mutex_unlock(&st->lock); @@ -459,7 +483,7 @@ static ssize_t ad7280_show_balance_timer(struct device *dev, if (ret < 0) return ret; - msecs = (ret >> 3) * 71500; + msecs = FIELD_GET(AD7280A_CB_TIMER_VAL_MSK, ret) * 71500; return sprintf(buf, "%u\n", msecs); } @@ -486,8 +510,8 @@ static ssize_t ad7280_store_balance_timer(struct device *dev, mutex_lock(&st->lock); ret = ad7280_write(st, this_attr->address >> 8, - this_attr->address & 0xFF, - 0, (val & 0x1F) << 3); + this_attr->address & 0xFF, 0, + FIELD_PREP(AD7280A_CB_TIMER_VAL_MSK, val)); mutex_unlock(&st->lock); return ret ? ret : len; @@ -559,10 +583,10 @@ static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt) int addr, ch, i; struct iio_chan_spec *chan; - for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_AUX_ADC_6; ch++) { + for (ch = AD7280A_CELL_VOLTAGE_1_REG; ch <= AD7280A_AUX_ADC_6_REG; ch++) { chan = &st->channels[*cnt]; - if (ch < AD7280A_AUX_ADC_1) { + if (ch < AD7280A_AUX_ADC_1_REG) { i = AD7280A_CALC_VOLTAGE_CHAN_NUM(dev, ch); ad7280_voltage_channel_init(chan, i); } else { @@ -634,7 +658,7 @@ static int ad7280_init_dev_attrs(struct ad7280_state *st, int dev, int *cnt) struct iio_dev_attr *iio_attr; struct device *sdev = &st->spi->dev; - for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_CELL_VOLTAGE_6; ch++) { + for (ch = AD7280A_CELL_VOLTAGE_1_REG; ch <= AD7280A_CELL_VOLTAGE_6_REG; ch++) { iio_attr = &st->iio_attr[*cnt]; addr = ad7280a_devaddr(dev) << 8 | ch; i = dev * AD7280A_CELLS_PER_DEV + ch; @@ -647,7 +671,7 @@ static int ad7280_init_dev_attrs(struct ad7280_state *st, int dev, int *cnt) (*cnt)++; iio_attr = &st->iio_attr[*cnt]; - addr = ad7280a_devaddr(dev) << 8 | (AD7280A_CB1_TIMER + ch); + addr = ad7280a_devaddr(dev) << 8 | (AD7280A_CB1_TIMER_REG + ch); ret = ad7280_balance_timer_attr_init(iio_attr, sdev, addr, i); if (ret < 0) @@ -691,16 +715,16 @@ static ssize_t ad7280_read_channel_config(struct device *dev, unsigned int val; switch (this_attr->address) { - case AD7280A_CELL_OVERVOLTAGE: + case AD7280A_CELL_OVERVOLTAGE_REG: val = 1000 + (st->cell_threshhigh * 1568) / 100; break; - case AD7280A_CELL_UNDERVOLTAGE: + case AD7280A_CELL_UNDERVOLTAGE_REG: val = 1000 + (st->cell_threshlow * 1568) / 100; break; - case AD7280A_AUX_ADC_OVERVOLTAGE: + case AD7280A_AUX_ADC_OVERVOLTAGE_REG: val = (st->aux_threshhigh * 196) / 10; break; - case AD7280A_AUX_ADC_UNDERVOLTAGE: + case AD7280A_AUX_ADC_UNDERVOLTAGE_REG: val = (st->aux_threshlow * 196) / 10; break; default: @@ -727,12 +751,12 @@ static ssize_t ad7280_write_channel_config(struct device *dev, return ret; switch (this_attr->address) { - case AD7280A_CELL_OVERVOLTAGE: - case AD7280A_CELL_UNDERVOLTAGE: + case AD7280A_CELL_OVERVOLTAGE_REG: + case AD7280A_CELL_UNDERVOLTAGE_REG: val = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */ break; - case AD7280A_AUX_ADC_OVERVOLTAGE: - case AD7280A_AUX_ADC_UNDERVOLTAGE: + case AD7280A_AUX_ADC_OVERVOLTAGE_REG: + case AD7280A_AUX_ADC_UNDERVOLTAGE_REG: val = (val * 10) / 196; /* LSB 19.6mV */ break; default: @@ -743,16 +767,16 @@ static ssize_t ad7280_write_channel_config(struct device *dev, mutex_lock(&st->lock); switch (this_attr->address) { - case AD7280A_CELL_OVERVOLTAGE: + case AD7280A_CELL_OVERVOLTAGE_REG: st->cell_threshhigh = val; break; - case AD7280A_CELL_UNDERVOLTAGE: + case AD7280A_CELL_UNDERVOLTAGE_REG: st->cell_threshlow = val; break; - case AD7280A_AUX_ADC_OVERVOLTAGE: + case AD7280A_AUX_ADC_OVERVOLTAGE_REG: st->aux_threshhigh = val; break; - case AD7280A_AUX_ADC_UNDERVOLTAGE: + case AD7280A_AUX_ADC_UNDERVOLTAGE_REG: st->aux_threshlow = val; break; } @@ -781,17 +805,19 @@ static irqreturn_t ad7280_event_handler(int irq, void *private) goto out; for (i = 0; i < st->scan_cnt; i++) { - if (((channels[i] >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6) { - if (((channels[i] >> 11) & 0xFFF) >= - st->cell_threshhigh) { + unsigned int val; + + val = FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, channels[i]); + if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, channels[i]) + <= AD7280A_CELL_VOLTAGE_6_REG) { + if (val >= st->cell_threshhigh) { u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0, IIO_EV_DIR_RISING, IIO_EV_TYPE_THRESH, 0, 0, 0); iio_push_event(indio_dev, tmp, iio_get_time_ns(indio_dev)); - } else if (((channels[i] >> 11) & 0xFFF) <= - st->cell_threshlow) { + } else if (val <= st->cell_threshlow) { u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0, IIO_EV_DIR_FALLING, IIO_EV_TYPE_THRESH, @@ -800,15 +826,13 @@ static irqreturn_t ad7280_event_handler(int irq, void *private) iio_get_time_ns(indio_dev)); } } else { - if (((channels[i] >> 11) & 0xFFF) >= - st->aux_threshhigh) { + if (val >= st->aux_threshhigh) { u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0, IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING); iio_push_event(indio_dev, tmp, iio_get_time_ns(indio_dev)); - } else if (((channels[i] >> 11) & 0xFFF) <= - st->aux_threshlow) { + } else if (val <= st->aux_threshlow) { u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0, IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING); @@ -833,26 +857,26 @@ static IIO_DEVICE_ATTR_NAMED(in_thresh_low_value, 0644, ad7280_read_channel_config, ad7280_write_channel_config, - AD7280A_CELL_UNDERVOLTAGE); + AD7280A_CELL_UNDERVOLTAGE_REG); static IIO_DEVICE_ATTR_NAMED(in_thresh_high_value, in_voltage-voltage_thresh_high_value, 0644, ad7280_read_channel_config, ad7280_write_channel_config, - AD7280A_CELL_OVERVOLTAGE); + AD7280A_CELL_OVERVOLTAGE_REG); static IIO_DEVICE_ATTR(in_temp_thresh_low_value, 0644, ad7280_read_channel_config, ad7280_write_channel_config, - AD7280A_AUX_ADC_UNDERVOLTAGE); + AD7280A_AUX_ADC_UNDERVOLTAGE_REG); static IIO_DEVICE_ATTR(in_temp_thresh_high_value, 0644, ad7280_read_channel_config, ad7280_write_channel_config, - AD7280A_AUX_ADC_OVERVOLTAGE); + AD7280A_AUX_ADC_OVERVOLTAGE_REG); static struct attribute *ad7280_event_attributes[] = { &iio_dev_attr_in_thresh_low_value.dev_attr.attr, @@ -892,7 +916,7 @@ static int ad7280_read_raw(struct iio_dev *indio_dev, return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: - if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6) + if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6_REG) *val = 4000; else *val = 5000; @@ -942,10 +966,9 @@ static int ad7280_probe(struct spi_device *spi) st->spi->mode = SPI_MODE_1; spi_setup(st->spi); - st->ctrl_lb = AD7280A_CTRL_LB_ACQ_TIME(pdata->acquisition_time & 0x3); - st->ctrl_hb = AD7280A_CTRL_HB_CONV_AVG(pdata->conversion_averaging - & 0x3) | (pdata->thermistor_term_en ? - AD7280A_CTRL_LB_THERMISTOR_EN : 0); + st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, pdata->acquisition_time) | + FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, pdata->thermistor_term_en); + st->ctrl_hb = FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, pdata->conversion_averaging); ret = ad7280_chain_setup(st); if (ret < 0) @@ -998,13 +1021,13 @@ static int ad7280_probe(struct spi_device *spi) if (spi->irq > 0) { ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, - AD7280A_ALERT, 1, + AD7280A_ALERT_REG, 1, AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN); if (ret) return ret; ret = ad7280_write(st, ad7280a_devaddr(st->slave_num), - AD7280A_ALERT, 0, + AD7280A_ALERT_REG, 0, AD7280A_ALERT_GEN_STATIC_HIGH | (pdata->chain_last_alert_ignore & 0xF)); if (ret) From patchwork Sun Dec 5 20:26:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657273 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 569C1C433F5 for ; Sun, 5 Dec 2021 20:22:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238494AbhLEUZm (ORCPT ); Sun, 5 Dec 2021 15:25:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238388AbhLEUZl (ORCPT ); Sun, 5 Dec 2021 15:25:41 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 78B2FC061714 for ; Sun, 5 Dec 2021 12:22:14 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 01F966114F for ; Sun, 5 Dec 2021 20:22:14 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E98CAC341C5; Sun, 5 Dec 2021 20:22:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735733; bh=H6IgZIr/LrwS59h40zOjRvDfUWGymVjw/cheZiYjNA0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JLP8HPNPo30JY7C1zXN0zhCRMc0nONjSRyM5YoHVbMXWAWBtrKcT2gOc1OfA2U7hN NU7VB2t/jXj9/EHhIHVBUswr6jjz8FrRceVQd79NYLncD6xtpp/koBMVPOcNW7MPs+ 3sqGmvMaB8B9WZ+A2IODkpF8KWMCDRlqSEUWom1cdpdSgWa6BgaTtgeINsOumffppL 1R5PQ0UwTdnmTn5ooLjbXHLodJ2LjkVEy3j9JMku4EZ4NPu3jXAHFNgSqHFHhR9ihh iagWFRzfst1It62ye6tgfI7LGUpwM20zPVDD6g2Lzp8w9UgS4oysqMc0l1AowPuhYo xx7HESRMGY5KQ== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 03/17] staging:iio:adc:ad7280a: rename _read() to _read_reg() Date: Sun, 5 Dec 2021 20:26:56 +0000 Message-Id: <20211205202710.2847005-4-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron This avoids possible confusion with read back of the channel conversions. These two types of reads are of difference sizes with resulting differences in the data layout of the response from the hardware. Signed-off-by: Jonathan Cameron Reviewed-by: Marcelo Schmitt --- drivers/staging/iio/adc/ad7280a.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index d169c8a7b5f1..4d866e5fe43c 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -224,8 +224,8 @@ static int ad7280_write(struct ad7280_state *st, unsigned int devaddr, return spi_write(st->spi, &st->buf[0], 4); } -static int ad7280_read(struct ad7280_state *st, unsigned int devaddr, - unsigned int addr) +static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr, + unsigned int addr) { int ret; unsigned int tmp; @@ -476,8 +476,8 @@ static ssize_t ad7280_show_balance_timer(struct device *dev, unsigned int msecs; mutex_lock(&st->lock); - ret = ad7280_read(st, this_attr->address >> 8, - this_attr->address & 0xFF); + ret = ad7280_read_reg(st, this_attr->address >> 8, + this_attr->address & 0xFF); mutex_unlock(&st->lock); if (ret < 0) From patchwork Sun Dec 5 20:26:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657275 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E653C433F5 for ; Sun, 5 Dec 2021 20:22:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238496AbhLEUZq (ORCPT ); Sun, 5 Dec 2021 15:25:46 -0500 Received: from dfw.source.kernel.org ([139.178.84.217]:38586 "EHLO dfw.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238388AbhLEUZo (ORCPT ); Sun, 5 Dec 2021 15:25:44 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 6B1416114D for ; Sun, 5 Dec 2021 20:22:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 19522C341C4; Sun, 5 Dec 2021 20:22:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735735; bh=E0DenEJgS+Aw/BmJoPFiwK5nbE+zr/yDENLoHrnqu/M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=t363JgwJxZdxkzquAqSlzfWY4nciYBUuDHIkiAxO+SdhgBV+iwk2ZW47qqsvU+EhS MfEMQC+fiOOUqi47ylAdLADHVoRj50kPA+i5JL1qjXKGyBxC9RDf/mx3Y5qeLGz00t j6vkTJFYkxDt7CZfp1hTniY5gEmhOncy9DWYjUM69nn+/4NzL//PXHH3o/k7CSRCjU PSp3HnlDyfNSBGshfA+qM/q4N1BG2790yCai7I45w2fKWsYT88nzclIXzLfV1qC2tF vZpnioDGREjXcwZADY+r083+05/t5iQDbq0gXAFRvbLPwzx/cIfsAYAmz+VecJRD6z zDEzC40hfO+/w== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 04/17] staging:iio:adc:ad7280a: Split buff[2] into tx and rx parts Date: Sun, 5 Dec 2021 20:26:57 +0000 Message-Id: <20211205202710.2847005-5-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron As the __cacheline_aligned will ensure that the first of these two buffers is appropriate aligned, there is no need to keep them as a single array which is confusing given the first element is always tx and the second rx. Hence let us just have two parts and name them separately. Signed-off-by: Jonathan Cameron Reviewed-by: Marcelo Schmitt --- drivers/staging/iio/adc/ad7280a.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 4d866e5fe43c..1f7ea5fb1e20 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -153,7 +153,8 @@ struct ad7280_state { unsigned char cb_mask[AD7280A_MAX_CHAIN]; struct mutex lock; /* protect sensor state */ - __be32 buf[2] ____cacheline_aligned; + __be32 tx ____cacheline_aligned; + __be32 rx; }; static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val) @@ -196,18 +197,18 @@ static int __ad7280_read32(struct ad7280_state *st, unsigned int *val) { int ret; struct spi_transfer t = { - .tx_buf = &st->buf[0], - .rx_buf = &st->buf[1], - .len = 4, + .tx_buf = &st->tx, + .rx_buf = &st->rx, + .len = sizeof(st->tx), }; - st->buf[0] = cpu_to_be32(AD7280A_READ_TXVAL); + st->tx = cpu_to_be32(AD7280A_READ_TXVAL); ret = spi_sync_transfer(st->spi, &t, 1); if (ret) return ret; - *val = be32_to_cpu(st->buf[1]); + *val = be32_to_cpu(st->rx); return 0; } @@ -219,9 +220,9 @@ static int ad7280_write(struct ad7280_state *st, unsigned int devaddr, (val & 0xFF) << 13 | all << 12; reg |= ad7280_calc_crc8(st->crc_tab, reg >> 11) << 3 | 0x2; - st->buf[0] = cpu_to_be32(reg); + st->tx = cpu_to_be32(reg); - return spi_write(st->spi, &st->buf[0], 4); + return spi_write(st->spi, &st->tx, sizeof(st->tx)); } static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr, From patchwork Sun Dec 5 20:26:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657277 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 191DCC433EF for ; Sun, 5 Dec 2021 20:22:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238509AbhLEUZq (ORCPT ); Sun, 5 Dec 2021 15:25:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238388AbhLEUZq (ORCPT ); Sun, 5 Dec 2021 15:25:46 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27677C061714 for ; Sun, 5 Dec 2021 12:22:19 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id B509D6114D for ; Sun, 5 Dec 2021 20:22:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 70475C00446; Sun, 5 Dec 2021 20:22:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735738; bh=mEUtWZIGJqK2Tp5M3hXpxyU6kXx2GHn+P4kIHj+yIm8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=d5bFFfIwrsxfJ4R3p2Ijj2weVuhb3Enua6eCiJUyBrQ+9TnkjlbtSCdQ0LQlXllav VOZoTbv3mtXcIYBINGBLNuBTVw5fnNPCo6k1JHdb+DVqrIS1SbchjfTz30wM9rgJrO ZaFfn4UWhjS/pFcVvUagySZc3H6yp4m7sxa4kfkEHNpwn594TI5wg8QpS/UgPm8HnC T+Ett1CLU9unYSmOT0Ns/5smUVPMrFmJT1r/GVSGk//7SrXCIXcBZMv0KswLmh5zYB DADl85x6XVZ8i3Vbd4fArYp9qdqiu0s5JxeTVRBIQlskefhjM8agKKeooApcxLRbMr t2epYOZIpb3bQ== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 05/17] staging:iio:adc:ad7280a: Use bitfield ops to managed fields in transfers. Date: Sun, 5 Dec 2021 20:26:58 +0000 Message-Id: <20211205202710.2847005-6-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron The write and two types of read transfer are sufficiently complex that they benefit from the clarity of using FIELD_PREP() and FIELD_GET() Signed-off-by: Jonathan Cameron Reviewed-by: Marcelo Schmitt --- drivers/staging/iio/adc/ad7280a.c | 46 ++++++++++++++++++++++++------- 1 file changed, 36 insertions(+), 10 deletions(-) diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 1f7ea5fb1e20..158a792c0bf8 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -95,6 +95,23 @@ #define AD7280A_READ_ADDR_MSK GENMASK(7, 2) #define AD7280A_CNVST_CTRL_REG 0x1D /* D7 to D0, Read/write */ +/* Transfer fields */ +#define AD7280A_TRANS_WRITE_DEVADDR_MSK GENMASK(31, 27) +#define AD7280A_TRANS_WRITE_ADDR_MSK GENMASK(26, 21) +#define AD7280A_TRANS_WRITE_VAL_MSK GENMASK(20, 13) +#define AD7280A_TRANS_WRITE_ALL_MSK BIT(12) +#define AD7280A_TRANS_WRITE_CRC_MSK GENMASK(10, 3) +#define AD7280A_TRANS_WRITE_RES_PATTERN 0x2 + +/* Layouts differ for channel vs other registers */ +#define AD7280A_TRANS_READ_DEVADDR_MSK GENMASK(31, 27) +#define AD7280A_TRANS_READ_CONV_CHANADDR_MSK GENMASK(26, 23) +#define AD7280A_TRANS_READ_CONV_DATA_MSK GENMASK(22, 11) +#define AD7280A_TRANS_READ_REG_REGADDR_MSK GENMASK(26, 21) +#define AD7280A_TRANS_READ_REG_DATA_MSK GENMASK(20, 13) +#define AD7280A_TRANS_READ_WRITE_ACK_MSK BIT(10) +#define AD7280A_TRANS_READ_CRC_MSK GENMASK(9, 2) + /* Magic value used to indicate this special case */ #define AD7280A_ALL_CELLS (0xAD << 16) @@ -216,10 +233,16 @@ static int __ad7280_read32(struct ad7280_state *st, unsigned int *val) static int ad7280_write(struct ad7280_state *st, unsigned int devaddr, unsigned int addr, bool all, unsigned int val) { - unsigned int reg = devaddr << 27 | addr << 21 | - (val & 0xFF) << 13 | all << 12; + unsigned int reg = FIELD_PREP(AD7280A_TRANS_WRITE_DEVADDR_MSK, devaddr) | + FIELD_PREP(AD7280A_TRANS_WRITE_ADDR_MSK, addr) | + FIELD_PREP(AD7280A_TRANS_WRITE_VAL_MSK, val) | + FIELD_PREP(AD7280A_TRANS_WRITE_ALL_MSK, all); + + reg |= FIELD_PREP(AD7280A_TRANS_WRITE_CRC_MSK, + ad7280_calc_crc8(st->crc_tab, reg >> 11)); + /* Reserved b010 pattern not included crc calc */ + reg |= AD7280A_TRANS_WRITE_RES_PATTERN; - reg |= ad7280_calc_crc8(st->crc_tab, reg >> 11) << 3 | 0x2; st->tx = cpu_to_be32(reg); return spi_write(st->spi, &st->tx, sizeof(st->tx)); @@ -264,10 +287,11 @@ static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr, if (ad7280_check_crc(st, tmp)) return -EIO; - if (((tmp >> 27) != devaddr) || (((tmp >> 21) & 0x3F) != addr)) + if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) || + (FIELD_GET(AD7280A_TRANS_READ_REG_REGADDR_MSK, tmp) != addr)) return -EFAULT; - return (tmp >> 13) & 0xFF; + return FIELD_GET(AD7280A_TRANS_READ_REG_DATA_MSK, tmp); } static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, @@ -310,10 +334,11 @@ static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, if (ad7280_check_crc(st, tmp)) return -EIO; - if (((tmp >> 27) != devaddr) || (((tmp >> 23) & 0xF) != addr)) + if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) || + (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) != addr)) return -EFAULT; - return (tmp >> 11) & 0xFFF; + return FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp); } static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, @@ -351,8 +376,9 @@ static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, if (array) array[i] = tmp; /* only sum cell voltages */ - if (((tmp >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6_REG) - sum += ((tmp >> 11) & 0xFFF); + if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) <= + AD7280A_CELL_VOLTAGE_6_REG) + sum += FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp); } return sum; @@ -407,7 +433,7 @@ static int ad7280_chain_setup(struct ad7280_state *st) goto error_power_down; } - if (n != ad7280a_devaddr(val >> 27)) { + if (n != ad7280a_devaddr(FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, val))) { ret = -EIO; goto error_power_down; } From patchwork Sun Dec 5 20:26:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657279 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45D89C433EF for ; Sun, 5 Dec 2021 20:22:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238506AbhLEUZu (ORCPT ); Sun, 5 Dec 2021 15:25:50 -0500 Received: from ams.source.kernel.org ([145.40.68.75]:43858 "EHLO ams.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238388AbhLEUZt (ORCPT ); Sun, 5 Dec 2021 15:25:49 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 964A7B80EE3 for ; Sun, 5 Dec 2021 20:22:21 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AD963C341C5; Sun, 5 Dec 2021 20:22:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735740; bh=G6uoTMJzlPhYtzexkCMAsMpNq+RE9ftcTdhC3Hnf6z4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qV1aOGB4D/Re9emKxafb2hWw5i1NLw9wETEQ0peOtD5hHrAFnhoBm3OllEHNChW4W DB+8jTOx8CgP520byDErgFpx6rFOf0Is4HX7b2pcCixkFLoOBVZdKYtIvcJA6FVJ0t V6hs02PVn2Q9KIo+XKYC7Sv3h8kmPBID1sNmUZGMjZzXlDCvdHmJORQ4fvwbjphtoX W3IrC/g0g5QmqtkBN8qxc89RWcRrRWk3qJ0+Nllo3gTEq9BZGvccnJcvk8hjfTg1PU EijfNIlNs29Yf7xuLH27jJaKa24hqJ5MNdJaogfLdRqsegLw4gjIpwNTZvNPf6tYcK iD+sDLJqE5AVw== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 06/17] staging:iio:adc:ad7280a: Switch to standard event control Date: Sun, 5 Dec 2021 20:26:59 +0000 Message-Id: <20211205202710.2847005-7-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron This driver had a slightly non standard events ABI but there seems to be no reason for not doing it with the core support for rising and falling events on the two types of channels. In theory the events on different daisy chained chips could be at different levels, but the driver has never supported this and it doesn't seem likely to be used so let us ignore that option. Signed-off-by: Jonathan Cameron Reviewed-by: Marcelo Schmitt --- drivers/staging/iio/adc/ad7280a.c | 198 ++++++++++++++---------------- 1 file changed, 95 insertions(+), 103 deletions(-) diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 158a792c0bf8..0aeca39388cf 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -551,18 +551,34 @@ static const struct attribute_group ad7280_attrs_group = { .attrs = ad7280_attributes, }; +static const struct iio_event_spec ad7280_events[] = { + { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_RISING, + .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), + }, { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_FALLING, + .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), + }, +}; + static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i) { chan->type = IIO_VOLTAGE; chan->differential = 1; chan->channel = i; chan->channel2 = chan->channel + 1; + chan->event_spec = ad7280_events; + chan->num_event_specs = ARRAY_SIZE(ad7280_events); } static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i) { chan->type = IIO_TEMP; chan->channel = i; + chan->event_spec = ad7280_events; + chan->num_event_specs = ARRAY_SIZE(ad7280_events); } static void ad7280_common_fields_init(struct iio_chan_spec *chan, int addr, @@ -732,88 +748,105 @@ static int ad7280_attr_init(struct ad7280_state *st) return 0; } -static ssize_t ad7280_read_channel_config(struct device *dev, - struct device_attribute *attr, - char *buf) +static int ad7280a_read_thresh(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, int *val, int *val2) { - struct iio_dev *indio_dev = dev_to_iio_dev(dev); struct ad7280_state *st = iio_priv(indio_dev); - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); - unsigned int val; - switch (this_attr->address) { - case AD7280A_CELL_OVERVOLTAGE_REG: - val = 1000 + (st->cell_threshhigh * 1568) / 100; - break; - case AD7280A_CELL_UNDERVOLTAGE_REG: - val = 1000 + (st->cell_threshlow * 1568) / 100; - break; - case AD7280A_AUX_ADC_OVERVOLTAGE_REG: - val = (st->aux_threshhigh * 196) / 10; + switch (chan->type) { + case IIO_VOLTAGE: + switch (dir) { + case IIO_EV_DIR_RISING: + *val = 1000 + (st->cell_threshhigh * 1568L) / 100; + return IIO_VAL_INT; + case IIO_EV_DIR_FALLING: + *val = 1000 + (st->cell_threshlow * 1568L) / 100; + return IIO_VAL_INT; + default: + return -EINVAL; + } break; - case AD7280A_AUX_ADC_UNDERVOLTAGE_REG: - val = (st->aux_threshlow * 196) / 10; + case IIO_TEMP: + switch (dir) { + case IIO_EV_DIR_RISING: + *val = ((st->aux_threshhigh) * 196L) / 10; + return IIO_VAL_INT; + case IIO_EV_DIR_FALLING: + *val = (st->aux_threshlow * 196L) / 10; + return IIO_VAL_INT; + default: + return -EINVAL; + } break; default: return -EINVAL; } - - return sprintf(buf, "%u\n", val); } -static ssize_t ad7280_write_channel_config(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) +static int ad7280a_write_thresh(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int val, int val2) { - struct iio_dev *indio_dev = dev_to_iio_dev(dev); struct ad7280_state *st = iio_priv(indio_dev); - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); - - long val; + unsigned int addr; + long value; int ret; - ret = kstrtol(buf, 10, &val); - if (ret) - return ret; - - switch (this_attr->address) { - case AD7280A_CELL_OVERVOLTAGE_REG: - case AD7280A_CELL_UNDERVOLTAGE_REG: - val = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */ - break; - case AD7280A_AUX_ADC_OVERVOLTAGE_REG: - case AD7280A_AUX_ADC_UNDERVOLTAGE_REG: - val = (val * 10) / 196; /* LSB 19.6mV */ - break; - default: - return -EFAULT; - } - - val = clamp(val, 0L, 0xFFL); + if (val2 != 0) + return -EINVAL; mutex_lock(&st->lock); - switch (this_attr->address) { - case AD7280A_CELL_OVERVOLTAGE_REG: - st->cell_threshhigh = val; - break; - case AD7280A_CELL_UNDERVOLTAGE_REG: - st->cell_threshlow = val; - break; - case AD7280A_AUX_ADC_OVERVOLTAGE_REG: - st->aux_threshhigh = val; + switch (chan->type) { + case IIO_VOLTAGE: + value = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */ + value = clamp(value, 0L, 0xFFL); + switch (dir) { + case IIO_EV_DIR_RISING: + addr = AD7280A_CELL_OVERVOLTAGE_REG; + st->cell_threshhigh = value; + break; + case IIO_EV_DIR_FALLING: + addr = AD7280A_CELL_UNDERVOLTAGE_REG; + st->cell_threshlow = value; + break; + default: + ret = -EINVAL; + goto err_unlock; + } break; - case AD7280A_AUX_ADC_UNDERVOLTAGE_REG: - st->aux_threshlow = val; + case IIO_TEMP: + value = (val * 10) / 196; /* LSB 19.6mV */ + value = clamp(value, 0L, 0xFFL); + switch (dir) { + case IIO_EV_DIR_RISING: + addr = AD7280A_AUX_ADC_OVERVOLTAGE_REG; + st->aux_threshhigh = val; + break; + case IIO_EV_DIR_FALLING: + addr = AD7280A_AUX_ADC_UNDERVOLTAGE_REG; + st->aux_threshlow = val; + break; + default: + ret = -EINVAL; + goto err_unlock; + } break; + default: + ret = -EINVAL; + goto err_unlock; } - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, - this_attr->address, 1, val); - + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr, 1, val); +err_unlock: mutex_unlock(&st->lock); - return ret ? ret : len; + return ret; } static irqreturn_t ad7280_event_handler(int irq, void *private) @@ -875,48 +908,6 @@ static irqreturn_t ad7280_event_handler(int irq, void *private) return IRQ_HANDLED; } -/* Note: No need to fix checkpatch warning that reads: - * CHECK: spaces preferred around that '-' (ctx:VxV) - * The function argument is stringified and doesn't need a fix - */ -static IIO_DEVICE_ATTR_NAMED(in_thresh_low_value, - in_voltage-voltage_thresh_low_value, - 0644, - ad7280_read_channel_config, - ad7280_write_channel_config, - AD7280A_CELL_UNDERVOLTAGE_REG); - -static IIO_DEVICE_ATTR_NAMED(in_thresh_high_value, - in_voltage-voltage_thresh_high_value, - 0644, - ad7280_read_channel_config, - ad7280_write_channel_config, - AD7280A_CELL_OVERVOLTAGE_REG); - -static IIO_DEVICE_ATTR(in_temp_thresh_low_value, - 0644, - ad7280_read_channel_config, - ad7280_write_channel_config, - AD7280A_AUX_ADC_UNDERVOLTAGE_REG); - -static IIO_DEVICE_ATTR(in_temp_thresh_high_value, - 0644, - ad7280_read_channel_config, - ad7280_write_channel_config, - AD7280A_AUX_ADC_OVERVOLTAGE_REG); - -static struct attribute *ad7280_event_attributes[] = { - &iio_dev_attr_in_thresh_low_value.dev_attr.attr, - &iio_dev_attr_in_thresh_high_value.dev_attr.attr, - &iio_dev_attr_in_temp_thresh_low_value.dev_attr.attr, - &iio_dev_attr_in_temp_thresh_high_value.dev_attr.attr, - NULL, -}; - -static const struct attribute_group ad7280_event_attrs_group = { - .attrs = ad7280_event_attributes, -}; - static int ad7280_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, @@ -956,7 +947,8 @@ static int ad7280_read_raw(struct iio_dev *indio_dev, static const struct iio_info ad7280_info = { .read_raw = ad7280_read_raw, - .event_attrs = &ad7280_event_attrs_group, + .read_event_value = &ad7280a_read_thresh, + .write_event_value = &ad7280a_write_thresh, .attrs = &ad7280_attrs_group, }; From patchwork Sun Dec 5 20:27:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657281 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 874AEC433F5 for ; Sun, 5 Dec 2021 20:22:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238510AbhLEUZv (ORCPT ); Sun, 5 Dec 2021 15:25:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55914 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238388AbhLEUZu (ORCPT ); Sun, 5 Dec 2021 15:25:50 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A46AC061714 for ; Sun, 5 Dec 2021 12:22:23 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 095116113C for ; Sun, 5 Dec 2021 20:22:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EC6EFC00446; Sun, 5 Dec 2021 20:22:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735742; bh=MVTGuiPiaa5N5hkqSJxqbRyvbPRBSodlYgk3WJxZlfM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Cd4VL/dUgrWGKibfehGl9pBiVAj/X/Y76mw+jvfPU2Xx2mt2XXsTAU3j8Fa9Y/ev0 epSy6QNLjQ34evggNApgz1w30k0rPgAMugJ+i3Agp1tT5Y0Ku4uN2MSZY2k5QxCHb1 gJCz2Fj1FEzV3li8zo8tgvNlYttHCGWlMcSUk7x8Wjezgxxsr/JaObzEggX27KLS56 hts7wOmOpPSEwvRIB+0ZkndK4M/+AlWpcNIORkcvq3syHSStS3dwFh76xYhOoZwvE1 t2Yf/WP6uV7QmwiZMDEudvgP3rmmhPzwxa8HNgDyA29WjFR+swiaC+OyiW0EhGGZ4v EY4ZYTUdubRXw== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 07/17] staging:iio:adc:ad7280a: Standardize extended ABI naming Date: Sun, 5 Dec 2021 20:27:00 +0000 Message-Id: <20211205202710.2847005-8-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron The *_balance_switch_en and *_balance_switch_timer attributes had non standard prefixes. Use the ext_info framework to automatically create then with in_voltageX-voltageY_ prefix. Documentation for these two unusual attributes to follow. Signed-off-by: Jonathan Cameron Reviewed-by: Marcelo Schmitt --- drivers/staging/iio/adc/ad7280a.c | 174 ++++++++---------------------- 1 file changed, 43 insertions(+), 131 deletions(-) diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 0aeca39388cf..032d6430bebf 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -156,7 +156,6 @@ static unsigned int ad7280a_devaddr(unsigned int addr) struct ad7280_state { struct spi_device *spi; struct iio_chan_spec *channels; - struct iio_dev_attr *iio_attr; int slave_num; int scan_cnt; int readback_delay_us; @@ -447,37 +446,33 @@ static int ad7280_chain_setup(struct ad7280_state *st) return ret; } -static ssize_t ad7280_show_balance_sw(struct device *dev, - struct device_attribute *attr, - char *buf) +static ssize_t ad7280_show_balance_sw(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, char *buf) { - struct iio_dev *indio_dev = dev_to_iio_dev(dev); struct ad7280_state *st = iio_priv(indio_dev); - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); - return sprintf(buf, "%d\n", - !!(st->cb_mask[this_attr->address >> 8] & - (1 << ((this_attr->address & 0xFF) + 2)))); + return sysfs_emit(buf, "%d\n", + !!(st->cb_mask[chan->address >> 8] & + (1 << ((chan->address & 0xFF) + 2)))); } -static ssize_t ad7280_store_balance_sw(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) +static ssize_t ad7280_store_balance_sw(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len) { - struct iio_dev *indio_dev = dev_to_iio_dev(dev); struct ad7280_state *st = iio_priv(indio_dev); - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); + unsigned int devaddr, ch; bool readin; int ret; - unsigned int devaddr, ch; ret = strtobool(buf, &readin); if (ret) return ret; - devaddr = this_attr->address >> 8; - ch = this_attr->address & 0xFF; + devaddr = chan->address >> 8; + ch = chan->address & 0xFF; mutex_lock(&st->lock); if (readin) @@ -492,19 +487,18 @@ static ssize_t ad7280_store_balance_sw(struct device *dev, return ret ? ret : len; } -static ssize_t ad7280_show_balance_timer(struct device *dev, - struct device_attribute *attr, +static ssize_t ad7280_show_balance_timer(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, char *buf) { - struct iio_dev *indio_dev = dev_to_iio_dev(dev); struct ad7280_state *st = iio_priv(indio_dev); - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); - int ret; unsigned int msecs; + int ret; mutex_lock(&st->lock); - ret = ad7280_read_reg(st, this_attr->address >> 8, - this_attr->address & 0xFF); + ret = ad7280_read_reg(st, chan->address >> 8, + (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG); mutex_unlock(&st->lock); if (ret < 0) @@ -512,43 +506,50 @@ static ssize_t ad7280_show_balance_timer(struct device *dev, msecs = FIELD_GET(AD7280A_CB_TIMER_VAL_MSK, ret) * 71500; - return sprintf(buf, "%u\n", msecs); + return sysfs_emit(buf, "%u.%u\n", msecs / 1000, msecs % 1000); } -static ssize_t ad7280_store_balance_timer(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) +static ssize_t ad7280_store_balance_timer(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len) { - struct iio_dev *indio_dev = dev_to_iio_dev(dev); struct ad7280_state *st = iio_priv(indio_dev); - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); - unsigned long val; + int val, val2; int ret; - ret = kstrtoul(buf, 10, &val); + ret = iio_str_to_fixpoint(buf, 1000, &val, &val2); if (ret) return ret; + val = val * 1000 + val2; val /= 71500; if (val > 31) return -EINVAL; mutex_lock(&st->lock); - ret = ad7280_write(st, this_attr->address >> 8, - this_attr->address & 0xFF, 0, + ret = ad7280_write(st, chan->address >> 8, + (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG, 0, FIELD_PREP(AD7280A_CB_TIMER_VAL_MSK, val)); mutex_unlock(&st->lock); return ret ? ret : len; } -static struct attribute *ad7280_attributes[AD7280A_MAX_CHAIN * - AD7280A_CELLS_PER_DEV * 2 + 1]; - -static const struct attribute_group ad7280_attrs_group = { - .attrs = ad7280_attributes, +static const struct iio_chan_spec_ext_info ad7280_cell_ext_info[] = { + { + .name = "balance_switch_en", + .read = ad7280_show_balance_sw, + .write = ad7280_store_balance_sw, + .shared = IIO_SEPARATE, + }, { + .name = "balance_switch_timer", + .read = ad7280_show_balance_timer, + .write = ad7280_store_balance_timer, + .shared = IIO_SEPARATE, + }, + {} }; static const struct iio_event_spec ad7280_events[] = { @@ -571,6 +572,7 @@ static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i) chan->channel2 = chan->channel + 1; chan->event_spec = ad7280_events; chan->num_event_specs = ARRAY_SIZE(ad7280_events); + chan->ext_info = ad7280_cell_ext_info; } static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i) @@ -663,91 +665,6 @@ static int ad7280_channel_init(struct ad7280_state *st) return cnt + 1; } -static int ad7280_balance_switch_attr_init(struct iio_dev_attr *attr, - struct device *dev, int addr, int i) -{ - attr->address = addr; - attr->dev_attr.attr.mode = 0644; - attr->dev_attr.show = ad7280_show_balance_sw; - attr->dev_attr.store = ad7280_store_balance_sw; - attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL, - "in%d-in%d_balance_switch_en", - i, i + 1); - if (!attr->dev_attr.attr.name) - return -ENOMEM; - - return 0; -} - -static int ad7280_balance_timer_attr_init(struct iio_dev_attr *attr, - struct device *dev, int addr, int i) -{ - attr->address = addr; - attr->dev_attr.attr.mode = 0644; - attr->dev_attr.show = ad7280_show_balance_timer; - attr->dev_attr.store = ad7280_store_balance_timer; - attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL, - "in%d-in%d_balance_timer", - i, i + 1); - if (!attr->dev_attr.attr.name) - return -ENOMEM; - - return 0; -} - -static int ad7280_init_dev_attrs(struct ad7280_state *st, int dev, int *cnt) -{ - int addr, ch, i, ret; - struct iio_dev_attr *iio_attr; - struct device *sdev = &st->spi->dev; - - for (ch = AD7280A_CELL_VOLTAGE_1_REG; ch <= AD7280A_CELL_VOLTAGE_6_REG; ch++) { - iio_attr = &st->iio_attr[*cnt]; - addr = ad7280a_devaddr(dev) << 8 | ch; - i = dev * AD7280A_CELLS_PER_DEV + ch; - - ret = ad7280_balance_switch_attr_init(iio_attr, sdev, addr, i); - if (ret < 0) - return ret; - - ad7280_attributes[*cnt] = &iio_attr->dev_attr.attr; - - (*cnt)++; - iio_attr = &st->iio_attr[*cnt]; - addr = ad7280a_devaddr(dev) << 8 | (AD7280A_CB1_TIMER_REG + ch); - - ret = ad7280_balance_timer_attr_init(iio_attr, sdev, addr, i); - if (ret < 0) - return ret; - - ad7280_attributes[*cnt] = &iio_attr->dev_attr.attr; - (*cnt)++; - } - - ad7280_attributes[*cnt] = NULL; - - return 0; -} - -static int ad7280_attr_init(struct ad7280_state *st) -{ - int dev, cnt = 0, ret; - - st->iio_attr = devm_kcalloc(&st->spi->dev, 2, sizeof(*st->iio_attr) * - (st->slave_num + 1) * AD7280A_CELLS_PER_DEV, - GFP_KERNEL); - if (!st->iio_attr) - return -ENOMEM; - - for (dev = 0; dev <= st->slave_num; dev++) { - ret = ad7280_init_dev_attrs(st, dev, &cnt); - if (ret < 0) - return ret; - } - - return 0; -} - static int ad7280a_read_thresh(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, @@ -949,7 +866,6 @@ static const struct iio_info ad7280_info = { .read_raw = ad7280_read_raw, .read_event_value = &ad7280a_read_thresh, .write_event_value = &ad7280a_write_thresh, - .attrs = &ad7280_attrs_group, }; static const struct ad7280_platform_data ad7793_default_pdata = { @@ -1030,10 +946,6 @@ static int ad7280_probe(struct spi_device *spi) indio_dev->channels = st->channels; indio_dev->info = &ad7280_info; - ret = ad7280_attr_init(st); - if (ret < 0) - return ret; - ret = devm_iio_device_register(&spi->dev, indio_dev); if (ret) return ret; From patchwork Sun Dec 5 20:27:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657283 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A83CCC433F5 for ; Sun, 5 Dec 2021 20:22:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238388AbhLEUZx (ORCPT ); Sun, 5 Dec 2021 15:25:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238514AbhLEUZx (ORCPT ); Sun, 5 Dec 2021 15:25:53 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF27BC061714 for ; Sun, 5 Dec 2021 12:22:25 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7CCA46114D for ; Sun, 5 Dec 2021 20:22:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 030FCC341C5; Sun, 5 Dec 2021 20:22:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735744; bh=LMcoZZFv7kpYVBdxLI6Le+bjxU5IQyp2R1ZDGW2mkuc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XdcDoTNborupt7n9Wh63Tg85/e7f+YgAz4LLQJ2DaSKj60EpihueGbhioZh1RxWdc MM7hz7oz46QoO/8B7F3TmTCr8OY9AS3bnSsuvAixfBskiZNmqbptzfH7JSAbaLqicr b3WspntpD5oGAc4n4hgk+4fhlDFEHyDPZ+5pfEZBLmlbJBDuj4Z1WTPf/YVCME59lV Pvr98QxJPRZ58Y1S6wtGtHPW+DByUT+HZnidwPSx3xwdwTx3wDxeWO4qeXZ5usXkRj /ItzhyUlMLRyw/XVYq5yfNFvwbzQk0xGPn1quT0EIPT3gWfGkWtfBsH+yH3JI+wKJ4 Hve2ev3ul+RUg== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 08/17] staging:iio:adc:ad7280a: Drop unused timestamp channel. Date: Sun, 5 Dec 2021 20:27:01 +0000 Message-Id: <20211205202710.2847005-9-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron The driver doesn't support buffered mode, so a timestamp channel that is entirely hidden from userspace without buffer mode is rather pointless. Drop it. Signed-off-by: Jonathan Cameron Reviewed-by: Marcelo Schmitt --- drivers/staging/iio/adc/ad7280a.c | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 032d6430bebf..58bddd07df0c 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -613,16 +613,6 @@ static void ad7280_total_voltage_channel_init(struct iio_chan_spec *chan, chan->scan_type.storagebits = 32; } -static void ad7280_timestamp_channel_init(struct iio_chan_spec *chan, int cnt) -{ - chan->type = IIO_TIMESTAMP; - chan->channel = -1; - chan->scan_index = cnt; - chan->scan_type.sign = 's'; - chan->scan_type.realbits = 64; - chan->scan_type.storagebits = 64; -} - static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt) { int addr, ch, i; @@ -650,7 +640,7 @@ static int ad7280_channel_init(struct ad7280_state *st) { int dev, cnt = 0; - st->channels = devm_kcalloc(&st->spi->dev, (st->slave_num + 1) * 12 + 2, + st->channels = devm_kcalloc(&st->spi->dev, (st->slave_num + 1) * 12 + 1, sizeof(*st->channels), GFP_KERNEL); if (!st->channels) return -ENOMEM; @@ -659,8 +649,6 @@ static int ad7280_channel_init(struct ad7280_state *st) ad7280_init_dev_channels(st, dev, &cnt); ad7280_total_voltage_channel_init(&st->channels[cnt], cnt, dev); - cnt++; - ad7280_timestamp_channel_init(&st->channels[cnt], cnt); return cnt + 1; } From patchwork Sun Dec 5 20:27:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657285 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E3A6C433EF for ; Sun, 5 Dec 2021 20:22:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238514AbhLEUZ5 (ORCPT ); Sun, 5 Dec 2021 15:25:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55938 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238513AbhLEUZ4 (ORCPT ); Sun, 5 Dec 2021 15:25:56 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 57231C061714 for ; Sun, 5 Dec 2021 12:22:29 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 224FFB80EE0 for ; Sun, 5 Dec 2021 20:22:28 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 732B3C00446; Sun, 5 Dec 2021 20:22:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735747; bh=o8Fc8ml/ohNm60JeA0uRxdEFA722yidnfKiCnzbBjs8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JeAk3kMzd9Uhk+M0QpWP46D7yaADsRM5m35ipxUAGpPo3TUSWJwhkBaB1XIRLn63S 8e2oIz3afhjR5zwSZ0twOKMgVgEtZXuPWHYLo1L0OXjWz/Uk5PbGVIj9U+MCEVjAaA 2KWJF/AtpJYOagWsO4jvTr0EFQJki8W2j9Z24oYxb8r1ZFtmFHwQs69YAvIofQkWT0 ZCsuxgUw5kHh3W6iON8vF2V+gSQy0UnYZXDvxiTCDbABtkbIK60TjbO5OngqVvfnVY aGjmTLW3KZIDuVyWiMceCTjx+8/9UPXiy39XPkaproFYASfS7Cuz8pm93P9sX0yq6A G2kMCT4FROdvA== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 09/17] staging:iio:adc:ad7280a: Trivial comment formatting cleanup Date: Sun, 5 Dec 2021 20:27:02 +0000 Message-Id: <20211205202710.2847005-10-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron IIO uses the /* * stuff * more stuff */ multi-line style, so use that here as well. Signed-off-by: Jonathan Cameron Reviewed-by: Marcelo Schmitt --- drivers/staging/iio/adc/ad7280a.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 58bddd07df0c..b186dda03432 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -139,9 +139,10 @@ static unsigned int ad7280a_devaddr(unsigned int addr) ((addr & 0x10) >> 4); } -/* During a read a valid write is mandatory. - * So writing to the highest available address (Address 0x1F) - * and setting the address all parts bit to 0 is recommended +/* + * During a read a valid write is mandatory. + * So writing to the highest available address (Address 0x1F) and setting the + * address all parts bit to 0 is recommended. * So the TXVAL is AD7280A_DEVADDR_ALL + CRC */ #define AD7280A_READ_TXVAL 0xF800030A @@ -180,7 +181,7 @@ static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val) crc = crc_tab[val >> 16 & 0xFF]; crc = crc_tab[crc ^ (val >> 8 & 0xFF)]; - return crc ^ (val & 0xFF); + return crc ^ (val & 0xFF); } static int ad7280_check_crc(struct ad7280_state *st, unsigned int val) @@ -193,12 +194,12 @@ static int ad7280_check_crc(struct ad7280_state *st, unsigned int val) return 0; } -/* After initiating a conversion sequence we need to wait until the - * conversion is done. The delay is typically in the range of 15..30 us - * however depending an the number of devices in the daisy chain and the - * number of averages taken, conversion delays and acquisition time options - * it may take up to 250us, in this case we better sleep instead of busy - * wait. +/* + * After initiating a conversion sequence we need to wait until the conversion + * is done. The delay is typically in the range of 15..30us however depending on + * the number of devices in the daisy chain, the number of averages taken, + * conversion delays and acquisition time options it may take up to 250us, in + * this case we better sleep instead of busy wait. */ static void ad7280_delay(struct ad7280_state *st) From patchwork Sun Dec 5 20:27:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657287 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD56FC433F5 for ; Sun, 5 Dec 2021 20:22:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238513AbhLEUZ7 (ORCPT ); Sun, 5 Dec 2021 15:25:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55948 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238522AbhLEUZ7 (ORCPT ); Sun, 5 Dec 2021 15:25:59 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1709C061714 for ; Sun, 5 Dec 2021 12:22:31 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 67392B80EE4 for ; Sun, 5 Dec 2021 20:22:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9796DC341C5; Sun, 5 Dec 2021 20:22:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735749; bh=JEMY9yfHiPrQH24twfYWEQSOzwn+iV1uZuNKnG5LdVw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pAlxqMSpaGrQZSORwU0H5bmM9RzSGlrVbYoVAL3dKT7pThS1DC2W8cU4OScuFb0wk 2SnlrowCKmOjNTBUckYAvjX5NDi2DPc4+FiBb0tOVAmjrC/g5WH033l5ngUK+swkhv uyls5jkPKCpEpZ51g+AJWjcTAnaVFUFNLAiYsYp5EsKAatWHfXFxJL2gPJg3GmYaHV eoUtBREke13U2esIhLZjb5AjdEQF/4z00pugH/V9/UntUUycHA3r/yaFv3y5hOnZit YhfBJG91POi1UWvxpviacPcLp16f/Q/0hY79/aH/kDZkFTrPzQQJGTWw9XupNof1CG v4Cl5v4eG0D3A== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 10/17] staging:iio:adc:ad7280a: Make oversampling_ratio a runtime control Date: Sun, 5 Dec 2021 20:27:03 +0000 Message-Id: <20211205202710.2847005-11-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron Oversampling has nothing directly to do with analog circuits or similar so belongs in the control of userspace as a policy decision. The only complexity in here was that the acquisition time needs updating if this setting is changed at runtime (as oversampling is time consuming). Signed-off-by: Jonathan Cameron Reviewed-by: Marcelo Schmitt --- drivers/staging/iio/adc/ad7280a.c | 100 +++++++++++++++++++++--------- drivers/staging/iio/adc/ad7280a.h | 6 -- 2 files changed, 72 insertions(+), 34 deletions(-) diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index b186dda03432..90241560f5cf 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -129,6 +129,10 @@ #define AD7280A_DEVADDR_MASTER 0 #define AD7280A_DEVADDR_ALL 0x1F + +static const unsigned short ad7280a_n_avg[4] = {1, 2, 4, 8}; +static const unsigned short ad7280a_t_acq_ns[4] = {465, 1010, 1460, 1890}; + /* 5-bit device address is sent LSB first */ static unsigned int ad7280a_devaddr(unsigned int addr) { @@ -161,7 +165,8 @@ struct ad7280_state { int scan_cnt; int readback_delay_us; unsigned char crc_tab[CRC8_TABLE_SIZE]; - unsigned char ctrl_hb; + u8 oversampling_ratio; + u8 acquisition_time; unsigned char ctrl_lb; unsigned char cell_threshhigh; unsigned char cell_threshlow; @@ -260,7 +265,8 @@ static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr, AD7280A_CTRL_HB_CONV_INPUT_ALL) | FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, AD7280A_CTRL_HB_CONV_RREAD_NO) | - st->ctrl_hb); + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); if (ret) return ret; @@ -270,7 +276,8 @@ static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr, AD7280A_CTRL_HB_CONV_INPUT_ALL) | FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, AD7280A_CTRL_HB_CONV_RREAD_ALL) | - st->ctrl_hb); + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); if (ret) return ret; @@ -310,7 +317,8 @@ static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, AD7280A_CTRL_HB_CONV_INPUT_ALL) | FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, AD7280A_CTRL_HB_CONV_RREAD_NO) | - st->ctrl_hb); + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); if (ret) return ret; @@ -321,7 +329,8 @@ static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, AD7280A_CTRL_HB_CONV_RREAD_ALL) | FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, AD7280A_CTRL_HB_CONV_START_CS) | - st->ctrl_hb); + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); if (ret) return ret; @@ -359,7 +368,8 @@ static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, AD7280A_CTRL_HB_CONV_RREAD_ALL) | FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, AD7280A_CTRL_HB_CONV_START_CS) | - st->ctrl_hb); + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); if (ret) return ret; @@ -389,7 +399,8 @@ static void ad7280_sw_power_down(void *data) struct ad7280_state *st = data; ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, - AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb); + AD7280A_CTRL_HB_PWRDN_SW | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio)); } static int ad7280_chain_setup(struct ad7280_state *st) @@ -442,7 +453,8 @@ static int ad7280_chain_setup(struct ad7280_state *st) error_power_down: ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, - AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb); + AD7280A_CTRL_HB_PWRDN_SW | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio)); return ret; } @@ -590,6 +602,7 @@ static void ad7280_common_fields_init(struct iio_chan_spec *chan, int addr, chan->indexed = 1; chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); + chan->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO); chan->address = addr; chan->scan_index = cnt; chan->scan_type.sign = 'u'; @@ -814,6 +827,26 @@ static irqreturn_t ad7280_event_handler(int irq, void *private) return IRQ_HANDLED; } +static void ad7280_update_delay(struct ad7280_state *st) +{ + /* + * Total Conversion Time = ((tACQ + tCONV) * + * (Number of Conversions per Part)) − + * tACQ + ((N - 1) * tDELAY) + * + * Readback Delay = Total Conversion Time + tWAIT + */ + + st->readback_delay_us = + ((ad7280a_t_acq_ns[st->acquisition_time & 0x3] + 695) * + (AD7280A_NUM_CH * ad7280a_n_avg[st->oversampling_ratio & 0x3])) - + ad7280a_t_acq_ns[st->acquisition_time & 0x3] + st->slave_num * 250; + + /* Convert to usecs */ + st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000); + st->readback_delay_us += 5; /* Add tWAIT */ +} + static int ad7280_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, @@ -847,19 +880,46 @@ static int ad7280_read_raw(struct iio_dev *indio_dev, *val2 = AD7280A_BITS; return IIO_VAL_FRACTIONAL_LOG2; + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + *val = ad7280a_n_avg[st->oversampling_ratio]; + return IIO_VAL_INT; } return -EINVAL; } +static int ad7280_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct ad7280_state *st = iio_priv(indio_dev); + int i; + + switch (mask) { + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + if (val2 != 0) + return -EINVAL; + for (i = 0; i < ARRAY_SIZE(ad7280a_n_avg); i++) { + if (val == ad7280a_n_avg[i]) { + st->oversampling_ratio = i; + ad7280_update_delay(st); + return 0; + } + } + return -EINVAL; + default: + return -EINVAL; + } +} + static const struct iio_info ad7280_info = { .read_raw = ad7280_read_raw, + .write_raw = ad7280_write_raw, .read_event_value = &ad7280a_read_thresh, .write_event_value = &ad7280a_write_thresh, }; static const struct ad7280_platform_data ad7793_default_pdata = { .acquisition_time = AD7280A_ACQ_TIME_400ns, - .conversion_averaging = AD7280A_CONV_AVG_DIS, .thermistor_term_en = true, }; @@ -868,8 +928,6 @@ static int ad7280_probe(struct spi_device *spi) const struct ad7280_platform_data *pdata = dev_get_platdata(&spi->dev); struct ad7280_state *st; int ret; - const unsigned short t_acq_ns[4] = {465, 1010, 1460, 1890}; - const unsigned short n_avg[4] = {1, 2, 4, 8}; struct iio_dev *indio_dev; indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); @@ -892,7 +950,7 @@ static int ad7280_probe(struct spi_device *spi) st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, pdata->acquisition_time) | FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, pdata->thermistor_term_en); - st->ctrl_hb = FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, pdata->conversion_averaging); + st->oversampling_ratio = 0; /* No oversampling */ ret = ad7280_chain_setup(st); if (ret < 0) @@ -902,27 +960,13 @@ static int ad7280_probe(struct spi_device *spi) st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH; st->cell_threshhigh = 0xFF; st->aux_threshhigh = 0xFF; + st->acquisition_time = pdata->acquisition_time; ret = devm_add_action_or_reset(&spi->dev, ad7280_sw_power_down, st); if (ret) return ret; - /* - * Total Conversion Time = ((tACQ + tCONV) * - * (Number of Conversions per Part)) − - * tACQ + ((N - 1) * tDELAY) - * - * Readback Delay = Total Conversion Time + tWAIT - */ - - st->readback_delay_us = - ((t_acq_ns[pdata->acquisition_time & 0x3] + 695) * - (AD7280A_NUM_CH * n_avg[pdata->conversion_averaging & 0x3])) - - t_acq_ns[pdata->acquisition_time & 0x3] + st->slave_num * 250; - - /* Convert to usecs */ - st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000); - st->readback_delay_us += 5; /* Add tWAIT */ + ad7280_update_delay(st); indio_dev->name = spi_get_device_id(spi)->name; indio_dev->modes = INDIO_DIRECT_MODE; diff --git a/drivers/staging/iio/adc/ad7280a.h b/drivers/staging/iio/adc/ad7280a.h index 23f18bb9e279..99297789a46d 100644 --- a/drivers/staging/iio/adc/ad7280a.h +++ b/drivers/staging/iio/adc/ad7280a.h @@ -17,11 +17,6 @@ #define AD7280A_ACQ_TIME_1200ns 2 #define AD7280A_ACQ_TIME_1600ns 3 -#define AD7280A_CONV_AVG_DIS 0 -#define AD7280A_CONV_AVG_2 1 -#define AD7280A_CONV_AVG_4 2 -#define AD7280A_CONV_AVG_8 3 - #define AD7280A_ALERT_REMOVE_VIN5 BIT(2) #define AD7280A_ALERT_REMOVE_VIN4_VIN5 BIT(3) #define AD7280A_ALERT_REMOVE_AUX5 BIT(0) @@ -29,7 +24,6 @@ struct ad7280_platform_data { unsigned int acquisition_time; - unsigned int conversion_averaging; unsigned int chain_last_alert_ignore; bool thermistor_term_en; }; From patchwork Sun Dec 5 20:27:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657289 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CCE63C433EF for ; Sun, 5 Dec 2021 20:22:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238523AbhLEU0B (ORCPT ); Sun, 5 Dec 2021 15:26:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238522AbhLEU0B (ORCPT ); Sun, 5 Dec 2021 15:26:01 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBC04C061714 for ; Sun, 5 Dec 2021 12:22:33 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id B576AB80EE1 for ; Sun, 5 Dec 2021 20:22:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BCD11C341C4; Sun, 5 Dec 2021 20:22:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735751; bh=2ibn75mYvWsIgdONmPWeSmE4cVU6+wj8hGjIlj1XNRQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aNsS8toaLSnEb5XT57XB1eGecQCpziWZW0iWKRulaB0WMj7+PQRMX5oYOB1325ONb LpfNGXBnfGh7MsHcZpM/YV0rbly3M4AMUso1yFvSzAh1GMjbDx5JS06EF2iS3a40Jm MwG4epjJWTgLKkijr3bBOjU9TrFD8/hpGPAPa3+uy7Ccc1aWRhBzeZqIxNzZOnzzto hnEHIDN/b/VepCNKyDOooTBTQlC965BoDR/vpkhpvrn2umNt4kAmioZeUhQRMAvyc5 t3gRJW+jb2QfoDcLgft6ud90xrylndFDfjol2bEXD1NKJa5ZV5R1KDN7S/aDUzleF4 ukEPorfOh3+4g== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 11/17] staging:iio:adc:ad7280a: Cleanup includes Date: Sun, 5 Dec 2021 20:27:04 +0000 Message-Id: <20211205202710.2847005-12-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron Drop used includes, add a few missing ones and reorder. The include-what-you-use tool output was considered in making this change. Signed-off-by: Jonathan Cameron Reviewed-by: Marcelo Schmitt --- drivers/staging/iio/adc/ad7280a.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 90241560f5cf..7f9e2276e41a 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -5,21 +5,23 @@ * Copyright 2011 Analog Devices Inc. */ +#include +#include #include +#include #include +#include +#include #include +#include +#include +#include #include #include #include -#include -#include -#include -#include -#include -#include -#include #include +#include #include "ad7280a.h" From patchwork Sun Dec 5 20:27:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657291 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C2B4C433EF for ; Sun, 5 Dec 2021 20:22:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238524AbhLEU0E (ORCPT ); Sun, 5 Dec 2021 15:26:04 -0500 Received: from ams.source.kernel.org ([145.40.68.75]:43962 "EHLO ams.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238522AbhLEU0D (ORCPT ); Sun, 5 Dec 2021 15:26:03 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 628C3B80EE4 for ; Sun, 5 Dec 2021 20:22:35 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 37F5EC00446; Sun, 5 Dec 2021 20:22:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735754; bh=G81MytdK9j36ogIt9NJOFpXSv57FZ5MWw6vp/4s0ruA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=s7JrEm9yNzIc7LjU9a3sV4C1PbKjUS6HSHF8bIotuJj9rtoIj0gdqrUjYHqIXZaTj o9z0XOY+MejgYcDxULKd+MB7vu1b4Ekmgu2PLhlst+9F9XbFscnCcgb+V7mhhOAvGD 8zVQheE8wnO7QrRkkuVPKHxAHmu5+LlYwFhxzMNcRY+M/x+yAt0d56L/g7i4r6aYLi nINMz86nbdP9GAb1DsUiZShNi5vI8RzTukCcgQfGb6OTv+H/HD2U8SIOn093b7iAPj Og4gjZ9nhrrH+9eh7ruXZbnRLpuFL84CGkwFVZNdZnrEpRHM6Z5OJAfWyih/jOIjKP ZC5bEVA0JUjWg== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 12/17] staging:iio:ad7280a: Reflect optionality of irq in ABI Date: Sun, 5 Dec 2021 20:27:05 +0000 Message-Id: <20211205202710.2847005-13-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron Given the irq is optional, let us remove the interfaces related to events when it is not present. Signed-off-by: Jonathan Cameron Reviewed-by: Marcelo Schmitt --- drivers/staging/iio/adc/ad7280a.c | 48 +++++++++++++++++++------------ 1 file changed, 29 insertions(+), 19 deletions(-) diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 7f9e2276e41a..b4ba6da07af9 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -579,23 +579,29 @@ static const struct iio_event_spec ad7280_events[] = { }, }; -static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i) +static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i, + bool irq_present) { chan->type = IIO_VOLTAGE; chan->differential = 1; chan->channel = i; chan->channel2 = chan->channel + 1; - chan->event_spec = ad7280_events; - chan->num_event_specs = ARRAY_SIZE(ad7280_events); + if (irq_present) { + chan->event_spec = ad7280_events; + chan->num_event_specs = ARRAY_SIZE(ad7280_events); + } chan->ext_info = ad7280_cell_ext_info; } -static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i) +static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i, + bool irq_present) { chan->type = IIO_TEMP; chan->channel = i; - chan->event_spec = ad7280_events; - chan->num_event_specs = ARRAY_SIZE(ad7280_events); + if (irq_present) { + chan->event_spec = ad7280_events; + chan->num_event_specs = ARRAY_SIZE(ad7280_events); + } } static void ad7280_common_fields_init(struct iio_chan_spec *chan, int addr, @@ -629,7 +635,8 @@ static void ad7280_total_voltage_channel_init(struct iio_chan_spec *chan, chan->scan_type.storagebits = 32; } -static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt) +static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt, + bool irq_present) { int addr, ch, i; struct iio_chan_spec *chan; @@ -639,10 +646,10 @@ static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt) if (ch < AD7280A_AUX_ADC_1_REG) { i = AD7280A_CALC_VOLTAGE_CHAN_NUM(dev, ch); - ad7280_voltage_channel_init(chan, i); + ad7280_voltage_channel_init(chan, i, irq_present); } else { i = AD7280A_CALC_TEMP_CHAN_NUM(dev, ch); - ad7280_temp_channel_init(chan, i); + ad7280_temp_channel_init(chan, i, irq_present); } addr = ad7280a_devaddr(dev) << 8 | ch; @@ -652,7 +659,7 @@ static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt) } } -static int ad7280_channel_init(struct ad7280_state *st) +static int ad7280_channel_init(struct ad7280_state *st, bool irq_present) { int dev, cnt = 0; @@ -662,7 +669,7 @@ static int ad7280_channel_init(struct ad7280_state *st) return -ENOMEM; for (dev = 0; dev <= st->slave_num; dev++) - ad7280_init_dev_channels(st, dev, &cnt); + ad7280_init_dev_channels(st, dev, &cnt, irq_present); ad7280_total_voltage_channel_init(&st->channels[cnt], cnt, dev); @@ -920,6 +927,11 @@ static const struct iio_info ad7280_info = { .write_event_value = &ad7280a_write_thresh, }; +static const struct iio_info ad7280_info_no_irq = { + .read_event_value = &ad7280a_read_thresh, + .write_event_value = &ad7280a_write_thresh, +}; + static const struct ad7280_platform_data ad7793_default_pdata = { .acquisition_time = AD7280A_ACQ_TIME_400ns, .thermistor_term_en = true, @@ -973,18 +985,12 @@ static int ad7280_probe(struct spi_device *spi) indio_dev->name = spi_get_device_id(spi)->name; indio_dev->modes = INDIO_DIRECT_MODE; - ret = ad7280_channel_init(st); + ret = ad7280_channel_init(st, spi->irq > 0); if (ret < 0) return ret; indio_dev->num_channels = ret; indio_dev->channels = st->channels; - indio_dev->info = &ad7280_info; - - ret = devm_iio_device_register(&spi->dev, indio_dev); - if (ret) - return ret; - if (spi->irq > 0) { ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_ALERT_REG, 1, @@ -1008,9 +1014,13 @@ static int ad7280_probe(struct spi_device *spi) indio_dev); if (ret) return ret; + + indio_dev->info = &ad7280_info; + } else { + indio_dev->info = &ad7280_info_no_irq; } - return 0; + return devm_iio_device_register(&spi->dev, indio_dev); } static const struct spi_device_id ad7280_id[] = { From patchwork Sun Dec 5 20:27:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657293 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5ADEBC433FE for ; Sun, 5 Dec 2021 20:22:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238535AbhLEU0F (ORCPT ); Sun, 5 Dec 2021 15:26:05 -0500 Received: from dfw.source.kernel.org ([139.178.84.217]:38760 "EHLO dfw.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238522AbhLEU0E (ORCPT ); Sun, 5 Dec 2021 15:26:04 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 427526114C for ; Sun, 5 Dec 2021 20:22:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D9AE0C341C4; Sun, 5 Dec 2021 20:22:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735756; bh=EPR/+ItTrYfx5i7FUwVb0DNwhGltgJGgJ7e4hO2bvK0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ewJojDrnAYs5gtegYLpU2s1eMtaFPoR7T2QrckhzYH8PM+UcPy7yQbDHsgiW7lIjc a+wdp3LwiCmwx/nrPz/Fwqep25DK3mm2c53ulV7c/h61aRuf9/1yqN2+BfkrjDOvyx mS+HYbjHnzwQHx3lXJfj3E8dYW3LJ/ZHdGX8PoycJBKeyv0FFvwa0k1beW+eWNOOYg b0S7mBw7C4kHqCGU9w7ux3WQy58o6PspeRP8QA8CVbZRfOBxV578b4kWtZiovr8GJI s3F+RvNgKGFdyTzKejZKAyA6mEKEB/BkrhP4z9Ont7yQKiTdlfJmE2RnE1O6oCa64I xbPdE+tFzf7PA== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 13/17] staging:iio:adc:ad7280a: Use a local dev pointer to avoid &spi->dev Date: Sun, 5 Dec 2021 20:27:06 +0000 Message-Id: <20211205202710.2847005-14-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron We use this a few times already and it is about to get worse, so introduce a local variable to simplify things. Signed-off-by: Jonathan Cameron Reviewed-by: Marcelo Schmitt --- drivers/staging/iio/adc/ad7280a.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index b4ba6da07af9..acaae1b33986 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -940,11 +940,12 @@ static const struct ad7280_platform_data ad7793_default_pdata = { static int ad7280_probe(struct spi_device *spi) { const struct ad7280_platform_data *pdata = dev_get_platdata(&spi->dev); + struct device *dev = &spi->dev; struct ad7280_state *st; int ret; struct iio_dev *indio_dev; - indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); + indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); if (!indio_dev) return -ENOMEM; @@ -976,7 +977,7 @@ static int ad7280_probe(struct spi_device *spi) st->aux_threshhigh = 0xFF; st->acquisition_time = pdata->acquisition_time; - ret = devm_add_action_or_reset(&spi->dev, ad7280_sw_power_down, st); + ret = devm_add_action_or_reset(dev, ad7280_sw_power_down, st); if (ret) return ret; @@ -1005,7 +1006,7 @@ static int ad7280_probe(struct spi_device *spi) if (ret) return ret; - ret = devm_request_threaded_irq(&spi->dev, spi->irq, + ret = devm_request_threaded_irq(dev, spi->irq, NULL, ad7280_event_handler, IRQF_TRIGGER_FALLING | @@ -1020,7 +1021,7 @@ static int ad7280_probe(struct spi_device *spi) indio_dev->info = &ad7280_info_no_irq; } - return devm_iio_device_register(&spi->dev, indio_dev); + return devm_iio_device_register(dev, indio_dev); } static const struct spi_device_id ad7280_id[] = { From patchwork Sun Dec 5 20:27:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657295 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A89F3C433F5 for ; Sun, 5 Dec 2021 20:22:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238541AbhLEU0J (ORCPT ); Sun, 5 Dec 2021 15:26:09 -0500 Received: from ams.source.kernel.org ([145.40.68.75]:43988 "EHLO ams.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238522AbhLEU0I (ORCPT ); Sun, 5 Dec 2021 15:26:08 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 58437B80EE1 for ; Sun, 5 Dec 2021 20:22:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3D0BBC00446; Sun, 5 Dec 2021 20:22:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735759; bh=bxUSEYES+VES7R00/tJ0afBzIaXlOp+6OpGk+VN7gLA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EePnS/HVIdtEEf78iGPuJeiDXDjR8OTBcljjMFe6bcjlf/Rpml+eKMg4ERiHSE5WH +JBx/Z8iOZy4M3VnZmpxwbkdDUItz7Ug5D6QIgF65O/J/PdltFMHaL+iY9yzNL9qsk IwSRiQUvrTsZE61v3W48+ey/7TJRyeMDPXZKLysZfaRZPd9UjSfAGbm9wsXHHdbBlb RI5/WOr5O2CAaG3TM5N3kkr/6MiHpOSl+rN+KMW7XBisYjlqN8t8XBye069dvSpesb 8QzebJOFegRrWODCsklnT0qD7hjYanttvBqyH45hI+YSSu0AmIoWFf0HOc7cChQ9T+ 483uQJaqKjlyg== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 14/17] staging:iio:adc:ad7280a: Use device properties to replace platform data. Date: Sun, 5 Dec 2021 20:27:07 +0000 Message-Id: <20211205202710.2847005-15-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron Convert all the device specific info that was previously in platform data over to generic firmware query interfaces. dt-bindings to follow shortly. Signed-off-by: Jonathan Cameron --- drivers/staging/iio/adc/ad7280a.c | 100 +++++++++++++++++++++++++----- drivers/staging/iio/adc/ad7280a.h | 31 --------- 2 files changed, 86 insertions(+), 45 deletions(-) diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index acaae1b33986..0806238debe3 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -23,8 +23,6 @@ #include #include -#include "ad7280a.h" - /* Registers */ #define AD7280A_CELL_VOLTAGE_1_REG 0x0 /* D11 to D0, Read only */ @@ -81,6 +79,11 @@ #define AD7280A_AUX_ADC_UNDERVOLTAGE_REG 0x12 /* D7 to D0, Read/write */ #define AD7280A_ALERT_REG 0x13 /* D7 to D0, Read/write */ +#define AD7280A_ALERT_REMOVE_MSK GENMASK(3, 0) +#define AD7280A_ALERT_REMOVE_AUX5 BIT(0) +#define AD7280A_ALERT_REMOVE_AUX4_AUX5 BIT(1) +#define AD7280A_ALERT_REMOVE_VIN5 BIT(2) +#define AD7280A_ALERT_REMOVE_VIN4_VIN5 BIT(3) #define AD7280A_ALERT_GEN_STATIC_HIGH BIT(6) #define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (BIT(7) | BIT(6)) @@ -163,6 +166,8 @@ static unsigned int ad7280a_devaddr(unsigned int addr) struct ad7280_state { struct spi_device *spi; struct iio_chan_spec *channels; + unsigned int chain_last_alert_ignore; + bool thermistor_term_en; int slave_num; int scan_cnt; int readback_delay_us; @@ -932,14 +937,8 @@ static const struct iio_info ad7280_info_no_irq = { .write_event_value = &ad7280a_write_thresh, }; -static const struct ad7280_platform_data ad7793_default_pdata = { - .acquisition_time = AD7280A_ACQ_TIME_400ns, - .thermistor_term_en = true, -}; - static int ad7280_probe(struct spi_device *spi) { - const struct ad7280_platform_data *pdata = dev_get_platdata(&spi->dev); struct device *dev = &spi->dev; struct ad7280_state *st; int ret; @@ -954,17 +953,90 @@ static int ad7280_probe(struct spi_device *spi) st->spi = spi; mutex_init(&st->lock); - if (!pdata) - pdata = &ad7793_default_pdata; + st->thermistor_term_en = + device_property_read_bool(dev, "adi,thermistor-termination"); + + if (device_property_present(dev, "adi,acquistion-time-ns")) { + u32 val; + + ret = device_property_read_u32(dev, "adi,acquisition-time-ns", &val); + if (ret) + return ret; + + switch (val) { + case 400: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns; + break; + case 800: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_800ns; + break; + case 1200: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1200ns; + break; + case 1600: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1600ns; + break; + default: + dev_err(dev, "Firmware provided acquisition time is invalid\n"); + return -EINVAL; + } + } else { + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns; + } + + /* Alert masks are intended for when particular inputs are not wired up */ + if (device_property_present(dev, "adi,voltage-alert-last-chan")) { + u8 val; + ret = device_property_read_u8(dev, "adi,voltage-alert-last-chan", &val); + if (ret) + return ret; + + switch (val) { + case 3: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN4_VIN5; + break; + case 4: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN5; + break; + case 5: + break; + default: + dev_err(dev, + "Firmware provided last voltage alert channel invalid\n"); + break; + } + } + if (device_property_present(dev, "adi,temp-alert-last-chan")) { + u8 val; + + ret = device_property_read_u8(dev, "adi,temp-alert-last-chan", &val); + if (ret) + return ret; + + switch (val) { + case 3: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_AUX4_AUX5; + break; + case 4: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_AUX5; + break; + case 5: + break; + default: + dev_err(dev, + "Firmware provided last temp alert channel invalid\n"); + break; + } + } crc8_populate_msb(st->crc_tab, POLYNOM); st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ; st->spi->mode = SPI_MODE_1; spi_setup(st->spi); - st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, pdata->acquisition_time) | - FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, pdata->thermistor_term_en); + st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, st->acquisition_time) | + FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, st->thermistor_term_en); st->oversampling_ratio = 0; /* No oversampling */ ret = ad7280_chain_setup(st); @@ -975,7 +1047,6 @@ static int ad7280_probe(struct spi_device *spi) st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH; st->cell_threshhigh = 0xFF; st->aux_threshhigh = 0xFF; - st->acquisition_time = pdata->acquisition_time; ret = devm_add_action_or_reset(dev, ad7280_sw_power_down, st); if (ret) @@ -1002,7 +1073,8 @@ static int ad7280_probe(struct spi_device *spi) ret = ad7280_write(st, ad7280a_devaddr(st->slave_num), AD7280A_ALERT_REG, 0, AD7280A_ALERT_GEN_STATIC_HIGH | - (pdata->chain_last_alert_ignore & 0xF)); + FIELD_PREP(AD7280A_ALERT_REMOVE_MSK, + st->chain_last_alert_ignore)); if (ret) return ret; diff --git a/drivers/staging/iio/adc/ad7280a.h b/drivers/staging/iio/adc/ad7280a.h deleted file mode 100644 index 99297789a46d..000000000000 --- a/drivers/staging/iio/adc/ad7280a.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * AD7280A Lithium Ion Battery Monitoring System - * - * Copyright 2011 Analog Devices Inc. - */ - -#ifndef IIO_ADC_AD7280_H_ -#define IIO_ADC_AD7280_H_ - -/* - * TODO: struct ad7280_platform_data needs to go into include/linux/iio - */ - -#define AD7280A_ACQ_TIME_400ns 0 -#define AD7280A_ACQ_TIME_800ns 1 -#define AD7280A_ACQ_TIME_1200ns 2 -#define AD7280A_ACQ_TIME_1600ns 3 - -#define AD7280A_ALERT_REMOVE_VIN5 BIT(2) -#define AD7280A_ALERT_REMOVE_VIN4_VIN5 BIT(3) -#define AD7280A_ALERT_REMOVE_AUX5 BIT(0) -#define AD7280A_ALERT_REMOVE_AUX4_AUX5 BIT(1) - -struct ad7280_platform_data { - unsigned int acquisition_time; - unsigned int chain_last_alert_ignore; - bool thermistor_term_en; -}; - -#endif /* IIO_ADC_AD7280_H_ */ From patchwork Sun Dec 5 20:27:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657297 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3352C433F5 for ; Sun, 5 Dec 2021 20:22:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238538AbhLEU0P (ORCPT ); Sun, 5 Dec 2021 15:26:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55994 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238544AbhLEU0M (ORCPT ); Sun, 5 Dec 2021 15:26:12 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F6F4C061714 for ; Sun, 5 Dec 2021 12:22:44 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 4A124B80EE1 for ; Sun, 5 Dec 2021 20:22:43 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C4DA5C341C5; Sun, 5 Dec 2021 20:22:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735762; bh=Tl3K0skETdc+ojf4Mk0ec5IrJatDzKM8FNFQQ/f0dN8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SU2l2RrIS36N4W0QFxrgyux10iih186Vz8Daqq4+9CxNz6vZR06WsA8Ip/ATaZ9AL OEiU3DcwVLa+7PjHoMI9ofvn365pksgp/+AXpr9tYGb0U9emmlhogm8hH+8XG9K3OD j3hMrGiMStBRU2fWGyAhVDUHB5FdpRQZbKUuaLHNnP2mRYiZWMgt8ZyOFnQodXUUG6 rFY8hpd04C9u0B+iC7SsZZZ9NGnYZjbtqmiCZThQSjcTbwL4UGpyQ5B+KrMDVyFRnR M3W1TALToR6HLnckGOpT21H4vhemP13g1W2rwXIkwdSNP8AcgHckHJGmW8OEAJQ0ia 8Y18O6EbpMnrg== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron , Rob Herring Subject: [PATCH v2 15/17] dt-bindings:iio:adc:ad7280a: Add binding Date: Sun, 5 Dec 2021 20:27:08 +0000 Message-Id: <20211205202710.2847005-16-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron Add a binding for this Lithium Ion Battery monitoring chip/chain of chips as it is now clean and ready to move out of staging. Signed-off-by: Jonathan Cameron Reviewed-by: Rob Herring Reviewed-by: Marcelo Schmitt --- .../bindings/iio/adc/adi,ad7280a.yaml | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml new file mode 100644 index 000000000000..77b8f67fe446 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad7280a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD7280a Lithium Ion Battery Monitoring System + +maintainers: + - Michael Hennerich + - Jonathan Cameron + +description: | + Bindings for the Analog Devices AD7280a Battery Monitoring System. + Used in devices such as hybrid electric cars, battery backup and power tools. + Multiple chips can be daisy chained and accessed via a single SPI interface. + Data sheet found here: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7280A.pdf + +properties: + compatible: + const: adi,ad7280a + + reg: + maxItems: 1 + + interrupts: + description: IRQ line for the ADC + maxItems: 1 + + spi-max-frequency: true + + adi,temp-alert-last-chan: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Allows limiting of scope of which channels are considered for temperature + alerts, typically because not all are wired to anything. Only applies to + last device in the daisy chain. + default: 5 + enum: [3, 4, 5] + + adi,voltage-alert-last-chan: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Allows limiting of scope of which channels are considered for voltage + alerts, typically because not all are wired to anything. Only applies to + last device in the daisy chain. + default: 5 + enum: [3, 4, 5] + + adi,acquisition-time-ns: + description: + Additional time may be needed to charge the sampling capacitors depending + on external writing. + default: 400 + enum: [400, 800, 1200, 1600] + + adi,thermistor-termination: + type: boolean + description: + Enable the thermistor termination function. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad7280a"; + reg = <0>; + spi-max-frequency = <700000>; + interrupt-parent = <&gpio>; + interrupts = <25 2>; + adi,thermistor-termination; + adi,acquisition-time-ns = <800>; + adi,voltage-alert-last-chan = <5>; + adi,temp-alert-last-chan = <5>; + }; + }; +... From patchwork Sun Dec 5 20:27:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657299 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF69BC433EF for ; Sun, 5 Dec 2021 20:22:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238544AbhLEU0Q (ORCPT ); Sun, 5 Dec 2021 15:26:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238522AbhLEU0O (ORCPT ); Sun, 5 Dec 2021 15:26:14 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BD680C061751 for ; Sun, 5 Dec 2021 12:22:46 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 8A9CEB80EE1 for ; Sun, 5 Dec 2021 20:22:45 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BE3AAC341C6; Sun, 5 Dec 2021 20:22:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735764; bh=2Wzwb01ERCMy7uitkQ4YP1uBlPR8YbbuJAii0Jv3yfc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ULN3qRvQABNSuvuF7sDxDeGh53kPd2mnIAmnYDcdKj9Fcs8Ip2wK6L3GNXm0icA18 fRQzpFPVXZVQKc83mdec02lzqrDgXBHPczUIGk43Po6DaECakPOuZaUmNOsD+oT7qw sDZ8mQz18UclhbBQ9leI2WVD3/BnFE7lHemrSmzwScTkOT+EZe0fiYrv6CKkhImpLg I7WmwEPQLtPMBLxJg6IDvaeTo8/pHGY2cs0Ldsp9PoefvmDgGH/vAWH0xk1M0JgPHI iRrkJp3WMUJFhgeUJpYCfZb28xocCZAuHQ6XIEzysJrqAJW68S0ffNXIKNsTO+TX/R JuUpgBmeMIP+g== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 16/17] iio:adc:ad7280a: Document ABI for cell balance switches Date: Sun, 5 Dec 2021 20:27:09 +0000 Message-Id: <20211205202710.2847005-17-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron Very minimal ABI docs. This is unusual enough that I'd expect anyone who actually wanted to touch them to go look at the datasheet. Signed-off-by: Jonathan Cameron Reviewed-by: Marcelo Schmitt --- Documentation/ABI/testing/sysfs-bus-iio-adc-ad7280a | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-iio-adc-ad7280a b/Documentation/ABI/testing/sysfs-bus-iio-adc-ad7280a new file mode 100644 index 000000000000..83b7efe6aa07 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-iio-adc-ad7280a @@ -0,0 +1,13 @@ +What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_balance_switch_en +KernelVersion: 5.14 +Contact: linux-iio@vger.kernel.org +Description: + Used to enable an output for balancing cells for time + controlled via in_voltage_Y-voltageZ_balance_switch_timer. + +What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_balance_switch_timer +KernelVersion: 5.14 +Contact: linux-iio@vger.kernel.org +Description: + Time in seconds for which balance switch will be turned on. + Multiple of 71.5 seconds. From patchwork Sun Dec 5 20:27:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12657301 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9B94C433FE for ; Sun, 5 Dec 2021 20:22:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238522AbhLEU0R (ORCPT ); Sun, 5 Dec 2021 15:26:17 -0500 Received: from dfw.source.kernel.org ([139.178.84.217]:38858 "EHLO dfw.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238556AbhLEU0P (ORCPT ); Sun, 5 Dec 2021 15:26:15 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AC2A96114B for ; Sun, 5 Dec 2021 20:22:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 07326C00446; Sun, 5 Dec 2021 20:22:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638735767; bh=irziXrUBMcxx+uWRmpJYqJh0mPp0N0sSI8rof6SbaD4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=E5U7FEDiJQjDbRb+8S19fIA1oSlWHt/afdD7thtyJ3YtiHWzSHZlOwFZmb27sIsKU dAa53BMG6HiYz8nSpj0QhT8BTPcK+AIcCYMc+qWygdrS9Njq7VIaTzC4RTOIymQY57 ghFRnItVEqR3IemBUaP/4TCKNZF260Bgb2osn+NIoBnDjeGuubY/WExB2vK0Et28ma eNURsdaGIIPUaFunUbIVXpsG9WKcVjouYIpuj5SyunqWsV8OH33e88csk4uqzwGdRr U2khfxo6ISxvhvOXB+6LqIx+/oZCwubDPYl2bBEpJKTaZig/9+ec3uwhalVMwzkoEN rcyb7KyU2Kt3w== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Nuno Sa Cc: Marcelo Schmitt , lars@metafoo.de, Jonathan Cameron Subject: [PATCH v2 17/17] iio:adc:ad7280a: Move out of staging Date: Sun, 5 Dec 2021 20:27:10 +0000 Message-Id: <20211205202710.2847005-18-jic23@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20211205202710.2847005-1-jic23@kernel.org> References: <20211205202710.2847005-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron This is a rather unusual device (in IIO anyway). However, it has a near to standard userspace ABI. Note the work to move this out of staging was done against a minimal QEMU model, which doesn't model all the features of the device. I have no intention to upstream the QEMU model as it was developed just to enable this driver cleanup, but am happy to share it on request. Signed-off-by: Jonathan Cameron --- drivers/iio/adc/Kconfig | 11 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/ad7280a.c | 1116 +++++++++++++++++++++++++++++ drivers/staging/iio/adc/Kconfig | 11 - drivers/staging/iio/adc/Makefile | 1 - drivers/staging/iio/adc/ad7280a.c | 1116 ----------------------------- 6 files changed, 1128 insertions(+), 1128 deletions(-) diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 8bf5b62a73f4..e7906653be87 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -64,6 +64,17 @@ config AD7266 To compile this driver as a module, choose M here: the module will be called ad7266. +config AD7280 + tristate "Analog Devices AD7280A Lithium Ion Battery Monitoring System" + depends on SPI + select CRC8 + help + Say yes here to build support for Analog Devices AD7280A + Lithium Ion Battery Monitoring System. + + To compile this driver as a module, choose M here: the + module will be called ad7280a + config AD7291 tristate "Analog Devices AD7291 ADC driver" depends on I2C diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile index d3f53549720c..e8f8c5b0b6f7 100644 --- a/drivers/iio/adc/Makefile +++ b/drivers/iio/adc/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_AD7091R5) += ad7091r5.o ad7091r-base.o obj-$(CONFIG_AD7124) += ad7124.o obj-$(CONFIG_AD7192) += ad7192.o obj-$(CONFIG_AD7266) += ad7266.o +obj-$(CONFIG_AD7280) += ad7280a.o obj-$(CONFIG_AD7291) += ad7291.o obj-$(CONFIG_AD7292) += ad7292.o obj-$(CONFIG_AD7298) += ad7298.o diff --git a/drivers/iio/adc/ad7280a.c b/drivers/iio/adc/ad7280a.c new file mode 100644 index 000000000000..0806238debe3 --- /dev/null +++ b/drivers/iio/adc/ad7280a.c @@ -0,0 +1,1116 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * AD7280A Lithium Ion Battery Monitoring System + * + * Copyright 2011 Analog Devices Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +/* Registers */ + +#define AD7280A_CELL_VOLTAGE_1_REG 0x0 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_2_REG 0x1 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_3_REG 0x2 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_4_REG 0x3 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_5_REG 0x4 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_6_REG 0x5 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_1_REG 0x6 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_2_REG 0x7 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_3_REG 0x8 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_4_REG 0x9 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_5_REG 0xA /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_6_REG 0xB /* D11 to D0, Read only */ +#define AD7280A_SELF_TEST_REG 0xC /* D11 to D0, Read only */ + +#define AD7280A_CTRL_HB_REG 0xD /* D15 to D8, Read/write */ +#define AD7280A_CTRL_HB_CONV_INPUT_MSK GENMASK(7, 6) +#define AD7280A_CTRL_HB_CONV_INPUT_ALL 0 +#define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4 1 +#define AD7280A_CTRL_HB_CONV_INPUT_6CELL 2 +#define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST 3 +#define AD7280A_CTRL_HB_CONV_RREAD_MSK GENMASK(5, 4) +#define AD7280A_CTRL_HB_CONV_RREAD_ALL 0 +#define AD7280A_CTRL_HB_CONV_RREAD_6CELL_AUX1_3_4 1 +#define AD7280A_CTRL_HB_CONV_RREAD_6CELL 2 +#define AD7280A_CTRL_HB_CONV_RREAD_NO 3 +#define AD7280A_CTRL_HB_CONV_START_MSK BIT(3) +#define AD7280A_CTRL_HB_CONV_START_CNVST 0 +#define AD7280A_CTRL_HB_CONV_START_CS 1 +#define AD7280A_CTRL_HB_CONV_AVG_MSK GENMASK(2, 1) +#define AD7280A_CTRL_HB_CONV_AVG_DIS 0 +#define AD7280A_CTRL_HB_CONV_AVG_2 1 +#define AD7280A_CTRL_HB_CONV_AVG_4 2 +#define AD7280A_CTRL_HB_CONV_AVG_8 3 +#define AD7280A_CTRL_HB_PWRDN_SW BIT(0) + +#define AD7280A_CTRL_LB_REG 0xE /* D7 to D0, Read/write */ +#define AD7280A_CTRL_LB_SWRST_MSK BIT(7) +#define AD7280A_CTRL_LB_ACQ_TIME_MSK GENMASK(6, 5) +#define AD7280A_CTRL_LB_ACQ_TIME_400ns 0 +#define AD7280A_CTRL_LB_ACQ_TIME_800ns 1 +#define AD7280A_CTRL_LB_ACQ_TIME_1200ns 2 +#define AD7280A_CTRL_LB_ACQ_TIME_1600ns 3 +#define AD7280A_CTRL_LB_MUST_SET BIT(4) +#define AD7280A_CTRL_LB_THERMISTOR_MSK BIT(3) +#define AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK BIT(2) +#define AD7280A_CTRL_LB_INC_DEV_ADDR_MSK BIT(1) +#define AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK BIT(0) + +#define AD7280A_CELL_OVERVOLTAGE_REG 0xF /* D7 to D0, Read/write */ +#define AD7280A_CELL_UNDERVOLTAGE_REG 0x10 /* D7 to D0, Read/write */ +#define AD7280A_AUX_ADC_OVERVOLTAGE_REG 0x11 /* D7 to D0, Read/write */ +#define AD7280A_AUX_ADC_UNDERVOLTAGE_REG 0x12 /* D7 to D0, Read/write */ + +#define AD7280A_ALERT_REG 0x13 /* D7 to D0, Read/write */ +#define AD7280A_ALERT_REMOVE_MSK GENMASK(3, 0) +#define AD7280A_ALERT_REMOVE_AUX5 BIT(0) +#define AD7280A_ALERT_REMOVE_AUX4_AUX5 BIT(1) +#define AD7280A_ALERT_REMOVE_VIN5 BIT(2) +#define AD7280A_ALERT_REMOVE_VIN4_VIN5 BIT(3) +#define AD7280A_ALERT_GEN_STATIC_HIGH BIT(6) +#define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (BIT(7) | BIT(6)) + +#define AD7280A_CELL_BALANCE_REG 0x14 /* D7 to D0, Read/write */ +#define AD7280A_CB1_TIMER_REG 0x15 /* D7 to D0, Read/write */ +#define AD7280A_CB_TIMER_VAL_MSK GENMASK(7, 3) +#define AD7280A_CB2_TIMER_REG 0x16 /* D7 to D0, Read/write */ +#define AD7280A_CB3_TIMER_REG 0x17 /* D7 to D0, Read/write */ +#define AD7280A_CB4_TIMER_REG 0x18 /* D7 to D0, Read/write */ +#define AD7280A_CB5_TIMER_REG 0x19 /* D7 to D0, Read/write */ +#define AD7280A_CB6_TIMER_REG 0x1A /* D7 to D0, Read/write */ +#define AD7280A_PD_TIMER_REG 0x1B /* D7 to D0, Read/write */ +#define AD7280A_READ_REG 0x1C /* D7 to D0, Read/write */ +#define AD7280A_READ_ADDR_MSK GENMASK(7, 2) +#define AD7280A_CNVST_CTRL_REG 0x1D /* D7 to D0, Read/write */ + +/* Transfer fields */ +#define AD7280A_TRANS_WRITE_DEVADDR_MSK GENMASK(31, 27) +#define AD7280A_TRANS_WRITE_ADDR_MSK GENMASK(26, 21) +#define AD7280A_TRANS_WRITE_VAL_MSK GENMASK(20, 13) +#define AD7280A_TRANS_WRITE_ALL_MSK BIT(12) +#define AD7280A_TRANS_WRITE_CRC_MSK GENMASK(10, 3) +#define AD7280A_TRANS_WRITE_RES_PATTERN 0x2 + +/* Layouts differ for channel vs other registers */ +#define AD7280A_TRANS_READ_DEVADDR_MSK GENMASK(31, 27) +#define AD7280A_TRANS_READ_CONV_CHANADDR_MSK GENMASK(26, 23) +#define AD7280A_TRANS_READ_CONV_DATA_MSK GENMASK(22, 11) +#define AD7280A_TRANS_READ_REG_REGADDR_MSK GENMASK(26, 21) +#define AD7280A_TRANS_READ_REG_DATA_MSK GENMASK(20, 13) +#define AD7280A_TRANS_READ_WRITE_ACK_MSK BIT(10) +#define AD7280A_TRANS_READ_CRC_MSK GENMASK(9, 2) + +/* Magic value used to indicate this special case */ +#define AD7280A_ALL_CELLS (0xAD << 16) + +#define AD7280A_MAX_SPI_CLK_HZ 700000 /* < 1MHz */ +#define AD7280A_MAX_CHAIN 8 +#define AD7280A_CELLS_PER_DEV 6 +#define AD7280A_BITS 12 +#define AD7280A_NUM_CH (AD7280A_AUX_ADC_6_REG - \ + AD7280A_CELL_VOLTAGE_1_REG + 1) + +#define AD7280A_CALC_VOLTAGE_CHAN_NUM(d, c) (((d) * AD7280A_CELLS_PER_DEV) + \ + (c)) +#define AD7280A_CALC_TEMP_CHAN_NUM(d, c) (((d) * AD7280A_CELLS_PER_DEV) + \ + (c) - AD7280A_CELLS_PER_DEV) + +#define AD7280A_DEVADDR_MASTER 0 +#define AD7280A_DEVADDR_ALL 0x1F + +static const unsigned short ad7280a_n_avg[4] = {1, 2, 4, 8}; +static const unsigned short ad7280a_t_acq_ns[4] = {465, 1010, 1460, 1890}; + +/* 5-bit device address is sent LSB first */ +static unsigned int ad7280a_devaddr(unsigned int addr) +{ + return ((addr & 0x1) << 4) | + ((addr & 0x2) << 2) | + (addr & 0x4) | + ((addr & 0x8) >> 2) | + ((addr & 0x10) >> 4); +} + +/* + * During a read a valid write is mandatory. + * So writing to the highest available address (Address 0x1F) and setting the + * address all parts bit to 0 is recommended. + * So the TXVAL is AD7280A_DEVADDR_ALL + CRC + */ +#define AD7280A_READ_TXVAL 0xF800030A + +/* + * AD7280 CRC + * + * P(x) = x^8 + x^5 + x^3 + x^2 + x^1 + x^0 = 0b100101111 => 0x2F + */ +#define POLYNOM 0x2F + +struct ad7280_state { + struct spi_device *spi; + struct iio_chan_spec *channels; + unsigned int chain_last_alert_ignore; + bool thermistor_term_en; + int slave_num; + int scan_cnt; + int readback_delay_us; + unsigned char crc_tab[CRC8_TABLE_SIZE]; + u8 oversampling_ratio; + u8 acquisition_time; + unsigned char ctrl_lb; + unsigned char cell_threshhigh; + unsigned char cell_threshlow; + unsigned char aux_threshhigh; + unsigned char aux_threshlow; + unsigned char cb_mask[AD7280A_MAX_CHAIN]; + struct mutex lock; /* protect sensor state */ + + __be32 tx ____cacheline_aligned; + __be32 rx; +}; + +static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val) +{ + unsigned char crc; + + crc = crc_tab[val >> 16 & 0xFF]; + crc = crc_tab[crc ^ (val >> 8 & 0xFF)]; + + return crc ^ (val & 0xFF); +} + +static int ad7280_check_crc(struct ad7280_state *st, unsigned int val) +{ + unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10); + + if (crc != ((val >> 2) & 0xFF)) + return -EIO; + + return 0; +} + +/* + * After initiating a conversion sequence we need to wait until the conversion + * is done. The delay is typically in the range of 15..30us however depending on + * the number of devices in the daisy chain, the number of averages taken, + * conversion delays and acquisition time options it may take up to 250us, in + * this case we better sleep instead of busy wait. + */ + +static void ad7280_delay(struct ad7280_state *st) +{ + if (st->readback_delay_us < 50) + udelay(st->readback_delay_us); + else + usleep_range(250, 500); +} + +static int __ad7280_read32(struct ad7280_state *st, unsigned int *val) +{ + int ret; + struct spi_transfer t = { + .tx_buf = &st->tx, + .rx_buf = &st->rx, + .len = sizeof(st->tx), + }; + + st->tx = cpu_to_be32(AD7280A_READ_TXVAL); + + ret = spi_sync_transfer(st->spi, &t, 1); + if (ret) + return ret; + + *val = be32_to_cpu(st->rx); + + return 0; +} + +static int ad7280_write(struct ad7280_state *st, unsigned int devaddr, + unsigned int addr, bool all, unsigned int val) +{ + unsigned int reg = FIELD_PREP(AD7280A_TRANS_WRITE_DEVADDR_MSK, devaddr) | + FIELD_PREP(AD7280A_TRANS_WRITE_ADDR_MSK, addr) | + FIELD_PREP(AD7280A_TRANS_WRITE_VAL_MSK, val) | + FIELD_PREP(AD7280A_TRANS_WRITE_ALL_MSK, all); + + reg |= FIELD_PREP(AD7280A_TRANS_WRITE_CRC_MSK, + ad7280_calc_crc8(st->crc_tab, reg >> 11)); + /* Reserved b010 pattern not included crc calc */ + reg |= AD7280A_TRANS_WRITE_RES_PATTERN; + + st->tx = cpu_to_be32(reg); + + return spi_write(st->spi, &st->tx, sizeof(st->tx)); +} + +static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr, + unsigned int addr) +{ + int ret; + unsigned int tmp; + + /* turns off the read operation on all parts */ + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_NO) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); + if (ret) + return ret; + + /* turns on the read operation on the addressed part */ + ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); + if (ret) + return ret; + + /* Set register address on the part to be read from */ + ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0, + FIELD_PREP(AD7280A_READ_ADDR_MSK, addr)); + if (ret) + return ret; + + ret = __ad7280_read32(st, &tmp); + if (ret) + return ret; + + if (ad7280_check_crc(st, tmp)) + return -EIO; + + if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) || + (FIELD_GET(AD7280A_TRANS_READ_REG_REGADDR_MSK, tmp) != addr)) + return -EFAULT; + + return FIELD_GET(AD7280A_TRANS_READ_REG_DATA_MSK, tmp); +} + +static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, + unsigned int addr) +{ + int ret; + unsigned int tmp; + + ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0, + FIELD_PREP(AD7280A_READ_ADDR_MSK, addr)); + if (ret) + return ret; + + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_NO) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); + if (ret) + return ret; + + ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, + AD7280A_CTRL_HB_CONV_START_CS) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); + if (ret) + return ret; + + ad7280_delay(st); + + ret = __ad7280_read32(st, &tmp); + if (ret) + return ret; + + if (ad7280_check_crc(st, tmp)) + return -EIO; + + if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) || + (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) != addr)) + return -EFAULT; + + return FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp); +} + +static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, + unsigned int *array) +{ + int i, ret; + unsigned int tmp, sum = 0; + + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1, + AD7280A_CELL_VOLTAGE_1_REG << 2); + if (ret) + return ret; + + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, + AD7280A_CTRL_HB_CONV_START_CS) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); + if (ret) + return ret; + + ad7280_delay(st); + + for (i = 0; i < cnt; i++) { + ret = __ad7280_read32(st, &tmp); + if (ret) + return ret; + + if (ad7280_check_crc(st, tmp)) + return -EIO; + + if (array) + array[i] = tmp; + /* only sum cell voltages */ + if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) <= + AD7280A_CELL_VOLTAGE_6_REG) + sum += FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp); + } + + return sum; +} + +static void ad7280_sw_power_down(void *data) +{ + struct ad7280_state *st = data; + + ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + AD7280A_CTRL_HB_PWRDN_SW | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio)); +} + +static int ad7280_chain_setup(struct ad7280_state *st) +{ + unsigned int val, n; + int ret; + + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1, + FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) | + FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) | + AD7280A_CTRL_LB_MUST_SET | + FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 1) | + st->ctrl_lb); + if (ret) + return ret; + + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1, + FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) | + FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) | + AD7280A_CTRL_LB_MUST_SET | + FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 0) | + st->ctrl_lb); + if (ret) + goto error_power_down; + + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1, + FIELD_PREP(AD7280A_READ_ADDR_MSK, AD7280A_CTRL_LB_REG)); + if (ret) + goto error_power_down; + + for (n = 0; n <= AD7280A_MAX_CHAIN; n++) { + ret = __ad7280_read32(st, &val); + if (ret) + goto error_power_down; + + if (val == 0) + return n - 1; + + if (ad7280_check_crc(st, val)) { + ret = -EIO; + goto error_power_down; + } + + if (n != ad7280a_devaddr(FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, val))) { + ret = -EIO; + goto error_power_down; + } + } + ret = -EFAULT; + +error_power_down: + ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + AD7280A_CTRL_HB_PWRDN_SW | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio)); + + return ret; +} + +static ssize_t ad7280_show_balance_sw(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, char *buf) +{ + struct ad7280_state *st = iio_priv(indio_dev); + + return sysfs_emit(buf, "%d\n", + !!(st->cb_mask[chan->address >> 8] & + (1 << ((chan->address & 0xFF) + 2)))); +} + +static ssize_t ad7280_store_balance_sw(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len) +{ + struct ad7280_state *st = iio_priv(indio_dev); + unsigned int devaddr, ch; + bool readin; + int ret; + + ret = strtobool(buf, &readin); + if (ret) + return ret; + + devaddr = chan->address >> 8; + ch = chan->address & 0xFF; + + mutex_lock(&st->lock); + if (readin) + st->cb_mask[devaddr] |= 1 << (ch + 2); + else + st->cb_mask[devaddr] &= ~(1 << (ch + 2)); + + ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE_REG, + 0, st->cb_mask[devaddr]); + mutex_unlock(&st->lock); + + return ret ? ret : len; +} + +static ssize_t ad7280_show_balance_timer(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + char *buf) +{ + struct ad7280_state *st = iio_priv(indio_dev); + unsigned int msecs; + int ret; + + mutex_lock(&st->lock); + ret = ad7280_read_reg(st, chan->address >> 8, + (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + msecs = FIELD_GET(AD7280A_CB_TIMER_VAL_MSK, ret) * 71500; + + return sysfs_emit(buf, "%u.%u\n", msecs / 1000, msecs % 1000); +} + +static ssize_t ad7280_store_balance_timer(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len) +{ + struct ad7280_state *st = iio_priv(indio_dev); + int val, val2; + int ret; + + ret = iio_str_to_fixpoint(buf, 1000, &val, &val2); + if (ret) + return ret; + + val = val * 1000 + val2; + val /= 71500; + + if (val > 31) + return -EINVAL; + + mutex_lock(&st->lock); + ret = ad7280_write(st, chan->address >> 8, + (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG, 0, + FIELD_PREP(AD7280A_CB_TIMER_VAL_MSK, val)); + mutex_unlock(&st->lock); + + return ret ? ret : len; +} + +static const struct iio_chan_spec_ext_info ad7280_cell_ext_info[] = { + { + .name = "balance_switch_en", + .read = ad7280_show_balance_sw, + .write = ad7280_store_balance_sw, + .shared = IIO_SEPARATE, + }, { + .name = "balance_switch_timer", + .read = ad7280_show_balance_timer, + .write = ad7280_store_balance_timer, + .shared = IIO_SEPARATE, + }, + {} +}; + +static const struct iio_event_spec ad7280_events[] = { + { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_RISING, + .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), + }, { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_FALLING, + .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), + }, +}; + +static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i, + bool irq_present) +{ + chan->type = IIO_VOLTAGE; + chan->differential = 1; + chan->channel = i; + chan->channel2 = chan->channel + 1; + if (irq_present) { + chan->event_spec = ad7280_events; + chan->num_event_specs = ARRAY_SIZE(ad7280_events); + } + chan->ext_info = ad7280_cell_ext_info; +} + +static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i, + bool irq_present) +{ + chan->type = IIO_TEMP; + chan->channel = i; + if (irq_present) { + chan->event_spec = ad7280_events; + chan->num_event_specs = ARRAY_SIZE(ad7280_events); + } +} + +static void ad7280_common_fields_init(struct iio_chan_spec *chan, int addr, + int cnt) +{ + chan->indexed = 1; + chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); + chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); + chan->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO); + chan->address = addr; + chan->scan_index = cnt; + chan->scan_type.sign = 'u'; + chan->scan_type.realbits = 12; + chan->scan_type.storagebits = 32; +} + +static void ad7280_total_voltage_channel_init(struct iio_chan_spec *chan, + int cnt, int dev) +{ + chan->type = IIO_VOLTAGE; + chan->differential = 1; + chan->channel = 0; + chan->channel2 = dev * AD7280A_CELLS_PER_DEV; + chan->address = AD7280A_ALL_CELLS; + chan->indexed = 1; + chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); + chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); + chan->scan_index = cnt; + chan->scan_type.sign = 'u'; + chan->scan_type.realbits = 32; + chan->scan_type.storagebits = 32; +} + +static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt, + bool irq_present) +{ + int addr, ch, i; + struct iio_chan_spec *chan; + + for (ch = AD7280A_CELL_VOLTAGE_1_REG; ch <= AD7280A_AUX_ADC_6_REG; ch++) { + chan = &st->channels[*cnt]; + + if (ch < AD7280A_AUX_ADC_1_REG) { + i = AD7280A_CALC_VOLTAGE_CHAN_NUM(dev, ch); + ad7280_voltage_channel_init(chan, i, irq_present); + } else { + i = AD7280A_CALC_TEMP_CHAN_NUM(dev, ch); + ad7280_temp_channel_init(chan, i, irq_present); + } + + addr = ad7280a_devaddr(dev) << 8 | ch; + ad7280_common_fields_init(chan, addr, *cnt); + + (*cnt)++; + } +} + +static int ad7280_channel_init(struct ad7280_state *st, bool irq_present) +{ + int dev, cnt = 0; + + st->channels = devm_kcalloc(&st->spi->dev, (st->slave_num + 1) * 12 + 1, + sizeof(*st->channels), GFP_KERNEL); + if (!st->channels) + return -ENOMEM; + + for (dev = 0; dev <= st->slave_num; dev++) + ad7280_init_dev_channels(st, dev, &cnt, irq_present); + + ad7280_total_voltage_channel_init(&st->channels[cnt], cnt, dev); + + return cnt + 1; +} + +static int ad7280a_read_thresh(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, int *val, int *val2) +{ + struct ad7280_state *st = iio_priv(indio_dev); + + switch (chan->type) { + case IIO_VOLTAGE: + switch (dir) { + case IIO_EV_DIR_RISING: + *val = 1000 + (st->cell_threshhigh * 1568L) / 100; + return IIO_VAL_INT; + case IIO_EV_DIR_FALLING: + *val = 1000 + (st->cell_threshlow * 1568L) / 100; + return IIO_VAL_INT; + default: + return -EINVAL; + } + break; + case IIO_TEMP: + switch (dir) { + case IIO_EV_DIR_RISING: + *val = ((st->aux_threshhigh) * 196L) / 10; + return IIO_VAL_INT; + case IIO_EV_DIR_FALLING: + *val = (st->aux_threshlow * 196L) / 10; + return IIO_VAL_INT; + default: + return -EINVAL; + } + break; + default: + return -EINVAL; + } +} + +static int ad7280a_write_thresh(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int val, int val2) +{ + struct ad7280_state *st = iio_priv(indio_dev); + unsigned int addr; + long value; + int ret; + + if (val2 != 0) + return -EINVAL; + + mutex_lock(&st->lock); + switch (chan->type) { + case IIO_VOLTAGE: + value = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */ + value = clamp(value, 0L, 0xFFL); + switch (dir) { + case IIO_EV_DIR_RISING: + addr = AD7280A_CELL_OVERVOLTAGE_REG; + st->cell_threshhigh = value; + break; + case IIO_EV_DIR_FALLING: + addr = AD7280A_CELL_UNDERVOLTAGE_REG; + st->cell_threshlow = value; + break; + default: + ret = -EINVAL; + goto err_unlock; + } + break; + case IIO_TEMP: + value = (val * 10) / 196; /* LSB 19.6mV */ + value = clamp(value, 0L, 0xFFL); + switch (dir) { + case IIO_EV_DIR_RISING: + addr = AD7280A_AUX_ADC_OVERVOLTAGE_REG; + st->aux_threshhigh = val; + break; + case IIO_EV_DIR_FALLING: + addr = AD7280A_AUX_ADC_UNDERVOLTAGE_REG; + st->aux_threshlow = val; + break; + default: + ret = -EINVAL; + goto err_unlock; + } + break; + default: + ret = -EINVAL; + goto err_unlock; + } + + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr, 1, val); +err_unlock: + mutex_unlock(&st->lock); + + return ret; +} + +static irqreturn_t ad7280_event_handler(int irq, void *private) +{ + struct iio_dev *indio_dev = private; + struct ad7280_state *st = iio_priv(indio_dev); + unsigned int *channels; + int i, ret; + + channels = kcalloc(st->scan_cnt, sizeof(*channels), GFP_KERNEL); + if (!channels) + return IRQ_HANDLED; + + ret = ad7280_read_all_channels(st, st->scan_cnt, channels); + if (ret < 0) + goto out; + + for (i = 0; i < st->scan_cnt; i++) { + unsigned int val; + + val = FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, channels[i]); + if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, channels[i]) + <= AD7280A_CELL_VOLTAGE_6_REG) { + if (val >= st->cell_threshhigh) { + u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0, + IIO_EV_DIR_RISING, + IIO_EV_TYPE_THRESH, + 0, 0, 0); + iio_push_event(indio_dev, tmp, + iio_get_time_ns(indio_dev)); + } else if (val <= st->cell_threshlow) { + u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0, + IIO_EV_DIR_FALLING, + IIO_EV_TYPE_THRESH, + 0, 0, 0); + iio_push_event(indio_dev, tmp, + iio_get_time_ns(indio_dev)); + } + } else { + if (val >= st->aux_threshhigh) { + u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_RISING); + iio_push_event(indio_dev, tmp, + iio_get_time_ns(indio_dev)); + } else if (val <= st->aux_threshlow) { + u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_FALLING); + iio_push_event(indio_dev, tmp, + iio_get_time_ns(indio_dev)); + } + } + } + +out: + kfree(channels); + + return IRQ_HANDLED; +} + +static void ad7280_update_delay(struct ad7280_state *st) +{ + /* + * Total Conversion Time = ((tACQ + tCONV) * + * (Number of Conversions per Part)) − + * tACQ + ((N - 1) * tDELAY) + * + * Readback Delay = Total Conversion Time + tWAIT + */ + + st->readback_delay_us = + ((ad7280a_t_acq_ns[st->acquisition_time & 0x3] + 695) * + (AD7280A_NUM_CH * ad7280a_n_avg[st->oversampling_ratio & 0x3])) - + ad7280a_t_acq_ns[st->acquisition_time & 0x3] + st->slave_num * 250; + + /* Convert to usecs */ + st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000); + st->readback_delay_us += 5; /* Add tWAIT */ +} + +static int ad7280_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, + int *val2, + long m) +{ + struct ad7280_state *st = iio_priv(indio_dev); + int ret; + + switch (m) { + case IIO_CHAN_INFO_RAW: + mutex_lock(&st->lock); + if (chan->address == AD7280A_ALL_CELLS) + ret = ad7280_read_all_channels(st, st->scan_cnt, NULL); + else + ret = ad7280_read_channel(st, chan->address >> 8, + chan->address & 0xFF); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + *val = ret; + + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6_REG) + *val = 4000; + else + *val = 5000; + + *val2 = AD7280A_BITS; + return IIO_VAL_FRACTIONAL_LOG2; + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + *val = ad7280a_n_avg[st->oversampling_ratio]; + return IIO_VAL_INT; + } + return -EINVAL; +} + +static int ad7280_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct ad7280_state *st = iio_priv(indio_dev); + int i; + + switch (mask) { + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + if (val2 != 0) + return -EINVAL; + for (i = 0; i < ARRAY_SIZE(ad7280a_n_avg); i++) { + if (val == ad7280a_n_avg[i]) { + st->oversampling_ratio = i; + ad7280_update_delay(st); + return 0; + } + } + return -EINVAL; + default: + return -EINVAL; + } +} + +static const struct iio_info ad7280_info = { + .read_raw = ad7280_read_raw, + .write_raw = ad7280_write_raw, + .read_event_value = &ad7280a_read_thresh, + .write_event_value = &ad7280a_write_thresh, +}; + +static const struct iio_info ad7280_info_no_irq = { + .read_event_value = &ad7280a_read_thresh, + .write_event_value = &ad7280a_write_thresh, +}; + +static int ad7280_probe(struct spi_device *spi) +{ + struct device *dev = &spi->dev; + struct ad7280_state *st; + int ret; + struct iio_dev *indio_dev; + + indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); + if (!indio_dev) + return -ENOMEM; + + st = iio_priv(indio_dev); + spi_set_drvdata(spi, indio_dev); + st->spi = spi; + mutex_init(&st->lock); + + st->thermistor_term_en = + device_property_read_bool(dev, "adi,thermistor-termination"); + + if (device_property_present(dev, "adi,acquistion-time-ns")) { + u32 val; + + ret = device_property_read_u32(dev, "adi,acquisition-time-ns", &val); + if (ret) + return ret; + + switch (val) { + case 400: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns; + break; + case 800: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_800ns; + break; + case 1200: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1200ns; + break; + case 1600: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1600ns; + break; + default: + dev_err(dev, "Firmware provided acquisition time is invalid\n"); + return -EINVAL; + } + } else { + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns; + } + + /* Alert masks are intended for when particular inputs are not wired up */ + if (device_property_present(dev, "adi,voltage-alert-last-chan")) { + u8 val; + + ret = device_property_read_u8(dev, "adi,voltage-alert-last-chan", &val); + if (ret) + return ret; + + switch (val) { + case 3: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN4_VIN5; + break; + case 4: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN5; + break; + case 5: + break; + default: + dev_err(dev, + "Firmware provided last voltage alert channel invalid\n"); + break; + } + } + if (device_property_present(dev, "adi,temp-alert-last-chan")) { + u8 val; + + ret = device_property_read_u8(dev, "adi,temp-alert-last-chan", &val); + if (ret) + return ret; + + switch (val) { + case 3: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_AUX4_AUX5; + break; + case 4: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_AUX5; + break; + case 5: + break; + default: + dev_err(dev, + "Firmware provided last temp alert channel invalid\n"); + break; + } + } + crc8_populate_msb(st->crc_tab, POLYNOM); + + st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ; + st->spi->mode = SPI_MODE_1; + spi_setup(st->spi); + + st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, st->acquisition_time) | + FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, st->thermistor_term_en); + st->oversampling_ratio = 0; /* No oversampling */ + + ret = ad7280_chain_setup(st); + if (ret < 0) + return ret; + + st->slave_num = ret; + st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH; + st->cell_threshhigh = 0xFF; + st->aux_threshhigh = 0xFF; + + ret = devm_add_action_or_reset(dev, ad7280_sw_power_down, st); + if (ret) + return ret; + + ad7280_update_delay(st); + + indio_dev->name = spi_get_device_id(spi)->name; + indio_dev->modes = INDIO_DIRECT_MODE; + + ret = ad7280_channel_init(st, spi->irq > 0); + if (ret < 0) + return ret; + + indio_dev->num_channels = ret; + indio_dev->channels = st->channels; + if (spi->irq > 0) { + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, + AD7280A_ALERT_REG, 1, + AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN); + if (ret) + return ret; + + ret = ad7280_write(st, ad7280a_devaddr(st->slave_num), + AD7280A_ALERT_REG, 0, + AD7280A_ALERT_GEN_STATIC_HIGH | + FIELD_PREP(AD7280A_ALERT_REMOVE_MSK, + st->chain_last_alert_ignore)); + if (ret) + return ret; + + ret = devm_request_threaded_irq(dev, spi->irq, + NULL, + ad7280_event_handler, + IRQF_TRIGGER_FALLING | + IRQF_ONESHOT, + indio_dev->name, + indio_dev); + if (ret) + return ret; + + indio_dev->info = &ad7280_info; + } else { + indio_dev->info = &ad7280_info_no_irq; + } + + return devm_iio_device_register(dev, indio_dev); +} + +static const struct spi_device_id ad7280_id[] = { + {"ad7280a", 0}, + {} +}; +MODULE_DEVICE_TABLE(spi, ad7280_id); + +static struct spi_driver ad7280_driver = { + .driver = { + .name = "ad7280", + }, + .probe = ad7280_probe, + .id_table = ad7280_id, +}; +module_spi_driver(ad7280_driver); + +MODULE_AUTHOR("Michael Hennerich "); +MODULE_DESCRIPTION("Analog Devices AD7280A"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/iio/adc/Kconfig b/drivers/staging/iio/adc/Kconfig index b25f41053fac..2f0d6cf048d2 100644 --- a/drivers/staging/iio/adc/Kconfig +++ b/drivers/staging/iio/adc/Kconfig @@ -15,15 +15,4 @@ config AD7816 To compile this driver as a module, choose M here: the module will be called ad7816. -config AD7280 - tristate "Analog Devices AD7280A Lithium Ion Battery Monitoring System" - depends on SPI - select CRC8 - help - Say yes here to build support for Analog Devices AD7280A - Lithium Ion Battery Monitoring System. - - To compile this driver as a module, choose M here: the - module will be called ad7280a - endmenu diff --git a/drivers/staging/iio/adc/Makefile b/drivers/staging/iio/adc/Makefile index 6436a62b6278..1e2a94c4db84 100644 --- a/drivers/staging/iio/adc/Makefile +++ b/drivers/staging/iio/adc/Makefile @@ -4,4 +4,3 @@ # obj-$(CONFIG_AD7816) += ad7816.o -obj-$(CONFIG_AD7280) += ad7280a.o diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c deleted file mode 100644 index 0806238debe3..000000000000 --- a/drivers/staging/iio/adc/ad7280a.c +++ /dev/null @@ -1,1116 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * AD7280A Lithium Ion Battery Monitoring System - * - * Copyright 2011 Analog Devices Inc. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -/* Registers */ - -#define AD7280A_CELL_VOLTAGE_1_REG 0x0 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_2_REG 0x1 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_3_REG 0x2 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_4_REG 0x3 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_5_REG 0x4 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_6_REG 0x5 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_1_REG 0x6 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_2_REG 0x7 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_3_REG 0x8 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_4_REG 0x9 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_5_REG 0xA /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_6_REG 0xB /* D11 to D0, Read only */ -#define AD7280A_SELF_TEST_REG 0xC /* D11 to D0, Read only */ - -#define AD7280A_CTRL_HB_REG 0xD /* D15 to D8, Read/write */ -#define AD7280A_CTRL_HB_CONV_INPUT_MSK GENMASK(7, 6) -#define AD7280A_CTRL_HB_CONV_INPUT_ALL 0 -#define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4 1 -#define AD7280A_CTRL_HB_CONV_INPUT_6CELL 2 -#define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST 3 -#define AD7280A_CTRL_HB_CONV_RREAD_MSK GENMASK(5, 4) -#define AD7280A_CTRL_HB_CONV_RREAD_ALL 0 -#define AD7280A_CTRL_HB_CONV_RREAD_6CELL_AUX1_3_4 1 -#define AD7280A_CTRL_HB_CONV_RREAD_6CELL 2 -#define AD7280A_CTRL_HB_CONV_RREAD_NO 3 -#define AD7280A_CTRL_HB_CONV_START_MSK BIT(3) -#define AD7280A_CTRL_HB_CONV_START_CNVST 0 -#define AD7280A_CTRL_HB_CONV_START_CS 1 -#define AD7280A_CTRL_HB_CONV_AVG_MSK GENMASK(2, 1) -#define AD7280A_CTRL_HB_CONV_AVG_DIS 0 -#define AD7280A_CTRL_HB_CONV_AVG_2 1 -#define AD7280A_CTRL_HB_CONV_AVG_4 2 -#define AD7280A_CTRL_HB_CONV_AVG_8 3 -#define AD7280A_CTRL_HB_PWRDN_SW BIT(0) - -#define AD7280A_CTRL_LB_REG 0xE /* D7 to D0, Read/write */ -#define AD7280A_CTRL_LB_SWRST_MSK BIT(7) -#define AD7280A_CTRL_LB_ACQ_TIME_MSK GENMASK(6, 5) -#define AD7280A_CTRL_LB_ACQ_TIME_400ns 0 -#define AD7280A_CTRL_LB_ACQ_TIME_800ns 1 -#define AD7280A_CTRL_LB_ACQ_TIME_1200ns 2 -#define AD7280A_CTRL_LB_ACQ_TIME_1600ns 3 -#define AD7280A_CTRL_LB_MUST_SET BIT(4) -#define AD7280A_CTRL_LB_THERMISTOR_MSK BIT(3) -#define AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK BIT(2) -#define AD7280A_CTRL_LB_INC_DEV_ADDR_MSK BIT(1) -#define AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK BIT(0) - -#define AD7280A_CELL_OVERVOLTAGE_REG 0xF /* D7 to D0, Read/write */ -#define AD7280A_CELL_UNDERVOLTAGE_REG 0x10 /* D7 to D0, Read/write */ -#define AD7280A_AUX_ADC_OVERVOLTAGE_REG 0x11 /* D7 to D0, Read/write */ -#define AD7280A_AUX_ADC_UNDERVOLTAGE_REG 0x12 /* D7 to D0, Read/write */ - -#define AD7280A_ALERT_REG 0x13 /* D7 to D0, Read/write */ -#define AD7280A_ALERT_REMOVE_MSK GENMASK(3, 0) -#define AD7280A_ALERT_REMOVE_AUX5 BIT(0) -#define AD7280A_ALERT_REMOVE_AUX4_AUX5 BIT(1) -#define AD7280A_ALERT_REMOVE_VIN5 BIT(2) -#define AD7280A_ALERT_REMOVE_VIN4_VIN5 BIT(3) -#define AD7280A_ALERT_GEN_STATIC_HIGH BIT(6) -#define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (BIT(7) | BIT(6)) - -#define AD7280A_CELL_BALANCE_REG 0x14 /* D7 to D0, Read/write */ -#define AD7280A_CB1_TIMER_REG 0x15 /* D7 to D0, Read/write */ -#define AD7280A_CB_TIMER_VAL_MSK GENMASK(7, 3) -#define AD7280A_CB2_TIMER_REG 0x16 /* D7 to D0, Read/write */ -#define AD7280A_CB3_TIMER_REG 0x17 /* D7 to D0, Read/write */ -#define AD7280A_CB4_TIMER_REG 0x18 /* D7 to D0, Read/write */ -#define AD7280A_CB5_TIMER_REG 0x19 /* D7 to D0, Read/write */ -#define AD7280A_CB6_TIMER_REG 0x1A /* D7 to D0, Read/write */ -#define AD7280A_PD_TIMER_REG 0x1B /* D7 to D0, Read/write */ -#define AD7280A_READ_REG 0x1C /* D7 to D0, Read/write */ -#define AD7280A_READ_ADDR_MSK GENMASK(7, 2) -#define AD7280A_CNVST_CTRL_REG 0x1D /* D7 to D0, Read/write */ - -/* Transfer fields */ -#define AD7280A_TRANS_WRITE_DEVADDR_MSK GENMASK(31, 27) -#define AD7280A_TRANS_WRITE_ADDR_MSK GENMASK(26, 21) -#define AD7280A_TRANS_WRITE_VAL_MSK GENMASK(20, 13) -#define AD7280A_TRANS_WRITE_ALL_MSK BIT(12) -#define AD7280A_TRANS_WRITE_CRC_MSK GENMASK(10, 3) -#define AD7280A_TRANS_WRITE_RES_PATTERN 0x2 - -/* Layouts differ for channel vs other registers */ -#define AD7280A_TRANS_READ_DEVADDR_MSK GENMASK(31, 27) -#define AD7280A_TRANS_READ_CONV_CHANADDR_MSK GENMASK(26, 23) -#define AD7280A_TRANS_READ_CONV_DATA_MSK GENMASK(22, 11) -#define AD7280A_TRANS_READ_REG_REGADDR_MSK GENMASK(26, 21) -#define AD7280A_TRANS_READ_REG_DATA_MSK GENMASK(20, 13) -#define AD7280A_TRANS_READ_WRITE_ACK_MSK BIT(10) -#define AD7280A_TRANS_READ_CRC_MSK GENMASK(9, 2) - -/* Magic value used to indicate this special case */ -#define AD7280A_ALL_CELLS (0xAD << 16) - -#define AD7280A_MAX_SPI_CLK_HZ 700000 /* < 1MHz */ -#define AD7280A_MAX_CHAIN 8 -#define AD7280A_CELLS_PER_DEV 6 -#define AD7280A_BITS 12 -#define AD7280A_NUM_CH (AD7280A_AUX_ADC_6_REG - \ - AD7280A_CELL_VOLTAGE_1_REG + 1) - -#define AD7280A_CALC_VOLTAGE_CHAN_NUM(d, c) (((d) * AD7280A_CELLS_PER_DEV) + \ - (c)) -#define AD7280A_CALC_TEMP_CHAN_NUM(d, c) (((d) * AD7280A_CELLS_PER_DEV) + \ - (c) - AD7280A_CELLS_PER_DEV) - -#define AD7280A_DEVADDR_MASTER 0 -#define AD7280A_DEVADDR_ALL 0x1F - -static const unsigned short ad7280a_n_avg[4] = {1, 2, 4, 8}; -static const unsigned short ad7280a_t_acq_ns[4] = {465, 1010, 1460, 1890}; - -/* 5-bit device address is sent LSB first */ -static unsigned int ad7280a_devaddr(unsigned int addr) -{ - return ((addr & 0x1) << 4) | - ((addr & 0x2) << 2) | - (addr & 0x4) | - ((addr & 0x8) >> 2) | - ((addr & 0x10) >> 4); -} - -/* - * During a read a valid write is mandatory. - * So writing to the highest available address (Address 0x1F) and setting the - * address all parts bit to 0 is recommended. - * So the TXVAL is AD7280A_DEVADDR_ALL + CRC - */ -#define AD7280A_READ_TXVAL 0xF800030A - -/* - * AD7280 CRC - * - * P(x) = x^8 + x^5 + x^3 + x^2 + x^1 + x^0 = 0b100101111 => 0x2F - */ -#define POLYNOM 0x2F - -struct ad7280_state { - struct spi_device *spi; - struct iio_chan_spec *channels; - unsigned int chain_last_alert_ignore; - bool thermistor_term_en; - int slave_num; - int scan_cnt; - int readback_delay_us; - unsigned char crc_tab[CRC8_TABLE_SIZE]; - u8 oversampling_ratio; - u8 acquisition_time; - unsigned char ctrl_lb; - unsigned char cell_threshhigh; - unsigned char cell_threshlow; - unsigned char aux_threshhigh; - unsigned char aux_threshlow; - unsigned char cb_mask[AD7280A_MAX_CHAIN]; - struct mutex lock; /* protect sensor state */ - - __be32 tx ____cacheline_aligned; - __be32 rx; -}; - -static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val) -{ - unsigned char crc; - - crc = crc_tab[val >> 16 & 0xFF]; - crc = crc_tab[crc ^ (val >> 8 & 0xFF)]; - - return crc ^ (val & 0xFF); -} - -static int ad7280_check_crc(struct ad7280_state *st, unsigned int val) -{ - unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10); - - if (crc != ((val >> 2) & 0xFF)) - return -EIO; - - return 0; -} - -/* - * After initiating a conversion sequence we need to wait until the conversion - * is done. The delay is typically in the range of 15..30us however depending on - * the number of devices in the daisy chain, the number of averages taken, - * conversion delays and acquisition time options it may take up to 250us, in - * this case we better sleep instead of busy wait. - */ - -static void ad7280_delay(struct ad7280_state *st) -{ - if (st->readback_delay_us < 50) - udelay(st->readback_delay_us); - else - usleep_range(250, 500); -} - -static int __ad7280_read32(struct ad7280_state *st, unsigned int *val) -{ - int ret; - struct spi_transfer t = { - .tx_buf = &st->tx, - .rx_buf = &st->rx, - .len = sizeof(st->tx), - }; - - st->tx = cpu_to_be32(AD7280A_READ_TXVAL); - - ret = spi_sync_transfer(st->spi, &t, 1); - if (ret) - return ret; - - *val = be32_to_cpu(st->rx); - - return 0; -} - -static int ad7280_write(struct ad7280_state *st, unsigned int devaddr, - unsigned int addr, bool all, unsigned int val) -{ - unsigned int reg = FIELD_PREP(AD7280A_TRANS_WRITE_DEVADDR_MSK, devaddr) | - FIELD_PREP(AD7280A_TRANS_WRITE_ADDR_MSK, addr) | - FIELD_PREP(AD7280A_TRANS_WRITE_VAL_MSK, val) | - FIELD_PREP(AD7280A_TRANS_WRITE_ALL_MSK, all); - - reg |= FIELD_PREP(AD7280A_TRANS_WRITE_CRC_MSK, - ad7280_calc_crc8(st->crc_tab, reg >> 11)); - /* Reserved b010 pattern not included crc calc */ - reg |= AD7280A_TRANS_WRITE_RES_PATTERN; - - st->tx = cpu_to_be32(reg); - - return spi_write(st->spi, &st->tx, sizeof(st->tx)); -} - -static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr, - unsigned int addr) -{ - int ret; - unsigned int tmp; - - /* turns off the read operation on all parts */ - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, - FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, - AD7280A_CTRL_HB_CONV_INPUT_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, - AD7280A_CTRL_HB_CONV_RREAD_NO) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, - st->oversampling_ratio)); - if (ret) - return ret; - - /* turns on the read operation on the addressed part */ - ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0, - FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, - AD7280A_CTRL_HB_CONV_INPUT_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, - AD7280A_CTRL_HB_CONV_RREAD_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, - st->oversampling_ratio)); - if (ret) - return ret; - - /* Set register address on the part to be read from */ - ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0, - FIELD_PREP(AD7280A_READ_ADDR_MSK, addr)); - if (ret) - return ret; - - ret = __ad7280_read32(st, &tmp); - if (ret) - return ret; - - if (ad7280_check_crc(st, tmp)) - return -EIO; - - if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) || - (FIELD_GET(AD7280A_TRANS_READ_REG_REGADDR_MSK, tmp) != addr)) - return -EFAULT; - - return FIELD_GET(AD7280A_TRANS_READ_REG_DATA_MSK, tmp); -} - -static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, - unsigned int addr) -{ - int ret; - unsigned int tmp; - - ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0, - FIELD_PREP(AD7280A_READ_ADDR_MSK, addr)); - if (ret) - return ret; - - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, - FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, - AD7280A_CTRL_HB_CONV_INPUT_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, - AD7280A_CTRL_HB_CONV_RREAD_NO) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, - st->oversampling_ratio)); - if (ret) - return ret; - - ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0, - FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, - AD7280A_CTRL_HB_CONV_INPUT_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, - AD7280A_CTRL_HB_CONV_RREAD_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, - AD7280A_CTRL_HB_CONV_START_CS) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, - st->oversampling_ratio)); - if (ret) - return ret; - - ad7280_delay(st); - - ret = __ad7280_read32(st, &tmp); - if (ret) - return ret; - - if (ad7280_check_crc(st, tmp)) - return -EIO; - - if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) || - (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) != addr)) - return -EFAULT; - - return FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp); -} - -static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, - unsigned int *array) -{ - int i, ret; - unsigned int tmp, sum = 0; - - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1, - AD7280A_CELL_VOLTAGE_1_REG << 2); - if (ret) - return ret; - - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, - FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, - AD7280A_CTRL_HB_CONV_INPUT_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, - AD7280A_CTRL_HB_CONV_RREAD_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, - AD7280A_CTRL_HB_CONV_START_CS) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, - st->oversampling_ratio)); - if (ret) - return ret; - - ad7280_delay(st); - - for (i = 0; i < cnt; i++) { - ret = __ad7280_read32(st, &tmp); - if (ret) - return ret; - - if (ad7280_check_crc(st, tmp)) - return -EIO; - - if (array) - array[i] = tmp; - /* only sum cell voltages */ - if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) <= - AD7280A_CELL_VOLTAGE_6_REG) - sum += FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp); - } - - return sum; -} - -static void ad7280_sw_power_down(void *data) -{ - struct ad7280_state *st = data; - - ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, - AD7280A_CTRL_HB_PWRDN_SW | - FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio)); -} - -static int ad7280_chain_setup(struct ad7280_state *st) -{ - unsigned int val, n; - int ret; - - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1, - FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) | - FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) | - AD7280A_CTRL_LB_MUST_SET | - FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 1) | - st->ctrl_lb); - if (ret) - return ret; - - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1, - FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) | - FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) | - AD7280A_CTRL_LB_MUST_SET | - FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 0) | - st->ctrl_lb); - if (ret) - goto error_power_down; - - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1, - FIELD_PREP(AD7280A_READ_ADDR_MSK, AD7280A_CTRL_LB_REG)); - if (ret) - goto error_power_down; - - for (n = 0; n <= AD7280A_MAX_CHAIN; n++) { - ret = __ad7280_read32(st, &val); - if (ret) - goto error_power_down; - - if (val == 0) - return n - 1; - - if (ad7280_check_crc(st, val)) { - ret = -EIO; - goto error_power_down; - } - - if (n != ad7280a_devaddr(FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, val))) { - ret = -EIO; - goto error_power_down; - } - } - ret = -EFAULT; - -error_power_down: - ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, - AD7280A_CTRL_HB_PWRDN_SW | - FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio)); - - return ret; -} - -static ssize_t ad7280_show_balance_sw(struct iio_dev *indio_dev, - uintptr_t private, - const struct iio_chan_spec *chan, char *buf) -{ - struct ad7280_state *st = iio_priv(indio_dev); - - return sysfs_emit(buf, "%d\n", - !!(st->cb_mask[chan->address >> 8] & - (1 << ((chan->address & 0xFF) + 2)))); -} - -static ssize_t ad7280_store_balance_sw(struct iio_dev *indio_dev, - uintptr_t private, - const struct iio_chan_spec *chan, - const char *buf, size_t len) -{ - struct ad7280_state *st = iio_priv(indio_dev); - unsigned int devaddr, ch; - bool readin; - int ret; - - ret = strtobool(buf, &readin); - if (ret) - return ret; - - devaddr = chan->address >> 8; - ch = chan->address & 0xFF; - - mutex_lock(&st->lock); - if (readin) - st->cb_mask[devaddr] |= 1 << (ch + 2); - else - st->cb_mask[devaddr] &= ~(1 << (ch + 2)); - - ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE_REG, - 0, st->cb_mask[devaddr]); - mutex_unlock(&st->lock); - - return ret ? ret : len; -} - -static ssize_t ad7280_show_balance_timer(struct iio_dev *indio_dev, - uintptr_t private, - const struct iio_chan_spec *chan, - char *buf) -{ - struct ad7280_state *st = iio_priv(indio_dev); - unsigned int msecs; - int ret; - - mutex_lock(&st->lock); - ret = ad7280_read_reg(st, chan->address >> 8, - (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG); - mutex_unlock(&st->lock); - - if (ret < 0) - return ret; - - msecs = FIELD_GET(AD7280A_CB_TIMER_VAL_MSK, ret) * 71500; - - return sysfs_emit(buf, "%u.%u\n", msecs / 1000, msecs % 1000); -} - -static ssize_t ad7280_store_balance_timer(struct iio_dev *indio_dev, - uintptr_t private, - const struct iio_chan_spec *chan, - const char *buf, size_t len) -{ - struct ad7280_state *st = iio_priv(indio_dev); - int val, val2; - int ret; - - ret = iio_str_to_fixpoint(buf, 1000, &val, &val2); - if (ret) - return ret; - - val = val * 1000 + val2; - val /= 71500; - - if (val > 31) - return -EINVAL; - - mutex_lock(&st->lock); - ret = ad7280_write(st, chan->address >> 8, - (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG, 0, - FIELD_PREP(AD7280A_CB_TIMER_VAL_MSK, val)); - mutex_unlock(&st->lock); - - return ret ? ret : len; -} - -static const struct iio_chan_spec_ext_info ad7280_cell_ext_info[] = { - { - .name = "balance_switch_en", - .read = ad7280_show_balance_sw, - .write = ad7280_store_balance_sw, - .shared = IIO_SEPARATE, - }, { - .name = "balance_switch_timer", - .read = ad7280_show_balance_timer, - .write = ad7280_store_balance_timer, - .shared = IIO_SEPARATE, - }, - {} -}; - -static const struct iio_event_spec ad7280_events[] = { - { - .type = IIO_EV_TYPE_THRESH, - .dir = IIO_EV_DIR_RISING, - .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), - }, { - .type = IIO_EV_TYPE_THRESH, - .dir = IIO_EV_DIR_FALLING, - .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), - }, -}; - -static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i, - bool irq_present) -{ - chan->type = IIO_VOLTAGE; - chan->differential = 1; - chan->channel = i; - chan->channel2 = chan->channel + 1; - if (irq_present) { - chan->event_spec = ad7280_events; - chan->num_event_specs = ARRAY_SIZE(ad7280_events); - } - chan->ext_info = ad7280_cell_ext_info; -} - -static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i, - bool irq_present) -{ - chan->type = IIO_TEMP; - chan->channel = i; - if (irq_present) { - chan->event_spec = ad7280_events; - chan->num_event_specs = ARRAY_SIZE(ad7280_events); - } -} - -static void ad7280_common_fields_init(struct iio_chan_spec *chan, int addr, - int cnt) -{ - chan->indexed = 1; - chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); - chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); - chan->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO); - chan->address = addr; - chan->scan_index = cnt; - chan->scan_type.sign = 'u'; - chan->scan_type.realbits = 12; - chan->scan_type.storagebits = 32; -} - -static void ad7280_total_voltage_channel_init(struct iio_chan_spec *chan, - int cnt, int dev) -{ - chan->type = IIO_VOLTAGE; - chan->differential = 1; - chan->channel = 0; - chan->channel2 = dev * AD7280A_CELLS_PER_DEV; - chan->address = AD7280A_ALL_CELLS; - chan->indexed = 1; - chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); - chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); - chan->scan_index = cnt; - chan->scan_type.sign = 'u'; - chan->scan_type.realbits = 32; - chan->scan_type.storagebits = 32; -} - -static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt, - bool irq_present) -{ - int addr, ch, i; - struct iio_chan_spec *chan; - - for (ch = AD7280A_CELL_VOLTAGE_1_REG; ch <= AD7280A_AUX_ADC_6_REG; ch++) { - chan = &st->channels[*cnt]; - - if (ch < AD7280A_AUX_ADC_1_REG) { - i = AD7280A_CALC_VOLTAGE_CHAN_NUM(dev, ch); - ad7280_voltage_channel_init(chan, i, irq_present); - } else { - i = AD7280A_CALC_TEMP_CHAN_NUM(dev, ch); - ad7280_temp_channel_init(chan, i, irq_present); - } - - addr = ad7280a_devaddr(dev) << 8 | ch; - ad7280_common_fields_init(chan, addr, *cnt); - - (*cnt)++; - } -} - -static int ad7280_channel_init(struct ad7280_state *st, bool irq_present) -{ - int dev, cnt = 0; - - st->channels = devm_kcalloc(&st->spi->dev, (st->slave_num + 1) * 12 + 1, - sizeof(*st->channels), GFP_KERNEL); - if (!st->channels) - return -ENOMEM; - - for (dev = 0; dev <= st->slave_num; dev++) - ad7280_init_dev_channels(st, dev, &cnt, irq_present); - - ad7280_total_voltage_channel_init(&st->channels[cnt], cnt, dev); - - return cnt + 1; -} - -static int ad7280a_read_thresh(struct iio_dev *indio_dev, - const struct iio_chan_spec *chan, - enum iio_event_type type, - enum iio_event_direction dir, - enum iio_event_info info, int *val, int *val2) -{ - struct ad7280_state *st = iio_priv(indio_dev); - - switch (chan->type) { - case IIO_VOLTAGE: - switch (dir) { - case IIO_EV_DIR_RISING: - *val = 1000 + (st->cell_threshhigh * 1568L) / 100; - return IIO_VAL_INT; - case IIO_EV_DIR_FALLING: - *val = 1000 + (st->cell_threshlow * 1568L) / 100; - return IIO_VAL_INT; - default: - return -EINVAL; - } - break; - case IIO_TEMP: - switch (dir) { - case IIO_EV_DIR_RISING: - *val = ((st->aux_threshhigh) * 196L) / 10; - return IIO_VAL_INT; - case IIO_EV_DIR_FALLING: - *val = (st->aux_threshlow * 196L) / 10; - return IIO_VAL_INT; - default: - return -EINVAL; - } - break; - default: - return -EINVAL; - } -} - -static int ad7280a_write_thresh(struct iio_dev *indio_dev, - const struct iio_chan_spec *chan, - enum iio_event_type type, - enum iio_event_direction dir, - enum iio_event_info info, - int val, int val2) -{ - struct ad7280_state *st = iio_priv(indio_dev); - unsigned int addr; - long value; - int ret; - - if (val2 != 0) - return -EINVAL; - - mutex_lock(&st->lock); - switch (chan->type) { - case IIO_VOLTAGE: - value = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */ - value = clamp(value, 0L, 0xFFL); - switch (dir) { - case IIO_EV_DIR_RISING: - addr = AD7280A_CELL_OVERVOLTAGE_REG; - st->cell_threshhigh = value; - break; - case IIO_EV_DIR_FALLING: - addr = AD7280A_CELL_UNDERVOLTAGE_REG; - st->cell_threshlow = value; - break; - default: - ret = -EINVAL; - goto err_unlock; - } - break; - case IIO_TEMP: - value = (val * 10) / 196; /* LSB 19.6mV */ - value = clamp(value, 0L, 0xFFL); - switch (dir) { - case IIO_EV_DIR_RISING: - addr = AD7280A_AUX_ADC_OVERVOLTAGE_REG; - st->aux_threshhigh = val; - break; - case IIO_EV_DIR_FALLING: - addr = AD7280A_AUX_ADC_UNDERVOLTAGE_REG; - st->aux_threshlow = val; - break; - default: - ret = -EINVAL; - goto err_unlock; - } - break; - default: - ret = -EINVAL; - goto err_unlock; - } - - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr, 1, val); -err_unlock: - mutex_unlock(&st->lock); - - return ret; -} - -static irqreturn_t ad7280_event_handler(int irq, void *private) -{ - struct iio_dev *indio_dev = private; - struct ad7280_state *st = iio_priv(indio_dev); - unsigned int *channels; - int i, ret; - - channels = kcalloc(st->scan_cnt, sizeof(*channels), GFP_KERNEL); - if (!channels) - return IRQ_HANDLED; - - ret = ad7280_read_all_channels(st, st->scan_cnt, channels); - if (ret < 0) - goto out; - - for (i = 0; i < st->scan_cnt; i++) { - unsigned int val; - - val = FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, channels[i]); - if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, channels[i]) - <= AD7280A_CELL_VOLTAGE_6_REG) { - if (val >= st->cell_threshhigh) { - u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0, - IIO_EV_DIR_RISING, - IIO_EV_TYPE_THRESH, - 0, 0, 0); - iio_push_event(indio_dev, tmp, - iio_get_time_ns(indio_dev)); - } else if (val <= st->cell_threshlow) { - u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0, - IIO_EV_DIR_FALLING, - IIO_EV_TYPE_THRESH, - 0, 0, 0); - iio_push_event(indio_dev, tmp, - iio_get_time_ns(indio_dev)); - } - } else { - if (val >= st->aux_threshhigh) { - u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0, - IIO_EV_TYPE_THRESH, - IIO_EV_DIR_RISING); - iio_push_event(indio_dev, tmp, - iio_get_time_ns(indio_dev)); - } else if (val <= st->aux_threshlow) { - u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0, - IIO_EV_TYPE_THRESH, - IIO_EV_DIR_FALLING); - iio_push_event(indio_dev, tmp, - iio_get_time_ns(indio_dev)); - } - } - } - -out: - kfree(channels); - - return IRQ_HANDLED; -} - -static void ad7280_update_delay(struct ad7280_state *st) -{ - /* - * Total Conversion Time = ((tACQ + tCONV) * - * (Number of Conversions per Part)) − - * tACQ + ((N - 1) * tDELAY) - * - * Readback Delay = Total Conversion Time + tWAIT - */ - - st->readback_delay_us = - ((ad7280a_t_acq_ns[st->acquisition_time & 0x3] + 695) * - (AD7280A_NUM_CH * ad7280a_n_avg[st->oversampling_ratio & 0x3])) - - ad7280a_t_acq_ns[st->acquisition_time & 0x3] + st->slave_num * 250; - - /* Convert to usecs */ - st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000); - st->readback_delay_us += 5; /* Add tWAIT */ -} - -static int ad7280_read_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - int *val, - int *val2, - long m) -{ - struct ad7280_state *st = iio_priv(indio_dev); - int ret; - - switch (m) { - case IIO_CHAN_INFO_RAW: - mutex_lock(&st->lock); - if (chan->address == AD7280A_ALL_CELLS) - ret = ad7280_read_all_channels(st, st->scan_cnt, NULL); - else - ret = ad7280_read_channel(st, chan->address >> 8, - chan->address & 0xFF); - mutex_unlock(&st->lock); - - if (ret < 0) - return ret; - - *val = ret; - - return IIO_VAL_INT; - case IIO_CHAN_INFO_SCALE: - if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6_REG) - *val = 4000; - else - *val = 5000; - - *val2 = AD7280A_BITS; - return IIO_VAL_FRACTIONAL_LOG2; - case IIO_CHAN_INFO_OVERSAMPLING_RATIO: - *val = ad7280a_n_avg[st->oversampling_ratio]; - return IIO_VAL_INT; - } - return -EINVAL; -} - -static int ad7280_write_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - int val, int val2, long mask) -{ - struct ad7280_state *st = iio_priv(indio_dev); - int i; - - switch (mask) { - case IIO_CHAN_INFO_OVERSAMPLING_RATIO: - if (val2 != 0) - return -EINVAL; - for (i = 0; i < ARRAY_SIZE(ad7280a_n_avg); i++) { - if (val == ad7280a_n_avg[i]) { - st->oversampling_ratio = i; - ad7280_update_delay(st); - return 0; - } - } - return -EINVAL; - default: - return -EINVAL; - } -} - -static const struct iio_info ad7280_info = { - .read_raw = ad7280_read_raw, - .write_raw = ad7280_write_raw, - .read_event_value = &ad7280a_read_thresh, - .write_event_value = &ad7280a_write_thresh, -}; - -static const struct iio_info ad7280_info_no_irq = { - .read_event_value = &ad7280a_read_thresh, - .write_event_value = &ad7280a_write_thresh, -}; - -static int ad7280_probe(struct spi_device *spi) -{ - struct device *dev = &spi->dev; - struct ad7280_state *st; - int ret; - struct iio_dev *indio_dev; - - indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); - if (!indio_dev) - return -ENOMEM; - - st = iio_priv(indio_dev); - spi_set_drvdata(spi, indio_dev); - st->spi = spi; - mutex_init(&st->lock); - - st->thermistor_term_en = - device_property_read_bool(dev, "adi,thermistor-termination"); - - if (device_property_present(dev, "adi,acquistion-time-ns")) { - u32 val; - - ret = device_property_read_u32(dev, "adi,acquisition-time-ns", &val); - if (ret) - return ret; - - switch (val) { - case 400: - st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns; - break; - case 800: - st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_800ns; - break; - case 1200: - st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1200ns; - break; - case 1600: - st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1600ns; - break; - default: - dev_err(dev, "Firmware provided acquisition time is invalid\n"); - return -EINVAL; - } - } else { - st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns; - } - - /* Alert masks are intended for when particular inputs are not wired up */ - if (device_property_present(dev, "adi,voltage-alert-last-chan")) { - u8 val; - - ret = device_property_read_u8(dev, "adi,voltage-alert-last-chan", &val); - if (ret) - return ret; - - switch (val) { - case 3: - st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN4_VIN5; - break; - case 4: - st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN5; - break; - case 5: - break; - default: - dev_err(dev, - "Firmware provided last voltage alert channel invalid\n"); - break; - } - } - if (device_property_present(dev, "adi,temp-alert-last-chan")) { - u8 val; - - ret = device_property_read_u8(dev, "adi,temp-alert-last-chan", &val); - if (ret) - return ret; - - switch (val) { - case 3: - st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_AUX4_AUX5; - break; - case 4: - st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_AUX5; - break; - case 5: - break; - default: - dev_err(dev, - "Firmware provided last temp alert channel invalid\n"); - break; - } - } - crc8_populate_msb(st->crc_tab, POLYNOM); - - st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ; - st->spi->mode = SPI_MODE_1; - spi_setup(st->spi); - - st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, st->acquisition_time) | - FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, st->thermistor_term_en); - st->oversampling_ratio = 0; /* No oversampling */ - - ret = ad7280_chain_setup(st); - if (ret < 0) - return ret; - - st->slave_num = ret; - st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH; - st->cell_threshhigh = 0xFF; - st->aux_threshhigh = 0xFF; - - ret = devm_add_action_or_reset(dev, ad7280_sw_power_down, st); - if (ret) - return ret; - - ad7280_update_delay(st); - - indio_dev->name = spi_get_device_id(spi)->name; - indio_dev->modes = INDIO_DIRECT_MODE; - - ret = ad7280_channel_init(st, spi->irq > 0); - if (ret < 0) - return ret; - - indio_dev->num_channels = ret; - indio_dev->channels = st->channels; - if (spi->irq > 0) { - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, - AD7280A_ALERT_REG, 1, - AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN); - if (ret) - return ret; - - ret = ad7280_write(st, ad7280a_devaddr(st->slave_num), - AD7280A_ALERT_REG, 0, - AD7280A_ALERT_GEN_STATIC_HIGH | - FIELD_PREP(AD7280A_ALERT_REMOVE_MSK, - st->chain_last_alert_ignore)); - if (ret) - return ret; - - ret = devm_request_threaded_irq(dev, spi->irq, - NULL, - ad7280_event_handler, - IRQF_TRIGGER_FALLING | - IRQF_ONESHOT, - indio_dev->name, - indio_dev); - if (ret) - return ret; - - indio_dev->info = &ad7280_info; - } else { - indio_dev->info = &ad7280_info_no_irq; - } - - return devm_iio_device_register(dev, indio_dev); -} - -static const struct spi_device_id ad7280_id[] = { - {"ad7280a", 0}, - {} -}; -MODULE_DEVICE_TABLE(spi, ad7280_id); - -static struct spi_driver ad7280_driver = { - .driver = { - .name = "ad7280", - }, - .probe = ad7280_probe, - .id_table = ad7280_id, -}; -module_spi_driver(ad7280_driver); - -MODULE_AUTHOR("Michael Hennerich "); -MODULE_DESCRIPTION("Analog Devices AD7280A"); -MODULE_LICENSE("GPL v2");