From patchwork Tue Dec 7 14:59:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12662035 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A395AC4332F for ; Tue, 7 Dec 2021 14:59:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238412AbhLGPD1 (ORCPT ); Tue, 7 Dec 2021 10:03:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52092 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238397AbhLGPD0 (ORCPT ); Tue, 7 Dec 2021 10:03:26 -0500 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 919FDC061574; Tue, 7 Dec 2021 06:59:55 -0800 (PST) Received: by mail-ed1-x534.google.com with SMTP id o20so58127155eds.10; Tue, 07 Dec 2021 06:59:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vnLY6KdcrRoSIU2HsNb3g6e/hZnKqFQfK2cCOCiEGu8=; b=FwlswY2kH0PP3CjZJuneVkfGs3NCjIJsQyRrjYR/7s9LpdX01sqKgcq3n2aEGMyo/f qjNQHxWkOwqgJqOJNGv4F+/eX90I+OYGhTVIiDpUTG1YZYtwfjvq37vZGP1iagNRglUR OW01dVn4KXijRCL/S2XmlLg3hK/pW3LxWm1xGor9bRkup7QKIP+RDMw1CrMNd1YZ+5sQ 1KsJugM/jsCvcY1r+/TyQAvgbMtTJqo22dfQJeqiXcbIOr63xkmNjGk4N5AtyU7i1YJq GEhwg7juvR7QEEmPNhOGL03Bdz1wyPOtGtJV5vz1Nyo6bS5znyNbj/UDgNCLCBeuh/Fx jqjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vnLY6KdcrRoSIU2HsNb3g6e/hZnKqFQfK2cCOCiEGu8=; b=pSZBwvAXMYD8YEREZqizFgBQ2QI4oiO61W3b5SU/37IQRoOgOOGaG7c+gxY4hSyEAV Pd9n+f1wb2HdttPsHjg2ptmqN9g5keiWcjdPak7KNgE9erHladEZ5ROqnhw4dCR1YUzB 2TC3YYhh4oviVG7W5ccE3eNKOWbiaDMndlo7iht/v2nZazMG3RoUPlNjyWL6aQ8aYO+c 54C4vC1+7/RLHtoq5ZbZh4mxwR2+X0wcYWzkE+up9pCkZy0hu3JUHCH+Hk1kI2Xq93// MjbqOPGuiCkjWhu1bo68PF4+RXQTIMRi1/Xnqmili5jgN5IrgbF6mpGwt4LGHlvlqQFp rBQQ== X-Gm-Message-State: AOAM533wYdQHBvvicH0tcEOyLOJ+ZXgOXNIbWGKvGwEAK2JOSsSGABBT 4vEeY55jdJZIOGAJ+3lHOyM= X-Google-Smtp-Source: ABdhPJzmC2umJwzvGZ/4s0BrQHaubd1tXdCf12pHZVYYNOPKeba6nbpSZxa7R+M9dvFYZs4aZMRyww== X-Received: by 2002:a05:6402:270a:: with SMTP id y10mr10120374edd.152.1638889194067; Tue, 07 Dec 2021 06:59:54 -0800 (PST) Received: from localhost.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id i10sm9131821ejw.48.2021.12.07.06.59.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Dec 2021 06:59:53 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [net-next RFC PATCH 1/6] net: dsa: tag_qca: convert to FIELD macro Date: Tue, 7 Dec 2021 15:59:37 +0100 Message-Id: <20211207145942.7444-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211207145942.7444-1-ansuelsmth@gmail.com> References: <20211207145942.7444-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Convert driver to FIELD macro to drop redundant define. Signed-off-by: Ansuel Smith --- net/dsa/tag_qca.c | 34 +++++++++++++++------------------- 1 file changed, 15 insertions(+), 19 deletions(-) diff --git a/net/dsa/tag_qca.c b/net/dsa/tag_qca.c index 1ea9401b8ace..55fa6b96b4eb 100644 --- a/net/dsa/tag_qca.c +++ b/net/dsa/tag_qca.c @@ -4,29 +4,24 @@ */ #include +#include #include "dsa_priv.h" #define QCA_HDR_LEN 2 #define QCA_HDR_VERSION 0x2 -#define QCA_HDR_RECV_VERSION_MASK GENMASK(15, 14) -#define QCA_HDR_RECV_VERSION_S 14 -#define QCA_HDR_RECV_PRIORITY_MASK GENMASK(13, 11) -#define QCA_HDR_RECV_PRIORITY_S 11 -#define QCA_HDR_RECV_TYPE_MASK GENMASK(10, 6) -#define QCA_HDR_RECV_TYPE_S 6 +#define QCA_HDR_RECV_VERSION GENMASK(15, 14) +#define QCA_HDR_RECV_PRIORITY GENMASK(13, 11) +#define QCA_HDR_RECV_TYPE GENMASK(10, 6) #define QCA_HDR_RECV_FRAME_IS_TAGGED BIT(3) -#define QCA_HDR_RECV_SOURCE_PORT_MASK GENMASK(2, 0) - -#define QCA_HDR_XMIT_VERSION_MASK GENMASK(15, 14) -#define QCA_HDR_XMIT_VERSION_S 14 -#define QCA_HDR_XMIT_PRIORITY_MASK GENMASK(13, 11) -#define QCA_HDR_XMIT_PRIORITY_S 11 -#define QCA_HDR_XMIT_CONTROL_MASK GENMASK(10, 8) -#define QCA_HDR_XMIT_CONTROL_S 8 +#define QCA_HDR_RECV_SOURCE_PORT GENMASK(2, 0) + +#define QCA_HDR_XMIT_VERSION GENMASK(15, 14) +#define QCA_HDR_XMIT_PRIORITY GENMASK(13, 11) +#define QCA_HDR_XMIT_CONTROL GENMASK(10, 8) #define QCA_HDR_XMIT_FROM_CPU BIT(7) -#define QCA_HDR_XMIT_DP_BIT_MASK GENMASK(6, 0) +#define QCA_HDR_XMIT_DP_BIT GENMASK(6, 0) static struct sk_buff *qca_tag_xmit(struct sk_buff *skb, struct net_device *dev) { @@ -40,8 +35,9 @@ static struct sk_buff *qca_tag_xmit(struct sk_buff *skb, struct net_device *dev) phdr = dsa_etype_header_pos_tx(skb); /* Set the version field, and set destination port information */ - hdr = QCA_HDR_VERSION << QCA_HDR_XMIT_VERSION_S | - QCA_HDR_XMIT_FROM_CPU | BIT(dp->index); + hdr = FIELD_PREP(QCA_HDR_XMIT_VERSION, QCA_HDR_VERSION); + hdr |= QCA_HDR_XMIT_FROM_CPU; + hdr |= FIELD_PREP(QCA_HDR_XMIT_DP_BIT, BIT(dp->index)); *phdr = htons(hdr); @@ -62,7 +58,7 @@ static struct sk_buff *qca_tag_rcv(struct sk_buff *skb, struct net_device *dev) hdr = ntohs(*phdr); /* Make sure the version is correct */ - ver = (hdr & QCA_HDR_RECV_VERSION_MASK) >> QCA_HDR_RECV_VERSION_S; + ver = FIELD_GET(QCA_HDR_RECV_VERSION, hdr); if (unlikely(ver != QCA_HDR_VERSION)) return NULL; @@ -71,7 +67,7 @@ static struct sk_buff *qca_tag_rcv(struct sk_buff *skb, struct net_device *dev) dsa_strip_etype_header(skb, QCA_HDR_LEN); /* Get source port information */ - port = (hdr & QCA_HDR_RECV_SOURCE_PORT_MASK); + port = FIELD_GET(QCA_HDR_RECV_SOURCE_PORT, hdr); skb->dev = dsa_master_find_slave(dev, 0, port); if (!skb->dev) From patchwork Tue Dec 7 14:59:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12662037 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4121DC433EF for ; Tue, 7 Dec 2021 15:00:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238435AbhLGPD2 (ORCPT ); Tue, 7 Dec 2021 10:03:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52096 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233407AbhLGPD1 (ORCPT ); Tue, 7 Dec 2021 10:03:27 -0500 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 747EDC061574; Tue, 7 Dec 2021 06:59:56 -0800 (PST) Received: by mail-ed1-x52c.google.com with SMTP id w1so57969741edc.6; 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id i10sm9131821ejw.48.2021.12.07.06.59.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Dec 2021 06:59:54 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [net-next RFC PATCH 2/6] net: dsa: tag_qca: move define to include linux/dsa Date: Tue, 7 Dec 2021 15:59:38 +0100 Message-Id: <20211207145942.7444-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211207145942.7444-1-ansuelsmth@gmail.com> References: <20211207145942.7444-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Move tag_qca define to include dir linux/dsa as the qca8k require access to the tagger define to support in-band mdio read/write using ethernet packet. Signed-off-by: Ansuel Smith --- include/linux/dsa/tag_qca.h | 21 +++++++++++++++++++++ net/dsa/tag_qca.c | 16 +--------------- 2 files changed, 22 insertions(+), 15 deletions(-) create mode 100644 include/linux/dsa/tag_qca.h diff --git a/include/linux/dsa/tag_qca.h b/include/linux/dsa/tag_qca.h new file mode 100644 index 000000000000..c02d2d39ff4a --- /dev/null +++ b/include/linux/dsa/tag_qca.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __TAG_QCA_H +#define __TAG_QCA_H + +#define QCA_HDR_LEN 2 +#define QCA_HDR_VERSION 0x2 + +#define QCA_HDR_RECV_VERSION GENMASK(15, 14) +#define QCA_HDR_RECV_PRIORITY GENMASK(13, 11) +#define QCA_HDR_RECV_TYPE GENMASK(10, 6) +#define QCA_HDR_RECV_FRAME_IS_TAGGED BIT(3) +#define QCA_HDR_RECV_SOURCE_PORT GENMASK(2, 0) + +#define QCA_HDR_XMIT_VERSION GENMASK(15, 14) +#define QCA_HDR_XMIT_PRIORITY GENMASK(13, 11) +#define QCA_HDR_XMIT_CONTROL GENMASK(10, 8) +#define QCA_HDR_XMIT_FROM_CPU BIT(7) +#define QCA_HDR_XMIT_DP_BIT GENMASK(6, 0) + +#endif /* __TAG_QCA_H */ diff --git a/net/dsa/tag_qca.c b/net/dsa/tag_qca.c index 55fa6b96b4eb..34e565e00ece 100644 --- a/net/dsa/tag_qca.c +++ b/net/dsa/tag_qca.c @@ -5,24 +5,10 @@ #include #include +#include #include "dsa_priv.h" -#define QCA_HDR_LEN 2 -#define QCA_HDR_VERSION 0x2 - -#define QCA_HDR_RECV_VERSION GENMASK(15, 14) -#define QCA_HDR_RECV_PRIORITY GENMASK(13, 11) -#define QCA_HDR_RECV_TYPE GENMASK(10, 6) -#define QCA_HDR_RECV_FRAME_IS_TAGGED BIT(3) -#define QCA_HDR_RECV_SOURCE_PORT GENMASK(2, 0) - -#define QCA_HDR_XMIT_VERSION GENMASK(15, 14) -#define QCA_HDR_XMIT_PRIORITY GENMASK(13, 11) -#define QCA_HDR_XMIT_CONTROL GENMASK(10, 8) -#define QCA_HDR_XMIT_FROM_CPU BIT(7) -#define QCA_HDR_XMIT_DP_BIT GENMASK(6, 0) - static struct sk_buff *qca_tag_xmit(struct sk_buff *skb, struct net_device *dev) { struct dsa_port *dp = dsa_slave_to_port(dev); From patchwork Tue Dec 7 14:59:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12662039 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D83DC433F5 for ; Tue, 7 Dec 2021 15:00:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238445AbhLGPDb (ORCPT ); Tue, 7 Dec 2021 10:03:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52102 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238420AbhLGPD2 (ORCPT ); Tue, 7 Dec 2021 10:03:28 -0500 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [IPv6:2a00:1450:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 723F3C061746; Tue, 7 Dec 2021 06:59:57 -0800 (PST) Received: by mail-ed1-x52d.google.com with SMTP id r11so57792843edd.9; Tue, 07 Dec 2021 06:59:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XMNmsVbZ++MHzR0SNpTs4rnf9cjrjDzn4muZEXZ4TMk=; b=BBOE+8v2JgPlmc9NmwyI892BKiNEtdR3mPvH3HVG/2O4AtM9xyolgA+91P7Wfnbuol Cm7yJLO/6l2Ly874Ta85OaRC1R93PEVICZgo5xoV4OxbHDGZsKNHNXOm3H8rEhbWSRKc +E9h60qnAwBA9KJztBmXy4M77DF63pKV5pA76g/enGeTR8uKq5zk+4idWdypLwIXXivc KfNyCPa4gQNqpnYA20FIVlJ+DJFq1pwbhAFWBhyuqDQjMXXmKYbUtutneElW6TV+Ia3/ 5Ea9wGjSFFbKBGrG2Zi/Txezcxvu4/RyQbD4N+t9fM0AQeuZVXlhYsLlzKC0sG64y9gc i0xA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XMNmsVbZ++MHzR0SNpTs4rnf9cjrjDzn4muZEXZ4TMk=; b=G/Hjk5wCzCK9VusVIjg6mdGhhzA8X7BjhJLqZCjhPbrsM3a3dO6XQWL9Dv81iG8O59 UPUwZADZ0ZlXD190LMNayrG/4j4ySYwW9Nq4O7aXifxrWS/W6u+SuKXvM3TEPCTbpIyZ mhABdJaqq+1eufumoWFP/ieuUtCPclzMm/SuFVtBykD38h3PysXX92nGXGmSk4gF4kkq 5PvcrJghMP7vgavBK9AV7nivhCmb0n+JT24NG2uNAnfWF1wKu/Cu+rWvP56YACFLKZTg pIJRAK3S3u+DGO9an8oQC+Ncc6V/Oy/zgdXn2nM0CL6yDKh9sRb7kwYWT0J+5Cougie/ 2+0Q== X-Gm-Message-State: AOAM533rxjOJ2KrRg1qhNrpWAsr5s4Q26mC3x+3hAxWyY62Kzq43/WLJ fgNiWEy2wTacq8du1s4ZAqMPj93uCp4= X-Google-Smtp-Source: ABdhPJyWcbV9kFRcsSqPbDbh1k6/XEFPxHM34EJ8F0P4S+DZiMWPqDw1W9A4pr+eERTxHWPtn8IrDA== X-Received: by 2002:a05:6402:4302:: with SMTP id m2mr9660540edc.349.1638889195902; Tue, 07 Dec 2021 06:59:55 -0800 (PST) Received: from localhost.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id i10sm9131821ejw.48.2021.12.07.06.59.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Dec 2021 06:59:55 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [net-next RFC PATCH 3/6] net: dsa: tag_qca: add define for mdio read/write in ethernet packet Date: Tue, 7 Dec 2021 15:59:39 +0100 Message-Id: <20211207145942.7444-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211207145942.7444-1-ansuelsmth@gmail.com> References: <20211207145942.7444-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Add all the required define to prepare support for mdio read/write in Ethernet packet. Any packet of this type has to be dropped as the only use of these special packet is receive ack for an mdio write request or receive data for an mdio read request. A struct is used that emulates the Ethernet header but is used for a different purpose. Signed-off-by: Ansuel Smith --- include/linux/dsa/tag_qca.h | 41 +++++++++++++++++++++++++++++++++++++ net/dsa/tag_qca.c | 13 +++++++++--- 2 files changed, 51 insertions(+), 3 deletions(-) diff --git a/include/linux/dsa/tag_qca.h b/include/linux/dsa/tag_qca.h index c02d2d39ff4a..578a4aeafd92 100644 --- a/include/linux/dsa/tag_qca.h +++ b/include/linux/dsa/tag_qca.h @@ -12,10 +12,51 @@ #define QCA_HDR_RECV_FRAME_IS_TAGGED BIT(3) #define QCA_HDR_RECV_SOURCE_PORT GENMASK(2, 0) +/* Packet type for recv */ +#define QCA_HDR_RECV_TYPE_NORMAL 0x0 +#define QCA_HDR_RECV_TYPE_MIB 0x1 +#define QCA_HDR_RECV_TYPE_RW_REG_ACK 0x2 + #define QCA_HDR_XMIT_VERSION GENMASK(15, 14) #define QCA_HDR_XMIT_PRIORITY GENMASK(13, 11) #define QCA_HDR_XMIT_CONTROL GENMASK(10, 8) #define QCA_HDR_XMIT_FROM_CPU BIT(7) #define QCA_HDR_XMIT_DP_BIT GENMASK(6, 0) +/* Packet type for xmit */ +#define QCA_HDR_XMIT_TYPE_NORMAL 0x0 +#define QCA_HDR_XMIT_TYPE_RW_REG 0x1 + +#define MDIO_CHECK_CODE_VAL 0x5 + +/* Specific define for in-band MDIO read/write with Ethernet packet */ +#define QCA_HDR_MDIO_SEQ_LEN 4 /* 4 byte for the seq */ +#define QCA_HDR_MDIO_COMMAND_LEN 4 /* 4 byte for the command */ +#define QCA_HDR_MDIO_DATA1_LEN 4 /* First 4 byte for the mdio data */ +#define QCA_HDR_MDIO_HEADER_LEN (QCA_HDR_MDIO_SEQ_LEN + \ + QCA_HDR_MDIO_COMMAND_LEN + \ + QCA_HDR_MDIO_DATA1_LEN) + +#define QCA_HDR_MDIO_DATA2_LEN 12 /* Other 12 byte for the mdio data */ +#define QCA_HDR_MDIO_PADDING_LEN 34 /* Padding to reach the min Ethernet packet */ + +#define QCA_HDR_MDIO_PKG_LEN (QCA_HDR_MDIO_HEADER_LEN + \ + QCA_HDR_LEN + \ + QCA_HDR_MDIO_DATA2_LEN + \ + QCA_HDR_MDIO_PADDING_LEN) + +#define QCA_HDR_MDIO_SEQ_NUM GENMASK(31, 0) /* 63, 32 */ +#define QCA_HDR_MDIO_CHECK_CODE GENMASK(31, 29) /* 31, 29 */ +#define QCA_HDR_MDIO_CMD BIT(28) /* 28 */ +#define QCA_HDR_MDIO_LENGTH GENMASK(23, 20) /* 23, 20 */ +#define QCA_HDR_MDIO_ADDR GENMASK(18, 0) /* 18, 0 */ + +/* Special struct emulating a Ethernet header */ +struct mdio_ethhdr { + u32 command; /* command bit 31:0 */ + u32 seq; /* seq 63:32 */ + u32 mdio_data; /* first 4byte mdio */ + u16 hdr; /* qca hdr */ +} __packed; + #endif /* __TAG_QCA_H */ diff --git a/net/dsa/tag_qca.c b/net/dsa/tag_qca.c index 34e565e00ece..b8b05d54a74c 100644 --- a/net/dsa/tag_qca.c +++ b/net/dsa/tag_qca.c @@ -32,10 +32,10 @@ static struct sk_buff *qca_tag_xmit(struct sk_buff *skb, struct net_device *dev) static struct sk_buff *qca_tag_rcv(struct sk_buff *skb, struct net_device *dev) { - u8 ver; - u16 hdr; - int port; + u16 hdr, pk_type; __be16 *phdr; + int port; + u8 ver; if (unlikely(!pskb_may_pull(skb, QCA_HDR_LEN))) return NULL; @@ -48,6 +48,13 @@ static struct sk_buff *qca_tag_rcv(struct sk_buff *skb, struct net_device *dev) if (unlikely(ver != QCA_HDR_VERSION)) return NULL; + /* Get pk type */ + pk_type = FIELD_GET(QCA_HDR_RECV_TYPE, hdr); + + /* MDIO read/write packet */ + if (pk_type == QCA_HDR_RECV_TYPE_RW_REG_ACK) + return NULL; + /* Remove QCA tag and recalculate checksum */ skb_pull_rcsum(skb, QCA_HDR_LEN); dsa_strip_etype_header(skb, QCA_HDR_LEN); From patchwork Tue Dec 7 14:59:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12662041 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B855EC433F5 for ; Tue, 7 Dec 2021 15:00:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238454AbhLGPDi (ORCPT ); Tue, 7 Dec 2021 10:03:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52122 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238449AbhLGPDc (ORCPT ); Tue, 7 Dec 2021 10:03:32 -0500 Received: from mail-ed1-x530.google.com (mail-ed1-x530.google.com [IPv6:2a00:1450:4864:20::530]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F02F8C061746; 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id i10sm9131821ejw.48.2021.12.07.06.59.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Dec 2021 06:59:56 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [net-next RFC PATCH 4/6] net: dsa: qca8k: Add support for mdio read/write in Ethernet packet Date: Tue, 7 Dec 2021 15:59:40 +0100 Message-Id: <20211207145942.7444-5-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211207145942.7444-1-ansuelsmth@gmail.com> References: <20211207145942.7444-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Add qca8k side support for mdio read/write in Ethernet packet. qca8k supports some specially crafted Ethernet packet that can be used for mdio read/write instead of the legacy method uart/internal mdio. This add support for the qca8k side to craft the packet and enqueue it. Each port and the qca8k_priv have a special struct to put data in it. The completion API is used to wait for the packet to be received back with the requested data. The various steps are: 1. Craft the special packet with the qca hdr set to mdio read/write mode. 2. Set the lock in the dedicated mdio struct. 3. Reinit the completion. 4. Enqueue the packet. 5. Wait the packet to be received. 6. Use the data set by the tagger to complete the mdio operation. If the completion timeouts or the ack value is not true, the legacy mdio way is used. It has to be considered that in the initial setup mdio is still used and mdio is still used until DSA is ready to accept and tag packet. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 156 +++++++++++++++++++++++++++++++++++- drivers/net/dsa/qca8k.h | 5 ++ include/linux/dsa/tag_qca.h | 13 +++ 3 files changed, 172 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 96a7fbf8700c..d2c6139be9ac 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -20,6 +20,7 @@ #include #include #include +#include #include "qca8k.h" @@ -170,6 +171,128 @@ qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val) return regmap_update_bits(priv->regmap, reg, mask, write_val); } +static struct sk_buff *qca8k_alloc_mdio_header(struct qca8k_port_tag *header, enum mdio_cmd cmd, + u32 reg, u32 *val) +{ + struct mdio_ethhdr *mdio_ethhdr; + struct sk_buff *skb; + u16 hdr; + + skb = dev_alloc_skb(QCA_HDR_MDIO_PKG_LEN); + + prefetchw(skb->data); + + skb_reset_mac_header(skb); + skb_set_network_header(skb, skb->len); + + mdio_ethhdr = skb_push(skb, QCA_HDR_MDIO_HEADER_LEN + QCA_HDR_LEN); + + hdr = FIELD_PREP(QCA_HDR_XMIT_VERSION, QCA_HDR_VERSION); + hdr |= QCA_HDR_XMIT_FROM_CPU; + hdr |= FIELD_PREP(QCA_HDR_XMIT_DP_BIT, BIT(0)); + hdr |= FIELD_PREP(QCA_HDR_XMIT_CONTROL, QCA_HDR_XMIT_TYPE_RW_REG); + + mdio_ethhdr->seq = FIELD_PREP(QCA_HDR_MDIO_SEQ_NUM, 200); + + mdio_ethhdr->command = FIELD_PREP(QCA_HDR_MDIO_ADDR, reg); + mdio_ethhdr->command |= FIELD_PREP(QCA_HDR_MDIO_LENGTH, 4); + mdio_ethhdr->command |= FIELD_PREP(QCA_HDR_MDIO_CMD, cmd); + mdio_ethhdr->command |= FIELD_PREP(QCA_HDR_MDIO_CHECK_CODE, MDIO_CHECK_CODE_VAL); + + if (cmd == MDIO_WRITE) + mdio_ethhdr->mdio_data = *val; + + mdio_ethhdr->hdr = htons(hdr); + + skb_put_zero(skb, QCA_HDR_MDIO_DATA2_LEN); + skb_put_zero(skb, QCA_HDR_MDIO_PADDING_LEN); + + return skb; +} + +static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val) +{ + struct qca8k_port_tag *header = priv->header_mdio; + struct sk_buff *skb; + bool ack; + int ret; + + skb = qca8k_alloc_mdio_header(header, MDIO_READ, reg, 0); + skb->dev = dsa_to_port(priv->ds, 0)->master; + + mutex_lock(&header->mdio_mutex); + + reinit_completion(&header->rw_done); + header->seq = 200; + header->ack = false; + + dev_queue_xmit(skb); + + ret = wait_for_completion_timeout(&header->rw_done, QCA8K_MDIO_RW_ETHERNET); + + *val = header->data[0]; + ack = header->ack; + + mutex_unlock(&header->mdio_mutex); + + if (ret <= 0) + return -ETIMEDOUT; + + if (!ack) + return -EINVAL; + + return 0; +} + +static int qca8k_write_eth(struct qca8k_priv *priv, u32 reg, u32 val) +{ + struct qca8k_port_tag *header = priv->header_mdio; + struct sk_buff *skb; + bool ack; + int ret; + + skb = qca8k_alloc_mdio_header(header, MDIO_WRITE, reg, &val); + skb->dev = dsa_to_port(priv->ds, 0)->master; + + mutex_lock(&header->mdio_mutex); + + dev_queue_xmit(skb); + + reinit_completion(&header->rw_done); + header->ack = false; + header->seq = 200; + + ret = wait_for_completion_timeout(&header->rw_done, QCA8K_MDIO_RW_ETHERNET); + + ack = header->ack; + + mutex_unlock(&header->mdio_mutex); + + if (ret <= 0) + return -ETIMEDOUT; + + if (!ack) + return -EINVAL; + + return 0; +} + +static int +qca8k_regmap_update_bits_eth(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val) +{ + u32 val = 0; + int ret; + + ret = qca8k_read_eth(priv, reg, &val); + if (ret) + return ret; + + val &= ~mask; + val |= write_val; + + return qca8k_write_eth(priv, reg, val); +} + static int qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val) { @@ -178,6 +301,10 @@ qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val) u16 r1, r2, page; int ret; + if (priv->atheros_header_ready) + if (!qca8k_read_eth(priv, reg, val)) + return 0; + qca8k_split_addr(reg, &r1, &r2, &page); mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); @@ -201,6 +328,10 @@ qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t val) u16 r1, r2, page; int ret; + if (priv->atheros_header_ready) + if (!qca8k_write_eth(priv, reg, val)) + return 0; + qca8k_split_addr(reg, &r1, &r2, &page); mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); @@ -225,6 +356,10 @@ qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask, uint32_t write_ u32 val; int ret; + if (priv->atheros_header_ready) + if (!qca8k_regmap_update_bits_eth(priv, reg, mask, write_val)) + return 0; + qca8k_split_addr(reg, &r1, &r2, &page); mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); @@ -1223,8 +1358,13 @@ qca8k_setup(struct dsa_switch *ds) * Configure specific switch configuration for ports */ for (i = 0; i < QCA8K_NUM_PORTS; i++) { + struct dsa_port *dp = dsa_to_port(ds, i); + + /* Set the header_mdio to be accessible by the qca tagger */ + dp->priv = priv->header_mdio; + /* CPU port gets connected to all user ports of the switch */ - if (dsa_is_cpu_port(ds, i)) { + if (dsa_port_is_cpu(dp)) { ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds)); if (ret) @@ -1232,7 +1372,7 @@ qca8k_setup(struct dsa_switch *ds) } /* Individual user ports get connected to CPU port only */ - if (dsa_is_user_port(ds, i)) { + if (dsa_port_is_user(dp)) { ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), QCA8K_PORT_LOOKUP_MEMBER, BIT(cpu_port)); @@ -1684,6 +1824,9 @@ qca8k_phylink_mac_link_up(struct dsa_switch *ds, int port, unsigned int mode, reg |= QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC; qca8k_write(priv, QCA8K_REG_PORT_STATUS(port), reg); + + if (dsa_is_cpu_port(ds, port)) + priv->atheros_header_ready = true; } static void @@ -2452,6 +2595,7 @@ static int qca8k_read_switch_id(struct qca8k_priv *priv) static int qca8k_sw_probe(struct mdio_device *mdiodev) { + struct qca8k_port_tag *header_mdio; struct qca8k_priv *priv; int ret; @@ -2462,6 +2606,13 @@ qca8k_sw_probe(struct mdio_device *mdiodev) if (!priv) return -ENOMEM; + header_mdio = devm_kzalloc(&mdiodev->dev, sizeof(*header_mdio), GFP_KERNEL); + if (!header_mdio) + return -ENOMEM; + + mutex_init(&header_mdio->mdio_mutex); + init_completion(&header_mdio->rw_done); + priv->bus = mdiodev->bus; priv->dev = &mdiodev->dev; @@ -2501,6 +2652,7 @@ qca8k_sw_probe(struct mdio_device *mdiodev) priv->ds->priv = priv; priv->ops = qca8k_switch_ops; priv->ds->ops = &priv->ops; + priv->header_mdio = header_mdio; mutex_init(&priv->reg_mutex); dev_set_drvdata(&mdiodev->dev, priv); diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h index ab4a417b25a9..149bc4280856 100644 --- a/drivers/net/dsa/qca8k.h +++ b/drivers/net/dsa/qca8k.h @@ -11,6 +11,9 @@ #include #include #include +#include + +#define QCA8K_MDIO_RW_ETHERNET 100 #define QCA8K_NUM_PORTS 7 #define QCA8K_NUM_CPU_PORTS 2 @@ -342,6 +345,7 @@ struct qca8k_priv { u8 mirror_rx; u8 mirror_tx; u8 lag_hash_mode; + bool atheros_header_ready; bool legacy_phy_port_mapping; struct qca8k_ports_config ports_config; struct regmap *regmap; @@ -353,6 +357,7 @@ struct qca8k_priv { struct dsa_switch_ops ops; struct gpio_desc *reset_gpio; unsigned int port_mtu[QCA8K_NUM_PORTS]; + struct qca8k_port_tag *header_mdio; }; struct qca8k_mib_desc { diff --git a/include/linux/dsa/tag_qca.h b/include/linux/dsa/tag_qca.h index 578a4aeafd92..a45a973865c3 100644 --- a/include/linux/dsa/tag_qca.h +++ b/include/linux/dsa/tag_qca.h @@ -59,4 +59,17 @@ struct mdio_ethhdr { u16 hdr; /* qca hdr */ } __packed; +enum mdio_cmd { + MDIO_WRITE = 0x0, + MDIO_READ +}; + +struct qca8k_port_tag { + struct completion rw_done; + struct mutex mdio_mutex; /* Enforce one mdio read/write at time */ + bool ack; + u32 seq; + u32 data[4]; +}; + #endif /* __TAG_QCA_H */ From patchwork Tue Dec 7 14:59:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12662043 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4F00C4332F for ; Tue, 7 Dec 2021 15:00:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238479AbhLGPDj (ORCPT ); Tue, 7 Dec 2021 10:03:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52132 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238469AbhLGPDd (ORCPT ); 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id i10sm9131821ejw.48.2021.12.07.07.00.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Dec 2021 07:00:00 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [net-next RFC PATCH 5/6] net: dsa: tag_qca: Add support for handling mdio read/write packet Date: Tue, 7 Dec 2021 15:59:41 +0100 Message-Id: <20211207145942.7444-6-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211207145942.7444-1-ansuelsmth@gmail.com> References: <20211207145942.7444-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Handle mdio read/write Ethernet packet. When a packet is received, these operation are done: 1. Qca HDR is checked. 2. Packet type is checked. 3. If the type is an mdio read/write packet is parsed. 4. The header data is parsed and put in the generic mdio struct. 5. The rest of the data is copied to the data mdio struct. 6. The seq number is checked and copared with the one in the mdio struct 7. The ack is set to true to set a correct read/write operation 8. The completion is complete 9. The packet is dropped. Signed-off-by: Ansuel Smith --- net/dsa/tag_qca.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/net/dsa/tag_qca.c b/net/dsa/tag_qca.c index b8b05d54a74c..1d2c4f519c99 100644 --- a/net/dsa/tag_qca.c +++ b/net/dsa/tag_qca.c @@ -9,6 +9,30 @@ #include "dsa_priv.h" +static void qca_tag_handle_mdio_packet(struct sk_buff *skb, + struct net_device *dev) +{ + struct mdio_ethhdr *mdio_ethhdr; + struct qca8k_port_tag *header; + struct dsa_port *cpu_dp; + + cpu_dp = dev->dsa_ptr; + header = cpu_dp->priv; + + mdio_ethhdr = (struct mdio_ethhdr *)skb_mac_header(skb); + + header->data[0] = mdio_ethhdr->mdio_data; + + /* Get the rest of the 12 byte of data */ + memcpy(header->data + 1, skb->data, QCA_HDR_MDIO_DATA2_LEN); + + /* Make sure the seq match the requested packet */ + if (mdio_ethhdr->seq == header->seq) + header->ack = true; + + complete(&header->rw_done); +} + static struct sk_buff *qca_tag_xmit(struct sk_buff *skb, struct net_device *dev) { struct dsa_port *dp = dsa_slave_to_port(dev); @@ -52,8 +76,10 @@ static struct sk_buff *qca_tag_rcv(struct sk_buff *skb, struct net_device *dev) pk_type = FIELD_GET(QCA_HDR_RECV_TYPE, hdr); /* MDIO read/write packet */ - if (pk_type == QCA_HDR_RECV_TYPE_RW_REG_ACK) + if (pk_type == QCA_HDR_RECV_TYPE_RW_REG_ACK) { + qca_tag_handle_mdio_packet(skb, dev); return NULL; + } /* Remove QCA tag and recalculate checksum */ skb_pull_rcsum(skb, QCA_HDR_LEN); From patchwork Tue Dec 7 14:59:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12662045 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0AB36C433EF for ; Tue, 7 Dec 2021 15:00:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233834AbhLGPDl (ORCPT ); Tue, 7 Dec 2021 10:03:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52140 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238483AbhLGPDe (ORCPT ); Tue, 7 Dec 2021 10:03:34 -0500 Received: from mail-ed1-x52b.google.com (mail-ed1-x52b.google.com [IPv6:2a00:1450:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F163C0617A1; Tue, 7 Dec 2021 07:00:04 -0800 (PST) Received: by mail-ed1-x52b.google.com with SMTP id r11so57794206edd.9; Tue, 07 Dec 2021 07:00:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Fn8KnA/llYwqXsiL6Q1/l2Tp5yDFYZmOjaTdrAUpvsE=; b=J+3jyvCHsVTRr7ZIFrgRwip1RSFWK6pkFaX4vjByn38jDh0H6PxKl2t53lvpcNyplB H9BHqDehFuZTk1kqZ1XdEfBQJ/ftge1K8imp6zCXIC4zXWKbFvmGNbILMekyls1+bfF9 wLoEOXzQgEJ7G3j/7accaC078p9Sx4DVMtUGsLA9prwJ6JyEUimIFDgt392Z7HPD2jAt kt65lINWKJXuJypQzohGV0KY9ya9WzrBbvrPxT+NPcm7rnEEKww4va86RGZRLn4zo9PQ bfq6ZM5JjsEjaEPKtpfup9NA1+ftaj41RXR/J6JmYW+LfJV22QFTdSrgw/0EFEGZhsDf aXxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Fn8KnA/llYwqXsiL6Q1/l2Tp5yDFYZmOjaTdrAUpvsE=; b=7mMtoJMNukxG95gCRIIgHkiVcdw7glFIBaXs1thL0dOFUC1JVxUJEHFpiCuMg2zAXZ duIkc5lb5wSvJ11fPbkTxqWe/PsJx5PLlWhA497JVBNFHnagmH5cfapQU0lAQOgm2Xsl 6XF9GTsX4gLbvXghSWX+bcrVIm79ovnTOpbgcxfYqtoE0z9m5/qtd9CtqXlND46cp4i5 nOvOhdZHGUuikltQuVbNhIs0pkIXpVr3PQups6KuSyGZj3XX6jJcJ7FTkIAqLsovTAFF 7lo2GDpL6jBAc08qEJ6jMFlriN5HCOSK8OapRv0SWDIgY46rBADLEW95nS1e9crHCIeg NaYA== X-Gm-Message-State: AOAM530F6xC0+R4bo/UNXCy+9G1y/nxxJ9/hqZhlap4YSmJT1vgrf+uU QC6MJeYBmtKNYQEa5IMUm0Y= X-Google-Smtp-Source: ABdhPJzkRqh4jR7yH+Nb3fvZhcu+e27U/39w6GmoxNOm6L6ZJJl5irOJZqafS9C79RJq7AgnZHbRWg== X-Received: by 2002:a17:906:168e:: with SMTP id s14mr52618218ejd.340.1638889202045; Tue, 07 Dec 2021 07:00:02 -0800 (PST) Received: from localhost.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id i10sm9131821ejw.48.2021.12.07.07.00.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Dec 2021 07:00:01 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [net-next RFC PATCH 6/6] net: dsa: qca8k: cache lo and hi for mdio write Date: Tue, 7 Dec 2021 15:59:42 +0100 Message-Id: <20211207145942.7444-7-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211207145942.7444-1-ansuelsmth@gmail.com> References: <20211207145942.7444-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC From Documentation, we can cache lo and hi the same way we do with the page. This massively reduce the mdio write as 3/4 of the time we only require to write the lo or hi part for a mdio write. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 49 ++++++++++++++++++++++++++++++++++++----- 1 file changed, 44 insertions(+), 5 deletions(-) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index d2c6139be9ac..64643f1e2f16 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -94,6 +94,48 @@ qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page) *page = regaddr & 0x3ff; } +static u16 qca8k_current_lo = 0xffff; + +static int +qca8k_set_lo(struct mii_bus *bus, int phy_id, u32 regnum, u16 lo) +{ + int ret; + + if (lo == qca8k_current_lo) { + // pr_info("SAME LOW"); + return 0; + } + + ret = bus->write(bus, phy_id, regnum, lo); + if (ret < 0) + dev_err_ratelimited(&bus->dev, + "failed to write qca8k 32bit lo register\n"); + + qca8k_current_lo = lo; + return 0; +} + +static u16 qca8k_current_hi = 0xffff; + +static int +qca8k_set_hi(struct mii_bus *bus, int phy_id, u32 regnum, u16 hi) +{ + int ret; + + if (hi == qca8k_current_hi) { + // pr_info("SAME HI"); + return 0; + } + + ret = bus->write(bus, phy_id, regnum, hi); + if (ret < 0) + dev_err_ratelimited(&bus->dev, + "failed to write qca8k 32bit hi register\n"); + + qca8k_current_hi = hi; + return 0; +} + static int qca8k_mii_read32(struct mii_bus *bus, int phy_id, u32 regnum, u32 *val) { @@ -125,12 +167,9 @@ qca8k_mii_write32(struct mii_bus *bus, int phy_id, u32 regnum, u32 val) lo = val & 0xffff; hi = (u16)(val >> 16); - ret = bus->write(bus, phy_id, regnum, lo); + ret = qca8k_set_lo(bus, phy_id, regnum, lo); if (ret >= 0) - ret = bus->write(bus, phy_id, regnum + 1, hi); - if (ret < 0) - dev_err_ratelimited(&bus->dev, - "failed to write qca8k 32bit register\n"); + ret = qca8k_set_hi(bus, phy_id, regnum + 1, hi); } static int