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Wed, 8 Dec 2021 23:06:58 +0000 (GMT) Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 311E4AC08F; Wed, 8 Dec 2021 23:06:56 +0000 (GMT) Received: from farosas.linux.ibm.com.com (unknown [9.211.43.72]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP; Wed, 8 Dec 2021 23:06:55 +0000 (GMT) From: Fabiano Rosas To: qemu-devel@nongnu.org Subject: [PATCH] target/ppc: powerpc_excp: Guard ALIGNMENT interrupt with CONFIG_TCG Date: Wed, 8 Dec 2021 20:06:50 -0300 Message-Id: <20211208230650.2125095-1-farosas@linux.ibm.com> X-Mailer: git-send-email 2.33.1 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: YfSpB_EkgNUzv3givJLchaRm0PlAeGu4 X-Proofpoint-ORIG-GUID: o_7fycAdfRLC5T8XJHDLIpBwMx897jeJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-08_08,2021-12-08_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 suspectscore=0 impostorscore=0 malwarescore=0 mlxlogscore=885 mlxscore=0 bulkscore=0 priorityscore=1501 adultscore=0 clxscore=1015 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112080127 Received-SPF: pass client-ip=148.163.158.5; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" We cannot have TCG code in powerpc_excp because the function is called from kvm-only code via ppc_cpu_do_interrupt: ../target/ppc/excp_helper.c:463:29: error: implicit declaration of function ‘cpu_ldl_code’ [-Werror=implicit-function-declaration] Fortunately, the Alignment interrupt is not among the ones dispatched from kvm-only code, so we can keep it out of the disable-tcg build for now. Fixes: 336e91f853 ("target/ppc: Move SPR_DSISR setting to powerpc_excp") Signed-off-by: Fabiano Rosas --- Perhaps we could make powerpc_excp TCG only and have a separate function that only knows the two interrupts that we use with KVM (Program, Machine check). But for now this fix will do, I think. --- target/ppc/excp_helper.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 17607adbe4..dcf22440cc 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -453,6 +453,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) } break; } +#ifdef CONFIG_TCG case POWERPC_EXCP_ALIGN: /* Alignment exception */ /* * Get rS/rD and rA from faulting opcode. @@ -464,6 +465,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) env->spr[SPR_DSISR] |= (insn & 0x03FF0000) >> 16; } break; +#endif case POWERPC_EXCP_PROGRAM: /* Program exception */ switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: