From patchwork Thu Dec 20 17:30:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10739235 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CD1B313AD for ; Thu, 20 Dec 2018 17:30:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B2D3F28EB8 for ; Thu, 20 Dec 2018 17:30:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B0E8928FFB; Thu, 20 Dec 2018 17:30:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8E5F928ED3 for ; Thu, 20 Dec 2018 17:30:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387662AbeLTRai (ORCPT ); Thu, 20 Dec 2018 12:30:38 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:34962 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732074AbeLTRah (ORCPT ); Thu, 20 Dec 2018 12:30:37 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 0C21D608FB; Thu, 20 Dec 2018 17:30:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1545327037; bh=o9cq5rWz5J2uy/X1Nr5z/QsG1L+CfT5Y5ZrC6Yu7VjY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GBt0oD2aohOpaXaCuVKs+i6FX+AJeYozoFIj1Z/+g+aKJT3ImN/reERcpzb6k1Lz3 lwCkjQNgASLXrPxXPyhDw5fnLdfGQfF2et9sGb8hbYTgegyOZqm2rRCQgK6KYhAdn0 IMLOxl1IGwJV30+fBBv5FNWmYFo0c/iz9/5YtQOc= Received: from jcrouse-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 4126F607F1; Thu, 20 Dec 2018 17:30:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1545327035; bh=o9cq5rWz5J2uy/X1Nr5z/QsG1L+CfT5Y5ZrC6Yu7VjY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jf/T79ZgRqey10F4fgBSjAI+jFB398M+lgm/dpQRuljyR4YTD4HFIjdszDerqnPx4 l2EwbUL8yRGuyG5IAOrfkjP/WqkDVaPJdL1o1kczK6iNkeYR45d4xGLoX/Udesk4ta CnJ2D1Izwo6K8qsIGOjXOLJsJOSkB6KrobcCM2kE= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 4126F607F1 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, dianders@chromium.org, georgi.djakov@linaro.org, Bjorn Andersson , Arnd Bergmann , Stephen Boyd , Kees Cook , Sharat Masetty , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Andy Gross , Rob Clark , David Airlie , Johan Hovold , Colin Ian King Subject: [PATCH v3 1/3] drm/msm/a6xx: Add support for an interconnect path Date: Thu, 20 Dec 2018 10:30:24 -0700 Message-Id: <20181220173026.3857-2-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181220173026.3857-1-jcrouse@codeaurora.org> References: <20181220173026.3857-1-jcrouse@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Try to get the interconnect path for the GPU and vote for the maximum bandwidth to support all frequencies. This is needed for performance. Later we will want to scale the bandwidth based on the frequency to also optimize for power but that will require some device tree infrastructure that does not yet exist. v5: Remove hardcoded interconnect name and just use the default v4: Don't use a port string at all to skip the need for names in the DT v3: Use macros and change port string per Georgi Djakov Signed-off-by: Jordan Crouse --- drivers/gpu/drm/msm/Kconfig | 1 + drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 20 ++++++++++++++++++++ drivers/gpu/drm/msm/adreno/adreno_gpu.c | 9 +++++++++ drivers/gpu/drm/msm/msm_gpu.h | 3 +++ 4 files changed, 33 insertions(+) diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig index 843a9d40c05e..990c4350f0c4 100644 --- a/drivers/gpu/drm/msm/Kconfig +++ b/drivers/gpu/drm/msm/Kconfig @@ -5,6 +5,7 @@ config DRM_MSM depends on ARCH_QCOM || (ARM && COMPILE_TEST) depends on OF && COMMON_CLK depends on MMU + depends on INTERCONNECT || !INTERCONNECT select QCOM_MDT_LOADER if ARCH_QCOM select REGULATOR select DRM_KMS_HELPER diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 0fb4718ef0df..781b601c6045 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -2,6 +2,7 @@ /* Copyright (c) 2017-2018 The Linux Foundation. All rights reserved. */ #include +#include #include #include @@ -63,6 +64,9 @@ static bool a6xx_gmu_gx_is_on(struct a6xx_gmu *gmu) static void __a6xx_gmu_set_freq(struct a6xx_gmu *gmu, int index) { + struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); + struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; + struct msm_gpu *gpu = &adreno_gpu->base; int ret; gmu_write(gmu, REG_A6XX_GMU_DCVS_ACK_OPTION, 0); @@ -85,6 +89,12 @@ static void __a6xx_gmu_set_freq(struct a6xx_gmu *gmu, int index) dev_err(gmu->dev, "GMU set GPU frequency error: %d\n", ret); gmu->freq = gmu->gpu_freqs[index]; + + /* + * Eventually we will want to scale the path vote with the frequency but + * for now leave it at max so that the performance is nominal. + */ + icc_set(gpu->icc_path, 0, MBps_to_icc(7216)); } void a6xx_gmu_set_freq(struct msm_gpu *gpu, unsigned long freq) @@ -680,6 +690,8 @@ int a6xx_gmu_reset(struct a6xx_gpu *a6xx_gpu) int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu) { + struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; + struct msm_gpu *gpu = &adreno_gpu->base; struct a6xx_gmu *gmu = &a6xx_gpu->gmu; int status, ret; @@ -695,6 +707,9 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu) if (ret) goto out; + /* Set the bus quota to a reasonable value for boot */ + icc_set(gpu->icc_path, 0, MBps_to_icc(3072)); + a6xx_gmu_irq_enable(gmu); /* Check to see if we are doing a cold or warm boot */ @@ -735,6 +750,8 @@ bool a6xx_gmu_isidle(struct a6xx_gmu *gmu) int a6xx_gmu_stop(struct a6xx_gpu *a6xx_gpu) { + struct adreno_gpu *adreno_gpu = &a6xx_gpu->base; + struct msm_gpu *gpu = &adreno_gpu->base; struct a6xx_gmu *gmu = &a6xx_gpu->gmu; u32 val; @@ -781,6 +798,9 @@ int a6xx_gmu_stop(struct a6xx_gpu *a6xx_gpu) /* Tell RPMh to power off the GPU */ a6xx_rpmh_stop(gmu); + /* Remove the bus vote */ + icc_set(gpu->icc_path, 0, 0); + clk_bulk_disable_unprepare(gmu->nr_clocks, gmu->clocks); pm_runtime_put_sync(gmu->dev); diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index bfeea50fca8a..6629dc3506eb 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -18,6 +18,7 @@ */ #include +#include #include #include #include @@ -695,6 +696,11 @@ static int adreno_get_pwrlevels(struct device *dev, DBG("fast_rate=%u, slow_rate=27000000", gpu->fast_rate); + /* Check for an interconnect path for the bus */ + gpu->icc_path = of_icc_get(dev, NULL); + if (IS_ERR(gpu->icc_path)) + gpu->icc_path = NULL; + return 0; } @@ -732,10 +738,13 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, void adreno_gpu_cleanup(struct adreno_gpu *adreno_gpu) { + struct msm_gpu *gpu = &adreno_gpu->base; unsigned int i; for (i = 0; i < ARRAY_SIZE(adreno_gpu->info->fw); i++) release_firmware(adreno_gpu->fw[i]); + icc_put(gpu->icc_path); + msm_gpu_cleanup(&adreno_gpu->base); } diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index fc4040e24a6b..66e0f28dfed8 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -19,6 +19,7 @@ #define __MSM_GPU_H__ #include +#include #include #include "msm_drv.h" @@ -118,6 +119,8 @@ struct msm_gpu { struct clk *ebi1_clk, *core_clk, *rbbmtimer_clk; uint32_t fast_rate; + struct icc_path *icc_path; + /* Hang and Inactivity Detection: */ #define DRM_MSM_INACTIVE_PERIOD 66 /* in ms (roughly four frames) */ From patchwork Thu Dec 20 17:30:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10739233 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CCACE13AD for ; Thu, 20 Dec 2018 17:30:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B283828ED3 for ; Thu, 20 Dec 2018 17:30:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A6E4629060; Thu, 20 Dec 2018 17:30:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9F11D29080 for ; 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Thu, 20 Dec 2018 17:30:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1545327036; bh=s/vBiF/stLHSG1XGFLewCr5bYqm7HK5fSuvw7/3Fjs4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bh02hd/MG0MHsSnoii5ZSMacQ/xLMnWRD4qgvzm88HMoEuEYn3ZFhMPq2GhP3Pk3M qYYXIXKtmXGIFiLZXXLpddcyThPPt7N00nNzkJw2VGncLI1xniib0BqX2FjN1rBUqF be3xYXNiMjJvoCEjdJ7QM2Es7CXO9qoO0IxQN+P0= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org C5CD860886 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, dianders@chromium.org, georgi.djakov@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , Rob Clark , David Airlie , Mark Rutland Subject: [PATCH v3 2/3] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU Date: Thu, 20 Dec 2018 10:30:25 -0700 Message-Id: <20181220173026.3857-3-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181220173026.3857-1-jcrouse@codeaurora.org> References: <20181220173026.3857-1-jcrouse@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add documentation for the interconnect and interconnect-names bindings for the GPU node as detailed by bindings/interconnect/interconnect.txt. Signed-off-by: Jordan Crouse Reviewed-by: Douglas Anderson Reviewed-by: Rob Herring Acked-by: Georgi Djakov --- Documentation/devicetree/bindings/display/msm/gpu.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt index 9c89f4fdb8ca..5b04393dcb15 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.txt +++ b/Documentation/devicetree/bindings/display/msm/gpu.txt @@ -20,6 +20,8 @@ Required properties: - qcom,adreno-630.2 - iommus: optional phandle to an adreno iommu instance - operating-points-v2: optional phandle to the OPP operating points +- interconnect: optional phandle to a interconnect provider. See + ../interconnect/interconnect.txt for details. - qcom,gmu: For GMU attached devices a phandle to the GMU device that will control the power for the GPU. Applicable targets: - qcom,adreno-630.2 @@ -68,6 +70,8 @@ Example a6xx (with GMU): operating-points-v2 = <&gpu_opp_table>; + interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>; + qcom,gmu = <&gmu>; }; }; From patchwork Thu Dec 20 17:30:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Crouse X-Patchwork-Id: 10739231 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EBF9F13AD for ; Thu, 20 Dec 2018 17:30:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D2FD02908B for ; Thu, 20 Dec 2018 17:30:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C723D29008; Thu, 20 Dec 2018 17:30:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5D76528FF5 for ; Thu, 20 Dec 2018 17:30:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387644AbeLTRas (ORCPT ); Thu, 20 Dec 2018 12:30:48 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:35234 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387679AbeLTRak (ORCPT ); Thu, 20 Dec 2018 12:30:40 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 365736095F; Thu, 20 Dec 2018 17:30:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1545327039; bh=Z8K6feG33hiEOW6ZOGAVNj2MC3HhQpWnV41UvvJrmSY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LdLk5fCFr05vrG9dX4gSRURtUlK/QCCY2fnkWUrfhiFHAj2cpAPl1sTdb78zmH8Ij GfW0K4XDt4NwRUBwZvd+UE8WluKJdWOS/1IGfmLr7tj3i6gOoGvo5iqyK8ZcWBQF4q czZ54eTQulSROTCcHoFPqs0Q5+ZkESkqRSLQGBEs= Received: from jcrouse-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 274EB60918; Thu, 20 Dec 2018 17:30:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1545327038; bh=Z8K6feG33hiEOW6ZOGAVNj2MC3HhQpWnV41UvvJrmSY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fNtJwnTXB9hcS8KI8VT1CR8/l/aykng54jTu2ZSwSENQWx6yawdIuOtYA7nJD7eG6 C7tLo+q3rzMf9L8mx/b7hi1sn70oXjJzcMPofNbqOn8EmMCsoX9VsB96WG/x7IOnfs tFAK5Qk+CS/ApjdGqnO340ljV1So0YBxrxs2AFZY= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 274EB60918 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, dianders@chromium.org, georgi.djakov@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross , Rob Herring , David Brown , Mark Rutland , linux-soc@vger.kernel.org Subject: [PATCH v3 3/3] arm64: dts: sdm845: Add interconnect for GPU Date: Thu, 20 Dec 2018 10:30:26 -0700 Message-Id: <20181220173026.3857-4-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181220173026.3857-1-jcrouse@codeaurora.org> References: <20181220173026.3857-1-jcrouse@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Define an interconnect port for the GPU to set bus capabilities. Signed-off-by: Jordan Crouse Reviewed-by: Douglas Anderson --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 1005f1eb1920..155e4ba74c96 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1369,6 +1369,8 @@ operating-points-v2 = <&gpu_opp_table>; + interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>; + qcom,gmu = <&gmu>; gpu_opp_table: opp-table {