From patchwork Fri Dec 21 03:28:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Jitindar Singh X-Patchwork-Id: 10739841 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B105413A4 for ; Fri, 21 Dec 2018 03:29:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A1AE5286BE for ; Fri, 21 Dec 2018 03:29:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 957F328761; Fri, 21 Dec 2018 03:29:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 53DC0286BE for ; Fri, 21 Dec 2018 03:29:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388933AbeLUD3A (ORCPT ); Thu, 20 Dec 2018 22:29:00 -0500 Received: from mail-pf1-f196.google.com ([209.85.210.196]:41983 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388804AbeLUD3A (ORCPT ); Thu, 20 Dec 2018 22:29:00 -0500 Received: by mail-pf1-f196.google.com with SMTP id b7so1889608pfi.8; Thu, 20 Dec 2018 19:28:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fggVAv78cMM3JO0q0ZdhdlOh7HxFvstJOmNwm7oy9A4=; b=eh5r0DvrYP0Hf9ti4DJjMKJRtEM2LOSLjRWCG2HkQfDmZCEesfndfIbv3RLBnp4SGB fcSIGPRxI4RP4M7bOlRrAbaYd1UOgOLbtA4w1Yj4YpbXDiyvsk77EH+uqa1EHNAAuHQ5 EET1DVAcPbM0zBaEp902undtWxLQJGNVum8RSQILmygQHOFmzLqdO0oDqkja9fGfkBwS ARZriC5kogv0LSihjt0Uk81sHPHAkxIlfDtktZNb2MxkGWwwi/BCuTS3NNBJNhfazrWL NHqGLQGgKBddANsi+IoVYDozPUxnJKBV3uYGk9eDX0uiva0WPhLAEOMSBgt0vvAZf6lY esOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fggVAv78cMM3JO0q0ZdhdlOh7HxFvstJOmNwm7oy9A4=; b=gZ0gaZa1G7b+simoV+uxssnp5NrjaMjCIROoCMtUdTX2iWoh2Dnzh7QgMiAOn1k4nP 7UcCRN1g8MASun54CVps4wVIrAPIJaohwHAr/EPzm0bq+3Xs4fIhFV9zS94s/1k1sZD0 tUq6nGrIJG5IP1lEcPcwBYiivqO2PzZGvGmjw1vIysuPPpTvsO97IkP/KZof2djudsER eOhqpRIMnaVI5URPWz1JNZJ6Fuz7Olspyh2f4SEsqIgDwleUYCedK0qSuvNuyWud8Oe5 cMJQ/CsxxZPR+vOjEIkvbFfnB/YKf0LrjEQUcxTM1mTOfhfw/Dr4z0cvWnvhFjgLMDMo PzMA== X-Gm-Message-State: AJcUukd3go6r6HbNOqgK2REsCvW0ehV0ofyg8E1afI9MOH09sDgVXGG7 i06wC/gC7Y48xQPF6/u/1qaIyNnL X-Google-Smtp-Source: ALg8bN5N8oEogJY55RvXCH1NBio80r7CsjatCe8cdXqcfj0WyJ0Udk+gPLDTzbqFg9LQQ37X+6bluQ== X-Received: by 2002:a63:d047:: with SMTP id s7mr775513pgi.311.1545362939270; Thu, 20 Dec 2018 19:28:59 -0800 (PST) Received: from surajjs2.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id n68sm33062582pfb.62.2018.12.20.19.28.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 20 Dec 2018 19:28:58 -0800 (PST) From: Suraj Jitindar Singh To: kvm-ppc@vger.kernel.org Cc: kvm@vger.kernel.org, paulus@ozlabs.org, david@gibson.dropbear.id.au, mdroth@linux.vnet.ibm.com, Suraj Jitindar Singh Subject: [PATCH 1/5] KVM: PPC: Book3S HV: Hold kvm->mmu_lock across updating nested pte rc bits Date: Fri, 21 Dec 2018 14:28:39 +1100 Message-Id: <20181221032843.13012-2-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20181221032843.13012-1-sjitindarsingh@gmail.com> References: <20181221032843.13012-1-sjitindarsingh@gmail.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We already hold the kvm->mmu_lock spin lock across updating the rc bits in the pte for the L1 guest. Continue to hold the lock across updating the rc bits in the pte for the nested guest as well to prevent invalidations from occurring. Signed-off-by: Suraj Jitindar Singh Reviewed-by: David Gibson --- arch/powerpc/kvm/book3s_hv_nested.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/kvm/book3s_hv_nested.c b/arch/powerpc/kvm/book3s_hv_nested.c index 401d2ecbebc5..0dfbf093bde5 100644 --- a/arch/powerpc/kvm/book3s_hv_nested.c +++ b/arch/powerpc/kvm/book3s_hv_nested.c @@ -1049,7 +1049,7 @@ static long kvmhv_handle_nested_set_rc(struct kvm_vcpu *vcpu, struct kvm *kvm = vcpu->kvm; bool writing = !!(dsisr & DSISR_ISSTORE); u64 pgflags; - bool ret; + long ret; /* Are the rc bits set in the L1 partition scoped pte? */ pgflags = _PAGE_ACCESSED; @@ -1062,16 +1062,22 @@ static long kvmhv_handle_nested_set_rc(struct kvm_vcpu *vcpu, /* Set the rc bit in the pte of our (L0) pgtable for the L1 guest */ ret = kvmppc_hv_handle_set_rc(kvm, kvm->arch.pgtable, writing, gpte.raddr, kvm->arch.lpid); - spin_unlock(&kvm->mmu_lock); - if (!ret) - return -EINVAL; + if (!ret) { + ret = -EINVAL; + goto out_unlock; + } /* Set the rc bit in the pte of the shadow_pgtable for the nest guest */ ret = kvmppc_hv_handle_set_rc(kvm, gp->shadow_pgtable, writing, n_gpa, gp->shadow_lpid); if (!ret) - return -EINVAL; - return 0; + ret = -EINVAL; + else + ret = 0; + +out_unlock: + spin_unlock(&kvm->mmu_lock); + return ret; } static inline int kvmppc_radix_level_to_shift(int level) From patchwork Fri Dec 21 03:28:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Jitindar Singh X-Patchwork-Id: 10739843 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C015513A4 for ; Fri, 21 Dec 2018 03:29:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B1FBC286BE for ; Fri, 21 Dec 2018 03:29:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A66C7287A3; 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Thu, 20 Dec 2018 19:29:03 -0800 (PST) Received: from surajjs2.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id n68sm33062582pfb.62.2018.12.20.19.28.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 20 Dec 2018 19:29:02 -0800 (PST) From: Suraj Jitindar Singh To: kvm-ppc@vger.kernel.org Cc: kvm@vger.kernel.org, paulus@ozlabs.org, david@gibson.dropbear.id.au, mdroth@linux.vnet.ibm.com, Suraj Jitindar Singh Subject: [PATCH 2/5] KVM: PPC: Book3S HV: Align gfn to L1 page size when inserting nest-rmap entry Date: Fri, 21 Dec 2018 14:28:40 +1100 Message-Id: <20181221032843.13012-3-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20181221032843.13012-1-sjitindarsingh@gmail.com> References: <20181221032843.13012-1-sjitindarsingh@gmail.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Nested rmap entries are used to store the translation from L1 gpa to L2 gpa when entries are inserted into the shadow (nested) page tables. This rmap list is located by indexing the rmap array in the memslot by L1 gfn. When we come to search for these entries we only know the L1 page size (which could be PAGE_SIZE, 2M or a 1G page) and so can only select a gfn aligned to that size. This means that when we insert the entry, so we can find it later, we need to align the gfn we use to select the rmap list in which to insert the entry to L1 page size as well. By not doing this we were missing nested rmap entries when modifying L1 ptes which were for a page also passed through to an L2 guest. Signed-off-by: Suraj Jitindar Singh Reviewed-by: David Gibson --- arch/powerpc/kvm/book3s_hv_nested.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/kvm/book3s_hv_nested.c b/arch/powerpc/kvm/book3s_hv_nested.c index 0dfbf093bde5..9dfb927ea14f 100644 --- a/arch/powerpc/kvm/book3s_hv_nested.c +++ b/arch/powerpc/kvm/book3s_hv_nested.c @@ -1226,6 +1226,8 @@ static long int __kvmhv_nested_page_fault(struct kvm_vcpu *vcpu, return ret; shift = kvmppc_radix_level_to_shift(level); } + /* Align gfn to the start of the page */ + gfn = (gpa & ~((1UL << shift) - 1)) >> PAGE_SHIFT; /* 3. Compute the pte we need to insert for nest_gpa -> host r_addr */ From patchwork Fri Dec 21 03:28:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Jitindar Singh X-Patchwork-Id: 10739845 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DE14D13A4 for ; Fri, 21 Dec 2018 03:29:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CE4F528761 for ; Fri, 21 Dec 2018 03:29:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C2424287D2; Fri, 21 Dec 2018 03:29:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7DAB028761 for ; Fri, 21 Dec 2018 03:29:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388974AbeLUD3I (ORCPT ); Thu, 20 Dec 2018 22:29:08 -0500 Received: from mail-pf1-f193.google.com ([209.85.210.193]:42781 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388804AbeLUD3I (ORCPT ); Thu, 20 Dec 2018 22:29:08 -0500 Received: by mail-pf1-f193.google.com with SMTP id 64so1890677pfr.9; Thu, 20 Dec 2018 19:29:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=N/q/uSTJVX5m5Pmv6H437WlsDzL0YkXhd7ax7HqAklE=; b=ih6XMfU6PYs+bdWyOjagfoXPW6m2+Gm0L1bBXcMhvhWylnaK5OhIvLJcrVEDR3K+Hl +tbdIJYBAWklypwZN5fuepfFx/JLU6U0jRSCDlH+VKZaOiNegHXnUo02TS2OiqHJ54f7 StI6FTHI6FMJ1ajG69CtWkpdhKl9YfOE7awiEWA65VEKmp0i5dsvvgW5Xa5kEAdUXX7Z f8FYZ+KIIAzaqWzTA2bsLnnwa2aQqlfb67XykpUNYZEiQY9femjlwAiNvSlFrZwPIQlg 4z85Gpy/3NN00UG5Ix47HwHTB0/vKW1MSmoG1eUzMeVZQmZveHDyM1Grk8oIvXsCIqYM TqCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=N/q/uSTJVX5m5Pmv6H437WlsDzL0YkXhd7ax7HqAklE=; b=NRfBmaq1V9JIJ4YJT/LknF3YGdDuvKPwrvxF9jR/PM3rLkgKCb0d4eAq3Cj6tdlKzK NyTua73JydBbGSg6JR8PxRb44yPSPsqpVxcuTPHpe4aFSGeci8J73k9gqrS9CgM3FwyC 0vAZupnN1KrJP/+3L4hA5ceVGDey84OM1hTN0c36XjEnSZn9vP0772pWXeMNnqHy+E1R dIzKnIYIeXLqBhNOt0jDEFHhJt8WAEqwGKwwspV90R9axqYRIaTFqol3gj2ftCczsQqo QXiYT2Lb7JVMXt0L0mz7Aq8AE2ubU1tiwjtRznkmmpgaj2yCpd5gqPypN8kypXf7xu9E 3DBQ== X-Gm-Message-State: AJcUukcmhuYtrK1U82IH3K7rn9vjhtetGd55ak/FoY9OQgcaOUSfF54o A6QI+pv9EqrbwePqG0rrV+d8tUu3 X-Google-Smtp-Source: ALg8bN6uf5xvXSnaEKFtrNxC3r7D48weCxlOU/DaM3LJ8sYpaolUVQe1/p2icCRe6UHHr7m5l4uPdA== X-Received: by 2002:a63:4002:: with SMTP id n2mr776894pga.137.1545362947278; Thu, 20 Dec 2018 19:29:07 -0800 (PST) Received: from surajjs2.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id n68sm33062582pfb.62.2018.12.20.19.29.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 20 Dec 2018 19:29:06 -0800 (PST) From: Suraj Jitindar Singh To: kvm-ppc@vger.kernel.org Cc: kvm@vger.kernel.org, paulus@ozlabs.org, david@gibson.dropbear.id.au, mdroth@linux.vnet.ibm.com, Suraj Jitindar Singh Subject: [PATCH 3/5] KVM: PPC: Book3S HV: Apply combination of host and l1 pte rc for nested guest Date: Fri, 21 Dec 2018 14:28:41 +1100 Message-Id: <20181221032843.13012-4-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20181221032843.13012-1-sjitindarsingh@gmail.com> References: <20181221032843.13012-1-sjitindarsingh@gmail.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The shadow page table contains ptes for translations from nested guest address to host address. Currently when creating these ptes we take the rc bits from the pte for the L1 guest address to host address translation. This is incorrect as we must also factor in the rc bits from the pte for the nested guest address to L1 guest address translation (as contained in the L1 guest partition table for the nested guest). By not calculating these bits correctly L1 may not have been correctly notified when it needed to update its rc bits in the partition table it maintains for its nested guest. Modify the code so that the rc bits in the resultant pte for the L2->L0 translation are the 'and' of the rc bits in the L2->L1 pte and the L1->L0 pte, also accounting for whether this was a write access when setting the dirty bit. Signed-off-by: Suraj Jitindar Singh Reviewed-by: David Gibson --- arch/powerpc/kvm/book3s_hv_nested.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/powerpc/kvm/book3s_hv_nested.c b/arch/powerpc/kvm/book3s_hv_nested.c index 9dfb927ea14f..4a52f82649e5 100644 --- a/arch/powerpc/kvm/book3s_hv_nested.c +++ b/arch/powerpc/kvm/book3s_hv_nested.c @@ -1235,6 +1235,9 @@ static long int __kvmhv_nested_page_fault(struct kvm_vcpu *vcpu, perm |= gpte.may_read ? 0UL : _PAGE_READ; perm |= gpte.may_write ? 0UL : _PAGE_WRITE; perm |= gpte.may_execute ? 0UL : _PAGE_EXEC; + /* Only set accessed/dirty (rc) bits if set in host and l1 guest ptes */ + perm |= (gpte.rc & _PAGE_ACCESSED) ? 0UL : _PAGE_ACCESSED; + perm |= ((gpte.rc & _PAGE_DIRTY) && writing) ? 0UL : _PAGE_DIRTY; pte = __pte(pte_val(pte) & ~perm); /* What size pte can we insert? */ From patchwork Fri Dec 21 03:28:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Jitindar Singh X-Patchwork-Id: 10739847 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 492C113AD for ; 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Thu, 20 Dec 2018 19:29:11 -0800 (PST) Received: from surajjs2.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id n68sm33062582pfb.62.2018.12.20.19.29.07 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 20 Dec 2018 19:29:10 -0800 (PST) From: Suraj Jitindar Singh To: kvm-ppc@vger.kernel.org Cc: kvm@vger.kernel.org, paulus@ozlabs.org, david@gibson.dropbear.id.au, mdroth@linux.vnet.ibm.com, Suraj Jitindar Singh Subject: [PATCH 4/5] KVM: PPC: Book3S HV: Introduce kvmhv_update_nest_rmap_rc_list() Date: Fri, 21 Dec 2018 14:28:42 +1100 Message-Id: <20181221032843.13012-5-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20181221032843.13012-1-sjitindarsingh@gmail.com> References: <20181221032843.13012-1-sjitindarsingh@gmail.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Introduce a function kvmhv_update_nest_rmap_rc_list() which for a given nest_rmap list will traverse it, find the corresponding pte in the shadow page tables, and if it still maps the same host page update the rc bits accordingly. Signed-off-by: Suraj Jitindar Singh --- arch/powerpc/include/asm/kvm_book3s.h | 2 ++ arch/powerpc/include/asm/kvm_book3s_64.h | 3 ++ arch/powerpc/kvm/book3s_64_mmu_radix.c | 4 +-- arch/powerpc/kvm/book3s_hv_nested.c | 51 ++++++++++++++++++++++++++++++++ 4 files changed, 58 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h index 09f8e9ba69bc..fa9240c8f318 100644 --- a/arch/powerpc/include/asm/kvm_book3s.h +++ b/arch/powerpc/include/asm/kvm_book3s.h @@ -196,6 +196,8 @@ extern int kvmppc_mmu_radix_translate_table(struct kvm_vcpu *vcpu, gva_t eaddr, int table_index, u64 *pte_ret_p); extern int kvmppc_mmu_radix_xlate(struct kvm_vcpu *vcpu, gva_t eaddr, struct kvmppc_pte *gpte, bool data, bool iswrite); +extern void kvmppc_radix_tlbie_page(struct kvm *kvm, unsigned long addr, + unsigned int pshift, unsigned int lpid); extern void kvmppc_unmap_pte(struct kvm *kvm, pte_t *pte, unsigned long gpa, unsigned int shift, struct kvm_memory_slot *memslot, unsigned int lpid); diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h index 6d298145d564..2a57c99d576f 100644 --- a/arch/powerpc/include/asm/kvm_book3s_64.h +++ b/arch/powerpc/include/asm/kvm_book3s_64.h @@ -624,6 +624,9 @@ extern int kvmppc_create_pte(struct kvm *kvm, pgd_t *pgtable, pte_t pte, unsigned long *rmapp, struct rmap_nested **n_rmap); extern void kvmhv_insert_nest_rmap(struct kvm *kvm, unsigned long *rmapp, struct rmap_nested **n_rmap); +extern void kvmhv_update_nest_rmap_rc_list(struct kvm *kvm, unsigned long *rmapp, + unsigned long clr, unsigned long set, + unsigned long hpa, unsigned long nbytes); extern void kvmhv_remove_nest_rmap_range(struct kvm *kvm, struct kvm_memory_slot *memslot, unsigned long gpa, unsigned long hpa, diff --git a/arch/powerpc/kvm/book3s_64_mmu_radix.c b/arch/powerpc/kvm/book3s_64_mmu_radix.c index d68162ee159b..f920664aaa11 100644 --- a/arch/powerpc/kvm/book3s_64_mmu_radix.c +++ b/arch/powerpc/kvm/book3s_64_mmu_radix.c @@ -197,8 +197,8 @@ int kvmppc_mmu_radix_xlate(struct kvm_vcpu *vcpu, gva_t eaddr, return 0; } -static void kvmppc_radix_tlbie_page(struct kvm *kvm, unsigned long addr, - unsigned int pshift, unsigned int lpid) +void kvmppc_radix_tlbie_page(struct kvm *kvm, unsigned long addr, + unsigned int pshift, unsigned int lpid) { unsigned long psize = PAGE_SIZE; int psi; diff --git a/arch/powerpc/kvm/book3s_hv_nested.c b/arch/powerpc/kvm/book3s_hv_nested.c index 4a52f82649e5..e69003aaf61d 100644 --- a/arch/powerpc/kvm/book3s_hv_nested.c +++ b/arch/powerpc/kvm/book3s_hv_nested.c @@ -687,6 +687,57 @@ void kvmhv_insert_nest_rmap(struct kvm *kvm, unsigned long *rmapp, *n_rmap = NULL; } +static void kvmhv_update_nest_rmap_rc(struct kvm *kvm, u64 n_rmap, + unsigned long clr, unsigned long set, + unsigned long hpa, unsigned long mask) +{ + struct kvm_nested_guest *gp; + unsigned long gpa; + unsigned int shift, lpid; + pte_t *ptep; + + gpa = n_rmap & RMAP_NESTED_GPA_MASK; + lpid = (n_rmap & RMAP_NESTED_LPID_MASK) >> RMAP_NESTED_LPID_SHIFT; + gp = kvmhv_find_nested(kvm, lpid); + if (!gp) + return; + + /* Find the pte */ + ptep = __find_linux_pte(gp->shadow_pgtable, gpa, NULL, &shift); + /* + * If the pte is present and the pfn is still the same, update the pte. + * If the pfn has changed then this is a stale rmap entry, the nested + * gpa actually points somewhere else now, and there is nothing to do. + * XXX A future optimisation would be to remove the rmap entry here. + */ + if (ptep && pte_present(*ptep) && ((pte_val(*ptep) & mask) == hpa)) { + __radix_pte_update(ptep, clr, set); + kvmppc_radix_tlbie_page(kvm, gpa, shift, lpid); + } +} + +/* + * For a given list of rmap entries, update the rc bits in all ptes in shadow + * page tables for nested guests which are referenced by the rmap list. + */ +void kvmhv_update_nest_rmap_rc_list(struct kvm *kvm, unsigned long *rmapp, + unsigned long clr, unsigned long set, + unsigned long hpa, unsigned long nbytes) +{ + struct llist_node *entry = ((struct llist_head *) rmapp)->first; + struct rmap_nested *cursor; + unsigned long rmap, mask; + + if ((clr | set) & ~(_PAGE_DIRTY | _PAGE_ACCESSED)) + return; + + mask = PTE_RPN_MASK & ~(nbytes - 1); + hpa &= mask; + + for_each_nest_rmap_safe(cursor, entry, &rmap) + kvmhv_update_nest_rmap_rc(kvm, rmap, clr, set, hpa, mask); +} + static void kvmhv_remove_nest_rmap(struct kvm *kvm, u64 n_rmap, unsigned long hpa, unsigned long mask) { From patchwork Fri Dec 21 03:28:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Jitindar Singh X-Patchwork-Id: 10739849 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8D95C13AD for ; Fri, 21 Dec 2018 03:29:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7DC15287A3 for ; Fri, 21 Dec 2018 03:29:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 722D928876; 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Thu, 20 Dec 2018 19:29:15 -0800 (PST) Received: from surajjs2.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id n68sm33062582pfb.62.2018.12.20.19.29.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 20 Dec 2018 19:29:14 -0800 (PST) From: Suraj Jitindar Singh To: kvm-ppc@vger.kernel.org Cc: kvm@vger.kernel.org, paulus@ozlabs.org, david@gibson.dropbear.id.au, mdroth@linux.vnet.ibm.com, Suraj Jitindar Singh Subject: [PATCH 5/5] KVM: PPC: Book3S HV: Keep rc bits in shadow pgtable in sync with host Date: Fri, 21 Dec 2018 14:28:43 +1100 Message-Id: <20181221032843.13012-6-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20181221032843.13012-1-sjitindarsingh@gmail.com> References: <20181221032843.13012-1-sjitindarsingh@gmail.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The rc bits contained in ptes are used to track whether a page has been accessed and whether it is dirty. The accessed bit is used to age a page and the dirty bit to track whether a page is dirty or not. Now that we support nested guests there are three ptes which track the state of the same page: - The partition table in the L1 guest, mapping L2->L1 address - The partition table in the host for the L1 guest, mapping L1->L0 address - The shadow partition table for the nested guest in the host, mapping L2->L0 address The idea is to attempt to keep the rc state of these three ptes in sync, when both setting and clearing rc bits. When setting the bits we achieve consistency by: - Initially setting the bits in the shadow page table as the 'and' of the other two. - When updating in software the rc bits in the shadow page table we ensure the state is consistent with the other two locations first, and update these before reflecting the change into the shadow page table. i.e. only set the bits in the L2->L0 pte if also set in both the L2->L1 and the L1->L0 pte. When clearing the bits we achieve consistency by: - The rc bits in the shadow page table are only cleared when discarding a pte, and we don't need to record this as if either bit is set then it must also be set in the pte mapping L1->L0. - When L1 clears an rc bit in the L2->L1 mapping it __should__ issue a tlbie instruction - This means we will discard the pte from the shadow page table meaning the mapping will have to be setup again. - When setup the pte again in the shadow page table we will ensure consistency with the L2->L1 pte. - When the host clears an rc bit in the L1->L0 mapping we need to also clear the bit in any ptes in the shadow page table which map the same gfn so we will be notified if a nested guest accesses the page. This case is what this patch specifically concerns. - We can search the nest_rmap list for that given gfn and clear the same bit from all corresponding ptes in shadow page tables. - If a nested guest causes either of the rc bits to be set by software in future then we will update the L1->L0 pte and maintain consistency. With the process outlined above we aim to maintain consistency of the 3 pte locations where we track rc for a given guest page. Signed-off-by: Suraj Jitindar Singh --- arch/powerpc/kvm/book3s_64_mmu_radix.c | 26 ++++++++++++++++++++------ 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/kvm/book3s_64_mmu_radix.c b/arch/powerpc/kvm/book3s_64_mmu_radix.c index f920664aaa11..52187ae64a9a 100644 --- a/arch/powerpc/kvm/book3s_64_mmu_radix.c +++ b/arch/powerpc/kvm/book3s_64_mmu_radix.c @@ -872,7 +872,7 @@ int kvm_unmap_radix(struct kvm *kvm, struct kvm_memory_slot *memslot, return 0; } -/* Called with kvm->lock held */ +/* Called with kvm->mmu_lock held */ int kvm_age_radix(struct kvm *kvm, struct kvm_memory_slot *memslot, unsigned long gfn) { @@ -880,18 +880,24 @@ int kvm_age_radix(struct kvm *kvm, struct kvm_memory_slot *memslot, unsigned long gpa = gfn << PAGE_SHIFT; unsigned int shift; int ref = 0; + unsigned long old, *rmapp; ptep = __find_linux_pte(kvm->arch.pgtable, gpa, NULL, &shift); if (ptep && pte_present(*ptep) && pte_young(*ptep)) { - kvmppc_radix_update_pte(kvm, ptep, _PAGE_ACCESSED, 0, - gpa, shift); + old = kvmppc_radix_update_pte(kvm, ptep, _PAGE_ACCESSED, 0, + gpa, shift); /* XXX need to flush tlb here? */ + /* Also clear bit in ptes in shadow pgtable for nested guests */ + rmapp = &memslot->arch.rmap[gfn - memslot->base_gfn]; + kvmhv_update_nest_rmap_rc_list(kvm, rmapp, _PAGE_ACCESSED, 0, + old & PTE_RPN_MASK, + 1UL << shift); ref = 1; } return ref; } -/* Called with kvm->lock held */ +/* Called with kvm->mmu_lock held */ int kvm_test_age_radix(struct kvm *kvm, struct kvm_memory_slot *memslot, unsigned long gfn) { @@ -915,15 +921,23 @@ static int kvm_radix_test_clear_dirty(struct kvm *kvm, pte_t *ptep; unsigned int shift; int ret = 0; + unsigned long old, *rmapp; ptep = __find_linux_pte(kvm->arch.pgtable, gpa, NULL, &shift); if (ptep && pte_present(*ptep) && pte_dirty(*ptep)) { ret = 1; if (shift) ret = 1 << (shift - PAGE_SHIFT); - kvmppc_radix_update_pte(kvm, ptep, _PAGE_DIRTY, 0, - gpa, shift); + spin_lock(&kvm->mmu_lock); + old = kvmppc_radix_update_pte(kvm, ptep, _PAGE_DIRTY, 0, + gpa, shift); kvmppc_radix_tlbie_page(kvm, gpa, shift, kvm->arch.lpid); + /* Also clear bit in ptes in shadow pgtable for nested guests */ + rmapp = &memslot->arch.rmap[gfn - memslot->base_gfn]; + kvmhv_update_nest_rmap_rc_list(kvm, rmapp, _PAGE_DIRTY, 0, + old & PTE_RPN_MASK, + 1UL << shift); + spin_unlock(&kvm->mmu_lock); } return ret; }