From patchwork Wed Dec 15 14:17:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yann Gautier X-Patchwork-Id: 12678415 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08678C433F5 for ; Wed, 15 Dec 2021 14:18:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243313AbhLOOS0 (ORCPT ); Wed, 15 Dec 2021 09:18:26 -0500 Received: from mx07-00178001.pphosted.com ([185.132.182.106]:36106 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243292AbhLOOSX (ORCPT ); Wed, 15 Dec 2021 09:18:23 -0500 Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1BFBf3DC026365; Wed, 15 Dec 2021 15:17:55 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=av9SREGRIP3BmGxg7nqmThmWDEKblw7r0lH+mZ9Ul9w=; b=rEDw3AhrFntwmEgHZNMhDhSHUQn5SIJti1sayN5WzG50wv5BqtT3leYvWcW+ZDeVmzbC CACX0pz1ixN2pc33je7+wu92/VgJRw02ETlYEYzjenpatRjaacflTV9shvoXq9v+WomV y7y+ADQ4B/6FNAoLp8YqDNu+j4zhkKcz5v6EE1iUSync6o+G8Eqkma9+5P0n1mjs5Rho 9uyhj3cRHViM5dSZUqrl+9R+7i3YxeZu2UowJ90PJF2xr2H+1vGRNPgd1bAbPP4nR2x+ RQmq0DEBI3hihGIuoDzLDvrH45+wn1RKQqpbIvi+YCGIEqfEgISxBMfffUImbXCxDDB8 Nw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3cyfpxgs9q-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 15 Dec 2021 15:17:55 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E7244100038; Wed, 15 Dec 2021 15:17:54 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id DCBDE21EB8F; Wed, 15 Dec 2021 15:17:54 +0100 (CET) Received: from localhost (10.75.127.45) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.26; Wed, 15 Dec 2021 15:17:54 +0100 From: Yann Gautier To: Ulf Hansson , Russell King , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Linus Walleij , Vladimir Zapolskiy , , Marek Vasut , Christophe Kerello , Ludovic Barre , , , , CC: Yann Gautier Subject: [PATCH 1/4] mmc: mmci: Add support for sdmmc variant revision v2.2 Date: Wed, 15 Dec 2021 15:17:24 +0100 Message-ID: <20211215141727.4901-2-yann.gautier@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211215141727.4901-1-yann.gautier@foss.st.com> References: <20211215141727.4901-1-yann.gautier@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG1NODE3.st.com (10.75.127.3) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-15_09,2021-12-14_01,2021-12-02_01 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org The change is only hardware, and does not need driver change: Added hardware flow control during transmit packet with variable delay. The new id is then added to the ids list structure. Signed-off-by: Yann Gautier --- drivers/mmc/host/mmci.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index c9cacd4d5b22..c0478dfa61b9 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -2435,6 +2435,11 @@ static const struct amba_id mmci_ids[] = { .mask = 0xf0ffffff, .data = &variant_stm32_sdmmcv2, }, + { + .id = 0x20253180, + .mask = 0xf0ffffff, + .data = &variant_stm32_sdmmcv2, + }, /* Qualcomm variants */ { .id = 0x00051180, From patchwork Wed Dec 15 14:17:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yann Gautier X-Patchwork-Id: 12678413 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 893FEC4332F for ; Wed, 15 Dec 2021 14:18:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243299AbhLOOSZ (ORCPT ); Wed, 15 Dec 2021 09:18:25 -0500 Received: from mx07-00178001.pphosted.com ([185.132.182.106]:60906 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243291AbhLOOSX (ORCPT ); Wed, 15 Dec 2021 09:18:23 -0500 Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1BFAOooD015669; Wed, 15 Dec 2021 15:17:56 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=aLTUQlWYfOHOTGX+dtGdyYLjVVle0utawp5ro00t3MM=; b=TWAiTlmutrUw51v6/3okVtvRChAVlgaN4yWhDbTo8YCBKIQ40H5yEeO17FR0oRLkMqi7 owYDfUpjql5M27LUqckYZXlZZTPmyQ/IRDrZa+zF47D6BuTVJdcgX9LtcruGVaJ9aYIM m9cT2kE42qoA9bPi4boWCJrU4Wt6bhLMRBC71Ed7BiQT1VOhVhW0MVghdq2YvDrlY1vz y0LkZE7oBDj8LbfTYAvMS03mMxMxH9MkhaOeTXiMrvhC/VZxJXY4mYk5T3oRTq0G9hAn wyCrKCMcNwG/axFFEbOkaKxiRK50KXZz+nku3xwJbJOQb1NTrO4nyhrRDRKzifWniUoW 5Q== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3cyeka95m0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 15 Dec 2021 15:17:56 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 99E22100039; Wed, 15 Dec 2021 15:17:55 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 91E2A21EB8F; Wed, 15 Dec 2021 15:17:55 +0100 (CET) Received: from localhost (10.75.127.45) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.26; Wed, 15 Dec 2021 15:17:55 +0100 From: Yann Gautier To: Ulf Hansson , Russell King , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Linus Walleij , Vladimir Zapolskiy , , Marek Vasut , Christophe Kerello , Ludovic Barre , , , , CC: Yann Gautier Subject: [PATCH 2/4] mmc: mmci: increase stm32 sdmmcv2 clock max freq Date: Wed, 15 Dec 2021 15:17:25 +0100 Message-ID: <20211215141727.4901-3-yann.gautier@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211215141727.4901-1-yann.gautier@foss.st.com> References: <20211215141727.4901-1-yann.gautier@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-15_09,2021-12-14_01,2021-12-02_01 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org The variant->f_max is dependent on the IP, not on the SoC where it is embedded. Set the max frequency of its source clock to 267MHz. The frequency used will be limited by the IOs max frequency, set in the SoC device tree. Signed-off-by: Yann Gautier --- drivers/mmc/host/mmci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index c0478dfa61b9..45b8608c935c 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -280,7 +280,7 @@ static struct variant_data variant_stm32_sdmmc = { static struct variant_data variant_stm32_sdmmcv2 = { .fifosize = 16 * 4, .fifohalfsize = 8 * 4, - .f_max = 208000000, + .f_max = 267000000, .stm32_clkdiv = true, .cmdreg_cpsm_enable = MCI_CPSM_STM32_ENABLE, .cmdreg_lrsp_crc = MCI_CPSM_STM32_LRSP_CRC, From patchwork Wed Dec 15 14:17:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yann Gautier X-Patchwork-Id: 12678417 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5DE70C43217 for ; Wed, 15 Dec 2021 14:18:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243302AbhLOOSX (ORCPT ); Wed, 15 Dec 2021 09:18:23 -0500 Received: from mx07-00178001.pphosted.com ([185.132.182.106]:60890 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237613AbhLOOSX (ORCPT ); Wed, 15 Dec 2021 09:18:23 -0500 Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1BFAOoxL015895; Wed, 15 Dec 2021 15:17:56 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=do/02SlyNQ2+a/wzGPh8B/PB1HnlUOgEgfqJOwrlJMQ=; b=NE9yFbuy++muTva/j7V/fjsq4AqxbMX3E3lC/Yfg+BTr9yuZjgwKiVYY0msnnL4gia4h i2rrKFBvO89NKtzHWFJ8oC9iPQdVzX+2Yj48c8vlUr0nE+waB8ick/slqdyt9Vdq/V8u Eghz7r0BD+pz+CsozE2b4YuMyAFok70V21stuolRUfjkukAOrWWgomLBqaIXUoLLJLs5 DevNEslNESPmutRvu7Xpu0cvZNHQp8bIBfSUFoWSr/zsZXi3/K13VaZrNMUm+uoKTNSd G8X7t4j+LvYvJpXZBAFfjp1FCDk3Cqjb34TdMjDxZHAKJsR+9oe5ee0i85LSw48ItHan Ag== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3cyeka95m2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 15 Dec 2021 15:17:56 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6AA2C10002A; Wed, 15 Dec 2021 15:17:56 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 62B0D21EB8F; Wed, 15 Dec 2021 15:17:56 +0100 (CET) Received: from localhost (10.75.127.44) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.26; Wed, 15 Dec 2021 15:17:55 +0100 From: Yann Gautier To: Ulf Hansson , Russell King , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Linus Walleij , Vladimir Zapolskiy , , Marek Vasut , Christophe Kerello , Ludovic Barre , , , , CC: Yann Gautier Subject: [PATCH 3/4] mmc: mmci: stm32: clear DLYB_CR after sending tuning command Date: Wed, 15 Dec 2021 15:17:26 +0100 Message-ID: <20211215141727.4901-4-yann.gautier@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211215141727.4901-1-yann.gautier@foss.st.com> References: <20211215141727.4901-1-yann.gautier@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-15_09,2021-12-14_01,2021-12-02_01 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org During test campaign, and especially after several unbind/bind sequences, it has been seen that the SD-card on SDMMC1 thread could freeze. The freeze always appear on a CMD23 following a CMD19. Checking SDMMC internal registers shows that the tuning command (CMD19) has failed. The freeze is then due to the delay block involved in the tuning sequence. To correct this, clear the delay block register DLYB_CR register after the tuning commands. Signed-off-by: Christophe Kerello Signed-off-by: Yann Gautier --- drivers/mmc/host/mmci_stm32_sdmmc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mmc/host/mmci_stm32_sdmmc.c b/drivers/mmc/host/mmci_stm32_sdmmc.c index fdaa11f92fe6..a75d3dd34d18 100644 --- a/drivers/mmc/host/mmci_stm32_sdmmc.c +++ b/drivers/mmc/host/mmci_stm32_sdmmc.c @@ -441,6 +441,8 @@ static int sdmmc_dlyb_phase_tuning(struct mmci_host *host, u32 opcode) return -EINVAL; } + writel_relaxed(0, dlyb->base + DLYB_CR); + phase = end_of_len - max_len / 2; sdmmc_dlyb_set_cfgr(dlyb, dlyb->unit, phase, false); From patchwork Wed Dec 15 14:17:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yann Gautier X-Patchwork-Id: 12678409 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EF747C433F5 for ; Wed, 15 Dec 2021 14:18:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243295AbhLOOSX (ORCPT ); Wed, 15 Dec 2021 09:18:23 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:33392 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S237528AbhLOOSW (ORCPT ); Wed, 15 Dec 2021 09:18:22 -0500 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1BF9JQ9C011420; Wed, 15 Dec 2021 15:17:57 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=KgEN0FRgdT1cJ5AXMmY5RUzHd3EhRYCA7X2wqmj5vvc=; b=6Wp+V5vYPW9IY1+KGwifxkAD+hGrekVz5qWE4W2E2hcgDf/mgYPodhklJwSqUTUva/Pb rj0gpzXoTA5oJq9f2UoB6PmWN9IIqV/HF08ZsdKXVf3VnaXXTKlJGnc538QCN35RtqU3 QBFHlsmQMwjsCT6PThphksFG5wzcjOA31LxSOUO5rdyZrITeq9HTUS/a53BKyn5pYe2g reTW9GWlRGJIRqjWYOVzF7UU7fdiJswCmp25mmekdT+vVbyocaMX7TNBY2G6XxBa4VFJ 3IfSkMmrop3JSnmm5AL83ix8nT6NF7wAkAuDVlTjr0r9hZZEif2Ud6qqp0XkrfDgg1/+ 4w== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3cy79j42k7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 15 Dec 2021 15:17:57 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 29465100034; Wed, 15 Dec 2021 15:17:57 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 20EC621EB8F; Wed, 15 Dec 2021 15:17:57 +0100 (CET) Received: from localhost (10.75.127.44) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.26; Wed, 15 Dec 2021 15:17:56 +0100 From: Yann Gautier To: Ulf Hansson , Russell King , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Linus Walleij , Vladimir Zapolskiy , , Marek Vasut , Christophe Kerello , Ludovic Barre , , , , CC: Yann Gautier Subject: [PATCH 4/4] mmc: mmci: add hs200 support for stm32 sdmmc Date: Wed, 15 Dec 2021 15:17:27 +0100 Message-ID: <20211215141727.4901-5-yann.gautier@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211215141727.4901-1-yann.gautier@foss.st.com> References: <20211215141727.4901-1-yann.gautier@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-15_09,2021-12-14_01,2021-12-02_01 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Use feedback clock for HS200 mode, as for SDR104. The HS200 mode can be enabled through DT by using mmc-hs200-1_8v. It is possible to use it on STM32MP13, but not STM32MP15 platforms. Signed-off-by: Ludovic Barre Signed-off-by: Yann Gautier --- drivers/mmc/host/mmci_stm32_sdmmc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/mmci_stm32_sdmmc.c b/drivers/mmc/host/mmci_stm32_sdmmc.c index a75d3dd34d18..9c13f2c31365 100644 --- a/drivers/mmc/host/mmci_stm32_sdmmc.c +++ b/drivers/mmc/host/mmci_stm32_sdmmc.c @@ -241,11 +241,12 @@ static void mmci_sdmmc_set_clkreg(struct mmci_host *host, unsigned int desired) /* * SDMMC_FBCK is selected when an external Delay Block is needed - * with SDR104. + * with SDR104 or HS200. */ if (host->mmc->ios.timing >= MMC_TIMING_UHS_SDR50) { clk |= MCI_STM32_CLK_BUSSPEED; - if (host->mmc->ios.timing == MMC_TIMING_UHS_SDR104) { + if (host->mmc->ios.timing == MMC_TIMING_UHS_SDR104 || + host->mmc->ios.timing == MMC_TIMING_MMC_HS200) { clk &= ~MCI_STM32_CLK_SEL_MSK; clk |= MCI_STM32_CLK_SELFBCK; }