From patchwork Wed Dec 15 17:16:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12678803 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C709C433F5 for ; Wed, 15 Dec 2021 17:16:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245230AbhLORQr (ORCPT ); Wed, 15 Dec 2021 12:16:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33728 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235266AbhLORQr (ORCPT ); Wed, 15 Dec 2021 12:16:47 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D165C061574; Wed, 15 Dec 2021 09:16:47 -0800 (PST) From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1639588605; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=hTXOQ1FMkJ0+Ve5/rvFPORGJ7hh35Px6k1s7EMBqwmo=; b=i6Ikjou/b+Yv6lqIV32A3e7GrIvLIXj3odnZe3TCIDVaZVz2iBNvzwVInSKTb//rUts3UC JXIUPspxUbLjL9vLFCxTqkEmsPcQqa0jlRZz9J/ERXHS6IU+v5Pv+VEwjaIZfQH59cCNVG TqlToMkGDTbisox0dOJ/N64NarNbO3ICfcEhoFvRBVMDwbMb41vhNRSUHGUzt3KciwFYd7 KRvqTPgAkbaRf2bOiXIaKgM/dYKSqDiHD48+e3p3RQ+gRngvixMUmQX9dMSiQcMx2hbtZI cHrIArstu1gEQ3/ZZ5d7srqdLoqOVYjoPAeWdZ3az2kYFP70K+iy5VdJAoq5Kg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1639588605; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=hTXOQ1FMkJ0+Ve5/rvFPORGJ7hh35Px6k1s7EMBqwmo=; b=uXGey63VsKcnveGMEu+kEJG3x08mVaUqgXZXmEYNmGM1D3z+MIXuzL71XeYcsBJuZs9Whq rytYH1rq8fa5TmBg== To: LKML Cc: Bjorn Helgaas , Marc Zygnier , Alex Williamson , Kevin Tian , Jason Gunthorpe , Megha Dey , Ashok Raj , linux-pci@vger.kernel.org, Cedric Le Goater , Greg Kroah-Hartman , Bjorn Helgaas , Juergen Gross , xen-devel@lists.xenproject.org, Arnd Bergmann , Michael Ellerman , Benjamin Herrenschmidt , linuxppc-dev@lists.ozlabs.org, Stuart Yoder , Laurentiu Tudor , Nishanth Menon , Tero Kristo , Santosh Shilimkar , linux-arm-kernel@lists.infradead.org, Vinod Koul , dmaengine@vger.kernel.org, Mark Rutland , Will Deacon , Robin Murphy , Joerg Roedel , iommu@lists.linux-foundation.org, Jassi Brar , Peter Ujfalusi , Sinan Kaya Subject: [patch V4 09-01/35] PCI/MSI: Decouple MSI[-X] disable from pcim_release() In-Reply-To: <20211210221813.740644351@linutronix.de> References: <20211210221642.869015045@linutronix.de> <20211210221813.740644351@linutronix.de> Date: Wed, 15 Dec 2021 18:16:44 +0100 Message-ID: <87tuf9rdoj.ffs@tglx> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The MSI core will introduce runtime allocation of MSI related data. This data will be devres managed and has to be set up before enabling PCI/MSI[-X]. This would introduce an ordering issue vs. pcim_release(). The setup order is: pcim_enable_device() devres_alloc(pcim_release...); ... pci_irq_alloc() msi_setup_device_data() devres_alloc(msi_device_data_release, ...) and once the device is released these release functions are invoked in the opposite order: msi_device_data_release() ... pcim_release() pci_disable_msi[x]() which is obviously wrong, because pci_disable_msi[x]() requires the MSI data to be available to tear down the MSI[-X] interrupts. Remove the MSI[-X] teardown from pcim_release() and add an explicit action to be installed on the attempt of enabling PCI/MSI[-X]. This allows the MSI core data allocation to be ordered correctly in a subsequent step. Reported-by: Nishanth Menon Signed-off-by: Thomas Gleixner Reviewed-by: Greg Kroah-Hartman --- V4: New patch --- drivers/pci/msi/msi.c | 33 +++++++++++++++++++++++++++++++++ drivers/pci/pci.c | 5 ----- include/linux/pci.h | 3 ++- 3 files changed, 35 insertions(+), 6 deletions(-) --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -341,6 +341,31 @@ void pci_restore_msi_state(struct pci_de } EXPORT_SYMBOL_GPL(pci_restore_msi_state); +static void pcim_msi_release(void *pcidev) +{ + struct pci_dev *dev = pcidev; + + dev->is_msi_managed = false; + pci_free_irq_vectors(dev); +} + +/* + * Needs to be separate from pcim_release to prevent an ordering problem + * vs. msi_device_data_release() in the MSI core code. + */ +static int pcim_setup_msi_release(struct pci_dev *dev) +{ + int ret; + + if (!pci_is_managed(dev) || dev->is_msi_managed) + return 0; + + ret = devm_add_action(&dev->dev, pcim_msi_release, dev); + if (!ret) + dev->is_msi_managed = true; + return ret; +} + static struct msi_desc * msi_setup_entry(struct pci_dev *dev, int nvec, struct irq_affinity *affd) { @@ -884,6 +909,10 @@ static int __pci_enable_msi_range(struct if (nvec > maxvec) nvec = maxvec; + rc = pcim_setup_msi_release(dev); + if (rc) + return rc; + for (;;) { if (affd) { nvec = irq_calc_affinity_vectors(minvec, nvec, affd); @@ -927,6 +956,10 @@ static int __pci_enable_msix_range(struc if (WARN_ON_ONCE(dev->msix_enabled)) return -EINVAL; + rc = pcim_setup_msi_release(dev); + if (rc) + return rc; + for (;;) { if (affd) { nvec = irq_calc_affinity_vectors(minvec, nvec, affd); --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -2024,11 +2024,6 @@ static void pcim_release(struct device * struct pci_devres *this = res; int i; - if (dev->msi_enabled) - pci_disable_msi(dev); - if (dev->msix_enabled) - pci_disable_msix(dev); - for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) if (this->region_mask & (1 << i)) pci_release_region(dev, i); --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -425,7 +425,8 @@ struct pci_dev { unsigned int ats_enabled:1; /* Address Translation Svc */ unsigned int pasid_enabled:1; /* Process Address Space ID */ unsigned int pri_enabled:1; /* Page Request Interface */ - unsigned int is_managed:1; + unsigned int is_managed:1; /* Managed via devres */ + unsigned int is_msi_managed:1; /* MSI release via devres installed */ unsigned int needs_freset:1; /* Requires fundamental reset */ unsigned int state_saved:1; unsigned int is_physfn:1; From patchwork Wed Dec 15 17:19:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 12678805 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90E5AC433F5 for ; Wed, 15 Dec 2021 17:19:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245251AbhLORTw (ORCPT ); Wed, 15 Dec 2021 12:19:52 -0500 Received: from Galois.linutronix.de ([193.142.43.55]:49386 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245248AbhLORTv (ORCPT ); Wed, 15 Dec 2021 12:19:51 -0500 From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1639588790; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=8dWZtEdF7LamMiNHDQtUJa+ux0BuM6MSUIqH9b+Hvyo=; b=wYhmWV2tAzCQfd9US7tK/sDWCnBbJEkh0toY9VDuwtDZ0a56PMo8BoccPtbLPELWo9I28H HKc2neisW5z7nVF58H33hQ6I3JpDjp7x8Kvp/cCgjUvnYD8QdYGH61A1BeXSEXOYr4fYH5 DLBlYKQg7bDxik0O85eEeU6t0YgTJ460cdP5T6mA0DAEz4t2jvbnSoMRyHmCdRIsX+WU5+ q/5iZYQod3bSNBGwjqvNjip+w8Kzgei0iFMPfqmZqeU25htKL5R6ykYiRwqQfnG6lFz+mQ r3FvWyI39vnZ4v4UgiVkKOdpkffYfcVyqNIiIF+3PGfZRf0ksOR9s1/A7ZSHGA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1639588790; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=8dWZtEdF7LamMiNHDQtUJa+ux0BuM6MSUIqH9b+Hvyo=; b=lk+vW3OXeYaf8seyWIaOrmuYBvQZ09fZDnlpC9df3JMNaqJ74ZUxSByXPFwmhYxR0MLbL9 iLeRWTRdVJiovHBA== To: LKML Cc: Bjorn Helgaas , Marc Zygnier , Alex Williamson , Kevin Tian , Jason Gunthorpe , Megha Dey , Ashok Raj , linux-pci@vger.kernel.org, Cedric Le Goater , Greg Kroah-Hartman , Bjorn Helgaas , Juergen Gross , xen-devel@lists.xenproject.org, Arnd Bergmann , Michael Ellerman , Benjamin Herrenschmidt , linuxppc-dev@lists.ozlabs.org, Stuart Yoder , Laurentiu Tudor , Nishanth Menon , Tero Kristo , Santosh Shilimkar , linux-arm-kernel@lists.infradead.org, Vinod Koul , dmaengine@vger.kernel.org, Mark Rutland , Will Deacon , Robin Murphy , Joerg Roedel , iommu@lists.linux-foundation.org, Jassi Brar , Peter Ujfalusi , Sinan Kaya Subject: [patch V4 09-02/35] PCI/MSI: Allocate MSI device data on first use In-Reply-To: <87tuf9rdoj.ffs@tglx> References: <20211210221642.869015045@linutronix.de> <20211210221813.740644351@linutronix.de> <87tuf9rdoj.ffs@tglx> Date: Wed, 15 Dec 2021 18:19:49 +0100 Message-ID: <87r1adrdje.ffs@tglx> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Allocate MSI device data on first use, i.e. when a PCI driver invokes one of the PCI/MSI enablement functions. Add a wrapper function to ensure that the ordering vs. pcim_msi_release() is correct. Signed-off-by: Thomas Gleixner Reviewed-by: Greg Kroah-Hartman --- V4: Adopted to ensure devres ordering --- drivers/pci/msi/msi.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) --- a/drivers/pci/msi/msi.c +++ b/drivers/pci/msi/msi.c @@ -366,6 +366,19 @@ static int pcim_setup_msi_release(struct return ret; } +/* + * Ordering vs. devres: msi device data has to be installed first so that + * pcim_msi_release() is invoked before it on device release. + */ +static int pci_setup_msi_context(struct pci_dev *dev) +{ + int ret = msi_setup_device_data(&dev->dev); + + if (!ret) + ret = pcim_setup_msi_release(dev); + return ret; +} + static struct msi_desc * msi_setup_entry(struct pci_dev *dev, int nvec, struct irq_affinity *affd) { @@ -909,7 +922,7 @@ static int __pci_enable_msi_range(struct if (nvec > maxvec) nvec = maxvec; - rc = pcim_setup_msi_release(dev); + rc = pci_setup_msi_context(dev); if (rc) return rc; @@ -956,7 +969,7 @@ static int __pci_enable_msix_range(struc if (WARN_ON_ONCE(dev->msix_enabled)) return -EINVAL; - rc = pcim_setup_msi_release(dev); + rc = pci_setup_msi_context(dev); if (rc) return rc;