From patchwork Fri Dec 21 11:59:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raju P.L.S.S.S.N" X-Patchwork-Id: 10740339 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E5E2E161F for ; Fri, 21 Dec 2018 12:00:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D128C286C8 for ; Fri, 21 Dec 2018 12:00:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C4BDA286FE; Fri, 21 Dec 2018 12:00:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.2 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,FROM_LOCAL_NOVOWEL,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7A0FE286C8 for ; Fri, 21 Dec 2018 12:00:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390147AbeLUMAQ (ORCPT ); Fri, 21 Dec 2018 07:00:16 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:38864 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729924AbeLUMAQ (ORCPT ); Fri, 21 Dec 2018 07:00:16 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 3EA53608C5; Fri, 21 Dec 2018 12:00:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1545393615; bh=N9QFwoPHVle1Kh8jGl00bfT1oRAjbz2Q7x3QbyVcRpQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QsylXiGHUwGl+VBnVHWpKMWWtTuQYtU7CuZP+eLEbeYUfSu1pDbfjKiowmoVZIeOx sgomyqWNK/TAH1PI6FN6nICAJ4lCCM+MsyDBoJR9+NGSycixTnKe8ce6y9XIrpBUUA MSonJIE41BCK0buef9nLQ8e2eQs/CNM6LvjnlCqY= Received: from rplsssn-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rplsssn@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 955C6608D4; Fri, 21 Dec 2018 12:00:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1545393614; bh=N9QFwoPHVle1Kh8jGl00bfT1oRAjbz2Q7x3QbyVcRpQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=khSjI9ciVdkNM23AQxT7fMjArIzEmanrz9hPUUEtBK3WDuDCQjFWzjvgVt09jHEzT xeRsWQDVKubaJoTD9XNLwXqTDi1qZ2FGPsmmwSX+toEAFAmbyJFnH0ng5fI+3ccL2y HBhSca1t2nBu6haKYTWdX5AT94eXh8RkyrDzYN1Q= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 955C6608D4 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rplsssn@codeaurora.org From: "Raju P.L.S.S.S.N" To: andy.gross@linaro.org, david.brown@linaro.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, mka@chromium.org, ilina@codeaurora.org, "Raju P.L.S.S.S.N" Subject: [PATCH RFC 1/5] drivers: qcom: rpmh-rsc: Add regmap for RSC controller Date: Fri, 21 Dec 2018 17:29:42 +0530 Message-Id: <20181221115946.10095-2-rplsssn@codeaurora.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20181221115946.10095-1-rplsssn@codeaurora.org> References: <20181221115946.10095-1-rplsssn@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The RSC controller has dedicated control registers to send next wakeup timer vale to PDC. The timer value needs to be programmed by sleep driver client. So add regmap for the controller. Signed-off-by: Raju P.L.S.S.S.N --- drivers/soc/qcom/rpmh-rsc.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom/rpmh-rsc.c index 75bd9a83aef0..269fd0866647 100644 --- a/drivers/soc/qcom/rpmh-rsc.c +++ b/drivers/soc/qcom/rpmh-rsc.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -61,6 +62,13 @@ #define CMD_STATUS_ISSUED BIT(8) #define CMD_STATUS_COMPL BIT(16) +static const struct regmap_config rsc_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .fast_io = true, +}; + static u32 read_tcs_reg(struct rsc_drv *drv, int reg, int tcs_id, int cmd_id) { return readl_relaxed(drv->tcs_base + reg + RSC_DRV_TCS_OFFSET * tcs_id + @@ -534,6 +542,7 @@ static int rpmh_probe_tcs_config(struct platform_device *pdev, struct tcs_group *tcs; struct resource *res; void __iomem *base; + struct regmap *regmap; char drv_id[10] = {0}; snprintf(drv_id, ARRAY_SIZE(drv_id), "drv-%d", drv->id); @@ -542,6 +551,11 @@ static int rpmh_probe_tcs_config(struct platform_device *pdev, if (IS_ERR(base)) return PTR_ERR(base); + regmap = devm_regmap_init_mmio(&pdev->dev, base, + &rsc_regmap_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + ret = of_property_read_u32(dn, "qcom,tcs-offset", &offset); if (ret) return ret; From patchwork Fri Dec 21 11:59:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raju P.L.S.S.S.N" X-Patchwork-Id: 10740345 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 85617161F for ; Fri, 21 Dec 2018 12:00:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 76037286D1 for ; Fri, 21 Dec 2018 12:00:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6939D286E7; Fri, 21 Dec 2018 12:00:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.2 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,FROM_LOCAL_NOVOWEL,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 103D7286C8 for ; Fri, 21 Dec 2018 12:00:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390166AbeLUMAb (ORCPT ); Fri, 21 Dec 2018 07:00:31 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:39144 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390164AbeLUMAb (ORCPT ); Fri, 21 Dec 2018 07:00:31 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 5529860908; Fri, 21 Dec 2018 12:00:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1545393629; bh=baXAJ2fEM7WWPAT5htU4hjAlGh1NFKGb0UZDw0TvODk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JYcHgxkLLzFkjieLXIgGait+pLvEgvXiTX6x+18iv5dU1k+Cv8HsqXYEL857ZAQbq wK4LIdTyW5Xx2zKPA+FVsht98Oi+At8lurICPlXEwsHxFrh5PgD8PG80AlBms0Vo6R b1bXWwWuDsvfxNxsBhIkJDzBs6u6gwQXsVA9ar/M= Received: from rplsssn-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rplsssn@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 3121A60988; Fri, 21 Dec 2018 12:00:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1545393627; bh=baXAJ2fEM7WWPAT5htU4hjAlGh1NFKGb0UZDw0TvODk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SGTfL39Irk6+TKQXgCouUE4PSMR39LtVYwk81otAAPKGFjCDDNn3WL5z3/PT6QpMG mS/EWLi4nibeoIsD0fQRg0L8ymKxCyjvdvQUgFaxtfT6l+jndG0/Cn8cSKolaE6qi6 TUJXViNd2oKpwcUdWwSY93EEB535qpe9Rnb5p+FA= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3121A60988 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rplsssn@codeaurora.org From: "Raju P.L.S.S.S.N" To: andy.gross@linaro.org, david.brown@linaro.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, mka@chromium.org, ilina@codeaurora.org, "Raju P.L.S.S.S.N" Subject: [PATCH RFC 2/5] drivers: qcom: rpmh-pdc-timer: add PDC timer support for RPMH based SoCs Date: Fri, 21 Dec 2018 17:29:43 +0530 Message-Id: <20181221115946.10095-3-rplsssn@codeaurora.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20181221115946.10095-1-rplsssn@codeaurora.org> References: <20181221115946.10095-1-rplsssn@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP RPMH based targets require that the next wake-up timer value needs to be programmed to PDC (Power Domain Controller) which has its own timer and is in an always on power domain. PDC wakes-up the RSC and sets up the resources back in active state before the processor is woken up by a timer interrupt. Signed-off-by: Raju P.L.S.S.S.N --- drivers/soc/qcom/Kconfig | 9 ++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/rpmh-pdc-timer.c | 181 ++++++++++++++++++++++++++++++ 3 files changed, 191 insertions(+) create mode 100644 drivers/soc/qcom/rpmh-pdc-timer.c diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index 684cb51694d1..d04724ea5490 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -103,6 +103,15 @@ config QCOM_RPMH of hardware components aggregate requests for these resources and help apply the aggregated state on the resource. +config QCOM_RPMH_PDC_TIMER + bool "Qualcomm PDC Timer for RPM-Hardened based SoCs" + depends on CPU_PM + help + Support for QCOM platform next wakeup timer programming when + application processor enters SoC level deepest low power mode. + The wakeup is programmed to PDC (Power Domain Controller) + timer which is in always on power domain. + config QCOM_SMEM tristate "Qualcomm Shared Memory Manager (SMEM)" depends on ARCH_QCOM || COMPILE_TEST diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index f25b54cd6cf8..2ddb7e4f9098 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_QCOM_RMTFS_MEM) += rmtfs_mem.o obj-$(CONFIG_QCOM_RPMH) += qcom_rpmh.o qcom_rpmh-y += rpmh-rsc.o qcom_rpmh-y += rpmh.o +obj-$(CONFIG_QCOM_RPMH_PDC_TIMER) += rpmh-pdc-timer.o obj-$(CONFIG_QCOM_SMD_RPM) += smd-rpm.o obj-$(CONFIG_QCOM_SMEM) += smem.o obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o diff --git a/drivers/soc/qcom/rpmh-pdc-timer.c b/drivers/soc/qcom/rpmh-pdc-timer.c new file mode 100644 index 000000000000..108ea4a2df89 --- /dev/null +++ b/drivers/soc/qcom/rpmh-pdc-timer.c @@ -0,0 +1,181 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define ARCH_TIMER_HZ (19200000) +#define PDC_TIME_VALID_SHIFT 31 +#define PDC_TIME_UPPER_MASK 0xFFFFFF + +static struct regmap *rsc_regmap; +static resource_size_t cmd0_data_offset; +static resource_size_t cmd1_data_offset; +static uint64_t pdc_wakeup = ~0ULL; +static raw_spinlock_t pdc_wakeup_lock; + +/* convert micro sec to ticks or clock cycles + * + * time in cycles = (time in sec) * Freq + * = (time in sec) * 19200000 + * + * However, while converting micro sec to sec, + * there is a possibility of round of errors. + * So round of errors are minimized by finding + * nano sec. + */ +static uint64_t us_to_cycles(uint64_t time_us) +{ + uint64_t sec, nsec, time_cycles; + + sec = time_us; + do_div(sec, USEC_PER_SEC); + nsec = time_us - sec * USEC_PER_SEC; + + if (nsec > 0) { + nsec = nsec * NSEC_PER_USEC; + do_div(nsec, NSEC_PER_SEC); + } + + sec += nsec; + + time_cycles = (u64)sec * ARCH_TIMER_HZ; + + return time_cycles; +} + +/* + * Find next wakeup of a cpu and convert into + * cycles. + */ +static uint64_t get_next_wakeup_cycles(int cpu) +{ + ktime_t next_wakeup; + uint64_t next_wakeup_cycles; + + next_wakeup = tick_nohz_get_next_wakeup(cpu); + + /* + * Find the relative wakeup from current time + * in kernel time scale + */ + next_wakeup = ktime_sub(next_wakeup, ktime_get()); + + next_wakeup_cycles = us_to_cycles(ktime_to_us(next_wakeup)); + + /* + * Add current time in arch timer scale. + * This is needed as PDC match value is programmed + * with absolute value, not the relative value + * from current time + */ + next_wakeup_cycles += arch_counter_get_cntvct(); + + return next_wakeup_cycles; +} + +static void setup_pdc_wakeup_timer(uint64_t wakeup_cycles) +{ + u32 data0, data1; + + data0 = (wakeup_cycles >> 32) & PDC_TIME_UPPER_MASK; + data0 |= 1 << PDC_TIME_VALID_SHIFT; + data1 = (wakeup_cycles & 0xFFFFFFFF); + + regmap_write(rsc_regmap, cmd0_data_offset, data0); + regmap_write(rsc_regmap, cmd1_data_offset, data1); + +} + +static int cpu_pm_notifier(struct notifier_block *b, + unsigned long cmd, void *v) +{ + uint64_t cpu_next_wakeup; + + switch (cmd) { + case CPU_PM_ENTER: + cpu_next_wakeup = get_next_wakeup_cycles(smp_processor_id()); + raw_spin_lock(&pdc_wakeup_lock); + /* + * If PDC wakeup is expired or + * If current cpu next wakeup is early, + * program the same to pdc wakeup + */ + if ((pdc_wakeup < arch_counter_get_cntvct()) || + (cpu_next_wakeup < pdc_wakeup)) { + pdc_wakeup = cpu_next_wakeup; + setup_pdc_wakeup_timer(pdc_wakeup); + } + raw_spin_unlock(&pdc_wakeup_lock); + break; + default: + return NOTIFY_DONE; + } + + return NOTIFY_OK; +} + +static struct notifier_block cpu_pm_notifier_block = { + .notifier_call = cpu_pm_notifier, + .priority = -1, /* Should be last in the order of notifications */ +}; + +static int pdc_timer_probe(struct platform_device *pdev) +{ + struct device *pdc_timer_dev = &pdev->dev; + struct resource *res = NULL; + + if (IS_ERR_OR_NULL(pdc_timer_dev)) { + pr_err("%s fail\n", __func__); + return PTR_ERR(pdc_timer_dev); + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + pr_err("res not found\n"); + return -ENODEV; + } + cmd0_data_offset = res->start; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!res) { + pr_err("res not found\n"); + return -ENODEV; + } + cmd1_data_offset = res->start; + + rsc_regmap = dev_get_regmap(pdc_timer_dev->parent, NULL); + if (!rsc_regmap) { + pr_err("regmap for parent is not found\n"); + return -ENODEV; + } + + raw_spin_lock_init(&pdc_wakeup_lock); + cpu_pm_register_notifier(&cpu_pm_notifier_block); + + return 0; +} + +static const struct of_device_id pdc_timer_drv_match[] = { + { .compatible = "qcom,pdc-timer", }, + { } +}; + +static struct platform_driver pdc_timer_driver = { + .probe = pdc_timer_probe, + .driver = { + .name = KBUILD_MODNAME, + .of_match_table = pdc_timer_drv_match, + }, +}; +builtin_platform_driver(pdc_timer_driver); From patchwork Fri Dec 21 11:59:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raju P.L.S.S.S.N" X-Patchwork-Id: 10740347 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EA6CF161F for ; Fri, 21 Dec 2018 12:00:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DB48E286D1 for ; Fri, 21 Dec 2018 12:00:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CE82828706; Fri, 21 Dec 2018 12:00:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.2 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,FROM_LOCAL_NOVOWEL,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7F92E286D1 for ; Fri, 21 Dec 2018 12:00:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387442AbeLUMAk (ORCPT ); Fri, 21 Dec 2018 07:00:40 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:39384 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732607AbeLUMAk (ORCPT ); Fri, 21 Dec 2018 07:00:40 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id A25EF609BD; Fri, 21 Dec 2018 12:00:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1545393639; bh=VPohEwpwkQAhAd6+PHCr4kP8c1qHYsLHeJ+W1h/ZNCw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TqXpAVgGVeEqWnZv61VakAVnghx0yB2yVvlmNaQqu9NUQ/l9wzkIAobXi85+dv1PC DpmZHeT/NRagP02EVxDI3oLywwiNuurP6qGmFAxY6h2ezBOq3Q7MBPwhG7Pab5st/F rxy0++VNYh05U64QuhP1ozMi5bMHkwLghml7IOmc= Received: from rplsssn-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rplsssn@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id A4D3660909; Fri, 21 Dec 2018 12:00:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1545393637; bh=VPohEwpwkQAhAd6+PHCr4kP8c1qHYsLHeJ+W1h/ZNCw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ig3QK5lbqv7XcXmu+03+YYOqA47iDzIgBvws3oWFPxpVkRN9UhfqY/+8dx5I90AQr 9BC8miUsC3wBFg13d8eD+KDFAfbJFcVAV5VN9wtuXCNlSj24VGbWtFXLtmGQYOrVz2 HUOL4fWILqw0huWIwHdYvfH95TRaSQ6g9Bvd9my4= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org A4D3660909 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rplsssn@codeaurora.org From: "Raju P.L.S.S.S.N" To: andy.gross@linaro.org, david.brown@linaro.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, mka@chromium.org, ilina@codeaurora.org, "Raju P.L.S.S.S.N" , devicetree@vger.kernel.org Subject: [PATCH RFC 3/5] dt-bindings: Add PDC timer bindings for Qualcomm SoCs Date: Fri, 21 Dec 2018 17:29:44 +0530 Message-Id: <20181221115946.10095-4-rplsssn@codeaurora.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20181221115946.10095-1-rplsssn@codeaurora.org> References: <20181221115946.10095-1-rplsssn@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add device binding documentation for Qualcomm Technology Inc's PDC timer. The driver is used for programming next wake-up timer value when processor enters SoC level deepest low power state. Cc: devicetree@vger.kernel.org Signed-off-by: Raju P.L.S.S.S.N --- .../devicetree/bindings/soc/qcom/rpmh-rsc.txt | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt b/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt index 9b86d1eff219..f24afb45d0d9 100644 --- a/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt +++ b/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt @@ -30,6 +30,12 @@ will be an aggregate of the sleep votes from each of those subsystems. Clients may request a sleep value for their shared resources in addition to the active mode requests. +When the processor enters deepest low power mode, the next wake-up timer value +needs to be programmed to PDC (Power Domain Controller) through RSC registers +dedicated for this purpose. PDC timer is specified as child node of RSC with +register offets to program timer match value. + + Properties: - compatible: @@ -86,6 +92,20 @@ Properties: Drivers that want to use the RSC to communicate with RPMH must specify their bindings as child nodes of the RSC controllers they wish to communicate with. +If an RSC needs to program next wake-up in the PDC timer, it must specify the +binding as child node with the following properties: + +Properties: +- compatible: + Usage: required + Value type: + Definition: must be "qcom,pdc-timer". + +- reg: + Usage: required + Value type: + Definition: Specifies the offset of the control register. + Example 1: For a TCS whose RSC base address is is 0x179C0000 and is at a DRV id of 2, the @@ -103,6 +123,9 @@ TCS-OFFSET: 0xD00 <0x179d0000 0x10000>, <0x179e0000 0x10000>; reg-names = "drv-0", "drv-1", "drv-2"; + #address-cells = <1>; + #size-cells = <1>; + ranges; interrupts = , , ; @@ -112,6 +135,12 @@ TCS-OFFSET: 0xD00 , , ; + + pdc_timer@38 { + compatible = "qcom,pdc-timer"; + reg = <0x38 0x1>, + <0x40 0x1>; + } }; Example 2: From patchwork Fri Dec 21 11:59:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raju P.L.S.S.S.N" X-Patchwork-Id: 10740351 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1F12A14DE for ; Fri, 21 Dec 2018 12:00:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0E1AF286D1 for ; Fri, 21 Dec 2018 12:00:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 01E92286FE; Fri, 21 Dec 2018 12:00:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.2 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,FROM_LOCAL_NOVOWEL,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D4C73286D1 for ; Fri, 21 Dec 2018 12:00:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390204AbeLUMAr (ORCPT ); Fri, 21 Dec 2018 07:00:47 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:39592 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732607AbeLUMAq (ORCPT ); Fri, 21 Dec 2018 07:00:46 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 318D1609C4; Fri, 21 Dec 2018 12:00:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1545393645; bh=C2cgUDhNcCSdOqOs+pZCrHy3sHt4moe9OIisEtb/lVk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UR7Sn3JKwzDPdXWv4TeI3rLwTjrrmmqi7UicZPou5hTEd4OguWTWCXs/C08EbPcvG jREEhRncGa/o2wp/VMKR6ZHY+R3dogb+uEbnMygiJE5PMqWBGEGOilw/6q0cIZB3d9 OpO6pN2+JQ3tmlSCfhYoi+4AcHPk5fQ1mf355X2k= Received: from rplsssn-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rplsssn@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 25599609C2; Fri, 21 Dec 2018 12:00:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1545393642; bh=C2cgUDhNcCSdOqOs+pZCrHy3sHt4moe9OIisEtb/lVk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OlkaJJe7z155K0Zm5AiG7WQ5lTXjN3bJVs6Rz8MMJWAhnAFhFkrtEMQAylsNg1ZoQ nSoq/how8Er4x/G5/2eei20INTwizGfgmp6kGwUbZ2glqedv7J8l01Z6KUpE2XZhU7 IDWB5mcpHdvlq+fkZO4/fnuCVDCBhyP0bTVNqIaY= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 25599609C2 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rplsssn@codeaurora.org From: "Raju P.L.S.S.S.N" To: andy.gross@linaro.org, david.brown@linaro.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, mka@chromium.org, ilina@codeaurora.org, "Raju P.L.S.S.S.N" Subject: [PATCH RFC 4/5] drivers: qcom: rpmh-pdc-timer: Add power management ops Date: Fri, 21 Dec 2018 17:29:45 +0530 Message-Id: <20181221115946.10095-5-rplsssn@codeaurora.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20181221115946.10095-1-rplsssn@codeaurora.org> References: <20181221115946.10095-1-rplsssn@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add suspend power management ops so that the PDC timer is programmed to highest match value when system is suspended. Signed-off-by: Raju P.L.S.S.S.N --- drivers/soc/qcom/Kconfig | 2 +- drivers/soc/qcom/rpmh-pdc-timer.c | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index d04724ea5490..c6ef41a06c97 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -105,7 +105,7 @@ config QCOM_RPMH config QCOM_RPMH_PDC_TIMER bool "Qualcomm PDC Timer for RPM-Hardened based SoCs" - depends on CPU_PM + depends on CPU_PM && PM_SLEEP help Support for QCOM platform next wakeup timer programming when application processor enters SoC level deepest low power mode. diff --git a/drivers/soc/qcom/rpmh-pdc-timer.c b/drivers/soc/qcom/rpmh-pdc-timer.c index 108ea4a2df89..ebb643924a3e 100644 --- a/drivers/soc/qcom/rpmh-pdc-timer.c +++ b/drivers/soc/qcom/rpmh-pdc-timer.c @@ -23,6 +23,7 @@ static resource_size_t cmd0_data_offset; static resource_size_t cmd1_data_offset; static uint64_t pdc_wakeup = ~0ULL; static raw_spinlock_t pdc_wakeup_lock; +static int suspended; /* convert micro sec to ticks or clock cycles * @@ -102,6 +103,9 @@ static int cpu_pm_notifier(struct notifier_block *b, { uint64_t cpu_next_wakeup; + if (suspended) + return NOTIFY_DONE; + switch (cmd) { case CPU_PM_ENTER: cpu_next_wakeup = get_next_wakeup_cycles(smp_processor_id()); @@ -130,6 +134,25 @@ static struct notifier_block cpu_pm_notifier_block = { .priority = -1, /* Should be last in the order of notifications */ }; +static int pdc_timer_suspend(struct device *dev) +{ + suspended = true; + raw_spin_lock(&pdc_wakeup_lock); + pdc_wakeup = ~0ULL; + setup_pdc_wakeup_timer(pdc_wakeup); + raw_spin_unlock(&pdc_wakeup_lock); + return 0; +} + +static int pdc_timer_resume(struct device *dev) +{ + suspended = false; + return 0; +} +static const struct dev_pm_ops pdc_timer_dev_pm_ops = { + SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pdc_timer_suspend, pdc_timer_resume) +}; + static int pdc_timer_probe(struct platform_device *pdev) { struct device *pdc_timer_dev = &pdev->dev; @@ -176,6 +199,7 @@ static struct platform_driver pdc_timer_driver = { .driver = { .name = KBUILD_MODNAME, .of_match_table = pdc_timer_drv_match, + .pm = &pdc_timer_dev_pm_ops, }, }; builtin_platform_driver(pdc_timer_driver); From patchwork Fri Dec 21 11:59:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raju P.L.S.S.S.N" X-Patchwork-Id: 10740353 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 80DC7161F for ; Fri, 21 Dec 2018 12:00:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 704CB286E7 for ; Fri, 21 Dec 2018 12:00:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 643F528703; Fri, 21 Dec 2018 12:00:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.2 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,FROM_LOCAL_NOVOWEL,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0F50B286E7 for ; Fri, 21 Dec 2018 12:00:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390221AbeLUMAw (ORCPT ); Fri, 21 Dec 2018 07:00:52 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:39786 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729787AbeLUMAv (ORCPT ); Fri, 21 Dec 2018 07:00:51 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id EEF7E608FF; Fri, 21 Dec 2018 12:00:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1545393651; bh=CkDdgRmS1HHJL7SV/HFC2wSaUMuRXE6vNsAOzcLl9p4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SYptSWyGkit+nMVV73RYyI/DUm9aYVSjtwSuNxxEuLeb1PNSC8sCvTbyL0bjyqrum 4BKoHg7je7vPGP5OXEWV5FBwlQyvvja5vvMUTmKiwwtvCBgLxsbqtQq5fVSlgHedUW ih6Tj8+eXxndb235/2iUnAgTnuVUIH4pikKKffH0= Received: from rplsssn-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rplsssn@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 8EA0E60928; Fri, 21 Dec 2018 12:00:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1545393648; bh=CkDdgRmS1HHJL7SV/HFC2wSaUMuRXE6vNsAOzcLl9p4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VLQ6a+m0KCTtIZKhnysfZIXFbx45uIZqlbfqtjznx+YdPDc1mklkWNEb0PJWUS7qG 8M+J03CquX/aPABwnHHR4kRDvpZKI89A7Jz1jASiG8Mx/IasAUYZhLLEMKsLQAJUU/ jpdPtN8E++WmU8LJdpJwu6TEO9Y6RN4a3OGHswu4= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 8EA0E60928 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rplsssn@codeaurora.org From: "Raju P.L.S.S.S.N" To: andy.gross@linaro.org, david.brown@linaro.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, mka@chromium.org, ilina@codeaurora.org, "Raju P.L.S.S.S.N" Subject: [PATCH RFC 5/5] arm64: dts: msm: add PDC timer for apps_rsc for SDM845 Date: Fri, 21 Dec 2018 17:29:46 +0530 Message-Id: <20181221115946.10095-6-rplsssn@codeaurora.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20181221115946.10095-1-rplsssn@codeaurora.org> References: <20181221115946.10095-1-rplsssn@codeaurora.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add PDC timer node for apps_rsc to program next wake-up timer value. Signed-off-by: Raju P.L.S.S.S.N --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index b256357e4db1..c73b717ed8ea 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1372,6 +1372,9 @@ <0x179d0000 0x10000>, <0x179e0000 0x10000>; reg-names = "drv-0", "drv-1", "drv-2"; + #address-cells = <1>; + #size-cells = <1>; + ranges; interrupts = , , ; @@ -1382,6 +1385,12 @@ , ; + pdc_timer@38 { + compatible = "qcom,pdc-timer"; + reg = <0x38 0x1>, + <0x40 0x1>; + }; + rpmhcc: clock-controller { compatible = "qcom,sdm845-rpmh-clk"; #clock-cells = <1>;