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[88.207.98.14]) by smtp.googlemail.com with ESMTPSA id z6sm3142867edc.53.2021.11.12.05.44.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Nov 2021 05:44:08 -0800 (PST) From: Robert Marko To: andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com, robh+dt@kernel.org, miquel.raynal@bootlin.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, pali@kernel.org, marek.behun@nic.cz Cc: Robert Marko Subject: [PATCH 1/2] arm64: dts: marvell: cn9130: add GPIO and SPI aliases Date: Fri, 12 Nov 2021 14:44:02 +0100 Message-Id: <20211112134403.1016717-1-robert.marko@sartura.hr> X-Mailer: git-send-email 2.33.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211112_054412_930682_2AAEC797 X-CRM114-Status: GOOD ( 10.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org CN9130 has one CP115 built in, which like the CP110 has 2 GPIO and 2 SPI controllers built-in. However, unlike the Armada 7k and 8k the SoC DTSI doesn't add the required aliases as both the Orion SPI driver and MVEBU GPIO drivers require the aliases to be present. So add the required aliases for GPIO and SPI controllers. Fixes: 6b8970bd8d7a ("arm64: dts: marvell: Add support for Marvell CN9130 SoC support") Signed-off-by: Robert Marko --- arch/arm64/boot/dts/marvell/cn9130.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/cn9130.dtsi b/arch/arm64/boot/dts/marvell/cn9130.dtsi index a2b7e5ec979d..71769ac7f058 100644 --- a/arch/arm64/boot/dts/marvell/cn9130.dtsi +++ b/arch/arm64/boot/dts/marvell/cn9130.dtsi @@ -11,6 +11,13 @@ / { model = "Marvell Armada CN9130 SoC"; compatible = "marvell,cn9130", "marvell,armada-ap807-quad", "marvell,armada-ap807"; + + aliases { + gpio1 = &cp0_gpio1; + gpio2 = &cp0_gpio2; + spi1 = &cp0_spi0; + spi2 = &cp0_spi1; + }; }; /* From patchwork Fri Nov 12 13:44:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 12692404 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB10AC433F5 for ; Fri, 12 Nov 2021 13:45:33 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7336B6103A for ; Fri, 12 Nov 2021 13:45:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 7336B6103A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=sartura.hr Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=HYYj5Xp0M4OM1201UMr7net6NVB1l36edUxhFBbAPy0=; b=zw+AZxAm3BnqwT iosE6qiHWDpQXLHJ2WP5xYWcIoK0bEJE+N8BM91YQrb3XUXhdPmhsAxlCGpw+hqwWlr8jLl7Ov/6t yUg7FfTWqcTpoKOfeU1W5IM3t4MGiY8cvDnw5FzBdzD8m0Wx4TEUJ0qGOFEc49uhLJwT1L0RZXPuz Po7jgoHUDCHIHPSSBsAArbug1ohf0s4PlwYrkyQZGI/A3NrsJ1QGYMN+D8VK+0fCzf5u16//xt93j 0MW+5xsY2jNzM8Hf01bi07S1xm/4XFk0BWdmccFYBgyeyDq2tDAacunnOq8apTXr6Tjnvh2wufDEa VKuoFkHyGe9/el89D5Cw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mlWqz-00AciL-2F; Fri, 12 Nov 2021 13:44:29 +0000 Received: from mail-ed1-x533.google.com ([2a00:1450:4864:20::533]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mlWqk-00Accf-DO for linux-arm-kernel@lists.infradead.org; Fri, 12 Nov 2021 13:44:15 +0000 Received: by mail-ed1-x533.google.com with SMTP id z10so11469876edc.11 for ; Fri, 12 Nov 2021 05:44:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+11/5QhDjvHebghuXrK94NMiJV4iB56FWTY6infSJEM=; b=VCxAzCnKeRIEjI3hyvDrZ5J+WNdd9RaNLmwNwJmdgC0+ZnCPEFSx9c9uyeJK1scqWk 2QNPDVV8tT37ztpw5F5RbdRAv/oqmFfxQTMKUxbI7ddrlgw1NGqsqL98LExawIvVVzTm fGZuswg5VPHfMcxTlJU5QHVT5xgIXU6GrcMY9xWHIZMa40NXJGO17yWIi8JooZaRV4gS 8/5/OcwiLMs9kacJyspSPvDJbRYW91QoprdUb1Map6iPEa1BrQiv4EbQenYukutV1gwP PVCR3EGldCSqUDOsfSVTt/ujeCY/RSqdi7DQWTkxW4EOqCmFDbztw0F4kHG1FK5eHhmE IjBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+11/5QhDjvHebghuXrK94NMiJV4iB56FWTY6infSJEM=; b=InhXiUeA5JE2nv1TqTv6LpSXps1kohVBV7tlNsM4wArkBlzzUjzXhC2tD9P2942R8C 7AXEMolk1HRr3oV6dhhLNbF35LW+guRxiXC6kNZ37zV7UhdkFi6SxF/yoMHhyWdOX4aG 27jPlmJvs3ors0NXYGF0pTd8V8WWo98qDN8weuqxOSJHgxJPWG+Z63c1g6G1wvhtOPDW nT7HO7beHpcFEzLB8lAdn//nmeebHg0rIPBX8ugcwFYfjm+W/XCvM1PwhqGdqHOoZeJV AlNRjUwAM+DFEpUh1VjAH9yO5EHqgHcGlPx5v5miJ1EKpwK/VUWM+po/E5a1KXlffM1t Uxvg== X-Gm-Message-State: AOAM5323mZSjJX1G5VWIUvw3sM5Kp6vVNaDD6br/HPZwRIQdeH7988zT 8rgWfSAE7wmo4TJWfXK6o7B2OQ== X-Google-Smtp-Source: ABdhPJyVGL0HggktauQzfX4R4SPudEdtG9PweoAnYEfD814Ix+78MGhFz6hY+lnGlnekPElkvwLCVQ== X-Received: by 2002:a17:907:7703:: with SMTP id kw3mr19507359ejc.34.1636724652384; Fri, 12 Nov 2021 05:44:12 -0800 (PST) Received: from fedora.. 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[88.207.98.14]) by smtp.googlemail.com with ESMTPSA id z6sm3142867edc.53.2021.11.12.05.44.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Nov 2021 05:44:11 -0800 (PST) From: Robert Marko To: andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com, robh+dt@kernel.org, miquel.raynal@bootlin.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, pali@kernel.org, marek.behun@nic.cz Cc: Robert Marko Subject: [PATCH 2/2] arm64: dts: marvell: cn9130: enable CP0 GPIO controllers Date: Fri, 12 Nov 2021 14:44:03 +0100 Message-Id: <20211112134403.1016717-2-robert.marko@sartura.hr> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211112134403.1016717-1-robert.marko@sartura.hr> References: <20211112134403.1016717-1-robert.marko@sartura.hr> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211112_054414_479756_485EC8AB X-CRM114-Status: GOOD ( 11.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org CN9130 has a built-in CP115 which has 2 GPIO controllers, but unlike in Armada 7k and 8k both are left disabled by the SoC DTSI. This first of all makes no sense as they are always present due to being SoC built-in and its an issue as boards like CN9130-CRB use the CPO GPIO2 pins for regulators and SD card support without enabling them first. So, enable both of them like Armada 7k and 8k do. Fixes: 6b8970bd8d7a ("arm64: dts: marvell: Add support for Marvell CN9130 SoC support") Signed-off-by: Robert Marko --- arch/arm64/boot/dts/marvell/cn9130.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/cn9130.dtsi b/arch/arm64/boot/dts/marvell/cn9130.dtsi index 71769ac7f058..327b04134134 100644 --- a/arch/arm64/boot/dts/marvell/cn9130.dtsi +++ b/arch/arm64/boot/dts/marvell/cn9130.dtsi @@ -42,3 +42,11 @@ aliases { #undef CP11X_PCIE0_BASE #undef CP11X_PCIE1_BASE #undef CP11X_PCIE2_BASE + +&cp0_gpio1 { + status = "okay"; +}; + +&cp0_gpio2 { + status = "okay"; +};