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[210.10.213.150]) by smtp.gmail.com with ESMTPSA id c15sm3671339pjg.53.2021.11.16.19.51.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Nov 2021 19:51:21 -0800 (PST) From: Joel Stanley To: Andrew Jeffery , Rob Herring Cc: Ryan Chen , Paul Menzel , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH 1/3] dt-bindings: aspeed: Add Secure Boot Controller bindings Date: Wed, 17 Nov 2021 11:51:04 +0800 Message-Id: <20211117035106.321454-2-joel@jms.id.au> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211117035106.321454-1-joel@jms.id.au> References: <20211117035106.321454-1-joel@jms.id.au> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211116_195123_046048_6DA856AB X-CRM114-Status: GOOD ( 12.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The secure boot controller was first introduced in the AST2600. Signed-off-by: Joel Stanley Reviewed-by: Rob Herring --- .../bindings/arm/aspeed/aspeed,sbc.yaml | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/aspeed/aspeed,sbc.yaml diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed,sbc.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed,sbc.yaml new file mode 100644 index 000000000000..c72aab706484 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/aspeed/aspeed,sbc.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +# Copyright 2021 Joel Stanley, IBM Corp. +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/arm/aspeed/aspeed,sbc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: ASPEED Secure Boot Controller + +maintainers: + - Joel Stanley + - Andrew Jeffery + +description: | + The ASPEED SoCs have a register bank for interacting with the secure boot + controller. + +properties: + compatible: + items: + - const: aspeed,ast2600-sbc + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + sbc: secure-boot-controller@1e6f2000 { + compatible = "aspeed,ast2600-sbc"; + reg = <0x1e6f2000 0x1000>; + }; From patchwork Wed Nov 17 03:51:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 12692814 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBA3DC433EF for ; Wed, 17 Nov 2021 03:53:24 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9D26F61B30 for ; Wed, 17 Nov 2021 03:53:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 9D26F61B30 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=jms.id.au Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; 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[210.10.213.150]) by smtp.gmail.com with ESMTPSA id c15sm3671339pjg.53.2021.11.16.19.51.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Nov 2021 19:51:26 -0800 (PST) From: Joel Stanley To: Andrew Jeffery , Rob Herring Cc: Ryan Chen , Paul Menzel , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH 2/3] ARM: dts: aspeed: Add secure boot controller node Date: Wed, 17 Nov 2021 11:51:05 +0800 Message-Id: <20211117035106.321454-3-joel@jms.id.au> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211117035106.321454-1-joel@jms.id.au> References: <20211117035106.321454-1-joel@jms.id.au> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211116_195128_066589_22C74D49 X-CRM114-Status: UNSURE ( 9.60 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The ast2600 has a secure boot controller. Signed-off-by: Joel Stanley Reviewed-by: Ryan Chen --- arch/arm/boot/dts/aspeed-g6.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index 5106a424f1ce..16b36c13695a 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -384,6 +384,11 @@ adc1: adc@1e6e9100 { status = "disabled"; }; + sbc: secure-boot-controller@1e6f2000 { + compatible = "aspeed,ast2600-sbc"; + reg = <0x1e6f2000 0x1000>; + }; + gpio0: gpio@1e780000 { #gpio-cells = <2>; gpio-controller; From patchwork Wed Nov 17 03:51:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 12692815 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C27EAC433F5 for ; Wed, 17 Nov 2021 03:53:42 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7EBCD61AFD for ; Wed, 17 Nov 2021 03:53:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 7EBCD61AFD Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=jms.id.au Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=erWX6QuwsygONtc612HzLEo1BlGm7Agmeie99TC3CDg=; b=ZX0pWMup0V3xOy eM3t/YZ02NjFevldPNxcQDxI04l/fujcgj5NNjW4hciZ8tX1fDfq2FlCwwW4MDxnGBtrsxhUPiwNa 0MXZxhpFxoXInlEXksHxyBmZUb47pgVbkD2KyXuExm7613eoslv3HR0D5NZzeE/sIGgJgDDL8AlxU ptqqrMTzIhp4QkUGpvCBxFtXWX5SpPYWpk7A3IpBJqw5WyDdPPcHv3TWJ9VA0cIpCmc/cNRQhXyOa qsrmQlMzcnZe4IKt/4a2sq6FZ/AaEZl+NMAicI2NMrzDrDixc059gAsHt8Wq/YrLdit4PBduYnqMf LQz6wBwVNZb8KV3ktWvg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mnBzj-003Fci-Iz; Wed, 17 Nov 2021 03:52:24 +0000 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mnByv-003FEP-BM for linux-arm-kernel@lists.infradead.org; Wed, 17 Nov 2021 03:51:34 +0000 Received: by mail-pg1-x532.google.com with SMTP id 200so1040661pga.1 for ; Tue, 16 Nov 2021 19:51:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=x/EBS/tohVgrX5ms5+y7t3q/IQj9zXKjUfmpO5XUvbw=; b=gkHqnj51RMoaImsqO+NQa+fJQeU7RdZsEdmDOc0+qa22B9xUu62n85SXX0f0J1FmVE JHtIqhtQ77ivkUPTfBZ9p5RAn8LIvx55eNFENBctlvfPl3+RQDQ/cY48i8USHnuyzfnW +GiH1hK1ix3ZQCadzgWhT8fPo833b4q5ydvgMKYHrs1t4NP0/0GwJXgVz2eKAlGXCUYM y94wznagVKfMSnJL096q185UgiBcCGGTSAJF53hxTZO3zTvM3YjhzcV/nMo3XsQZkpzM chOgbMozZk1tmKzQTaDQRK2ISmRw3SjyN+KrOnWFJPNWESdaojEWoK4dGNNHZag+LsgU ms7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=x/EBS/tohVgrX5ms5+y7t3q/IQj9zXKjUfmpO5XUvbw=; b=tyGzZ/q9NJKihPNWuU4XcMOWgZ7bDFLhuOFehO4fUnlA1CI0CgQotaM1it43e+9cxM 5zskcUeXJ0Na522or9WefD1xninaI789Xl7CIrX3K1aHhIM6N/T1g/yXkh8AX8jBk3sq dM69Ss9qADrRBoY7TpSBK+o2UXPHEyh+FwhsxBvRv67tNCbltV0IKoYfq+M01IupESxs Z4bZoKYJ8SwHw2uj3JFgqDSYktZ4TX6luKjrxxZCW1eII+lX3A0qbIqo5MOGWmJbABWT thgfzIV5/w+X0RvC+8M6hOTdMqxp2QqOSVvzfHegopEcJ3mV1QKmOjYiNBtcsZe7bP09 LtXA== X-Gm-Message-State: AOAM5327XYUyt16BzBVXDfd+4ro3SAGVSXdOXb019KtWE9pb9j0G/CyV 0HhH/+Zoyl3ED7Kt/0ACOAI= X-Google-Smtp-Source: ABdhPJwFg/IEkp0Q3THXCqLhU3JeFkAMjxL14FIiEiXcRVzHOpp+dq++AMS8tIMBgaSlFf6aEDYdlA== X-Received: by 2002:a63:b25d:: with SMTP id t29mr3102929pgo.79.1637121091320; Tue, 16 Nov 2021 19:51:31 -0800 (PST) Received: from voyager.guest.fluxperth.local (210-10-213-150.per.static-ipl.aapt.com.au. [210.10.213.150]) by smtp.gmail.com with ESMTPSA id c15sm3671339pjg.53.2021.11.16.19.51.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Nov 2021 19:51:30 -0800 (PST) From: Joel Stanley To: Andrew Jeffery , Rob Herring Cc: Ryan Chen , Paul Menzel , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org Subject: [PATCH 3/3] ARM: aspeed: Add secure boot controller support Date: Wed, 17 Nov 2021 11:51:06 +0800 Message-Id: <20211117035106.321454-4-joel@jms.id.au> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211117035106.321454-1-joel@jms.id.au> References: <20211117035106.321454-1-joel@jms.id.au> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211116_195133_427486_8D52F47C X-CRM114-Status: GOOD ( 15.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This reads out the status of the secure boot controller and exposes it in sysfs. An example on a AST2600A3 QEMU model: # grep . /sys/bus/soc/devices/soc0/* /sys/bus/soc/devices/soc0/abr_image:0 /sys/bus/soc/devices/soc0/family:AST2600 /sys/bus/soc/devices/soc0/low_security_key:0 /sys/bus/soc/devices/soc0/machine:Rainier 2U /sys/bus/soc/devices/soc0/otp_protected:0 /sys/bus/soc/devices/soc0/revision:A3 /sys/bus/soc/devices/soc0/secure_boot:1 /sys/bus/soc/devices/soc0/serial_number:888844441234abcd /sys/bus/soc/devices/soc0/soc_id:05030303 /sys/bus/soc/devices/soc0/uart_boot:1 On boot the state of the system according to the secure boot controller will be printed: [ 0.037634] AST2600 secure boot enabled or [ 0.037935] AST2600 secure boot disabled Signed-off-by: Joel Stanley Reviewed-by: Ryan Chen Reported-by: kernel test robot --- drivers/soc/aspeed/aspeed-socinfo.c | 73 +++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/drivers/soc/aspeed/aspeed-socinfo.c b/drivers/soc/aspeed/aspeed-socinfo.c index 1ca140356a08..6faf2c199c90 100644 --- a/drivers/soc/aspeed/aspeed-socinfo.c +++ b/drivers/soc/aspeed/aspeed-socinfo.c @@ -9,6 +9,8 @@ #include #include +static u32 security_status; + static struct { const char *name; const u32 id; @@ -74,6 +76,54 @@ static const char *siliconid_to_rev(u32 siliconid) return "??"; } +#define SEC_STATUS 0x14 +#define ABR_IMAGE_SOURCE BIT(13) +#define OTP_PROTECTED BIT(8) +#define LOW_SEC_KEY BIT(7) +#define SECURE_BOOT BIT(6) +#define UART_BOOT BIT(5) + +static ssize_t abr_image_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + return sprintf(buf, "%d\n", !!(security_status & ABR_IMAGE_SOURCE)); +} +static DEVICE_ATTR_RO(abr_image); + +static ssize_t low_security_key_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + return sprintf(buf, "%d\n", !!(security_status & LOW_SEC_KEY)); +} +static DEVICE_ATTR_RO(low_security_key); + +static ssize_t otp_protected_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + return sprintf(buf, "%d\n", !!(security_status & OTP_PROTECTED)); +} +static DEVICE_ATTR_RO(otp_protected); + +static ssize_t secure_boot_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + return sprintf(buf, "%d\n", !!(security_status & SECURE_BOOT)); +} +static DEVICE_ATTR_RO(secure_boot); + +static ssize_t uart_boot_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + /* Invert the bit, as 1 is boot from SPI/eMMC */ + return sprintf(buf, "%d\n", !(security_status & UART_BOOT)); +} +static DEVICE_ATTR_RO(uart_boot); + +static struct attribute *aspeed_attrs[] = { + &dev_attr_abr_image.attr, + &dev_attr_low_security_key.attr, + &dev_attr_otp_protected.attr, + &dev_attr_secure_boot.attr, + &dev_attr_uart_boot.attr, + NULL, +}; +ATTRIBUTE_GROUPS(aspeed); + static int __init aspeed_socinfo_init(void) { struct soc_device_attribute *attrs; @@ -81,6 +131,7 @@ static int __init aspeed_socinfo_init(void) struct device_node *np; void __iomem *reg; bool has_chipid = false; + bool has_sbe = false; u32 siliconid; u32 chipid[2]; const char *machine = NULL; @@ -109,6 +160,20 @@ static int __init aspeed_socinfo_init(void) } of_node_put(np); + /* AST2600 only */ + np = of_find_compatible_node(NULL, NULL, "aspeed,ast2600-sbc"); + if (of_device_is_available(np)) { + void *base = of_iomap(np, 0); + if (!base) { + of_node_put(np); + return -ENODEV; + } + security_status = readl(base + SEC_STATUS); + has_sbe = true; + iounmap(base); + of_node_put(np); + } + attrs = kzalloc(sizeof(*attrs), GFP_KERNEL); if (!attrs) return -ENODEV; @@ -135,6 +200,9 @@ static int __init aspeed_socinfo_init(void) attrs->serial_number = kasprintf(GFP_KERNEL, "%08x%08x", chipid[1], chipid[0]); + if (has_sbe) + attrs->custom_attr_group = aspeed_groups[0]; + soc_dev = soc_device_register(attrs); if (IS_ERR(soc_dev)) { kfree(attrs->soc_id); @@ -148,6 +216,11 @@ static int __init aspeed_socinfo_init(void) attrs->revision, attrs->soc_id); + if (has_sbe) { + pr_info("AST2600 secure boot %s\n", + (security_status & SECURE_BOOT) ? "enabled" : "disabled"); + } + return 0; } early_initcall(aspeed_socinfo_init);