From patchwork Fri Dec 17 10:57:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne X-Patchwork-Id: 12696623 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0D83CC433EF for ; Fri, 17 Dec 2021 11:00:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=t+q7f38Pt5FCjMY1hJnxyQ2VwXWuscBSnfbILXRGUOE=; b=rAVI1lOGy3tCJS Hx5GnElqXUHpxoqB8CvEeDamUXeT1dofCRGkfoecFMacoQv4Yvl7lDnMyxJn5CcJ/VYYM8MTFhPhw pQIT95HcCv++i2dEykgXh5PLBklce1DplHSUH+cgV8Z6lJLf41ECLqfpX2ehzeCiFIRHUBZLD9s+H 8JeonTF+d2ablV3zwYMnoxUQKMU7+uT8ndieOStoxyxlcU0lBbX1mZTSalmVcCwi3U7x5TqC82KE6 t4IqX+wGPF9KSJCZKKtpgrBSNkyxZI61c1beXm9yPtD2XrHGzBGIbJAHcFBCcM+ob+GXuedUYEZU0 aDcXPr3gh0vDDJiGYsmQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1myAwH-009dPN-8c; Fri, 17 Dec 2021 10:58:13 +0000 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1myAwA-009dN3-VM for linux-arm-kernel@lists.infradead.org; Fri, 17 Dec 2021 10:58:09 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1639738684; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=ZrtSnKYVlvQ9NYvp/usdx45HEyoR7k9tNJr8OC4ZPcw=; b=UdFD9e8bptk3FKYNsKRIos2YBZwTTH2uiG/z5d8oRHZvGJDV9bsIhpg6wNM0WiVj5mkgSc 1MIdSmIxdJTryTF6kSeLyUakq1AKLpRHrNESugSQhNMM8Ob1Y3q1oiY4pXhW78NzsR++y4 n6pxEoIZsVBNEIeBo0GOdBRQDonXhQ8= Received: from mail-wr1-f69.google.com (mail-wr1-f69.google.com [209.85.221.69]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-542-aXwNwYQBOpu11PV6PFbz_w-1; Fri, 17 Dec 2021 05:58:03 -0500 X-MC-Unique: aXwNwYQBOpu11PV6PFbz_w-1 Received: by mail-wr1-f69.google.com with SMTP id l13-20020adfbd8d000000b001a23a990dbfso495320wrh.5 for ; Fri, 17 Dec 2021 02:58:03 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=ZrtSnKYVlvQ9NYvp/usdx45HEyoR7k9tNJr8OC4ZPcw=; b=4KR9D8m1sNrcgV/kN81c27MXb/U/I98vT9OomPsccgNE1AP80RjXwcfA9wiXo0z+Zc IMs904lYnx952GgSwtT0HOh4GrlRHFaD3tqrotsVB1JToSIYIrnvLKQo1JFRrbKzc4wU sHMb8Qax2JhFK9Beqb6p4qkLGsYK9ThiTzW6JyZzf/FbqTLwps/u/FZl+pujbK349H7m Ri1L5ph825KBXvUo0Ma4oGEO6GNDbIgFEYAaa6WlbgnkY4eTDHnmkCtQCNhggZuCviIQ pFYkj5FzxZMg9IaywEJxBsRevYeHMHRokV4ItiXTL3owvbjoJ7Py3ODC2FyPl7XR8uTc d7xg== X-Gm-Message-State: AOAM530FF40GMK6iCCPHlC7qpVSMZPeKW04U96Zu/7KuYd5wzzTsEb3Q QlB65G9jRfoHR8AucmA6UOmKDRNYiWA5AoshgZ/d8pNKFhsQliQ9kPLyhAlY2BnYufC2BrW17vR B2S2fgWazafWxvS+WqwAcFa8S5RIvKJAG/Mo= X-Received: by 2002:adf:f38a:: with SMTP id m10mr1949255wro.547.1639738681938; Fri, 17 Dec 2021 02:58:01 -0800 (PST) X-Google-Smtp-Source: ABdhPJwj9+/BtYRkZy9AyEWdy3ItDaSRs9W3eyDwnYhgPMXXhm+bnXRhcOyr1F6deRIYzsUjuKETIw== X-Received: by 2002:adf:f38a:: with SMTP id m10mr1949239wro.547.1639738681587; Fri, 17 Dec 2021 02:58:01 -0800 (PST) Received: from vian.redhat.com ([2a0c:5a80:3b0e:bd00:1099:cf34:d27f:de8a]) by smtp.gmail.com with ESMTPSA id h5sm7405122wrz.63.2021.12.17.02.58.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Dec 2021 02:58:01 -0800 (PST) From: Nicolas Saenz Julienne To: tglx@linutronix.de, mark.rutland@arm.com, paulmck@kernel.org Cc: rostedt@goodmis.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, rcu@vger.kernel.org, peterz@infradead.org, mtosatti@redhat.com, frederic@kernel.org, corbet@lwn.net, Nicolas Saenz Julienne Subject: [PATCH v3 1/2] Documentation: Fill the gaps about entry/noinstr constraints Date: Fri, 17 Dec 2021 11:57:52 +0100 Message-Id: <20211217105753.892855-1-nsaenzju@redhat.com> X-Mailer: git-send-email 2.33.1 MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=nsaenzju@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211217_025807_147811_7AF24A62 X-CRM114-Status: GOOD ( 34.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Thomas Gleixner The entry/exit handling for exceptions, interrupts, syscalls and KVM is not really documented except for some comments. Fill the gaps. Signed-off-by: Thomas Gleixner Signed-off-by: Nicolas Saenz Julienne Reviewed-by: Mark Rutland ---- Changes since v2: - No big content changes, just style corrections, so it should be pretty clean at this stage. In the light of this, I kept Mark's Reviewed-by. - Paul's style and paragraph re-writes - Randy's style comments - Add links to transition type sections Documentation/core-api/entry.rst | 261 +++++++++++++++++++++++++++++++ Documentation/core-api/index.rst | 8 + 2 files changed, 269 insertions(+) create mode 100644 Documentation/core-api/entry.rst Reviewed-by: Paul E. McKenney diff --git a/Documentation/core-api/entry.rst b/Documentation/core-api/entry.rst new file mode 100644 index 000000000000..3f80537f2826 --- /dev/null +++ b/Documentation/core-api/entry.rst @@ -0,0 +1,261 @@ +Entry/exit handling for exceptions, interrupts, syscalls and KVM +================================================================ + +All transitions between execution domains require state updates which are +subject to strict ordering constraints. State updates are required for the +following: + + * Lockdep + * RCU / Context tracking + * Preemption counter + * Tracing + * Time accounting + +The update order depends on the transition type and is explained below in +the transition type sections: `Syscalls`_, `KVM`_, `Interrupts and regular +exceptions`_, `NMI and NMI-like exceptions`_. + +Non-instrumentable code - noinstr +--------------------------------- + +Most instrumentation facilities depend on RCU, so intrumentation is prohibited +for entry code before RCU starts watching and exit code after RCU stops +watching. In addition, many architectures must save and restore register state, +which means that (for example) a breakpoint in the breakpoint entry code would +overwrite the debug registers of the initial breakpoint. + +Such code must be marked with the 'noinstr' attribute, placing that code into a +special section inaccessible to instrumentation and debug facilities. Some +functions are partially instrumentable, which is handled by marking them nointr +and using instrumentation_begin() and instrumentation_end() to flag the +instrumentable ranges of code: + +.. code-block:: c + + noinstr void entry(void) + { + handle_entry(); // <-- must be 'noinstr' or '__always_inline' + ... + + instrumentation_begin(); + handle_context(); // <-- instrumentable code + instrumentation_end(); + + ... + handle_exit(); // <-- must be 'noinstr' or '__always_inline' + } + +This allows verification of the 'noinstr' restrictions via objtool on +supported architectures. + +Invoking non-instrumentable functions from instrumentable context has no +restrictions and is useful to protect e.g. state switching which would +cause malfunction if instrumented. + +All non-instrumentable entry/exit code sections before and after the RCU +state transitions must run with interrupts disabled. + +Syscalls +-------- + +Syscall-entry code starts in assembly code and calls out into low-level C code +after establishing low-level architecture-specific state and stack frames. This +low-level C code must not be instrumented. A typical syscall handling function +invoked from low-level assembly code looks like this: + +.. code-block:: c + + noinstr void syscall(struct pt_regs *regs, int nr) + { + arch_syscall_enter(regs); + nr = syscall_enter_from_user_mode(regs, nr); + + instrumentation_begin(); + if (!invoke_syscall(regs, nr) && nr != -1) + result_reg(regs) = __sys_ni_syscall(regs); + instrumentation_end(); + + syscall_exit_to_user_mode(regs); + } + +syscall_enter_from_user_mode() first invokes enter_from_user_mode() which +establishes state in the following order: + + * Lockdep + * RCU / Context tracking + * Tracing + +and then invokes the various entry work functions like ptrace, seccomp, audit, +syscall tracing, etc. After all that is done, the instrumentable invoke_syscall +function can be invoked. The instrumentable code section then ends, after which +syscall_exit_to_user_mode() is invoked. + +syscall_exit_to_user_mode() handles all work which needs to be done before +returning to user space like tracing, audit, signals, task work etc. After +that it invokes exit_to_user_mode() which again handles the state +transition in the reverse order: + + * Tracing + * RCU / Context tracking + * Lockdep + +syscall_enter_from_user_mode() and syscall_exit_to_user_mode() are also +available as fine grained subfunctions in cases where the architecture code +has to do extra work between the various steps. In such cases it has to +ensure that enter_from_user_mode() is called first on entry and +exit_to_user_mode() is called last on exit. + + +KVM +--- + +Entering or exiting guest mode is very similar to syscalls. From the host +kernel point of view the CPU goes off into user space when entering the +guest and returns to the kernel on exit. + +kvm_guest_enter_irqoff() is a KVM-specific variant of exit_to_user_mode() +and kvm_guest_exit_irqoff() is the KVM variant of enter_from_user_mode(). +The state operations have the same ordering. + +Task work handling is done separately for guest at the boundary of the +vcpu_run() loop via xfer_to_guest_mode_handle_work() which is a subset of +the work handled on return to user space. + +Interrupts and regular exceptions +--------------------------------- + +Interrupts entry and exit handling is slightly more complex than syscalls +and KVM transitions. + +If an interrupt is raised while the CPU executes in user space, the entry +and exit handling is exactly the same as for syscalls. + +If the interrupt is raised while the CPU executes in kernel space the entry and +exit handling is slightly different. RCU state is only updated when the +interrupt is raised in the context of the CPU's idle task. Otherwise, RCU will +already be watching. Lockdep and tracing have to be updated unconditionally. + +irqentry_enter() and irqentry_exit() provide the implementation for this. + +The architecture-specific part looks similar to syscall handling: + +.. code-block:: c + + noinstr void interrupt(struct pt_regs *regs, int nr) + { + arch_interrupt_enter(regs); + state = irqentry_enter(regs); + + instrumentation_begin(); + + irq_enter_rcu(); + invoke_irq_handler(regs, nr); + irq_exit_rcu(); + + instrumentation_end(); + + irqentry_exit(regs, state); + } + +Note that the invocation of the actual interrupt handler is within a +irq_enter_rcu() and irq_exit_rcu() pair. + +irq_enter_rcu() updates the preemption count which makes in_hardirq() +return true, handles NOHZ tick state and interrupt time accounting. This +means that up to the point where irq_enter_rcu() is invoked in_hardirq() +returns false. + +irq_exit_rcu() handles interrupt time accounting, undoes the preemption +count update and eventually handles soft interrupts and NOHZ tick state. + +In theory, the preemption count could be updated in irqentry_enter(). In +practice, deferring this update to irq_enter_rcu() allows the preemption-count +code to be traced, while also maintaining symmetry with irq_exit_rcu() and +irqentry_exit(), which are described in the next paragraph. The only downside +is that the early entry code up to irq_enter_rcu() must be aware that the +preemption count has not yet been updated with the HARDIRQ_OFFSET state. + +Note that irq_exit_rcu() must remove HARDIRQ_OFFSET from the preemption count +before it handles soft interrupts, whose handlers must run in BH context rather +than irq-disabled context. In addition, irqentry_exit() might schedule, which +also requires that HARDIRQ_OFFSET has been removed from the preemption count. + +NMI and NMI-like exceptions +--------------------------- + +NMIs and NMI-like exceptions (machine checks, double faults, debug +interrupts, etc.) can hit any context and must be extra careful with +the state. + +State changes for debug exceptions and machine-check exceptions depend on +whether these exceptions happened in user-space (breakpoints or watchpoints) or +in kernel mode (code patching). From user-space, they are treated like +interrupts, while from kernel mode they are treated like NMIs. + +NMIs and other NMI-like exceptions handle state transitions without +distinguishing between user-mode and kernel-mode origin. + +The state update on entry is handled in irqentry_nmi_enter() which updates +state in the following order: + + * Preemption counter + * Lockdep + * RCU / Context tracking + * Tracing + +The exit counterpart irqentry_nmi_exit() does the reverse operation in the +reverse order. + +Note that the update of the preemption counter has to be the first +operation on enter and the last operation on exit. The reason is that both +lockdep and RCU rely on in_nmi() returning true in this case. The +preemption count modification in the NMI entry/exit case must not be +traced. + +Architecture-specific code looks like this: + +.. code-block:: c + + noinstr void nmi(struct pt_regs *regs) + { + arch_nmi_enter(regs); + state = irqentry_nmi_enter(regs); + + instrumentation_begin(); + nmi_handler(regs); + instrumentation_end(); + + irqentry_nmi_exit(regs); + } + +and for e.g. a debug exception it can look like this: + +.. code-block:: c + + noinstr void debug(struct pt_regs *regs) + { + arch_nmi_enter(regs); + + debug_regs = save_debug_regs(); + + if (user_mode(regs)) { + state = irqentry_enter(regs); + + instrumentation_begin(); + user_mode_debug_handler(regs, debug_regs); + instrumentation_end(); + + irqentry_exit(regs, state); + } else { + state = irqentry_nmi_enter(regs); + + instrumentation_begin(); + kernel_mode_debug_handler(regs, debug_regs); + instrumentation_end(); + + irqentry_nmi_exit(regs, state); + } + } + +There is no combined irqentry_nmi_if_kernel() function available as the +above cannot be handled in an exception-agnostic way. diff --git a/Documentation/core-api/index.rst b/Documentation/core-api/index.rst index 5de2c7a4b1b3..972d46a5ddf6 100644 --- a/Documentation/core-api/index.rst +++ b/Documentation/core-api/index.rst @@ -44,6 +44,14 @@ Library functionality that is used throughout the kernel. timekeeping errseq +Low level entry and exit +======================== + +.. toctree:: + :maxdepth: 1 + + entry + Concurrency primitives ====================== From patchwork Fri Dec 17 10:57:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne X-Patchwork-Id: 12696624 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 432B8C433EF for ; Fri, 17 Dec 2021 11:00:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=QJmN8Ldk+ekOYqv4bkBDmowQR8PvDZ6I83i5DJRX4/I=; b=dvJLPyaNDlYkJK ZYk0eRlsgcj0UHAJZNyIXYCwmz6aeh9mmgkT63AOxPnJvKm1MVBT0kwG+tnY6ORJ/75VIFnvJZBhm LEhOnaIRvZXgUaL+aAJWBJXzeelfpDWERpno/dguQXeIfKag6AD/d62qspSAhXefXHnF6EMowm/rZ gCCUW825c9ZNZhohR5QKn2UYZDAAfxB7DQjIL5Mz6wErNWh3iyv2TYb4zaJW2HjUW1QqPcaVlzkku k+uQKgadk5Mvjo+4/+qOmADjSL3d8HPHMHBRqhGINi3qvSMzfiAic+WNQ/aPxXEmGA1HXLrWImK9z Rf/H8cOGKdxURh7aVTww==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1myAwj-009dWO-PC; Fri, 17 Dec 2021 10:58:42 +0000 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1myAwB-009dN4-44 for linux-arm-kernel@lists.infradead.org; Fri, 17 Dec 2021 10:58:08 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1639738684; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vfMj5Cdv9ABQA5uXGp3mACXyYa8FBWK9SwauD15vTUk=; b=ck0e5uLBsBnT4do2DjKkBRRKPT+OiGACrXubvpVx7IxjW3kCRKLvd9XOoyJfwRL+qnyihF vWc5DEUrNDsYbnoYHHc5KdS+J4nDznIBzqSTv7/H16aaBVKAx9fzV8Ic1DXVpqbtqH9dSe v+1l9w1EtbuSQVW3brQRHWfHe4qdX3g= Received: from mail-wm1-f72.google.com (mail-wm1-f72.google.com [209.85.128.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-114-PyTNT1xkPVOlVfmjfu76eA-1; Fri, 17 Dec 2021 05:58:03 -0500 X-MC-Unique: PyTNT1xkPVOlVfmjfu76eA-1 Received: by mail-wm1-f72.google.com with SMTP id a203-20020a1c7fd4000000b0034574187420so1853112wmd.5 for ; Fri, 17 Dec 2021 02:58:03 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vfMj5Cdv9ABQA5uXGp3mACXyYa8FBWK9SwauD15vTUk=; b=rJo+I5k3gLCuk8F8vGJZzh0jWC5ovH85oIsdmdCtmHBkUR59TRub8qM+3k5WTwBvVz 9ts+uTHDaJ8jTxezYQRppj2Sy/WNP+vuYAhnc6TOHBZRV0w23cL05hi/lpP++UAvw1zi +716AJgopblqePOb7xkZ9QsdZhoHZWdiK0wg2UEQ27s6HLM1dE6NKipx6/mmlMlpDgv7 8isMGkEa2x40FmQo9Z38bjRnXUNdtg1QqRxSD6F/av658Y94sd+ubWfSZc9gLKntlRVo Kj58N8tAsWnI7zZIi5kJaHbpTibB5b00GAn/mAFSzGfU56dtrleJqJqBRsQKw1SSa2Fs eA/Q== X-Gm-Message-State: AOAM533+hbyWrrCBUq6OzAnOIu4nFi2R5/r7DEYAJqekqlsm+sceBAAB OM1ItV4XNo0B+nB7liZliFDLHCISFhKxOa1Ycw9ULNkpqeremTXWlATh294qoI3MC/zVc2UwUoQ OpKA5vyOvtHi5D0NARuDt8H1ZPKTBMGkNQNc= X-Received: by 2002:a05:600c:3ac6:: with SMTP id d6mr2240070wms.191.1639738682586; Fri, 17 Dec 2021 02:58:02 -0800 (PST) X-Google-Smtp-Source: ABdhPJysepd7uhQTf9/QJszbG/jm5Yl980CRUzB5yGgrcxWsh+7XsGwRjPoBHPcTl4LGXQFGL0ZYgQ== X-Received: by 2002:a05:600c:3ac6:: with SMTP id d6mr2240054wms.191.1639738682352; Fri, 17 Dec 2021 02:58:02 -0800 (PST) Received: from vian.redhat.com ([2a0c:5a80:3b0e:bd00:1099:cf34:d27f:de8a]) by smtp.gmail.com with ESMTPSA id h5sm7405122wrz.63.2021.12.17.02.58.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Dec 2021 02:58:02 -0800 (PST) From: Nicolas Saenz Julienne To: tglx@linutronix.de, mark.rutland@arm.com, paulmck@kernel.org Cc: rostedt@goodmis.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, rcu@vger.kernel.org, peterz@infradead.org, mtosatti@redhat.com, frederic@kernel.org, corbet@lwn.net, Nicolas Saenz Julienne Subject: [PATCH v3 2/2] Documentation: core-api: entry: Add comments about nesting Date: Fri, 17 Dec 2021 11:57:53 +0100 Message-Id: <20211217105753.892855-2-nsaenzju@redhat.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211217105753.892855-1-nsaenzju@redhat.com> References: <20211217105753.892855-1-nsaenzju@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=nsaenzju@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211217_025807_285153_C97EE784 X-CRM114-Status: GOOD ( 13.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The topic of nesting and reentrancy in the context of early entry code hasn't been addressed so far. So do it. Signed-off-by: Nicolas Saenz Julienne --- NOTE: I moved this into a separate patch to simplify the review. Documentation/core-api/entry.rst | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/core-api/entry.rst b/Documentation/core-api/entry.rst index 3f80537f2826..f665f201ead0 100644 --- a/Documentation/core-api/entry.rst +++ b/Documentation/core-api/entry.rst @@ -105,6 +105,8 @@ has to do extra work between the various steps. In such cases it has to ensure that enter_from_user_mode() is called first on entry and exit_to_user_mode() is called last on exit. +Syscalls shouldn't nest. If it were to happen, RCU / context tracking will +catch the misbehavior and print out a warning. KVM --- @@ -121,6 +123,9 @@ Task work handling is done separately for guest at the boundary of the vcpu_run() loop via xfer_to_guest_mode_handle_work() which is a subset of the work handled on return to user space. +Nesting doesn't make sense in the context of KVM entry/exit transitions, it +shouldn't happen. + Interrupts and regular exceptions --------------------------------- @@ -180,6 +185,16 @@ before it handles soft interrupts, whose handlers must run in BH context rather than irq-disabled context. In addition, irqentry_exit() might schedule, which also requires that HARDIRQ_OFFSET has been removed from the preemption count. +Even though interrupt handlers are expected to run with local interrupts +disabled, interrupt nesting is common from an entry/exit perspective. For +example, softirq handling happens within an irqentry_{enter,exit}() block, with +local interrupts enabled. Also, although uncommon, nothing prevents an +interrupt handler from re-enabling interrupts. + +Interrupt entry/exit code doesn't strictly need to handle reentrancy, since it +runs with local interrupts disabled. But NMIs can happen anytime, and a lot of +the entry code is shared between the two. + NMI and NMI-like exceptions --------------------------- @@ -259,3 +274,7 @@ and for e.g. a debug exception it can look like this: There is no combined irqentry_nmi_if_kernel() function available as the above cannot be handled in an exception-agnostic way. + +NMIs can happen in any context. For example, an NMI-like exception triggered +while handling an NMI. So NMI entry code has to be reentrant and state updates +need to handle nesting.