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Wysocki" , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Gustavo Pimentel Cc: Open Source Submission , Phong Vo , "Thang Q . Nguyen" , Quan Nguyen , Rob Herring Subject: [PATCH v6 1/9] dt-bindings: mfd: Add bindings for Ampere Altra SMPro MFD driver Date: Fri, 24 Dec 2021 11:13:44 +0700 Message-Id: <20211224041352.29405-2-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20211224041352.29405-1-quan@os.amperecomputing.com> References: <20211224041352.29405-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2PR06CA0134.apcprd06.prod.outlook.com (2603:1096:1:1f::12) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: fd9cc141-0f9f-4e9b-a4bc-08d9c693efbc X-MS-TrafficTypeDiagnostic: BYAPR01MB5189:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:883; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: XNQdT5R9caFfxx0hb4nHJW518EonrbWJxPih3myGHBQPfVsc612QrAzCn2AYLu6ATUi1czsc1KmQStfdkvIQCH1dhUxEqj9ZlxzQIzYDTRc5iWR7IO62EPhaOd7+Ld9zqDEJDJCzxcOKY+k+ECh3jerRy3Cmxx4M+GZ9xdcxKgRNOQ980RPcnU7NsmHe6Fi2tKgs9bre6jcLhI1xO2IYgZ8fC2RP9cNGl2EDBviuowAK/2wJCEe/CJ7HMa5lRXug58/iYGtJktuPgWgydKiENK0FQo7DsJymbqAPzxcqZzEdrcVwRc/ac2bEvgmNUF1/xm6hn4gN/UMl+wsrkFiweaBZqzeODTWm6G6Jt4d5L9fK0fIWTeOlnMNnuUHdNb5LBOQejBjijqvKaeAovgZ1OkhEFPmrB2V3Z8VixM1P0oe55/l+WaOVga8R/mpmYv+UguDu/mVHDqcpzoANqmonqQqcrPpP+lAvpF8NTRuEpX60m7VarFxZG1//3NtOI8oeNtBV7v7cc8IhWHJ2DitD4kNJU/H4JbGOroNo44KidO865fx0aDPntFHgKovTMPaox6wFjKQa9QHQI4h/mI0Ksuw1yJ92vV9DfeUEp8VBE86UBAL5Ezz0ZQxmN4liJqPbYcDSvhXFgd2+fdxopypuozlQKOeN0MRwK8Tmm52UjhnI/aeuqPmiYXraVQxEQUdrw4Ki9oalOkfypEJy91kzo+b5NiI6sz/TMYb3YHEsoYQ9VIqK4XruoUBxO31mHcJn+ulLyeXMBq/TCZyaNVWoFPri7YR0AiCt76v408C6VzA5n3a41RDb5ErN15AK2Eb+ X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR01MB7282.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(4636009)(366004)(110136005)(54906003)(86362001)(38100700002)(38350700002)(83380400001)(66476007)(52116002)(5660300002)(2616005)(8676002)(66946007)(6666004)(66556008)(966005)(2906002)(508600001)(1076003)(4326008)(316002)(6506007)(8936002)(6486002)(26005)(186003)(6512007)(7416002)(921005);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: or+a+Qw2v1zUO1gy30hPGW4yuL+0JGWyfXTuhIXYah8K7IXQ2+Z5vbnGK4xzzXh9BPHYXE6o3vpAQoGFZdw1+sEolqWRjzf1K+WarYoNGjx62J05Pn7BVQmnoTu1v0BF23Z1K1LJ0Cm5pzzkPJkQQ/485HZn8WJBE1z+vOvdK6Mf5qThmfjiiQD/+427ELMYvhuWrDcWf74Z9/o48a/OFrVE40MZjpfumkBzHa88ebXlT/+Llx/pfNQJtsRn1lzsdmEUpBemPQZXR0rv7d1f7kHn81NtKaYaELOm5S3dhU1jUo5Zpad6+hIjeuF1o1lyH7ye49B/ESXHd/gmDv4whNSLQ7PHpOFyDp0dzxU2eeQBCfF9VYV6cOM2AEzrm0poeCv/1+3BwnKXUS5DWry+DPogblZE4BI4SbX+dGDgfJKjRULWdlhUJPe1Ezud/y21877Hpcu1B39Ok2ICkmMfvDBRDIWmxQR1RXwSLKq5SifRiprBJl7lIxVsKRCcIQAEGw5A5D1HnB/BXpa4ERneuJVuQrWMHIZ1Tz9/tmXWbU/32wPUrSnIYNWfInVC2rVbzixbui0FCt7N5Kf+CtFa/iFsrdMZVZo0lfhgNeflyv5CmwIKbo6CVXt8/WElz6EysdxrYzHeoPJWaHlAMyK22upoM6Ad89fM4jbhzCDaJJ8Cjicn8Tgy6JU4cp61c+46zmutUnoY3W9fRmZ2tZ3g1YA//Y8djA2C93MVzQFYu8gjG4dDR1GEyBytP1Ki/r8bn4p9xUvvuzocwZdtFietXk8gBRi5p/vpEmZB4iO+8xyOALB9503dTdmjbMHUy2VIooL5s9i1+L5m0VCxJPBl2eESM4Ny2evPozLP0llDWZspeuZT1NPoH5GzyM4ypQ5moP9jx9rzlx7fWFZgZ4pwbdH89wqX/AX97xZmj8t1HI3S7FeZ+CMYRZnhOPnTXxbH4qRBIXjx/E4KJ/C0OyEQWpti6wzTpldAz7sHKdcJhkxx7KW9FNTWuF6uv1mi1tgLLoj4wYUr3w7UKzl0XaOUZGjsIK1MpJb+wg3eEzOtJdaYjWHP89bCuQHcirCHfHx0dWizuTgBSJroEKAQtntCUx2EBXnS/VQCb2SBgm/P2pPFz+BjAOof/0gkoJOJ9KCteWAKixHhwkQTFHgmTorrXPBq7iNdQMLZSEG0FnEaZThRuFeLKGMN0gg7E/m79qHHUAKb4/jre/kenfMfvdylBYeGUslLkt640gVb6S4tg+f1S9NEUrx2EypR8k2tuxqRtN9WlTviry6gB042lzv2rjyFmhhupw8IXB7PMftQIlp1xOqY/RQ+U/pPHyxUmBzSES1yjJtcgqzqSFUhb+vvATH4KaoMYdoBNRp2EcgmMZchEkUuWow40dmkTYrGgiGnt1Y7xoSJSm0PIANfv3rMewbI5a6+JzUNUB1BrwNP7jHmYbT2oWfDElnBFzgqlfYgJCZs8OC8pOgHYDc3qnLTP6E1x7N5HWt/uL5xFy6if0pM8Yanfeu5fFwdOjasPizXoFZ09Kn1pZTfCCVnQ1sGn95n1hcsQ6G6SOfGB6Re8Wg0QyeKuU40IogVqELkCD4uP6oPTuON18v/ivVp59ezhLYvMCM1W4IU04ViknPa/pHYyBN3NFZyJ3/IQVD2mZrkimqkGXH5xj6MN/3wf1hfV2blH/twVYvmqlh2ktJHhFU= X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: fd9cc141-0f9f-4e9b-a4bc-08d9c693efbc X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Dec 2021 04:14:53.7851 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ow3FTHgczCaYVMNVaKgQWROLdRu+X1qR2CV/lPv5BzDwOvph9BfvvigFao48DQEHO0bQYkKwOFtqvLXT+l3xM1Hsp/5x2lcdoUF9H5+P/7k= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR01MB5189 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Adds device tree bindings for SMPro MFD driver found on the Mt.Jade hardware reference platform with Ampere's Altra Processor family. The SMpro co-processor on Ampere Altra processor family is to monitor and report various data included hwmon-related info, RAS errors, and other miscellaneous information. Signed-off-by: Quan Nguyen Reviewed-by: Rob Herring --- Changes in v6: + None Changes in v5: + Dropped ../bindings/hwmon/ampere,ac01-hwmon.yaml file [Quan] + Removed patternProperties section and child DT nodes in example section [Quan] + Revised commit message [Quan] Changes in v4: + Revised the commit message to clarify how the specific info will be handled commented by Rob. Changes in v3: + Supported list of compatible string [Rob] + Introduced reg property in DT to specify reg offset [Rob] + Updated description and other minor changes in yaml file [Rob] Changes in v2: + Changed "ampere,ac01-smpro" to "ampere,smpro" [Quan] .../devicetree/bindings/mfd/ampere,smpro.yaml | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/ampere,smpro.yaml diff --git a/Documentation/devicetree/bindings/mfd/ampere,smpro.yaml b/Documentation/devicetree/bindings/mfd/ampere,smpro.yaml new file mode 100644 index 000000000000..c29d975c1bc3 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ampere,smpro.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ampere,smpro.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ampere Altra SMPro firmware driver + +maintainers: + - Quan Nguyen + +description: | + Ampere Altra SMPro firmware may contain different blocks like hardware + monitoring, error monitoring and other miscellaneous features. + +properties: + compatible: + enum: + - ampere,smpro + + reg: + description: + I2C device address. + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + smpro@4f { + compatible = "ampere,smpro"; + reg = <0x4f>; + }; + }; From patchwork Fri Dec 24 04:13:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12698785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3295C433FE for ; Fri, 24 Dec 2021 04:15:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351261AbhLXEPF (ORCPT ); Thu, 23 Dec 2021 23:15:05 -0500 Received: from mail-co1nam11on2097.outbound.protection.outlook.com ([40.107.220.97]:34241 "EHLO NAM11-CO1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1351276AbhLXEPB (ORCPT ); Thu, 23 Dec 2021 23:15:01 -0500 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; 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Fri, 24 Dec 2021 04:14:59 +0000 From: Quan Nguyen To: Joel Stanley , Andrew Jeffery , Jean Delvare , Guenter Roeck , Rob Herring , Lee Jones , Jonathan Corbet , linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org, Mark Brown , Greg Kroah-Hartman , "Rafael J . Wysocki" , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Gustavo Pimentel Cc: Open Source Submission , Phong Vo , "Thang Q . Nguyen" , Quan Nguyen Subject: [PATCH v6 2/9] mfd: smpro-mfd: Adds Ampere's Altra SMpro MFD driver Date: Fri, 24 Dec 2021 11:13:45 +0700 Message-Id: <20211224041352.29405-3-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20211224041352.29405-1-quan@os.amperecomputing.com> References: <20211224041352.29405-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2PR06CA0134.apcprd06.prod.outlook.com (2603:1096:1:1f::12) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 88ceebcd-2c6c-4e31-0fd2-08d9c693f33e X-MS-TrafficTypeDiagnostic: BYAPR01MB5189:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:849; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 38C6AmF/I0J77iIj7FOtMg5ELSR5bo4uSYnltnTuar5WN/EKPfwNQGJgqh3BAsAmpgbTgkoVskMEKuhBjo1kw/t/PcbPOG4VDpB+S4PrSFhUYqWTYdzXzZkv6vxGNjuIWFdljr6NWonqelqYXiyRtp9aiAcQ31psAm3rvxfKK9eIDuNgsaFimPL4VFw221NUhZD/WFo1zFDhxqMHWlWj5HWI0i8XVR6MFTuNEyNxrcw+G0zbCTSR+GnOr/oliGigrOb/wpz1fGWZL/t1n6UHqpiBzOs8iFGLjhf6390lLenwPe9yowku8gSG0FAj3bZWNopqmc52MptYMw8mGZlhmq5y0Nr5Gr33YLhd0Bo+3bjE9yR9FPuqHgC2QRZRMIFbmD+jppF7Ig7V4fHO8FA8WLZnnf0+PcS7AHqDx6y1c4vCOQw9orNtqZ5Skx+se+/RReJKqKEWhPU8FBt5UeE1CL7LNJy0s7NTssVYzDPfDlZyN8Jy71HfuZwDu8Y2NaEJpAtEAOge9zqYehqkyEwv9reTe7bm1740dh744TXgIeb3EekIU7u57J+fyGg0Sjy37OLkPdhHJ+tqLEw6u2qzPFtiVqYOlebWxT+dnxkbAYPhjKT6X0/BUtFl2zyKW1CvVFLdOvDc6z3ICkPp1O9TdeiaV21AgGbu4jDplj466Zs/ACpYkxRfUAppR4K5KTe/FlDsoQS3apUFDof0I7NLUHbLwgAvj/XF+eBMje5Dav0= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR01MB7282.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(4636009)(366004)(110136005)(54906003)(86362001)(38100700002)(38350700002)(83380400001)(66476007)(52116002)(5660300002)(107886003)(2616005)(8676002)(66946007)(6666004)(66556008)(2906002)(508600001)(1076003)(4326008)(316002)(6506007)(8936002)(6486002)(26005)(186003)(6512007)(7416002)(921005);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: VFxIwkqK4eBb4HCKmNrGah8zjFfTf01XjUghqdwihBJ61b9w3burAPtxyH+UlkNOG2ftMmQFk94kSpXkHWjBm8ovONrqnnSR1oo0qVphkK5MO9/EnsXzRsqCnBdA2/LcYzoxIwuTQ2HrVjhUObiCRmFfsQSGUc8b5djRKsgVBTabf9bW67WvohrygkN3Os7hP/Q93MikjAkxsrzq49k5WPdFxuv3fVumQWIeiD8o/p6sk012N6S1BxmXPc9ommdNehhN5/5mlTDghyJjUUoJoQclJOAYjtMyPkZr/dAQxQWMvdfP94MlYGVwR845eBOOiEODVRsM172UE+uelcDMhAjKE6mJAeQzmrXjH1f1GVILLyqcIReskLJXY2pl65vLqBp3E6DAzWm0svtHiiOgjDhV2R1f+MkUJpWxpH4SakUFmRm66WTuNa/HJHBfR9VvpQ8XOPWN/e3H355lRfLewBoa37Du5/Oa0LxBRF1HFMQ+B+O/CbL4Sd6qwHuGcjtmQgJUcVmEN95f3uqG4r9lx7brsJ6VG7bZjnGH8/LixjkRSk5G8HSXAo2xRw0+0Tkpd5NsHZjMhyuMNsd43tFakRiKAV7K5Z1jiBNtyEM+JWjaaYYv8Bp9Wr/T5L58e1MMFpDkxo86as/w/Ue/lIRonokEujG6I9RHnP0Pg8Q8o1BzFJHr7nXpETEbl2pVZGXH6rON2Vpv6tXU70OeUSYiQApDneaieND9RA7k9dGLTgK+TOpc+HANv8UbAggWN8Dbpp1ztFDcKsSDU9JTSRJBWGdruTVPztQQQ8P0/3VTjaAW514w+TyFVtbs21Nql23UKP8HVe0Gc/1yPX+iVlZ6AodVYuz+q+BCsgfKnKcz2Jp+8hCFfftBdI9aiuig1QtUJa8871XlfYgTd3TG09opv6WK3NjI+tIaLxhZsYZ0kRPdBeI+dKzQB6KIf+SQTZqcrGxTPLYAPBnbm5rqsnHeClpP0C+bEWDaG7b6rWrMgJMsxdWmg7RVKPoI/JeJZKngPzgw/WvnJxM5IE5LSRi4zipuU26Pcif6Js2OvmQQKVx3rXrnxtXHdm0M7JsT77NipKaCeZtUfolLl7E1rRTNK2SclVnK3ria1d4yhTgpxIxytUZjVBM5JSG/eHtItNc0SX9CDDKHAolUQMvzAbv/3qkK+PG95G1kT70Kmj7TGyH4BkE4ljxcCK0ebsYyHxSwd2a/P53TUQ37sgJMQ2F2D6lyItuR6wnTxYuPZp0KPCqbyp+UE0loUOag4m/c1wagMjX/IG5VSVKJnIjU1D8jNN6ZGL101Gw7X8bxcqN1dEDCnj/rvw9t3HHOi/fNYlXtAU1X9Bt5Zs0vmpqyTjW4F11gntjCB4V8BbZ3gXpQ3Ar+9dFBpU7O6uYBkgH/kpkRSYP6mXuOG8llTAtHJVNsFRIKUaJ4hWca2/ELCjzLwxQdGde/2iPu7NBGwK7oL0siF19QSDl0hAJbPa3ARzFdNVAOBaZ42s6AVhV45rJAEU9gxPG0B0d7P29YUXgVkEZwt1I+zybQj+8OATm2yRL1tw6SjJJ2y0gyCfoa3d0ky+RdlSUWL8Uw0JTge/zE73yC2ELTKP78dT9MCsv9zHixmCWZQEyVC5VQHe5DjzCO1B5MqT0SCG98esTu6diDx4bCFtg1C8qx4TNh6GpQib/O6p1WeARyCKzHDpQoTNEccRg= X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 88ceebcd-2c6c-4e31-0fd2-08d9c693f33e X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Dec 2021 04:14:59.6195 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: dVz/xAMg8WSJxZbxO8yQ4FmNKfmFOxED8KhQOJmhIgbSGGer+4FdEPKzEjhvonOfSc0/mXgGLhwB9WEb+o+rU9vQlFBrh1B3RGMdOhDhjNw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR01MB5189 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Adds Multi-function devices driver for SMpro co-processor found on the Mt.Jade hardware reference platform with Ampere's Altra processor family. Signed-off-by: Quan Nguyen --- Changes in v6: + Update license part to reflect that this driver is clone from simple-mfd-i2c driver [Quan] Changes in v5: + Dropped the use of simple-mfd-i2c driver [Quan] + Introduced drivers/mfd/smpro-mfd.c driver to instantiate sub-devices. This is to avoid DT nodes without resource issue [Quan] + Revised commit message [Quan] Changes in v4: + Add "depends on I2C" to fix build issue found by kernel test robot [Guenter] Changes in v3: + None Changes in v2: + Used 'struct of_device_id's .data attribute [Lee Jones] drivers/mfd/Kconfig | 12 +++++++ drivers/mfd/Makefile | 1 + drivers/mfd/smpro-mfd.c | 76 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 89 insertions(+) create mode 100644 drivers/mfd/smpro-mfd.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index a21cbdf89477..a886da5018b1 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -77,6 +77,18 @@ config MFD_AS3711 help Support for the AS3711 PMIC from AMS +config MFD_SMPRO + tristate "Ampere Computing MFD SMpro core driver" + depends on I2C + select MFD_CORE + select REGMAP_I2C + help + Say yes here to enable SMpro driver support for Ampere's Altra + processor family. + + Ampere's Altra SMpro exposes an I2C regmap interface that can + be accessed by child devices. + config MFD_AS3722 tristate "ams AS3722 Power Management IC" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 4d53e951a92d..fbcd09dce5ce 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -267,6 +267,7 @@ obj-$(CONFIG_MFD_QCOM_PM8008) += qcom-pm8008.o obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o +obj-$(CONFIG_MFD_SMPRO) += smpro-mfd.o obj-$(CONFIG_MFD_INTEL_M10_BMC) += intel-m10-bmc.o obj-$(CONFIG_MFD_ATC260X) += atc260x-core.o diff --git a/drivers/mfd/smpro-mfd.c b/drivers/mfd/smpro-mfd.c new file mode 100644 index 000000000000..132d4e2dde12 --- /dev/null +++ b/drivers/mfd/smpro-mfd.c @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Ampere Altra Family SMPro MFD - I2C + * + * Copyright (c) 2021, Ampere Computing LLC + * Author: Quan Nguyen + * + * Based on simple-mfd-i2c.c: + * Copyright (c) by Michael Walle + */ + +#include +#include +#include +#include +#include +#include + +/* Identification Registers */ +#define MANUFACTURER_ID_REG 0x02 +#define AMPERE_MANUFACTURER_ID 0xCD3A + +static const struct regmap_config simple_word_regmap_config = { + .reg_bits = 8, + .val_bits = 16, +}; + +static const struct mfd_cell smpro_devs[] = { + MFD_CELL_NAME("smpro-hwmon"), +}; + +static int smpro_mfd_probe(struct i2c_client *i2c) +{ + const struct regmap_config *config; + struct regmap *regmap; + unsigned int val; + int ret; + + config = device_get_match_data(&i2c->dev); + if (!config) + config = &simple_word_regmap_config; + + regmap = devm_regmap_init_i2c(i2c, config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + /* Check for valid ID */ + ret = regmap_read(regmap, MANUFACTURER_ID_REG, &val); + if (ret) + return ret; + + if (val != AMPERE_MANUFACTURER_ID) + return -ENODEV; + + return devm_mfd_add_devices(&i2c->dev, PLATFORM_DEVID_AUTO, + smpro_devs, ARRAY_SIZE(smpro_devs), NULL, 0, NULL); +} + +static const struct of_device_id smpro_mfd_of_match[] = { + { .compatible = "ampere,smpro", .data = &simple_word_regmap_config }, + {} +}; +MODULE_DEVICE_TABLE(of, smpro_mfd_of_match); + +static struct i2c_driver smpro_mfd_driver = { + .probe_new = smpro_mfd_probe, + .driver = { + .name = "smpro-mfd-i2c", + .of_match_table = smpro_mfd_of_match, + }, +}; +module_i2c_driver(smpro_mfd_driver); + +MODULE_AUTHOR("Quan Nguyen "); +MODULE_DESCRIPTION("SMPRO MFD - I2C driver"); +MODULE_LICENSE("GPL v2"); From patchwork Fri Dec 24 04:13:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12698786 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9E3FC433F5 for ; Fri, 24 Dec 2021 04:15:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351282AbhLXEPI (ORCPT ); Thu, 23 Dec 2021 23:15:08 -0500 Received: from mail-co1nam11on2126.outbound.protection.outlook.com ([40.107.220.126]:63300 "EHLO NAM11-CO1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1351289AbhLXEPH (ORCPT ); Thu, 23 Dec 2021 23:15:07 -0500 ARC-Seal: i=1; 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Fri, 24 Dec 2021 04:15:05 +0000 From: Quan Nguyen To: Joel Stanley , Andrew Jeffery , Jean Delvare , Guenter Roeck , Rob Herring , Lee Jones , Jonathan Corbet , linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org, Mark Brown , Greg Kroah-Hartman , "Rafael J . Wysocki" , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Gustavo Pimentel Cc: Open Source Submission , Phong Vo , "Thang Q . Nguyen" , Quan Nguyen Subject: [PATCH v6 3/9] hwmon: smpro: Add Ampere's Altra smpro-hwmon driver Date: Fri, 24 Dec 2021 11:13:46 +0700 Message-Id: <20211224041352.29405-4-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20211224041352.29405-1-quan@os.amperecomputing.com> References: <20211224041352.29405-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2PR06CA0134.apcprd06.prod.outlook.com (2603:1096:1:1f::12) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 21b8a894-bb9c-4760-3894-08d9c693f6b5 X-MS-TrafficTypeDiagnostic: BYAPR01MB5189:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: p6l47N7G0h/krKoLeM6QVYhavF5tsPV2yKj+PWVWTbxmAILz6Qpokedg/IG5iIWY8g8MxPOtaZjJpqWhBsDo05GjxpBe371p+zWwkYcoqU7C2nvAc7H28MH0NOvvx7RK5q7tI8RaXA4BTiz4g/diqQp81Ql0xSrmMmYEM9aDk8chn2FRQqaeT90DFb4Nn1bSk3GaqdtiG5MN4yDKm0qjer7qrs6n0PMR5Ca+JRRQ96RYO0g2JI2/oYJBZjQxZk4jdjhiaPfrIl0F44nMbAEyk+buv1slfm6lPvFvfct4hpj/OuOKg2SQ9jirbBQ5luAqZOG1oFZYE3Yv3HnN0wywBcI9cSqUhXlH7/uFx3MMCa7uJ+UH4vfDMT7znzR5upFf8X3/+nOgACvJIw35Z84vubnt/aWH4HLgWAMsEChLcrhKBgjIfhbivLz+cnvU/WMgaTjDEZhzlOGCzwOVDov3TVN9O+bCqnzR51+m1rJOs191PC6h2bLM/3OIMpb1P515Px+rgn6EOh9AFFvVvonoi0DdTNkr3Y3yDfwsTz1+xSnMQvuwXqyLJsc82sV+MTf+inG2fvGmK6qEavliT+C/oApWzih3pmESLi/BNGu8YW4FW6ihf8/TJ4F5sg4ytk20i97qH8An83RP3nBoaz4HVr55CI22sCq7mBMjG4uDIeVa9LvvGQm4voMUzGY2j3FXAv7edjQXH+gvvEDSOjDwNH2niz0LpZ++QQnuENfTUlY= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR01MB7282.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(4636009)(366004)(110136005)(54906003)(86362001)(38100700002)(38350700002)(83380400001)(66476007)(52116002)(5660300002)(30864003)(107886003)(2616005)(8676002)(66946007)(6666004)(66556008)(2906002)(508600001)(1076003)(4326008)(316002)(6506007)(8936002)(6486002)(26005)(186003)(6512007)(7416002)(921005);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: R4qvb+RExUvslFGZrDg0dW7qMghGSE4JXqSzTk6D0oZm4I32uDbrJ2FkXvWt/vRCwYu3cl/dn28jZVH4irwVlpsF5yjhEJklqqta0J08++3zuE6oB19UKtXYSyYu6JSqGEfwOpN9imNRzuFgoXYW3TWaArrXTASmGvO3LHgAZF0OajxZUccFu7BUl4z8A10539JfeDfvHfn+8M5OOzPjKOOZAB67+o1T+7EGzF8b0fa5jSN6g3+VVZ3JG1fXx+nGbzl/qS/0q3gDWFsSv+7x/tlBrqA+7Pbokk8l7pm9JpD4g476NNFDvwbT9bCDcm9fQS4N4uXykHKQoPUNsCHsglCx7BGPPGKBcg4H4gTbcA6WQGwGQc9dzK47E0JEojjVtpy+wGHYWxKMv3u111E/aBmI7jqgVQmKNuGvkuXP6Hv83lYSNuf99KxzJ+FlqKwXjpvdxk1U9s0rYi2zIDlhPj4NvG0sz3z+56jf7+QhbiuOI+5Iy94szB1Sacx3mQy/M/KN2fM+wUqtb5Q6cB6vI/eHeraWzSxu4uLMLTMdGwuJC/LuceURcnUj/905EbOGonJxJfCnDCqu0knKr+6xw7yeFVgdLi0dHB+r/yjoDumN7wHLPLYItyynfKW2akQNn5jaTGfH1xJ1EaLX1htdAal+Rj2UoDhrfgYKWay9KhKgfnO/VMnpdOOekJ8oe1Uc+mDV0wEPRylVOu69D1fnNJNLAZVQJNwUGqLJdyEa7/oNCbfn/n4t0AUsb6MHWS1McsvYNMWXg0wvyjzxBeJdmrmJxcqyn5DQ83Kkof67+R+RLCKznuN3+A1u3hS3AKHNhO70LzgFx2q/7DaZNKjscrM3o1V5ARszLMDx1rtZNrp2IVvcps/i3gwDRR92zoYZ6qft6d5IUAqmnU8emVunFScTV8KD2psnDXL08P+F2uJeHSwNnehzCPUTGx32ARWCnkTMWfyjWlZvP27bgM3lRt0hmlhhB7gbcUPlGf5Nre1P90eDTgQd5hMA7D//ZSsKr89tj7+RJZWSfRiu9BPB422QiXMUEpW3Zih71FKuSQsrFecH2F+IHaXGFMoVyMcZr5TtXsM+956Km3GvrqAflKG8SDEcEtFyH0fmLzTva1l/fIO9/c7aBFYd7Dl5sUEKChw22YDmmHetiNDSYv9H9dr/L5S+3xzwHqnA4XJt63DTl5jatTGL7CST4gZC5qP7PJ75GKObyAua7VoRkIisDQ5+ojcRrQhmliIPIa13awk3LQcMbHc9XuyTOgUPvEEFCBIIvywqE/nKuhfcG5QDgzjzW85RwEerdbmh2/L+7FeVGkudqB+ngxVgku/D6EKx8vaJV4JT+0VWD26W6Ii2cw+U8gcC6R68pOYUCbl88rjxCXl8OEZd9Tmc7F1SdxqvYWwi8TtHRUkfVSgKtpjtJsnQl9WbVDPuz6v8k9eva4z6dQHfc2V+t28z4yHSEF+J/agQdiRUV1dqZtm4k8DM0FCzqiHQxDmeF0uvLSYWC1KazIGSNy8R+7LsO3+DALHA2tWXcHScY9kk98WDAf4Bism3EE59mQV4tkq7taF904XSZTIQsGiWqXorxoKymTqqL66cu79EX9jdCIsImeqKvWA9bjPzBMrcnmXn4YGICl74pAdMCq22hnIkWck6ib+xZIIr/EZ1zyL3Yl0xdmkAaqtADLlz/eq35tZISc+2iPY= X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 21b8a894-bb9c-4760-3894-08d9c693f6b5 X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Dec 2021 04:15:05.4948 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Xt4cr8wBxGUHycaciKFwX0IKmsZzOBjyx8pBYuDoYItrEKvbyqsPdfsbEawvv8Yt2cyKHmc6oBrV5tWjAIPayjn1/nEhUK2nu72wm/ILf6c= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR01MB5189 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This commit adds support for Ampere SMpro hwmon driver. This driver supports accessing various CPU sensors provided by the SMpro co-processor including temperature, power, voltages, and current. Signed-off-by: Quan Nguyen Reviewed-by: Guenter Roeck --- Changes in v6: + None Changes in v5: + Drop ManufacturerID checking when probe as it was checked during smpro-mfd probing [Quan] + Drop the use of register offset [Quan] + Removed the use of compatible string as it is instantiated by smpro-mfd driver [Quan] + Thanks Guenter for the Reviewed-by in last version, but it was not added because there's some changes in this version. Really appreciate if you could help again, thank you. Changes in v4: + Returned regmap_read() error code [Guenter] Changes in v3: + Handled negative temperature value [Guenter] + Returned -ENODEV if Manufacturer ID is wrong [Guenter] + Refactored smpro_read_string() and smpro_temp_read() [Guenter] + Removed smpro_write() function [Guenter] + Added minor refactor changes [Quan] Changes in v2: + Removed "virtual" sensors [Guenter] + Reported SOC_TDP as "Socket TDP" using max attributes [Guenter] + Corrected return error code when host is turn off [Guenter] + Reported MEM HOT Threshold for all DIMMs as temp*_crit [Guenter] + Removed license info as SPDX-License-Identifier existed [Guenter] + Added is_visible() support [Guenter] + Used HWMON_CHANNEL_INFO() macro and LABEL attributes [Guenter] + Made is_valid_id() return boolean [Guenter] + Returned -EPROBE_DEFER when smpro reg inaccessible [Guenter] + Removed unnecessary error message when dev register fail [Guenter] + Removed Socket TDP sensor [Quan] + Included sensor type and channel in labels [Quan] + Refactorized code to fix checkpatch.pl --strict complaint [Quan] drivers/hwmon/Kconfig | 8 + drivers/hwmon/Makefile | 1 + drivers/hwmon/smpro-hwmon.c | 463 ++++++++++++++++++++++++++++++++++++ 3 files changed, 472 insertions(+) create mode 100644 drivers/hwmon/smpro-hwmon.c diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 8df25f1079ba..493e44577317 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -67,6 +67,14 @@ config SENSORS_ABITUGURU3 This driver can also be built as a module. If so, the module will be called abituguru3. +config SENSORS_SMPRO + tristate "Ampere's Altra SMpro hardware monitoring driver" + depends on MFD_SMPRO + help + If you say yes here you get support for the thermal, voltage, + current and power sensors of Ampere's Altra processor family SoC + with SMpro co-processor. + config SENSORS_AD7314 tristate "Analog Devices AD7314 and compatibles" depends on SPI diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index 185f946d698b..0365015b8bae 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -181,6 +181,7 @@ obj-$(CONFIG_SENSORS_SHT4x) += sht4x.o obj-$(CONFIG_SENSORS_SHTC1) += shtc1.o obj-$(CONFIG_SENSORS_SIS5595) += sis5595.o obj-$(CONFIG_SENSORS_SMM665) += smm665.o +obj-$(CONFIG_SENSORS_SMPRO) += smpro-hwmon.o obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o obj-$(CONFIG_SENSORS_SMSC47M1) += smsc47m1.o obj-$(CONFIG_SENSORS_SMSC47M192)+= smsc47m192.o diff --git a/drivers/hwmon/smpro-hwmon.c b/drivers/hwmon/smpro-hwmon.c new file mode 100644 index 000000000000..b01ceea33ddd --- /dev/null +++ b/drivers/hwmon/smpro-hwmon.c @@ -0,0 +1,463 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Ampere Computing SoC's SMPro Hardware Monitoring Driver + * + * Copyright (c) 2021, Ampere Computing LLC + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Logical Power Sensor Registers */ +#define SOC_TEMP 0x10 +#define SOC_VRD_TEMP 0x11 +#define DIMM_VRD_TEMP 0x12 +#define CORE_VRD_TEMP 0x13 +#define CH0_DIMM_TEMP 0x14 +#define CH1_DIMM_TEMP 0x15 +#define CH2_DIMM_TEMP 0x16 +#define CH3_DIMM_TEMP 0x17 +#define CH4_DIMM_TEMP 0x18 +#define CH5_DIMM_TEMP 0x19 +#define CH6_DIMM_TEMP 0x1A +#define CH7_DIMM_TEMP 0x1B +#define RCA_VRD_TEMP 0x1C + +#define CORE_VRD_PWR 0x20 +#define SOC_PWR 0x21 +#define DIMM_VRD1_PWR 0x22 +#define DIMM_VRD2_PWR 0x23 +#define CORE_VRD_PWR_MW 0x26 +#define SOC_PWR_MW 0x27 +#define DIMM_VRD1_PWR_MW 0x28 +#define DIMM_VRD2_PWR_MW 0x29 +#define RCA_VRD_PWR 0x2A +#define RCA_VRD_PWR_MW 0x2B + +#define MEM_HOT_THRESHOLD 0x32 +#define SOC_VR_HOT_THRESHOLD 0x33 +#define CORE_VRD_VOLT 0x34 +#define SOC_VRD_VOLT 0x35 +#define DIMM_VRD1_VOLT 0x36 +#define DIMM_VRD2_VOLT 0x37 +#define RCA_VRD_VOLT 0x38 + +#define CORE_VRD_CURR 0x39 +#define SOC_VRD_CURR 0x3A +#define DIMM_VRD1_CURR 0x3B +#define DIMM_VRD2_CURR 0x3C +#define RCA_VRD_CURR 0x3D + +struct smpro_hwmon { + struct regmap *regmap; +}; + +struct smpro_sensor { + const u8 reg; + const u8 reg_ext; + const char *label; +}; + +static const struct smpro_sensor temperature[] = { + { + .reg = SOC_TEMP, + .label = "temp1 SoC" + }, + { + .reg = SOC_VRD_TEMP, + .reg_ext = SOC_VR_HOT_THRESHOLD, + .label = "temp2 SoC VRD" + }, + { + .reg = DIMM_VRD_TEMP, + .label = "temp3 DIMM VRD" + }, + { + .reg = CORE_VRD_TEMP, + .label = "temp4 CORE VRD" + }, + { + .reg = CH0_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp5 CH0 DIMM" + }, + { + .reg = CH1_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp6 CH1 DIMM" + }, + { + .reg = CH2_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp7 CH2 DIMM" + }, + { + .reg = CH3_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp8 CH3 DIMM" + }, + { + .reg = CH4_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp9 CH4 DIMM" + }, + { + .reg = CH5_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp10 CH5 DIMM" + }, + { + .reg = CH6_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp11 CH6 DIMM" + }, + { + .reg = CH7_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp12 CH7 DIMM" + }, + { + .reg = RCA_VRD_TEMP, + .label = "temp13 RCA VRD" + }, +}; + +static const struct smpro_sensor voltage[] = { + { + .reg = CORE_VRD_VOLT, + .label = "vout0 CORE VRD" + }, + { + .reg = SOC_VRD_VOLT, + .label = "vout1 SoC VRD" + }, + { + .reg = DIMM_VRD1_VOLT, + .label = "vout2 DIMM VRD1" + }, + { + .reg = DIMM_VRD2_VOLT, + .label = "vout3 DIMM VRD2" + }, + { + .reg = RCA_VRD_VOLT, + .label = "vout4 RCA VRD" + }, +}; + +static const struct smpro_sensor curr_sensor[] = { + { + .reg = CORE_VRD_CURR, + .label = "iout1 CORE VRD" + }, + { + .reg = SOC_VRD_CURR, + .label = "iout2 SoC VRD" + }, + { + .reg = DIMM_VRD1_CURR, + .label = "iout3 DIMM VRD1" + }, + { + .reg = DIMM_VRD2_CURR, + .label = "iout4 DIMM VRD2" + }, + { + .reg = RCA_VRD_CURR, + .label = "iout5 RCA VRD" + }, +}; + +static const struct smpro_sensor power[] = { + { + .reg = CORE_VRD_PWR, + .reg_ext = CORE_VRD_PWR_MW, + .label = "power1 CORE VRD" + }, + { + .reg = SOC_PWR, + .reg_ext = SOC_PWR_MW, + .label = "power2 SoC" + }, + { + .reg = DIMM_VRD1_PWR, + .reg_ext = DIMM_VRD1_PWR_MW, + .label = "power3 DIMM VRD1" + }, + { + .reg = DIMM_VRD2_PWR, + .reg_ext = DIMM_VRD2_PWR_MW, + .label = "power4 DIMM VRD2" + }, + { + .reg = RCA_VRD_PWR, + .reg_ext = RCA_VRD_PWR_MW, + .label = "power5 RCA VRD" + }, +}; + +static int smpro_read_temp(struct device *dev, u32 attr, int channel, long *val) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int value; + int ret; + + switch (attr) { + case hwmon_temp_input: + ret = regmap_read(hwmon->regmap, temperature[channel].reg, &value); + if (ret) + return ret; + break; + case hwmon_temp_crit: + ret = regmap_read(hwmon->regmap, temperature[channel].reg_ext, &value); + if (ret) + return ret; + break; + default: + return -EOPNOTSUPP; + } + + *val = sign_extend32(value, 8) * 1000; + return 0; +} + +static int smpro_read_in(struct device *dev, u32 attr, int channel, long *val) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int value; + int ret; + + switch (attr) { + case hwmon_in_input: + ret = regmap_read(hwmon->regmap, voltage[channel].reg, &value); + if (ret < 0) + return ret; + /* 15-bit value in 1mV */ + *val = value & 0x7fff; + return 0; + default: + return -EOPNOTSUPP; + } +} + +static int smpro_read_curr(struct device *dev, u32 attr, int channel, long *val) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int value; + int ret; + + switch (attr) { + case hwmon_curr_input: + ret = regmap_read(hwmon->regmap, curr_sensor[channel].reg, &value); + if (ret < 0) + return ret; + /* Scale reported by the hardware is 1mA */ + *val = value & 0x7fff; + return 0; + default: + return -EOPNOTSUPP; + } +} + +static int smpro_read_power(struct device *dev, u32 attr, int channel, long *val_pwr) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int val = 0, val_mw = 0; + int ret; + + switch (attr) { + case hwmon_power_input: + ret = regmap_read(hwmon->regmap, power[channel].reg, &val); + if (ret) + return ret; + + ret = regmap_read(hwmon->regmap, power[channel].reg_ext, &val_mw); + if (ret) + return ret; + + *val_pwr = val * 1000000 + val_mw * 1000; + return 0; + + default: + return -EOPNOTSUPP; + } +} + +static int smpro_read(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long *val) +{ + switch (type) { + case hwmon_temp: + return smpro_read_temp(dev, attr, channel, val); + case hwmon_in: + return smpro_read_in(dev, attr, channel, val); + case hwmon_power: + return smpro_read_power(dev, attr, channel, val); + case hwmon_curr: + return smpro_read_curr(dev, attr, channel, val); + default: + return -EOPNOTSUPP; + } +} + +static int smpro_read_string(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, const char **str) +{ + switch (type) { + case hwmon_temp: + switch (attr) { + case hwmon_temp_label: + *str = temperature[channel].label; + return 0; + default: + break; + } + break; + + case hwmon_in: + switch (attr) { + case hwmon_in_label: + *str = voltage[channel].label; + return 0; + default: + break; + } + break; + + case hwmon_curr: + switch (attr) { + case hwmon_curr_label: + *str = curr_sensor[channel].label; + return 0; + default: + break; + } + break; + + case hwmon_power: + switch (attr) { + case hwmon_power_label: + *str = power[channel].label; + return 0; + default: + break; + } + break; + default: + break; + } + + return -EOPNOTSUPP; +} + +static umode_t smpro_is_visible(const void *data, enum hwmon_sensor_types type, + u32 attr, int channel) +{ + const struct smpro_hwmon *hwmon = data; + unsigned int value; + int ret; + + switch (type) { + case hwmon_temp: + switch (attr) { + case hwmon_temp_input: + case hwmon_temp_label: + case hwmon_temp_crit: + ret = regmap_read(hwmon->regmap, temperature[channel].reg, &value); + if (ret || value == 0xFFFF) + return 0; + break; + } + default: + break; + } + + return 0444; +} + +static const struct hwmon_channel_info *smpro_info[] = { + HWMON_CHANNEL_INFO(temp, + HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL), + HWMON_CHANNEL_INFO(in, + HWMON_I_INPUT | HWMON_I_LABEL, + HWMON_I_INPUT | HWMON_I_LABEL, + HWMON_I_INPUT | HWMON_I_LABEL, + HWMON_I_INPUT | HWMON_I_LABEL, + HWMON_I_INPUT | HWMON_I_LABEL), + HWMON_CHANNEL_INFO(power, + HWMON_P_INPUT | HWMON_P_LABEL, + HWMON_P_INPUT | HWMON_P_LABEL, + HWMON_P_INPUT | HWMON_P_LABEL, + HWMON_P_INPUT | HWMON_P_LABEL, + HWMON_P_INPUT | HWMON_P_LABEL), + HWMON_CHANNEL_INFO(curr, + HWMON_C_INPUT | HWMON_C_LABEL, + HWMON_C_INPUT | HWMON_C_LABEL, + HWMON_C_INPUT | HWMON_C_LABEL, + HWMON_C_INPUT | HWMON_C_LABEL, + HWMON_C_INPUT | HWMON_C_LABEL), + NULL +}; + +static const struct hwmon_ops smpro_hwmon_ops = { + .is_visible = smpro_is_visible, + .read = smpro_read, + .read_string = smpro_read_string, +}; + +static const struct hwmon_chip_info smpro_chip_info = { + .ops = &smpro_hwmon_ops, + .info = smpro_info, +}; + +static int smpro_hwmon_probe(struct platform_device *pdev) +{ + struct smpro_hwmon *hwmon; + struct device *hwmon_dev; + + hwmon = devm_kzalloc(&pdev->dev, sizeof(struct smpro_hwmon), GFP_KERNEL); + if (!hwmon) + return -ENOMEM; + + hwmon->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!hwmon->regmap) + return -ENODEV; + + hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev, "smpro_hwmon", + hwmon, &smpro_chip_info, NULL); + + return PTR_ERR_OR_ZERO(hwmon_dev); +} + +static struct platform_driver smpro_hwmon_driver = { + .probe = smpro_hwmon_probe, + .driver = { + .name = "smpro-hwmon", + }, +}; + +module_platform_driver(smpro_hwmon_driver); + +MODULE_AUTHOR("Thu Nguyen "); +MODULE_AUTHOR("Quan Nguyen "); +MODULE_DESCRIPTION("Ampere Altra SMPro hwmon driver"); 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Wysocki" , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Gustavo Pimentel Cc: Open Source Submission , Phong Vo , "Thang Q . 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Signed-off-by: Thu Nguyen Signed-off-by: Quan Nguyen Reviewed-by: Guenter Roeck --- Changes in v6: + None Changes in v5: + None Changes in v4: + None Changes in v3: + None Changes in v2: + Removed "virtual" sensors [Guenter] + Fixed typo "mili" to "milli", "nanoWatt" to "microWatt" [Guenter] + Reported SOC_TDP as "Socket TDP" using max attributes [Guenter] + Clarified "highest" meaning in documentation [Guenter] + Reported MEM HOT Threshold for all DIMMs as temp*_crit [Guenter] + Removed Socket TDP sensor [Quan] + Included sensor type and channel in labels [Quan] Documentation/hwmon/index.rst | 1 + Documentation/hwmon/smpro-hwmon.rst | 101 ++++++++++++++++++++++++++++ 2 files changed, 102 insertions(+) create mode 100644 Documentation/hwmon/smpro-hwmon.rst diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index df20022c741f..79d1b8023186 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -180,6 +180,7 @@ Hardware Monitoring Kernel Drivers sis5595 sl28cpld smm665 + smpro-hwmon smsc47b397 smsc47m192 smsc47m1 diff --git a/Documentation/hwmon/smpro-hwmon.rst b/Documentation/hwmon/smpro-hwmon.rst new file mode 100644 index 000000000000..f978b1370e16 --- /dev/null +++ b/Documentation/hwmon/smpro-hwmon.rst @@ -0,0 +1,101 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Kernel driver Ampere(R)'s Altra(R) SMpro hwmon +============================================== + +Supported chips: + + * Ampere(R) Altra(R) + + Prefix: 'smpro' + + Reference: Altra SoC BMC Interface Specification + +Author: Thu Nguyen + +Description +----------- +This driver supports hardware monitoring for Ampere(R) Altra(R) SoC's based on the +SMpro co-processor (SMpro). +The following sensor types are supported by the driver: + + * temperature + * voltage + * current + * power + +The SMpro interface provides the registers to query the various sensors and +their values which are then exported to userspace by this driver. + +Usage Notes +----------- + +SMpro hwmon driver creates at least two sysfs files for each sensor. + +* File ``_label`` reports the sensor label. +* File ``_input`` returns the sensor value. + +The sysfs files are allocated in the SMpro root fs folder. +There is one root folder for each SMpro instance. + +When the SoC is turned off, the driver will fail to read registers +and return -ENXIO. + +Sysfs entries +------------- + +The following sysfs files are supported: + +* Ampere(R) Altra(R): + +============ ============= ====== =============================================== +Name Unit Perm Description +temp1_input milli Celsius RO SoC temperature +temp2_input milli Celsius RO Max temperature reported among SoC VRDs +temp2_crit milli Celsius RO SoC VRD HOT Threshold temperature +temp3_input milli Celsius RO Max temperature reported among DIMM VRDs +temp4_input milli Celsius RO Max temperature reported among Core VRDs +temp5_input milli Celsius RO Temperature of DIMM0 on CH0 +temp5_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp6_input milli Celsius RO Temperature of DIMM0 on CH1 +temp6_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp7_input milli Celsius RO Temperature of DIMM0 on CH2 +temp7_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp8_input milli Celsius RO Temperature of DIMM0 on CH3 +temp8_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp9_input milli Celsius RO Temperature of DIMM0 on CH4 +temp9_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp10_input milli Celsius RO Temperature of DIMM0 on CH5 +temp10_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp11_input milli Celsius RO Temperature of DIMM0 on CH6 +temp11_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp12_input milli Celsius RO Temperature of DIMM0 on CH7 +temp12_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp13_input milli Celsius RO Max temperature reported among RCA VRDs +in0_input milli Volts RO Core voltage +in1_input milli Volts RO SoC voltage +in2_input milli Volts RO DIMM VRD1 voltage +in3_input milli Volts RO DIMM VRD2 voltage +in4_input milli Volts RO RCA VRD voltage +cur1_input milli Amperes RO Core VRD current +cur2_input milli Amperes RO SoC VRD current +cur3_input milli Amperes RO DIMM VRD1 current +cur4_input milli Amperes RO DIMM VRD2 current +cur5_input milli Amperes RO RCA VRD current +power1_input micro Watts RO Core VRD power +power2_input micro Watts RO SoC VRD power +power3_input micro Watts RO DIMM VRD1 power +power4_input micro Watts RO DIMM VRD2 power +power5_input micro Watts RO RCA VRD power +============ ============= ====== =============================================== + +Example:: + + # cat in0_input + 830 + # cat temp1_input + 37000 + # cat curr1_input + 9000 + # cat power5_input + 19500000 From patchwork Fri Dec 24 04:13:48 2021 Content-Type: text/plain; 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+void regmap_acquire_lock(struct regmap *map) +{ + map->lock(map->lock_arg); +} +EXPORT_SYMBOL_GPL(regmap_acquire_lock); + +void regmap_release_lock(struct regmap *map) +{ + map->unlock(map->lock_arg); +} +EXPORT_SYMBOL_GPL(regmap_release_lock); + bool regmap_writeable(struct regmap *map, unsigned int reg) { if (map->max_register && reg > map->max_register) diff --git a/include/linux/regmap.h b/include/linux/regmap.h index 22652e5fbc38..0ed12e6ad4fb 100644 --- a/include/linux/regmap.h +++ b/include/linux/regmap.h @@ -1194,6 +1194,8 @@ int regmap_async_complete(struct regmap *map); bool regmap_can_raw_write(struct regmap *map); size_t regmap_get_raw_read_max(struct regmap *map); size_t regmap_get_raw_write_max(struct regmap *map); +void regmap_acquire_lock(struct regmap *map); +void regmap_release_lock(struct regmap *map); int regcache_sync(struct regmap *map); int regcache_sync_region(struct regmap *map, unsigned int min, From patchwork Fri Dec 24 04:13:49 2021 Content-Type: text/plain; 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Wysocki" , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Gustavo Pimentel Cc: Open Source Submission , Phong Vo , "Thang Q . Nguyen" , Quan Nguyen Subject: [PATCH v6 6/9] misc: smpro-errmon: Add Ampere's SMpro error monitor driver Date: Fri, 24 Dec 2021 11:13:49 +0700 Message-Id: <20211224041352.29405-7-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20211224041352.29405-1-quan@os.amperecomputing.com> References: <20211224041352.29405-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2PR06CA0134.apcprd06.prod.outlook.com (2603:1096:1:1f::12) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 47ab4a83-9595-4db9-abe0-08d9c6940175 X-MS-TrafficTypeDiagnostic: BYAPR01MB5189:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1332; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 0C0FC6/is7g5e4jOB3unMYJhLjc8LieTbOaQQbrvMM24nmRqjyZPqHk6erV2RDLHHuFLOCOsfIem4se/1cxgamzKaXOgq29GV1WENyWkmpGTnD4iqh+MnS3ZP6K3oDN1bR/Ul2OQk/jN1NFWoXHVwC7YmGZ5/Wyo3UYJIFBkB1MOcFRhkZWchOUYFWWbXWF9ZqLBW/l7IUNcDvIIyj0ezHX3/4k2C6f6g/hLrtD1LdEoPVlBiYhsDL+RTFoKqfjg2T9kqxZdQqkYJ6qklVazbLSxpoPIjOdbcnkn9a5bYp2Q9W3YrTi89KFSNCklN+G3aWkSAMGGJ9YP3ubav8ypSCFmpO43pdEtwfKuGRfPhIU5o8EoAJTGY5GftERp3jRVoRFF7hgIFNuCR3XN/Bz2Xm61yUUc9FFCoZIUa7LjVV1opAtfn9FBYgDNkgEEU8l0TvGbJ7Ahs3tCGFphPO/pVbohwI1CGGFuCpmpgF1dU3z+3mOJZ+87C9hywD1feX+1WS5/W+lACwRz6SaUh4EW0jAV2U0q/W1hNe9bTg5FnnQtRoMMvjFBPv96AmwvynNvEnwgF8XYs60hr5K2KQTCu4aIl7NOtD97Mj6SEOE8NODSfX8mzNgVfdLGiXzGYXTtjhLY0w99vPA0MyGpDJdazVVEltMvpIZs0GeqtIZI3IqBRcAOj5AlqvJdIGA74Fs7RkAF8G7afN+Y+sc/h9PXG9MhcD/dGHfGwOV36c6fboo= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR01MB7282.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(4636009)(366004)(110136005)(54906003)(86362001)(38100700002)(38350700002)(83380400001)(66476007)(52116002)(5660300002)(30864003)(107886003)(2616005)(8676002)(66946007)(6666004)(66556008)(2906002)(508600001)(1076003)(4326008)(316002)(6506007)(8936002)(6486002)(26005)(186003)(6512007)(7416002)(921005);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: e60Wrz9RYGG+SbTXI7okQkaD6eknKnDDHHwB1znEY+W9CDczVlyRT2c9zop6Y6WO887dI3Cwzt23eEtYoU74JlXri7qPlUb2jXcL1vV60/NUVXjtWJPBBLl7rIGjAF+bj7LZBp9xsH95tLHT1UQoH4QyDez2zRDoaVUp8E/CyMGDhuMDYn5mJKNaFdW5IU30et5/MVYWisrQJQUikqqyCXOAL29tzjgtEGqz6LHeOHJkNymoCYuYn7fnhW444tpWOQaoauTGO7XPEcaofXvAUK6lXXNaZBlhSNrF4LCF2dVsT51ZfNH9yGNC9BadDewA3/DyaAGRU+MmKXiJaw4LlDOcHGyvVL3iLCw0UN6bYN8JzLdHzVv9g39h9NJoZnvplPCVRriLE5jnjZq9FW6RixTEsb5Yur03g0DTJWDKw9fW4Oham67q1r9WTySzs0VTcw/7MEuvsi+vGiGEkdg6BjPCy5H7/JjR6LzbUp3jkDO+mi//1BkKbc5PznpcmGjk7spa5Od5GOXO/oFZ6YFozUhu0ciIM4QWOlx+P7Knwr/Uzt+BZGdm7QAmc8u451W4byS5ENoU1udtAZQ62uczRUpgro9mGh/9thBRH1d94SUgCO/xZJYsd4l8Y4gw9HPNtfE0ZgFAWdTmWX8Ziv2B0lp56eTLJcSiGl2n6CbV+PqfmEGK6V9GSXa88uLnpTB7w8+ZH9B7PX3u3ufDy3tepM8r3HTcAaniaVg3pL2H0WYkM/PnkEDl9V6p/ANNQ8b84ksA1xtBpXg1sLsjSj5+A9JJpivpc3VbKVgB6YTqxtxDu4r6He/Epm4zoD7ptVeZrqfuU1nGXXP9Zl1xwdDvwufkV7ZXCQ5HyUVuJJ0GnFWP++VEaitoWCKG+Ctqq3v1swVWYXqzUsAy3cIZVEQ9UJ8io/fEgJJxjyF/1S9wvXuaKkuu+nPwQwzeduq5vChI+6G+mf2VotwMo1qbnPfibV+Pecjhh1rb7lw9XK3vC1kLBOxjZPswmhUKCf064nI38U86wb5WcLbYWYKpbse28TetfwaMtvNJRsfEt8vCByCK0nNMeWutJqkoi2Vbqrng2Y4+bWI4bX1YGaJiM/Q5ArlHi7Z542Qg8bRV3ODn1xHElT8XT2vCWFfe9Rniql2jc4C0gjbcKFr6egE5KBe2yTco0KLZ66NaEm+MMk+wbxj6Q5Dx2JdvxjtR1tKnKnFjk6BN7LCS5o5TjYldvXZWJjzkl1ho9OHvi3zFmQhvQtX+Ou6KRIvJfBJSbPVIBY0S/3irfqOwgq8GVmd63qz+0T5v1GJGfeMxocUeUKU6cfFmWNn0OGmldj4K1tjUsJgwKjNiaaEIPNcdkBj4zGYe4k1dq47HUabKjJ08TG1/q1C72QvlKvdUeuN7O7lV7ZPgJNr5bUlfKxLphiJI52ljpcXrPOmhXInd6/zqHwSUWoSBAyrH8dC9ORwW6cDWKIqbKjzjPwrfaT/UZPLbjnbI/cZub+9hI7AE+M/7FfWFZuHI9lemU4plikJwdso5I7c4Uw8QSQuIf0NTWVluO/L3AzlNCaljx4HnpEwbi6vG+pZWRiSj0vlZ0Oj7gnUReAoeov931BhMLN/AkURzZjsmYAdRhK8CoDJuS+QGq9jWSqf0JThOEfFm6EIJuOTEV8NYip1FVap3jvqlU3Ah7jErF/88a0cSQxjK+/0iNdZSCY4= X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 47ab4a83-9595-4db9-abe0-08d9c6940175 X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Dec 2021 04:15:23.5021 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: qyS+BNH8XjY0qG5MH4YkMdWqLKyQBD3a9W94H52YoEzQX3pvTV7rFVWTVUagWioBH5iHVXZi+1fpKifPa4J7/dvyePX9Q43E++cfTJYgOt8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR01MB5189 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This commit adds Ampere's SMpro error monitor driver for monitoring and reporting RAS-related errors as reported by SMpro co-processor found on Ampere's Altra processor family. Signed-off-by: Quan Nguyen --- Change in v6: + First introduced in v6 [Quan] drivers/mfd/smpro-mfd.c | 1 + drivers/misc/Kconfig | 7 + drivers/misc/Makefile | 1 + drivers/misc/smpro-errmon.c | 571 ++++++++++++++++++++++++++++++++++++ 4 files changed, 580 insertions(+) create mode 100644 drivers/misc/smpro-errmon.c diff --git a/drivers/mfd/smpro-mfd.c b/drivers/mfd/smpro-mfd.c index 132d4e2dde12..a7cd64bf9eaa 100644 --- a/drivers/mfd/smpro-mfd.c +++ b/drivers/mfd/smpro-mfd.c @@ -27,6 +27,7 @@ static const struct regmap_config simple_word_regmap_config = { static const struct mfd_cell smpro_devs[] = { MFD_CELL_NAME("smpro-hwmon"), + MFD_CELL_NAME("smpro-errmon"), }; static int smpro_mfd_probe(struct i2c_client *i2c) diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 0f5a49fc7c9e..0cbd8a2561a7 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -176,6 +176,13 @@ config SGI_XP this feature will allow for direct communication between SSIs based on a network adapter and DMA messaging. +config SMPRO_ERRMON + tristate "Ampere Computing SMPro error monitor driver" + depends on MFD_SMPRO || COMPILE_TEST + help + If you say yes here you get support for error monitor function + provides by Ampere Computing's SoC with SMpro processor. + config CS5535_MFGPT tristate "CS5535/CS5536 Geode Multi-Function General Purpose Timer (MFGPT) support" depends on MFD_CS5535 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index a086197af544..8ec9961b941b 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -23,6 +23,7 @@ obj-$(CONFIG_ENCLOSURE_SERVICES) += enclosure.o obj-$(CONFIG_KGDB_TESTS) += kgdbts.o obj-$(CONFIG_SGI_XP) += sgi-xp/ obj-$(CONFIG_SGI_GRU) += sgi-gru/ +obj-$(CONFIG_SMPRO_ERRMON) += smpro-errmon.o obj-$(CONFIG_CS5535_MFGPT) += cs5535-mfgpt.o obj-$(CONFIG_GEHC_ACHC) += gehc-achc.o obj-$(CONFIG_HP_ILO) += hpilo.o diff --git a/drivers/misc/smpro-errmon.c b/drivers/misc/smpro-errmon.c new file mode 100644 index 000000000000..d694ebb06977 --- /dev/null +++ b/drivers/misc/smpro-errmon.c @@ -0,0 +1,571 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Ampere Computing SoC's SMpro Error Monitoring Driver + * + * Copyright (c) 2021, Ampere Computing LLC + * + */ + +#include +#include +#include +#include +#include + +/* GPI RAS Error Registers */ +#define GPI_RAS_ERR 0x7E + +/* Core and L2C Error Registers */ +#define CORE_CE_ERR_CNT 0x80 +#define CORE_CE_ERR_LEN 0x81 +#define CORE_CE_ERR_DATA 0x82 +#define CORE_UE_ERR_CNT 0x83 +#define CORE_UE_ERR_LEN 0x84 +#define CORE_UE_ERR_DATA 0x85 + +/* Memory Error Registers */ +#define MEM_CE_ERR_CNT 0x90 +#define MEM_CE_ERR_LEN 0x91 +#define MEM_CE_ERR_DATA 0x92 +#define MEM_UE_ERR_CNT 0x93 +#define MEM_UE_ERR_LEN 0x94 +#define MEM_UE_ERR_DATA 0x95 + +/* RAS Error/Warning Registers */ +#define ERR_SMPRO_TYPE 0xA0 +#define ERR_PMPRO_TYPE 0xA1 +#define ERR_SMPRO_INFO_LO 0xA2 +#define ERR_SMPRO_INFO_HI 0xA3 +#define ERR_SMPRO_DATA_LO 0xA4 +#define ERR_SMPRO_DATA_HI 0xA5 +#define WARN_SMPRO_INFO_LO 0xAA +#define WARN_SMPRO_INFO_HI 0xAB +#define ERR_PMPRO_INFO_LO 0xA6 +#define ERR_PMPRO_INFO_HI 0xA7 +#define ERR_PMPRO_DATA_LO 0xA8 +#define ERR_PMPRO_DATA_HI 0xA9 +#define WARN_PMPRO_INFO_LO 0xAC +#define WARN_PMPRO_INFO_HI 0xAD + +/* PCIE Error Registers */ +#define PCIE_CE_ERR_CNT 0xC0 +#define PCIE_CE_ERR_LEN 0xC1 +#define PCIE_CE_ERR_DATA 0xC2 +#define PCIE_UE_ERR_CNT 0xC3 +#define PCIE_UE_ERR_LEN 0xC4 +#define PCIE_UE_ERR_DATA 0xC5 + +/* Other Error Registers */ +#define OTHER_CE_ERR_CNT 0xD0 +#define OTHER_CE_ERR_LEN 0xD1 +#define OTHER_CE_ERR_DATA 0xD2 +#define OTHER_UE_ERR_CNT 0xD8 +#define OTHER_UE_ERR_LEN 0xD9 +#define OTHER_UE_ERR_DATA 0xDA + +/* Event Source Registers */ +#define EVENT_SRC1 0x62 +#define EVENT_SRC2 0x63 + +/* Event Data Registers */ +#define VRD_WARN_FAULT_EVENT_DATA 0x78 +#define VRD_HOT_EVENT_DATA 0x79 +#define DIMM_HOT_EVENT_DATA 0x7A +#define DIMM_2X_REFRESH_EVENT_DATA 0x96 + +#define MAX_READ_BLOCK_LENGTH 48 +#define NUM_I2C_MESSAGES 2 +#define MAX_READ_ERROR 35 +#define MAX_MSG_LEN 128 + +#define RAS_SMPRO_ERRS 0 +#define RAS_PMPRO_ERRS 1 + +enum RAS_48BYTES_ERR_TYPES { + CORE_CE_ERRS, + CORE_UE_ERRS, + MEM_CE_ERRS, + MEM_UE_ERRS, + PCIE_CE_ERRS, + PCIE_UE_ERRS, + OTHER_CE_ERRS, + OTHER_UE_ERRS, + NUM_48BYTES_ERR_TYPE, +}; + +struct smpro_error_hdr { + u8 err_count; /* Number of the RAS errors */ + u8 err_len; /* Number of data bytes */ + u8 err_data; /* Start of 48-byte data */ +}; + +/* + * Included Address of registers to get Count, Length of data and Data + * of the 48 bytes error data + */ +struct smpro_error_hdr smpro_error_table[NUM_48BYTES_ERR_TYPE] = { + {CORE_CE_ERR_CNT, CORE_CE_ERR_LEN, CORE_CE_ERR_DATA}, + {CORE_UE_ERR_CNT, CORE_UE_ERR_LEN, CORE_UE_ERR_DATA}, + {MEM_CE_ERR_CNT, MEM_CE_ERR_LEN, MEM_CE_ERR_DATA}, + {MEM_UE_ERR_CNT, MEM_UE_ERR_LEN, MEM_UE_ERR_DATA}, + {PCIE_CE_ERR_CNT, PCIE_CE_ERR_LEN, PCIE_CE_ERR_DATA}, + {PCIE_UE_ERR_CNT, PCIE_UE_ERR_LEN, PCIE_UE_ERR_DATA}, + {OTHER_CE_ERR_CNT, OTHER_CE_ERR_LEN, OTHER_CE_ERR_DATA}, + {OTHER_UE_ERR_CNT, OTHER_UE_ERR_LEN, OTHER_UE_ERR_DATA}, +}; + +/* + * List of SCP registers which are used to get + * one type of RAS Internal errors. + */ +struct smpro_int_error_hdr { + u8 err_type; + u8 err_info_low; + u8 err_info_high; + u8 err_data_high; + u8 err_data_low; + u8 warn_info_low; + u8 warn_info_high; +}; + +struct smpro_int_error_hdr list_smpro_int_error_hdr[2] = { + { + ERR_SMPRO_TYPE, + ERR_SMPRO_INFO_LO, ERR_SMPRO_INFO_HI, + ERR_SMPRO_DATA_LO, ERR_SMPRO_DATA_HI, + WARN_SMPRO_INFO_LO, WARN_SMPRO_INFO_HI + }, + { + ERR_PMPRO_TYPE, + ERR_PMPRO_INFO_LO, ERR_PMPRO_INFO_HI, + ERR_PMPRO_DATA_LO, ERR_PMPRO_DATA_HI, + WARN_PMPRO_INFO_LO, WARN_PMPRO_INFO_HI + }, +}; + +struct smpro_errmon { + struct regmap *regmap; +}; + +enum EVENT_TYPES { + VRD_WARN_FAULT_EVENTS, + VRD_HOT_EVENTS, + DIMM_HOT_EVENTS, + NUM_EVENTS_TYPE, +}; + +struct smpro_event_hdr { + u8 event_src; /* Source register of event type */ + u8 event_data; /* Data register of event type */ +}; + +/* Included Address of event source and data registers */ +struct smpro_event_hdr smpro_event_table[NUM_EVENTS_TYPE] = { + {EVENT_SRC1, VRD_WARN_FAULT_EVENT_DATA}, + {EVENT_SRC1, VRD_HOT_EVENT_DATA}, + {EVENT_SRC2, DIMM_HOT_EVENT_DATA} +}; + +static int read_i2c_block_data(struct i2c_client *client, u16 address, u16 length, u8 *data) +{ + unsigned char outbuf[MAX_READ_BLOCK_LENGTH]; + unsigned char inbuf[2]; + struct i2c_msg msgs[2]; + ssize_t ret; + + inbuf[0] = (address & 0xff); + inbuf[1] = length; + + msgs[0].addr = client->addr; + msgs[0].flags = client->flags & I2C_M_TEN; + msgs[0].len = 2; + msgs[0].buf = inbuf; + + msgs[1].addr = client->addr; + msgs[1].flags = (client->flags & I2C_M_TEN) | I2C_M_RD; + msgs[1].len = length; + msgs[1].buf = outbuf; + + ret = i2c_transfer(client->adapter, msgs, NUM_I2C_MESSAGES); + if (ret < 0) + return ret; + + if (ret != NUM_I2C_MESSAGES) + return -EIO; + + memcpy(data, outbuf, length); + + return length; +} + +static int errmon_read_block(struct regmap *map, u16 address, u16 length, u8 *data) +{ + struct i2c_client *client = to_i2c_client(regmap_get_device(map)); + int ret; + + regmap_acquire_lock(map); + + ret = read_i2c_block_data(client, address, length, data); + + regmap_release_lock(map); + + return ret; +} + +static ssize_t smpro_event_data_read(struct device *dev, + struct device_attribute *da, char *buf, + int channel) +{ + struct smpro_errmon *errmon = dev_get_drvdata(dev); + unsigned char msg[MAX_MSG_LEN] = {'\0'}; + struct smpro_event_hdr event_info; + s32 event_data = 0; + int ret; + + *buf = 0; + if (channel >= NUM_EVENTS_TYPE) + goto done; + + event_info = smpro_event_table[channel]; + ret = regmap_read(errmon->regmap, event_info.event_data, &event_data); + if (ret) + goto done; + + ret = scnprintf(msg, MAX_MSG_LEN, "%02x %04x\n", channel, event_data); + strncat(buf, msg, ret); +done: + return strlen(buf); +} + +static ssize_t smpro_error_data_read(struct device *dev, struct device_attribute *da, + char *buf, int channel) +{ + struct smpro_errmon *errmon = dev_get_drvdata(dev); + unsigned char err_data[MAX_READ_BLOCK_LENGTH]; + unsigned char msg[MAX_MSG_LEN] = {'\0'}; + struct smpro_error_hdr err_info; + s32 err_count = 1, err_length = 0; + u8 i = 0; + int len; + int ret; + + *buf = 0; + if (channel >= NUM_48BYTES_ERR_TYPE) + goto done; + + err_info = smpro_error_table[channel]; + + ret = regmap_read(errmon->regmap, err_info.err_count, &err_count); + if (ret || err_count <= 0) + goto done; + + /* Bit 8 indentifies the overflow status of one error type */ + if (err_count & BIT(8)) { + len = scnprintf(msg, MAX_MSG_LEN, + "%02x %02x %04x %08x %016llx %016llx %016llx %016llx %016llx\n", + 0xFF, 0xFF, 0, 0, 0LL, 0LL, 0LL, 0LL, 0LL); + strncat(buf, msg, len); + } + + /* Error count is the low byte */ + err_count = err_count & 0xff; + + if (err_count > MAX_READ_ERROR) + err_count = MAX_READ_ERROR; + + for (i = 0; i < err_count; i++) { + ret = regmap_read(errmon->regmap, err_info.err_len, &err_length); + if (ret || err_length <= 0) + break; + + if (err_length > MAX_READ_BLOCK_LENGTH) + err_length = MAX_READ_BLOCK_LENGTH; + + ret = errmon_read_block(errmon->regmap, err_info.err_data, err_length, err_data); + if (ret < 0) + break; + /* + * The output of Core/Memory/PCIe/Others UE/CE errors follows below format: + * \ + * + * Where: + * + Error Type: The hardwares cause the errors. (1 byte) + * + SubType: Sub type of error in the specified hardware error. (1 byte) + * + Instance: Combination of the socket, channel, + * slot cause the error. (2 bytes) + * + Error Status: Encode of error status. (4 bytes) + * + Error Address: The address in device causes the errors. (8 bytes) + * + Error Misc 0/1/2/3: Addition info about the errors. (8 bytes for each) + * Reference Altra SOC BMC Interface specification. + */ + len = scnprintf(msg, MAX_MSG_LEN, + "%02x %02x %04x %08x %016llx %016llx %016llx %016llx %016llx\n", + err_data[0], err_data[1], *(u16 *)&err_data[2], + *(u32 *)&err_data[4], *(u64 *)&err_data[8], + *(u64 *)&err_data[16], *(u64 *)&err_data[24], + *(u64 *)&err_data[32], *(u64 *)&err_data[40]); + + /* go to next error */ + ret = regmap_write(errmon->regmap, err_info.err_count, 0x100); + if (ret) + break; + + /* add error message to buffer */ + strncat(buf, msg, len); + } +done: + return strlen(buf); +} + +static s32 smpro_internal_err_get_info(struct regmap *regmap, u8 addr, u8 addr1, u8 addr2, u8 addr3, + u8 subtype, char *buf) +{ + unsigned int ret_hi = 0, ret_lo = 0, data_lo = 0, data_hi = 0; + int ret; + + ret = regmap_read(regmap, addr, &ret_lo); + if (ret) + return ret; + + ret = regmap_read(regmap, addr1, &ret_hi); + if (ret) + return ret; + + if (addr2 != 0xff) { + ret = regmap_read(regmap, addr2, &data_lo); + if (ret) + return ret; + ret = regmap_read(regmap, addr3, &data_hi); + if (ret) + return ret; + } + /* + * Output format: + * + * Where: + * + errType: SCP Error Type (3 bits) + * 1: Warning + * 2: Error + * 4: Error with data + * + image: SCP Image Code (8 bits) + * + dir: Direction (1 bit) + * 0: Enter + * 1: Exit + * + location: SCP Module Location Code (8 bits) + * + errorCode: SCP Error Code (16 bits) + * + data : Extensive data (32 bits) + * All bits are 0 when errType is warning or error. + */ + return scnprintf(buf, MAX_MSG_LEN, "%01x %02x %01x %02x %04x %04x%04x\n", + subtype, (ret_hi & 0xf000) >> 12, (ret_hi & 0x0800) >> 11, + ret_hi & 0xff, ret_lo, data_hi, data_lo); +} + +static ssize_t smpro_internal_err_read(struct device *dev, struct device_attribute *da, + char *buf, int channel) +{ + struct smpro_errmon *errmon = dev_get_drvdata(dev); + struct smpro_int_error_hdr err_info; + unsigned char msg[MAX_MSG_LEN] = {'\0'}; + unsigned int err_type; + unsigned int value; + int ret = 0; + + *buf = 0; + /* read error status */ + ret = regmap_read(errmon->regmap, GPI_RAS_ERR, &value); + if (ret) + goto done; + + if (!((channel == RAS_SMPRO_ERRS && (value & BIT(0))) || + (channel == RAS_PMPRO_ERRS && (value & BIT(1))))) + goto done; + + err_info = list_smpro_int_error_hdr[channel]; + ret = regmap_read(errmon->regmap, err_info.err_type, &err_type); + if (ret) + goto done; + + /* Warning type */ + if (err_type & BIT(0)) { + ret = smpro_internal_err_get_info(errmon->regmap, err_info.warn_info_low, + err_info.warn_info_high, 0xff, 0xff, 1, msg); + if (ret < 0) + goto done; + + strncat(buf, msg, ret); + } + + /* Error with data type */ + if (err_type & BIT(2)) { + ret = smpro_internal_err_get_info(errmon->regmap, err_info.err_info_low, + err_info.err_info_high, err_info.err_data_low, + err_info.err_data_high, 4, msg); + if (ret < 0) + goto done; + + strncat(buf, msg, ret); + } + /* Error type */ + else if (err_type & BIT(1)) { + ret = smpro_internal_err_get_info(errmon->regmap, err_info.err_info_low, + err_info.err_info_high, 0xff, 0xff, 2, msg); + if (ret < 0) + goto done; + + strncat(buf, msg, ret); + } + + /* clear the read errors */ + regmap_write(errmon->regmap, err_info.err_type, err_type); + +done: + return strlen(buf); +} + +static int errors_core_ce_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_error_data_read(dev, da, buf, CORE_CE_ERRS); +} +static DEVICE_ATTR_RO(errors_core_ce); + +static int errors_core_ue_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_error_data_read(dev, da, buf, CORE_UE_ERRS); +} +static DEVICE_ATTR_RO(errors_core_ue); + +static int errors_mem_ce_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_error_data_read(dev, da, buf, MEM_CE_ERRS); +} +static DEVICE_ATTR_RO(errors_mem_ce); + +static int errors_mem_ue_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_error_data_read(dev, da, buf, MEM_UE_ERRS); +} +static DEVICE_ATTR_RO(errors_mem_ue); + +static int errors_pcie_ce_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_error_data_read(dev, da, buf, PCIE_CE_ERRS); +} +static DEVICE_ATTR_RO(errors_pcie_ce); + +static int errors_pcie_ue_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_error_data_read(dev, da, buf, PCIE_UE_ERRS); +} +static DEVICE_ATTR_RO(errors_pcie_ue); + +static int errors_other_ce_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_error_data_read(dev, da, buf, OTHER_CE_ERRS); +} +static DEVICE_ATTR_RO(errors_other_ce); + +static int errors_other_ue_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_error_data_read(dev, da, buf, OTHER_UE_ERRS); +} +static DEVICE_ATTR_RO(errors_other_ue); + +static int errors_smpro_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_internal_err_read(dev, da, buf, RAS_SMPRO_ERRS); +} +static DEVICE_ATTR_RO(errors_smpro); + +static int errors_pmpro_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_internal_err_read(dev, da, buf, RAS_PMPRO_ERRS); +} +static DEVICE_ATTR_RO(errors_pmpro); + +static int event_vrd_warn_fault_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_event_data_read(dev, da, buf, VRD_WARN_FAULT_EVENTS); +} +static DEVICE_ATTR_RO(event_vrd_warn_fault); + +static int event_vrd_hot_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_event_data_read(dev, da, buf, VRD_HOT_EVENTS); +} +static DEVICE_ATTR_RO(event_vrd_hot); + +static int event_dimm_hot_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_event_data_read(dev, da, buf, DIMM_HOT_EVENTS); +} +static DEVICE_ATTR_RO(event_dimm_hot); + +static struct attribute *smpro_errmon_attrs[] = { + &dev_attr_errors_core_ce.attr, + &dev_attr_errors_core_ue.attr, + &dev_attr_errors_mem_ce.attr, + &dev_attr_errors_mem_ue.attr, + &dev_attr_errors_pcie_ce.attr, + &dev_attr_errors_pcie_ue.attr, + &dev_attr_errors_other_ce.attr, + &dev_attr_errors_other_ue.attr, + &dev_attr_errors_smpro.attr, + &dev_attr_errors_pmpro.attr, + &dev_attr_event_vrd_warn_fault.attr, + &dev_attr_event_vrd_hot.attr, + &dev_attr_event_dimm_hot.attr, + NULL +}; + +static const struct attribute_group smpro_errmon_attr_group = { + .attrs = smpro_errmon_attrs +}; + +static int smpro_errmon_probe(struct platform_device *pdev) +{ + struct smpro_errmon *errmon; + int ret; + + errmon = devm_kzalloc(&pdev->dev, sizeof(struct smpro_errmon), GFP_KERNEL); + if (!errmon) + return -ENOMEM; + + platform_set_drvdata(pdev, errmon); + + errmon->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!errmon->regmap) + return -ENODEV; + + ret = sysfs_create_group(&pdev->dev.kobj, &smpro_errmon_attr_group); + if (ret) + dev_err(&pdev->dev, "SMPro errmon sysfs registration failed\n"); + + return 0; +} + +static int smpro_errmon_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &smpro_errmon_attr_group); + pr_info("SMPro errmon sysfs entries removed"); + + return 0; +} + +static struct platform_driver smpro_errmon_driver = { + .probe = smpro_errmon_probe, + .remove = smpro_errmon_remove, + .driver = { + .name = "smpro-errmon", + }, +}; + +module_platform_driver(smpro_errmon_driver); + +MODULE_AUTHOR("Tung Nguyen "); +MODULE_AUTHOR("Thinh Pham "); +MODULE_AUTHOR("Hoang Nguyen "); +MODULE_AUTHOR("Thu Nguyen "); +MODULE_AUTHOR("Quan Nguyen "); +MODULE_DESCRIPTION("Ampere Altra SMpro driver"); +MODULE_LICENSE("GPL"); From patchwork Fri Dec 24 04:13:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12698790 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C211C433FE for ; Fri, 24 Dec 2021 04:15:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351307AbhLXEPe (ORCPT ); Thu, 23 Dec 2021 23:15:34 -0500 Received: from mail-co1nam11on2137.outbound.protection.outlook.com ([40.107.220.137]:10859 "EHLO NAM11-CO1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1351324AbhLXEPb (ORCPT ); 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Fri, 24 Dec 2021 04:15:29 +0000 From: Quan Nguyen To: Joel Stanley , Andrew Jeffery , Jean Delvare , Guenter Roeck , Rob Herring , Lee Jones , Jonathan Corbet , linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org, Mark Brown , Greg Kroah-Hartman , "Rafael J . Wysocki" , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Gustavo Pimentel Cc: Open Source Submission , Phong Vo , "Thang Q . Nguyen" , Quan Nguyen , Thu Nguyen Subject: [PATCH v6 7/9] docs: misc-devices: (smpro-errmon) Add documentation Date: Fri, 24 Dec 2021 11:13:50 +0700 Message-Id: <20211224041352.29405-8-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20211224041352.29405-1-quan@os.amperecomputing.com> References: <20211224041352.29405-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2PR06CA0134.apcprd06.prod.outlook.com (2603:1096:1:1f::12) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 478aaae3-43ac-4912-6a09-08d9c6940510 X-MS-TrafficTypeDiagnostic: BYAPR01MB5189:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ZzVxJRvcgS50uregaRH2+t+aLctdFztuLgDYdlDZ35yBEXHMbFenh4DRo1I8kSNE1XiyD0XIoslaIW/M33roj0vsdoNQsCkxpewzflYmDoV7dMs6nIft3eAoQq0Oi5fyirJE3MZiT8N9rxv386s3kRmqD3P3PjJdffVfPAZ0d/NSI2d4EmJvnYp5iYIkVhePTADXN80ZhJXABqszBZTv8iRPubkQZaSQdS0a9yPYwhjvOuWLpuAd+l8F8INJ3h3GZJ9CbEXxEdRXm8IxuazjoEZLeJt0zjnIer39aXqm9BInb9lK0nJweLQaefbkHd3pIZiJLZNM7a+xMnZgQyKhJV2vrv2zMNW00U13mBc3+zN/5xD5dWyK82JtB+hssqbyiGM6AG3oACYlGJNB/y40mCGd2ciu08QrJSQBegfsqWw7Pcr1iu02G24Ecc2zO9BorcC1Emq3yvq5o4kShWR2F+7NmkNskNFlJsIlxg0cyHezzPTkgP3W/DLQeg3naOGa6jeVzTkON+9/TsOcM/Y/nFwenKRgeVTV/3F23UQgB96aqO9xNO7Z3SHdwHPwdBuwS7gClPW9lCW74LP9s70menBcHrQan6owq2twFVgI6WjLKhiMpTP/VGgdiSG7NkwFOHW5gM06/tMzYhWIEeglXAxrd4HALVmucaK2AhL5wb0WcRj/l0QBECan3yDsa4rr4F88GSwGB/l/0g/pVneFrDJE14lt1ZbGFRc2K6aJiHY= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR01MB7282.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(4636009)(366004)(110136005)(54906003)(86362001)(38100700002)(38350700002)(83380400001)(66476007)(52116002)(5660300002)(107886003)(2616005)(8676002)(66946007)(6666004)(66556008)(2906002)(508600001)(1076003)(4326008)(316002)(6506007)(8936002)(6486002)(26005)(186003)(6512007)(7416002)(921005);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: YNwdHi9deINffalroAnUgOVsQbVcamQq49kXyFCgxy8+crubrABHHq/l8w+qBWH3/2/SQxOkxtX87JFEi/T+Yj58CAnTuKWvj29OWdHiK8jgdtSoaBt5i/g9MbPneExTbtbo+P1cRpNn/XBazR/kQAu8doncBTlf6icqtM2g0iFiMf24Q6qty0KDMTGvHndCdLbmLt6YosAA2pfqozGpuCOOufx5S/ZyswLl8MtLPiHHs1/mJJwm/2nGXJwTSGP0OIjKYjBjV/3gG169c5RqAct5gXdkYO8KgEy5ng2sNOLn1CiBAmCY+F2VnscbFDp5utgiFuK7DphujHTFM7Ysr2QrR7b5g5CRvphQ5t/9oFiLz+N1e/JHAS4ZXCDe/QTukwNz3fzXz6TEPaepB/KUHWtSSKxjWQMBcwNmhbkCuecDPRSWLuaNV+3F2O7rSIT4zEgfuso+1laNXPz4ixckeiHiJf9YDEb0GB2ByQf2ZoiwDhWqKxw71Oocw3E0Rbc7ZrDhKOYO01mSvkn8NxiO2JAKuVhoml9m5GPBWWfg/Cvac73VS14mtCDpIt6zUkVt+Bji6S1zcyY/v33ohorXbaohbEU4rV03cvmKfoxKpWy8wnTLuyKcnTVFSVUJoOZd1PDWvekcPvm5dxFzAjVPlf+VuIKWFQbQv309gZ8rc6jB28L7oH1zLZwylbMIW7/E/OtMy1SJWI/jX/Hwb1uxSQ/0XyRsWmReWn+Qth5hxNCwddQBX0b3C1BsDR1eDdPXTxEFPvZS4qbkHPb6hXlrEgZ5eyvfn5oiYsOpy9STUri+FVUhv3vXJzVqPR0j2zH9QRwewxm95EyH7LuRwZA/vAJrWlk0u/Vftzb8UfZZyaEfdTF1QV7RpZQgwbKS7YxOKTfGu0nAiepKZpmVZePN2FajlEviMyg52HT+a76eTVET28L88g326Sq7NOGiji8+1ffKW7qgvsgMdyWsR4iCAJa924g2PJWTocClFtm1RW0HMrIWWGYMJmid1IsFnlRP8/1OKj5GCnkJ5waWtqySZTg7c3EIF2BI1PlUIxp0nimrQ+CM87q+ENmBduFBTIzy42n8E3jaxJoaKlc+YFQEJvVcxVq7glCXSRCQoGn4u1heLv53mIqQBNfs4ExXLcZyuHM5Kta1JjgQNaUQmu0gOfE9FGEIeb3iUMEt1kIpypSnmvRpU9lzgbMVEs9TBBRv8jYR3a6RqgAiBhzvvpa/vsat0zDRyhXnmMWobQtWCxRW08f0+coC+bCXlkx+o+9crZtmtFBVqShzM5NzWawRYMPF2UfslUv2KOQrQxQUF2ayHp88VOG2VpTq1tYLQwfK9wp0rFJJfw4Sh0RraW0aB/pJ0JwK/n1Y7PLlL2O1FtwsstguvC3iOs+Vn4a+/4EAXn/MOjNUlmxTTZJTpziVKZuZ6rtUAyWngFYpaVz91eH4unHsvykC5eDsDVzjEtXwNbJW9fH28u9uixFXmSDEHve/Gx29Dw/5Vqr3XGzydFbtB0MI/76YfjvUDX3bEvVHxG/jjSK8FSU+pxW1ShBV4stJfqWlljO+zeisfCHVrs8vrqfq+Gv96MzWf+R4klDc2tjTC5xuodn3mI2PDFPJv2ZCBMMB3u5c4mK5LQa5QNnJJJQdm8TQ2twi/ofOltjoH/eJgad02Dboc4uZzzfnnXygFHwNYdYxOKOQwrLKXxU= X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 478aaae3-43ac-4912-6a09-08d9c6940510 X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Dec 2021 04:15:29.8029 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 1q5+/TE9zzfwkZ9hoBr6xFCZ3a8Wc+RKiqRq0QYzxcsz+XrZlJBu9Ucd7QG/vaBEoCrzW3rp0Ey5fQuxobtnvQNtcahNmOwzU8ciKg/zLc4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR01MB5189 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Adds documentation for Ampere(R)'s Altra(R) SMpro errmon driver. Signed-off-by: Thu Nguyen Signed-off-by: Quan Nguyen --- Change in v6: + First introduced in v6 [Quan] Documentation/misc-devices/index.rst | 1 + Documentation/misc-devices/smpro-errmon.rst | 206 ++++++++++++++++++++ 2 files changed, 207 insertions(+) create mode 100644 Documentation/misc-devices/smpro-errmon.rst diff --git a/Documentation/misc-devices/index.rst b/Documentation/misc-devices/index.rst index 30ac58f81901..7a6a6263cbab 100644 --- a/Documentation/misc-devices/index.rst +++ b/Documentation/misc-devices/index.rst @@ -26,6 +26,7 @@ fit into other categories. lis3lv02d max6875 pci-endpoint-test + smpro-errmon spear-pcie-gadget uacce xilinx_sdfec diff --git a/Documentation/misc-devices/smpro-errmon.rst b/Documentation/misc-devices/smpro-errmon.rst new file mode 100644 index 000000000000..e05d19412c07 --- /dev/null +++ b/Documentation/misc-devices/smpro-errmon.rst @@ -0,0 +1,206 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Kernel driver Ampere(R)'s Altra(R) SMpro errmon +=============================================== + +Supported chips: + + * Ampere(R) Altra(R) + + Prefix: 'smpro' + + Preference: Altra SoC BMC Interface Specification + +Author: Thu Nguyen + +Description +----------- + +This driver supports hardware monitoring for Ampere(R) Altra(R) SoC's based on the +SMpro co-processor (SMpro). +The following SoC alert/event types are supported by the errmon driver: + +* Core CE/UE errors +* Memory CE/UE errors +* PCIe CE/UE errors +* Other CE/UE errors +* Internal SMpro/PMpro errors +* VRD hot +* VRD warn/fault +* DIMM Hot +* DIMM 2x refresh rate + +The SMpro interface provides the registers to query the status of the SoC alerts/events +and their data and export to userspace by this driver. + +Usage Notes +----------- + +SMpro errmon driver creates the sysfs files for each host alert/event type. +Example: ``errors_core_ce`` to get Core CE error type. + +To get a host alert/event type, the user will read the corresponding sysfs file. + +* If the alert/event is absented, the sysfs file returns empty. +* If the alerts/events are presented, the existing alerts/events will be reported as the error lines. + +The format of the error lines is defended on the alert/event type. + +1) Type 1 for Core/Memory/PCIe/Other CE/UE alert types:: + + + + Where: + * Error Type: The hardwares cause the errors in format of two hex characters. + * SubType: Sub type of error in the specified hardware error in format of two hex characters. + * Instance: Combination of the socket, channel, slot cause the error in format of four hex characters. + * Error Status: Encode of error status in format of eight hex characters. + * Error Address: The address in device causes the errors in format of sixteen hex characters. + * Error Misc 0/1/2/3: Addition info about the errors. Each field is in format of sixteen hex characters. + + Example: + # cat errors_other_ce + 0a 02 0000 000030e4 0000000000000080 0000020000000000 0000000000000000 0000000000000000 0000000000000000 + 0a 01 0000 000030e4 0000000000000080 0000020000000000 0000000000000000 0000000000000000 0000000000000000 + + The size of the alert buffer for this error type is 8 alerts. + When the buffer is overflowed, the errmon driver will be added the overflowed alert line to sysfs output. + + ff ff 0000 00000000 0000000000000080 0000000000000000 0000000000000000 0000000000000000 0000000000000000 + +Below table defines the value of Error types, Sub Types, Sub component and instance: + + ============ ========== ========= =============== ================ + Error Group Error Type Sub type Sub component Instance + CPM 0 0 Snoop-Logic CPM # + CPM 0 2 Armv8 Core 1 CPM # + MCU 1 1 ERR1 MCU # | SLOT << 11 + MCU 1 2 ERR2 MCU # | SLOT << 11 + MCU 1 3 ERR3 MCU # + MCU 1 4 ERR4 MCU # + MCU 1 5 ERR5 MCU # + MCU 1 6 ERR6 MCU # + MCU 1 7 Link Error MCU # + Mesh 2 0 Cross Point X | (Y << 5) | NS <<11 + Mesh 2 1 Home Node(IO) X | (Y << 5) | NS <<11 + Mesh 2 2 Home Node(Mem) X | (Y << 5) | NS <<11 | device<<12 + Mesh 2 4 CCIX Node X | (Y << 5) | NS <<11 + 2P Link 3 0 N/A Altra 2P Link # + GIC 5 0 ERR0 0 + GIC 5 1 ERR1 0 + GIC 5 2 ERR2 0 + GIC 5 3 ERR3 0 + GIC 5 4 ERR4 0 + GIC 5 5 ERR5 0 + GIC 5 6 ERR6 0 + GIC 5 7 ERR7 0 + GIC 5 8 ERR8 0 + GIC 5 9 ERR9 0 + GIC 5 10 ERR10 0 + GIC 5 11 ERR11 0 + GIC 5 12 ERR12 0 + GIC 5 13-21 ERR13 RC# + 1 + SMMU 6 TCU 100 RC # + SMMU 6 TBU0 0 RC # + SMMU 6 TBU1 1 RC # + SMMU 6 TBU2 2 RC # + SMMU 6 TBU3 3 RC # + SMMU 6 TBU4 4 RC # + SMMU 6 TBU5 5 RC # + SMMU 6 TBU6 6 RC # + SMMU 6 TBU7 7 RC # + SMMU 6 TBU8 8 RC # + SMMU 6 TBU9 9 RC # + PCIe AER 7 Root 0 RC # + PCIe AER 7 Device 1 RC # + PCIe RC 8 RCA HB 0 RC # + PCIe RC 8 RCB HB 1 RC # + PCIe RC 8 RASDP 8 RC # + OCM 9 ERR0 0 0 + OCM 9 ERR1 1 0 + OCM 9 ERR2 2 0 + SMpro 10 ERR0 0 0 + SMpro 10 ERR1 1 0 + SMpro 10 MPA_ERR 2 0 + PMpro 11 ERR0 0 0 + PMpro 11 ERR1 1 0 + PMpro 11 MPA_ERR 2 0 + ============= ========== ========= =============== ================ + + +2) Type 2 for the Internal SMpro/PMpro alert types:: + + + + Where: + * Error Type: SMpro/PMpro Error types in format of two hex characters. + + 1: Warning + + 2: Error + + 4: Error with data + * Error SubType: SMpro/PMpro Image Code in format of two hex characters. + * Direction: Direction in format of two hex characters. + + 0: Enter + + 1: Exit + * Error Location: SMpro/PMpro Module Location code in format of two hex characters. + * Error Code: SMpro/PMpro Error code in format of four hex characters. + * Error Data: Extensive datae in format of eight hex characters. + All bits are 0 when Error Type is warning or error. + + Example: + # cat errors_smpro + 01 04 01 08 0035 00000000 + +3) Type 3 for the VRD hot, VRD /warn/fault, DIMM Hot, DIMM 2x refresh rate event:: + + [Event Data] + + Where: + * Event Type: event type in format of two hex characters. + * Event SubType: event sub type in format of two hex characters. + * Direction: Direction in format of two hex characters. + + 0: Asserted + + 1: De-asserted + * Event Location: The index of component cause the alert in format of two hex characters. + * Event Data: Extensive data if have in format of four hex characters. + + Example: + #cat event_vr_hot + 00 02 00 00 -> /* DIMM VRD hot event is asserted at channel 0 */ + 00 02 01 00 -> /* DIMM VRD hot event is de-asserted at channel 0 */ + 00 01 00 03 -> /* Core VRD hot event is asserted at channel 3 */ + 00 00 00 00 -> /* SoC VRD hot event is asserted */ + 00 00 00 00 -> /* SoC VRD hot event is de-asserted */ + 00 02 00 06 -> /* DIMM VRD hot event is de-asserted at channel 6 */ + +Sysfs entries +------------- + +The following sysfs files are supported: + +* Ampere(R) Altra(R): + +Alert Types: + + ================= =============== =========================================================== ======= + Alert Type Sysfs name Description Format + Core CE Errors errors_core_ce Triggered by CPU when Core has an CE error 1 + Core UE Errors errors_core_ue Triggered by CPU when Core has an UE error 1 + Memory CE Errors errors_mem_ce Triggered by CPU when Memory has an CE error 1 + Memory UE Errors errors_mem_ue Triggered by CPU when Memory has an UE error 1 + PCIe CE Errors errors_pcie_ce Triggered by CPU when any PCIe controller has any CE error 1 + PCIe UE Errors errors_pcie_ue Triggered by CPU when any PCIe controller has any UE error 1 + Other CE Errors errors_other_ce Triggered by CPU when any Others CE error 1 + Other UE Errors errors_other_ue Triggered by CPU when any Others UE error 1 + SMpro Errors errors_smpro Triggered by CPU when system have SMpro error 2 + PMpro Errors errors_pmpro Triggered by CPU when system have PMpro error 2 + ================= =============== =========================================================== ======= + +Event Type: + + ============================ ========================== =========== ======================== + Event Type Sysfs name Event Type Sub Type + VRD HOT event_vrd_hot 0 0: SoC, 1: Core, 2: DIMM + VR Warn/Fault event_vrd_warn_fault 1 0: SoC, 1: Core, 2: DIMM + DIMM Hot event_dimm_hot 2 NA (Default 0) + DIMM 2x refresh rate status event_dimm_2x_refresh 3 NA (Default 0) + ============================ ========================== =========== ======================== From patchwork Fri Dec 24 04:13:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12698791 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 079DEC433EF for ; Fri, 24 Dec 2021 04:15:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351343AbhLXEPm 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Wysocki" , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Gustavo Pimentel Cc: Open Source Submission , Phong Vo , "Thang Q . Nguyen" , Quan Nguyen Subject: [PATCH v6 8/9] misc: smpro-misc: Add Ampere's Altra SMpro misc driver Date: Fri, 24 Dec 2021 11:13:51 +0700 Message-Id: <20211224041352.29405-9-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20211224041352.29405-1-quan@os.amperecomputing.com> References: <20211224041352.29405-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2PR06CA0134.apcprd06.prod.outlook.com (2603:1096:1:1f::12) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 2755b1eb-dff5-4a23-d22a-08d9c69408b2 X-MS-TrafficTypeDiagnostic: BYAPR01MB5189:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:341; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 1JvSoMZOWN28FNS99Omi8aZm//lIrfIZBcz2mUw0RWKLyUlmRfy8nRQR5Ks8IQhhBmn8RW+b0pfR8n60QzbjfbfQaRIo3Jz0kg7gca5tABKJ7DlQLuJ91O+jEXEhLKc0T6C7H8kaDNrcyb0bDZQBv0BFqc2wCCmqzdPyk2KAz6ETwj6ycRVDZcImOBqT5LBL6NpKl51n+XxP3Q20SfPPGMYUwSQWgVO7Ss8BxNvmvqckYC3DemwDQWt4tp7paXswn3Qn3XSUFx/6R29hvfKXq7ZpUirGB0lwI2FonlAueS4ZSTlhaeTJpd/JwmZS1Rv39Q877fO3CV0bV2n0habI7HnurCdpZZCWTBm7CbUHAYrZvQTPIfvU46bWXO9u8w03mSp1Pszm3OFNww2qqTy7OUEIVjsuEAtqlKqfGgqg+9TF9woqAVCjrU8PdP3NJdtqoGCiEre3eK9tuoJeOdi1WWA9HWmG+fIDTjkhaT30/ANodkyzjZUhbgTg4J17RGRvCpNbk+ba3qS8HlLwCUGGHKPTdIV+gRAFS6+OHHrj1jXScWCANVupaWrhX0VOrrEkNFWB3B3Q6UXRV8fb1NneejM5KySAffq0Nt550OQXgB6Q42XnszgDdbS6V0s6+I6IEVElJg/iF8m0V/1MJpBt6DIgfKhOswHdWPQO7tCTh7k0eIUWMFJCVswHluvPDWW3Kjcp5SwUCh5RPIXgAK+hzTRZRgiLMAckSIDLd5QbKR8= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR01MB7282.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(4636009)(366004)(110136005)(54906003)(86362001)(38100700002)(38350700002)(83380400001)(66476007)(52116002)(5660300002)(107886003)(2616005)(8676002)(66946007)(6666004)(66556008)(2906002)(508600001)(1076003)(4326008)(316002)(6506007)(8936002)(6486002)(26005)(186003)(6512007)(7416002)(921005);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: v8lctm8R+wGZdn9R7uVSEssoxJpMzGNYui8sbMrUN6wy52/FSmooBOwaeaMEshzTxxXbHOLzGGcTGhbl12qI0476+s9um4rqfDfueqqanl0UxCKMHXj0UeHNrVkJXubaOnPTBCW+JwxHkMZ8SxQthfYbSK/bQp2WZykgx9hwFNi1eXBAY6lhzQGQ8Iw9AERkB3lXy/ZOyJ6jZh6h+v/sZjTb3rODKykExrY9vCdcCEYCxU8aKXCXhkhm6tUFqjJuRJUEOAPvwEnS7XK33K0BMMJGiM9O2fdNGWs+MY6R/O6KzZIfGFtvlvYdHrVNfHNb0OYM4JAY8cUDvrBft12sPctByx0ZEdF0MilEQy1oqoylqhcqdmZGAgNqnKxFZenQsGzx96KWuEVdNIS65q06kZDdnBSvzBs08TA6YV8jAk4YtRqIJJlKYjCSmwN98fvIdFf8xZcQwvtOmOKKP8TXtsvBKxCi14sPav9Vh4Irw3UOhQfQagfxdFMEizBTy9wNvsVu18ViGskxUWB/Bi3NK7JwRkm13P1CXyVx6R5wIHkv0+e6IDAwrghlrSbuef1oEzFTOa9D1vt4UL/SjZSQrxujC2zKT8EC4uvV5YfrNLhX0csjL7ft2FvnRnnLo08bdMDBHr4kRnXObD01aOTqWzd3hUSK8tUnAsN+j75YThZ/cLCqgKOsR3mutUuohn9++VPMc/+QaB1uHugSQXs5Jaj3sUNNU2xwRZK15QtXPn93311mH4HwGCywr+ZlohNqDo9vYEfbPXam/TEK4572UGEphmHCZ2TeK+VlL5Wf1fIEWAnBsozwIgPumVDWaG+R3KOr3y77vWdlbU+fAgoJiCRH2Xk/OmkVa5hPS0KfZzsdXH4jzRfvUc6DFOKPrVqV9TJItz7IbIiRUT6Hm1vAHSclQnmNs2IKhv+fzpJkC0U8Ym+tuwdmUh/pl0diEXhf50vusTeQz1VVEcC9klM6+ek02uqtclcRYUyEJd1kU3a5BOSxNi3j5lYaQSmjYkAQirf8HtQWoZt99w2eOWg19n8HJEmToJntdRjbNJKfYgOvyAFr5THKIEW70CCEOSp+jCvilRDa6SNoO2yTVzMbsHqFfUKgRAVoila73du7yzvm/qdxMg2bTqVvnLdC2q1u7j48r85WTBZhX+6Ortfzs0c+6CtkaBeeUSKnmYGHa5UeePAJo26izikQ1v1X3XzzXO8tEKl+RbmxXpAaIDbiy2FBG/6qArdUS1B9vFcQLFa+FrjoSDgFJRDqHH7EtHoSejv4oSRLsa9aVmqTDANItqmXArvdKyD7zOp8SETi2Sv2qGg2/vRTaH1Er+Fj/mfBbzBu2jvuK61sorhzKtmpNPZgefN73EkH6pANUl78IPXNdm1o3BxdoaGDPg/0WPzb0b1UV/XT4ppHJuVWzLsqmQZPMxUYldyqi0xUz+bCpkkPCmDF8R0lk7weEtzLmbfjBp9ZuZ1nLiatEwA0NBeo1ai5brMEN0fXd1J5Skfd2UDdYIge/k/ppQdaU4htK64y7De5xQHZxtnWBZgHXP21arhq1PUcyf6mvUB0MXDZlQH3FIY+Dv3hBnLchm0Xdq3lMd5e540RkHXrHLnc833d4eYGgwYa5LRFTOCNBHF9q34j/ruRXnYAonWlswsQ2r1sQQHia7IXrhdI+99tDVf48whBJ17DrBLpjLF4XxGnzos= X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2755b1eb-dff5-4a23-d22a-08d9c69408b2 X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Dec 2021 04:15:35.6625 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: BVPfr7N1KS4z8/TUTxlG8mMMuS8Rutb6mWpMxoQZl1MFckIZBrkQmKvKPcRpkv8uWgDk7wqga2NN7nJLLja4yasDPvDxtHvC3awI/Rskgow= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR01MB5189 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This commit adds driver support for accessing various information reported by Ampere's SMpro co-processor such as Boot Progress and other miscellaneous data. Signed-off-by: Quan Nguyen --- Change in v6: + First introduced in v6 [Quan] drivers/mfd/smpro-mfd.c | 1 + drivers/misc/Kconfig | 7 ++ drivers/misc/Makefile | 1 + drivers/misc/smpro-misc.c | 177 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 186 insertions(+) create mode 100644 drivers/misc/smpro-misc.c diff --git a/drivers/mfd/smpro-mfd.c b/drivers/mfd/smpro-mfd.c index a7cd64bf9eaa..5611dd30f8f4 100644 --- a/drivers/mfd/smpro-mfd.c +++ b/drivers/mfd/smpro-mfd.c @@ -28,6 +28,7 @@ static const struct regmap_config simple_word_regmap_config = { static const struct mfd_cell smpro_devs[] = { MFD_CELL_NAME("smpro-hwmon"), MFD_CELL_NAME("smpro-errmon"), + MFD_CELL_NAME("smpro-misc"), }; static int smpro_mfd_probe(struct i2c_client *i2c) diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 0cbd8a2561a7..df53cbf62931 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -183,6 +183,13 @@ config SMPRO_ERRMON If you say yes here you get support for error monitor function provides by Ampere Computing's SoC with SMpro processor. +config SMPRO_MISC + tristate "Ampere Computing SMPro miscellaneous driver" + depends on MFD_SMPRO || COMPILE_TEST + help + If you say yes here you get support for the miscellaleous function + provides by Ampere Computing's SoC with SMpro processor. + config CS5535_MFGPT tristate "CS5535/CS5536 Geode Multi-Function General Purpose Timer (MFGPT) support" depends on MFD_CS5535 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 8ec9961b941b..bbfee81499de 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -24,6 +24,7 @@ obj-$(CONFIG_KGDB_TESTS) += kgdbts.o obj-$(CONFIG_SGI_XP) += sgi-xp/ obj-$(CONFIG_SGI_GRU) += sgi-gru/ obj-$(CONFIG_SMPRO_ERRMON) += smpro-errmon.o +obj-$(CONFIG_SMPRO_MISC) += smpro-misc.o obj-$(CONFIG_CS5535_MFGPT) += cs5535-mfgpt.o obj-$(CONFIG_GEHC_ACHC) += gehc-achc.o obj-$(CONFIG_HP_ILO) += hpilo.o diff --git a/drivers/misc/smpro-misc.c b/drivers/misc/smpro-misc.c new file mode 100644 index 000000000000..6fe9d25ce31c --- /dev/null +++ b/drivers/misc/smpro-misc.c @@ -0,0 +1,177 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Ampere Computing SoC's SMpro Misc Driver + * + * Copyright (c) 2021, Ampere Computing LLC + */ +#include +#include +#include +#include + +/* Boot Stage/Progress Registers */ +#define BOOTSTAGE_SELECT 0xB0 +#define BOOTSTAGE_STATUS_LO 0xB1 +#define BOOTSTAGE_CUR_STAGE 0xB2 +#define BOOTSTAGE_STATUS_HI 0xB3 + +/* SOC State Registers */ +#define SOC_POWER_LIMIT 0xE5 + +/* Boot stages */ +enum { + BOOTSTAGE_SMPRO = 0, + BOOTSTAGE_PMPRO, + BOOTSTAGE_ATF_BL1, + BOOTSTAGE_DDR_INIT, + BOOTSTAGE_DDR_INIT_PROGRESS, + BOOTSTAGE_ATF_BL2, + BOOTSTAGE_ATF_BL31, + BOOTSTAGE_ATF_BL32, + BOOTSTAGE_UEFI, + BOOTSTAGE_OS, + BOOTSTAGE_MAX +}; + +struct smpro_misc { + struct regmap *regmap; +}; + +static int boot_progress_show(struct device *dev, struct device_attribute *da, char *buf) +{ + struct smpro_misc *misc = dev_get_drvdata(dev); + u32 boot_progress; + u8 current_stage; + u8 boot_status; + u8 boot_stage; + u32 select; + u32 reg_lo; + u32 reg; + int ret; + + /* Read current boot stage */ + ret = regmap_read(misc->regmap, BOOTSTAGE_CUR_STAGE, ®); + if (ret) + return ret; + + current_stage = reg & 0xff; + + /* Read the boot progress */ + ret = regmap_read(misc->regmap, BOOTSTAGE_SELECT, &select); + if (ret) + return ret; + + boot_stage = (select >> 8) & 0xff; + boot_status = select & 0xff; + + if (boot_stage > current_stage) + return -EINVAL; + + ret = regmap_read(misc->regmap, BOOTSTAGE_STATUS_LO, ®_lo); + if (!ret) + ret = regmap_read(misc->regmap, BOOTSTAGE_STATUS_HI, ®); + if (ret) + return ret; + + boot_progress = swab16(reg) << 16 | swab16(reg_lo); + + /* Tell firmware to provide next boot stage next time */ + if (boot_stage < current_stage) { + ret = regmap_write(misc->regmap, BOOTSTAGE_SELECT, ((select & 0xff00) | 0x1)); + if (ret) + return ret; + } + + return snprintf(buf, PAGE_SIZE, "0x%02x 0x%02x 0x%08x\n", + boot_stage, boot_status, boot_progress); +} + +static DEVICE_ATTR_RO(boot_progress); + +static int soc_power_limit_show(struct device *dev, struct device_attribute *da, char *buf) +{ + struct smpro_misc *misc = dev_get_drvdata(dev); + unsigned int value; + int ret; + + ret = regmap_read(misc->regmap, SOC_POWER_LIMIT, &value); + if (ret) + return ret; + + return snprintf(buf, PAGE_SIZE, "%d\n", value); +} + +static int soc_power_limit_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct smpro_misc *misc = dev_get_drvdata(dev); + unsigned long val; + s32 ret; + + ret = kstrtoul(buf, 0, &val); + if (ret) + return ret; + + ret = regmap_write(misc->regmap, SOC_POWER_LIMIT, (unsigned int)val); + if (ret) + return -EPROTO; + + return count; +} + +static DEVICE_ATTR_RW(soc_power_limit); + +static struct attribute *smpro_misc_attrs[] = { + &dev_attr_boot_progress.attr, + &dev_attr_soc_power_limit.attr, + NULL +}; + +static const struct attribute_group smpro_misc_attr_group = { + .attrs = smpro_misc_attrs +}; + +static int smpro_misc_probe(struct platform_device *pdev) +{ + struct smpro_misc *misc; + int ret; + + misc = devm_kzalloc(&pdev->dev, sizeof(struct smpro_misc), GFP_KERNEL); + if (!misc) + return -ENOMEM; + + platform_set_drvdata(pdev, misc); + + misc->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!misc->regmap) + return -ENODEV; + + ret = sysfs_create_group(&pdev->dev.kobj, &smpro_misc_attr_group); + if (ret) + dev_err(&pdev->dev, "SMPro misc sysfs registration failed\n"); + + return 0; +} + +static int smpro_misc_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &smpro_misc_attr_group); + pr_info("SMPro misc sysfs entries removed"); + + return 0; +} + +static struct platform_driver smpro_misc_driver = { + .probe = smpro_misc_probe, + .remove = smpro_misc_remove, + .driver = { + .name = "smpro-misc", + }, +}; + +module_platform_driver(smpro_misc_driver); + +MODULE_AUTHOR("Tung Nguyen "); +MODULE_AUTHOR("Quan Nguyen "); +MODULE_DESCRIPTION("Ampere Altra SMpro Misc driver"); +MODULE_LICENSE("GPL"); From patchwork Fri Dec 24 04:13:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12698792 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B26DC433FE for ; Fri, 24 Dec 2021 04:15:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351334AbhLXEPq (ORCPT ); Thu, 23 Dec 2021 23:15:46 -0500 Received: from mail-co1nam11on2114.outbound.protection.outlook.com ([40.107.220.114]:37953 "EHLO NAM11-CO1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1351315AbhLXEPp (ORCPT ); Thu, 23 Dec 2021 23:15:45 -0500 ARC-Seal: i=1; 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Fri, 24 Dec 2021 04:15:41 +0000 From: Quan Nguyen To: Joel Stanley , Andrew Jeffery , Jean Delvare , Guenter Roeck , Rob Herring , Lee Jones , Jonathan Corbet , linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org, Mark Brown , Greg Kroah-Hartman , "Rafael J . Wysocki" , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Gustavo Pimentel Cc: Open Source Submission , Phong Vo , "Thang Q . Nguyen" , Quan Nguyen , Thu Nguyen Subject: [PATCH v6 9/9] docs: misc-devices: (smpro-misc) Add documentation Date: Fri, 24 Dec 2021 11:13:52 +0700 Message-Id: <20211224041352.29405-10-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20211224041352.29405-1-quan@os.amperecomputing.com> References: <20211224041352.29405-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2PR06CA0134.apcprd06.prod.outlook.com (2603:1096:1:1f::12) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 756b32ae-3772-4052-bd5f-08d9c6940c52 X-MS-TrafficTypeDiagnostic: BYAPR01MB5189:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8273; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: RY6f11ZqOS08OYo5CWMvvsgoAxytNdUFFT4z+akDBPtVARt/vO7eUln0S+5VLy639TbBB29llq8jZpH+ieJsVDkuMRaodMKwHLzqZtAHZjvMOYdNHuz9wUEyo/JyhcU7NmicfexAE7Y6PwXt3f47PcaQGbDOMyEOEqGTmDMGBAjhKtOabCb93v3EegkA70Ks1Yha/p7iPnUCaEpvEMJOmzJFxyO1Lgwp6J2v5H9clJ47TXFhYprKRnjp72MKrXTuORTE7CGffe0FJLWbbf9U749HeL9OUDO+MxAxIw5HTX03Mv1YAoA0mZe6I1X263s9qrNNglF46WEpL0VmtygqsCQ2OHWNlO5dRuoW3Opatzxa4BcHF58XeZ7QMcLAwOfrPuaMWzG0o/dbSLLiTm5swV6kb1Eljmg4bkW7fm7oAkNNawy4pJDV3qcLJ1X9i5bWjO1rXEUdDXev9yHTI/vnqYV/9En5P40eGj4fQoR/OC9LPgb8SA27IS4jaYn4sCpgugdumZLCcUKgVwM41APvIRKuMH6Z7fI8Td2vdzQBPVnEUR9dYF5KShzdX9jQzIacGQUAWeRhNtVzWsZnxuXFjYgc96er/j9h5JdWhqyIh9CLscdCB5JvcRt4dGGDPTD0/t4o3KX3kFp/CyCa3FrhQ2RY/RT/yZaivjIMRCMEitHLtPvbx90elOzBSrCkNyMkYUIyRdfRK5SqS1MGhHb40ntVv7KeJtEOrAJQclpzM1Q= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR01MB7282.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(4636009)(366004)(110136005)(54906003)(86362001)(38100700002)(38350700002)(83380400001)(66476007)(52116002)(5660300002)(107886003)(2616005)(8676002)(66946007)(6666004)(66556008)(2906002)(508600001)(1076003)(4326008)(316002)(6506007)(8936002)(6486002)(26005)(186003)(6512007)(7416002)(921005);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: awYqxjEsgevOTpb8EMeqo7BGpqGSmeMyS0LTSHnvBzPRZfGecrUWIKTK1FU+oYZpNgwgpaZqKBpxWA83SrHuIuvVOirSDno2vdIwxLcDJO7qgMvOVjpZwvt1IetXyqkNr1b/kUps8PECAVt9Mc5m/ygApqUccWhIfkYkDyGEeKiZLXOnUVoc8XtBXcFgm2xP+uBBq0Sr7IZQK9i3HG5pVadBDK0RPYGOVC18z5Jhd4t9KyLw+OkzPlXs21lOH050JPh8HF4K2/GhRW3Zpk6ukf7afbCMSPuUlNcFOujWjjwfqdopBaFfh3IejqAbw/Ay8yeEdkPg124n1wgInaDlxJ9/ZxKDtsVJH8aMWBka9KNjwDZIrI7GlepR6pQ6bkqsIAT5qkujXAZf9VwnwfSb9YZpnnIDEkf9px+Kjf86KWiiQQYiVIM9EI/nETBv8Q5UW5y/2YSZXD3WCjdu6TFWz8uNpqpLGsajTtn7h6VlcLmqd1NZR9B5WebqmEe8+gNSpLgi9VHhqP96BT/JP92uEcAW1XKAptfFCeuhgkNuno8jVfpbp1ejFflL4SdubApqM0NAP0506EmADshumj03kAf7xBz2MEpo3oNSDb7uah/vHjqpF+3QjyWDtuKxFUg4R6TlAH/Ef9NARbm0t1xqW+aZfCZqrUM4EPivvS0sbEn5u0dlmVyEty7bBdDliUFaMSg+z5TUcjNsBk+BM4B1w3pcypvd258vct1gqXo36w+879c/ve0uBuysXiih18ykqLM1xvLkcVVtCdde/cCES5klkd/6U96ZrJeuD072G/+CJYdKbRhb0vC/KtjCR4k7aI694dda9SFsZToPSPWUKCX/FQPuOlEEmWvePfB5J4GZ82dR+HlnIQTw2Hc6aSMIJ0kOj1WKUwGRNVk+gp+GNIlQ5k/FPgSpcLYCcrJPW/2yuNGz1TCj8OP6jL3QWo7kzVE9FcKPu9jggGXhrIlFgoEJaMVZ8EmhFuAbSz0xxFjkyyI+oxApoEybMnLbohoNVp9+dYuDEP1PBeZW3yjvXm7JPouydOyCcj/zsAlmM05pYZxdA/Lfs/SMsNlsKcMhx+6dYcowraPnIoBFrb9TXq9u9h37BBD7G7q/bg0SOTd4RxkFlZLNYHuN2K3p/UlnPHscuvvCFV1TQPE7o2Rm2EaU1G4BqgNKfS/0Wr64WdJm173rhAO/bN26hMAiSt17g/zeYkXQzhmsgzwMUT5e01nSsaqF1Oj779qySR/3wx6Z37qdtDzTUrYh+IbvI12jh+ylatJhzttLLUqMvJvFOY9Ie0GHp3q5OUpT0nV+93Kvv+zt4HT5iar6IQQ8FAWMbzeD9tRAATc4G/qF5oy92ULOdsuvTiTxVq7tD9to7nXq73GEPvA2h95F2Ugt5gvE7NEtGIy3ow0lIAM/q5pW6xl0SRAxBplPCpnYPM0WsypP2s02wEa+3u5A/yZnJUa1swcdknJK916CO446RB+203w4epnz6/hhHZnbCSBXuByZOd+Ljz1dS5A6R5b98e25zOVogQohHxdTJNOhKg0Dratr2aXtAwKiz1kR5CyoLcC56qJdUXkoo0HNAyvsXYaZdoRToEFwQmliZYbS2pXAi+dlNF80VCrEy5cXrvCbJ42HZlrMqCeo7nnklMl1EBoaAVKPSbQbu9Gb/w3lpl2AMm7uAMKa0zLVysWibxU2FL0= X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 756b32ae-3772-4052-bd5f-08d9c6940c52 X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Dec 2021 04:15:41.7763 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: FC68NAzdgdt3YQzQDDjmNG8MaVWhSyUwCAj6qIfJnYSC7fjtrlt8ieZRZbOY6c7NcwF2mScJ88vJK3UnGLv/8JjYHzaYwBJXVku2ooP+IfU= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR01MB5189 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Adds documentation for the Ampere(R)'s Altra(R) SMpro misc driver. Signed-off-by: Thu Nguyen Signed-off-by: Quan Nguyen --- Change in v6: + First introduced in v6 [Quan] Documentation/misc-devices/index.rst | 1 + Documentation/misc-devices/smpro-misc.rst | 82 +++++++++++++++++++++++ 2 files changed, 83 insertions(+) create mode 100644 Documentation/misc-devices/smpro-misc.rst diff --git a/Documentation/misc-devices/index.rst b/Documentation/misc-devices/index.rst index 7a6a6263cbab..284568eca747 100644 --- a/Documentation/misc-devices/index.rst +++ b/Documentation/misc-devices/index.rst @@ -27,6 +27,7 @@ fit into other categories. max6875 pci-endpoint-test smpro-errmon + smpro-misc spear-pcie-gadget uacce xilinx_sdfec diff --git a/Documentation/misc-devices/smpro-misc.rst b/Documentation/misc-devices/smpro-misc.rst new file mode 100644 index 000000000000..7c856eb1a7f3 --- /dev/null +++ b/Documentation/misc-devices/smpro-misc.rst @@ -0,0 +1,82 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Kernel driver Ampere(R) Altra(R) SMpro miscellaneous +==================================================== + +Supported chips: + + * Ampere(R) Altra(R) + + Prefix: 'smpro' + + Reference: Altra SoC BMC Interface Specification + +Author: Thu Nguyen + +Description +----------- + +This driver support the monitoring and configuration of various miscellaneous +data provided by Ampere(R) Altra(R) SMpro processor. +At this time, these include: + + * Reading Boot Progress information + * Configuring SoC Power Limit + +Sysfs entries +------------- + +1) Boot progress + +SMpro misc driver creates the sysfs files ``boot_progress``. +The format of ``boot_progress`` file is as below:: + + + +Where: + +* Boot stage:: + + 0: SMpro firmware booting. + 1: PMpro firmware booting. + 2: ATF BL1 firmware booting. + 3: DDR initialization. + 4: DDR training report status. + 5: ATF BL2 firmware booting. + 6: ATF BL31 firmware booting. + 7: ATF BL32 firmware booting. + 8: UEFI firmware booting. + 9: OS booting. + +* Boot status:: + + 0: Not started. + 1: Started. + 2: Complete without error. + 3: Failure. + +* boot progress: 32 bits boot progress code + +The sysfs ``boot_progress`` only reports the boot state when the host is booting. +If the host is already booted, it returns latest state. + +Example:: + + #cat boot_progress + 0x01 0x02 0x808454A8 + +2) SoC Power Limit + +SMpro misc driver creates the sysfs file ``soc_power_limit`` to get/set the SoC Power Limit. + +Reading this sysfs return the current setting of SoC Power Limit (W) in decimal string. +Writing the desired value in decimal string to set the SoC Power Limit in Watt (W). +The range of SoC Power Limit is 90-500(W) and will be ignored if out of range. + +Example:: + + #cat soc_power_limit + 90 + #echo 95 > soc_power_limit + #cat soc_power_limit + 95