From patchwork Mon Dec 24 08:37:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cheng-yi Chiang X-Patchwork-Id: 10742069 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 835EA13A4 for ; Mon, 24 Dec 2018 08:38:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5B76E28A62 for ; Mon, 24 Dec 2018 08:38:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 37BAB28F71; Mon, 24 Dec 2018 08:38:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6844E28A62 for ; Mon, 24 Dec 2018 08:38:04 +0000 (UTC) Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 5A79E2679F3; Mon, 24 Dec 2018 09:38:02 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 633AB267A66; Mon, 24 Dec 2018 09:37:59 +0100 (CET) Received: from mail-pf1-f195.google.com (mail-pf1-f195.google.com [209.85.210.195]) by alsa0.perex.cz (Postfix) with ESMTP id AA34E267946 for ; Mon, 24 Dec 2018 09:37:55 +0100 (CET) Received: by mail-pf1-f195.google.com with SMTP id z9so5562630pfi.2 for ; Mon, 24 Dec 2018 00:37:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=jCd+hczgR1aJ/LYMR/UN9ryjdYIcfPKLHku5JEL6k74=; b=PUuSTXPNEZ9RsiE0UUGp+8e7LJc3txPFJyg8m4bVvQNkBkju7Kmp52W95AY2dIc765 7kcQ2W86JkHa3lpk2SnfGnFTnnKRvvjMAZPqN5yC+asgL+WTMyaYRYd78zzHcPislej1 VkyZF+I9sR9GQQx+qAZPekyHjl03yXv4tYyrM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=jCd+hczgR1aJ/LYMR/UN9ryjdYIcfPKLHku5JEL6k74=; b=aVaKk+fY3kVR7+Az092Lb4ULfnsHfX+uF1UCq1YbKQWUiDF/UhX6djlAqNyD40yAv5 yc2rIK2I4nNxFsvxBU1kWhNQd8CrV1F1wPirQy6p2w1zaVo6fINAuEYymkY5uxO8DJ8g 5R8e8/7W6PylhIkFcgm4iPvOhimeqGczpJDYtBEaeP2ddK63R0MKmP4hlWzk8q4e8SBZ aNduyotOu6LhNKJ/9PnaFGxuA5a9B4bXXs+MRYg4cgJv5GSLNkZnI844qrbMhB+GYwlq lieR3gVj42ohNHq8rupkgqw0mxh6DkXYKApPjKvgx8qq20riprHUrbX7VbFH8UVCogog aJEw== X-Gm-Message-State: AA+aEWbJXFEtIy/vb2RlkdAZfneEQQl86szuxSxpJjduNcNaGk6/19qL TU3N8GCv4Mm2gEDZbwPHPRyiugZ3+GE= X-Google-Smtp-Source: AFSGD/WFccr78PT0BzLYCkAsKVW0Twte1sA/OtxmND/7/QrpMWa9sjmMrDNMk1ora+5z/RjB+nChjA== X-Received: by 2002:a62:130c:: with SMTP id b12mr12446240pfj.247.1545640674599; Mon, 24 Dec 2018 00:37:54 -0800 (PST) Received: from cychiang-z840.tpe.corp.google.com ([2401:fa00:1:b:e688:dfd2:a1a7:2956]) by smtp.gmail.com with ESMTPSA id r130sm59078720pfr.48.2018.12.24.00.37.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 24 Dec 2018 00:37:53 -0800 (PST) From: Cheng-Yi Chiang To: linux-kernel@vger.kernel.org Date: Mon, 24 Dec 2018 16:37:22 +0800 Message-Id: <20181224083724.75618-1-cychiang@chromium.org> X-Mailer: git-send-email 2.20.1.415.g653613c723-goog MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org, tzungbi@chromium.org, Benson Leung , Mark Brown , Rohit kumar , Guenter Roeck , dgreid@chromium.org, Lee Jones , Cheng-Yi Chiang Subject: [alsa-devel] [PATCH v2 1/3] mfd: cros_ec: Add commands to control codec X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP Add EC host commands to control codec on EC. Signed-off-by: Cheng-Yi Chiang Signed-off-by: Lee Jones --- Note: This patch is merged to mfd tree for-mfd-next branch already. But this is still needed on sound tree for-next branch in order to compile codec driver. include/linux/mfd/cros_ec_commands.h | 94 ++++++++++++++++++++++++++++ 1 file changed, 94 insertions(+) diff --git a/include/linux/mfd/cros_ec_commands.h b/include/linux/mfd/cros_ec_commands.h index 9a9631f0559e2..fc91082d4c357 100644 --- a/include/linux/mfd/cros_ec_commands.h +++ b/include/linux/mfd/cros_ec_commands.h @@ -2790,6 +2790,100 @@ struct ec_response_battery_vendor_param { uint32_t value; } __packed; +/*****************************************************************************/ +/* Commands for I2S recording on audio codec. */ + +#define EC_CMD_CODEC_I2S 0x00BC + +enum ec_codec_i2s_subcmd { + EC_CODEC_SET_SAMPLE_DEPTH = 0x0, + EC_CODEC_SET_GAIN = 0x1, + EC_CODEC_GET_GAIN = 0x2, + EC_CODEC_I2S_ENABLE = 0x3, + EC_CODEC_I2S_SET_CONFIG = 0x4, + EC_CODEC_I2S_SET_TDM_CONFIG = 0x5, + EC_CODEC_I2S_SET_BCLK = 0x6, +}; + +enum ec_sample_depth_value { + EC_CODEC_SAMPLE_DEPTH_16 = 0, + EC_CODEC_SAMPLE_DEPTH_24 = 1, +}; + +enum ec_i2s_config { + EC_DAI_FMT_I2S = 0, + EC_DAI_FMT_RIGHT_J = 1, + EC_DAI_FMT_LEFT_J = 2, + EC_DAI_FMT_PCM_A = 3, + EC_DAI_FMT_PCM_B = 4, + EC_DAI_FMT_PCM_TDM = 5, +}; + +struct ec_param_codec_i2s { + /* + * enum ec_codec_i2s_subcmd + */ + uint8_t cmd; + union { + /* + * EC_CODEC_SET_SAMPLE_DEPTH + * Value should be one of ec_sample_depth_value. + */ + uint8_t depth; + + /* + * EC_CODEC_SET_GAIN + * Value should be 0~43 for both channels. + */ + struct ec_param_codec_i2s_set_gain { + uint8_t left; + uint8_t right; + } __packed gain; + + /* + * EC_CODEC_I2S_ENABLE + * 1 to enable, 0 to disable. + */ + uint8_t i2s_enable; + + /* + * EC_CODEC_I2S_SET_COFNIG + * Value should be one of ec_i2s_config. + */ + uint8_t i2s_config; + + /* + * EC_CODEC_I2S_SET_TDM_CONFIG + * Value should be one of ec_i2s_config. + */ + struct ec_param_codec_i2s_tdm { + /* + * 0 to 496 + */ + int16_t ch0_delay; + /* + * -1 to 496 + */ + int16_t ch1_delay; + uint8_t adjacent_to_ch0; + uint8_t adjacent_to_ch1; + } __packed tdm_param; + + /* + * EC_CODEC_I2S_SET_BCLK + */ + uint32_t bclk; + }; +} __packed; + +/* + * For subcommand EC_CODEC_GET_GAIN. + */ +struct ec_response_codec_gain { + uint8_t left; + uint8_t right; +} __packed; + /*****************************************************************************/ /* System commands */ From patchwork Mon Dec 24 08:37:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cheng-yi Chiang X-Patchwork-Id: 10742071 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 48E5813A4 for ; Mon, 24 Dec 2018 08:39:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 36D90289CB for ; Mon, 24 Dec 2018 08:39:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 26DDE289CF; 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Mon, 24 Dec 2018 00:39:44 -0800 (PST) Received: from cychiang-z840.tpe.corp.google.com ([2401:fa00:1:b:e688:dfd2:a1a7:2956]) by smtp.gmail.com with ESMTPSA id r130sm59078720pfr.48.2018.12.24.00.39.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 24 Dec 2018 00:39:44 -0800 (PST) From: Cheng-Yi Chiang To: linux-kernel@vger.kernel.org Date: Mon, 24 Dec 2018 16:37:24 +0800 Message-Id: <20181224083724.75618-2-cychiang@chromium.org> X-Mailer: git-send-email 2.20.1.415.g653613c723-goog In-Reply-To: <20181224083724.75618-1-cychiang@chromium.org> References: <20181224083724.75618-1-cychiang@chromium.org> MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org, tzungbi@chromium.org, Benson Leung , Mark Brown , Rohit kumar , Guenter Roeck , dgreid@chromium.org, Lee Jones , Cheng-Yi Chiang Subject: [alsa-devel] [PATCH v2 2/3] ASoC: Documentation: Add google, cros-ec-codec X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP Add documentation for Chrome EC codec driver. Signed-off-by: Cheng-Yi Chiang --- Change in v2: Fixed name of driver in MAINTAINERS. .../bindings/sound/google,cros-ec-codec.txt | 24 +++++++++++++++++++ MAINTAINERS | 5 ++++ 2 files changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/google,cros-ec-codec.txt diff --git a/Documentation/devicetree/bindings/sound/google,cros-ec-codec.txt b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.txt new file mode 100644 index 0000000000000..57718382b3a36 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.txt @@ -0,0 +1,24 @@ +* Audio codec controlled by ChromeOS EC + +Google's ChromeOS EC codec is a digital mic codec provided by the +Embedded Controller (EC) and is controlled via a host-command interface. + +An EC codec node should only be found as a sub-node of the EC node (see +Documentation/devicetree/bindings/mfd/cros-ec.txt). + +Required properties: +- compatible: Must contain "google,cros-ec-codec" +- #sound-dai-cells: Should be 1. The cell specifies number of DAIs. + +Example: + +cros-ec@0 { + compatible = "google,cros-ec-spi"; + + ... + + cros_ec_codec: ec-codec { + compatible = "google,cros-ec-codec"; + #sound-dai-cells = <1>; + }; +}; diff --git a/MAINTAINERS b/MAINTAINERS index 5b9c6af98283b..05e1922624e58 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3636,6 +3636,11 @@ S: Maintained T: git git://git.kernel.org/pub/scm/linux/kernel/git/bleung/chrome-platform.git F: drivers/platform/chrome/ +CHROMEOS EC CODEC DRIVER +M: Cheng-Yi Chiang +S: Maintained +F: Documentation/devicetree/bindings/sound/google,cros-ec-codec.txt + CIRRUS LOGIC AUDIO CODEC DRIVERS M: Brian Austin M: Paul Handrigan From patchwork Mon Dec 24 08:37:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cheng-yi Chiang X-Patchwork-Id: 10742073 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AF5396C5 for ; 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Mon, 24 Dec 2018 00:45:45 -0800 (PST) Received: from cychiang-z840.tpe.corp.google.com ([2401:fa00:1:b:e688:dfd2:a1a7:2956]) by smtp.gmail.com with ESMTPSA id r130sm59078720pfr.48.2018.12.24.00.45.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 24 Dec 2018 00:45:44 -0800 (PST) From: Cheng-Yi Chiang To: linux-kernel@vger.kernel.org Date: Mon, 24 Dec 2018 16:37:26 +0800 Message-Id: <20181224083724.75618-3-cychiang@chromium.org> X-Mailer: git-send-email 2.20.1.415.g653613c723-goog In-Reply-To: <20181224083724.75618-1-cychiang@chromium.org> References: <20181224083724.75618-1-cychiang@chromium.org> MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org, tzungbi@chromium.org, Benson Leung , Mark Brown , Rohit kumar , Guenter Roeck , dgreid@chromium.org, Lee Jones , Cheng-Yi Chiang Subject: [alsa-devel] [PATCH v2 3/3] ASoC: cros_ec_codec: Add codec driver for Cros EC X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP Add a codec driver to control ChromeOS EC codec. Use EC Host command to enable/disable I2S recording and control other configurations. Signed-off-by: Cheng-Yi Chiang --- Addressed Enric's comments. Changes in v2: - Many style fixes. Passed checkpatch.pl --strict. - Use ChromeOS naming. - Remove license boilerplate. - Use u8 instead of uint8_t. - Remove useless debug messages. - Remove useless remove ops. - Remove -EPROBE_DEFER in probe. MAINTAINERS | 2 + sound/soc/codecs/Kconfig | 8 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/cros_ec_codec.c | 458 +++++++++++++++++++++++++++++++ sound/soc/codecs/cros_ec_codec.h | 21 ++ 5 files changed, 491 insertions(+) create mode 100644 sound/soc/codecs/cros_ec_codec.c create mode 100644 sound/soc/codecs/cros_ec_codec.h diff --git a/MAINTAINERS b/MAINTAINERS index 05e1922624e58..d66f80f3252d7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3638,8 +3638,10 @@ F: drivers/platform/chrome/ CHROMEOS EC CODEC DRIVER M: Cheng-Yi Chiang +R: Enric Balletbo i Serra S: Maintained F: Documentation/devicetree/bindings/sound/google,cros-ec-codec.txt +F: sound/soc/codecs/cros_ec_codec.* CIRRUS LOGIC AUDIO CODEC DRIVERS M: Brian Austin diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 87cb9c51e6f5a..0b36428159b71 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -50,6 +50,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_BT_SCO select SND_SOC_BD28623 select SND_SOC_CQ0093VC + select SND_SOC_CROS_EC_CODEC select SND_SOC_CS35L32 if I2C select SND_SOC_CS35L33 if I2C select SND_SOC_CS35L34 if I2C @@ -457,6 +458,13 @@ config SND_SOC_CPCAP config SND_SOC_CQ0093VC tristate +config SND_SOC_CROS_EC_CODEC + tristate "codec driver for ChromeOS EC" + depends on MFD_CROS_EC + help + If you say yes here you will get support for the + ChromeOS Embedded Controller's Audio Codec. + config SND_SOC_CS35L32 tristate "Cirrus Logic CS35L32 CODEC" depends on I2C diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 9bb3346fab2fe..3cfd8f5f61705 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -42,6 +42,7 @@ snd-soc-bd28623-objs := bd28623.o snd-soc-bt-sco-objs := bt-sco.o snd-soc-cpcap-objs := cpcap.o snd-soc-cq93vc-objs := cq93vc.o +snd-soc-cros-ec-codec-objs := cros_ec_codec.o snd-soc-cs35l32-objs := cs35l32.o snd-soc-cs35l33-objs := cs35l33.o snd-soc-cs35l34-objs := cs35l34.o @@ -310,6 +311,7 @@ obj-$(CONFIG_SND_SOC_BD28623) += snd-soc-bd28623.o obj-$(CONFIG_SND_SOC_BT_SCO) += snd-soc-bt-sco.o obj-$(CONFIG_SND_SOC_CQ0093VC) += snd-soc-cq93vc.o obj-$(CONFIG_SND_SOC_CPCAP) += snd-soc-cpcap.o +obj-$(CONFIG_SND_SOC_CROS_EC_CODEC) += snd-soc-cros-ec-codec.o obj-$(CONFIG_SND_SOC_CS35L32) += snd-soc-cs35l32.o obj-$(CONFIG_SND_SOC_CS35L33) += snd-soc-cs35l33.o obj-$(CONFIG_SND_SOC_CS35L34) += snd-soc-cs35l34.o diff --git a/sound/soc/codecs/cros_ec_codec.c b/sound/soc/codecs/cros_ec_codec.c new file mode 100644 index 0000000000000..39e61bf46b5c0 --- /dev/null +++ b/sound/soc/codecs/cros_ec_codec.c @@ -0,0 +1,458 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Driver for ChromeOS Embedded Controller codec. + * + * This driver uses the cros-ec interface to communicate with the ChromeOS + * EC for audio function. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "cros_ec_codec.h" + +#define MAX_GAIN 43 + +#define DRV_NAME "cros-ec-codec" + +static const DECLARE_TLV_DB_SCALE(ec_mic_gain_tlv, 0, 100, 0); +/* + * Wrapper for EC command. + */ +static int ec_command(struct snd_soc_component *component, int version, + int command, u8 *outdata, int outsize, + u8 *indata, int insize) +{ + struct cros_ec_codec_data *codec_data = + snd_soc_component_get_drvdata(component); + struct cros_ec_device *ec_device = codec_data->ec_device; + struct cros_ec_command *msg; + int ret; + + msg = kzalloc(sizeof(*msg) + max(insize, outsize), GFP_KERNEL); + if (!msg) + return -ENOMEM; + + msg->version = version; + msg->command = command; + msg->outsize = outsize; + msg->insize = insize; + + if (outsize) + memcpy(msg->data, outdata, outsize); + + ret = cros_ec_cmd_xfer_status(ec_device, msg); + if (ret > 0 && insize) + memcpy(indata, msg->data, insize); + + kfree(msg); + return ret; +} + +static int set_i2s_config(struct snd_soc_component *component, + enum ec_i2s_config i2s_config) +{ + struct ec_param_codec_i2s param; + int ret; + + dev_dbg(component->dev, "%s set I2S format to %u\n", __func__, + i2s_config); + + param.cmd = EC_CODEC_I2S_SET_CONFIG; + param.i2s_config = i2s_config; + + ret = ec_command(component, 0, EC_CMD_CODEC_I2S, + (u8 *)¶m, sizeof(param), + NULL, 0); + if (ret < 0) { + dev_err(component->dev, + "set I2S format to %u command returned %d\n", + i2s_config, ret); + return -EINVAL; + } + return 0; +} + +static int cros_ec_i2s_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct snd_soc_component *component = dai->component; + enum ec_i2s_config i2s_config; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + i2s_config = EC_DAI_FMT_I2S; + break; + + case SND_SOC_DAIFMT_RIGHT_J: + i2s_config = EC_DAI_FMT_RIGHT_J; + break; + + case SND_SOC_DAIFMT_LEFT_J: + i2s_config = EC_DAI_FMT_LEFT_J; + break; + + case SND_SOC_DAIFMT_DSP_A: + i2s_config = EC_DAI_FMT_PCM_A; + break; + + case SND_SOC_DAIFMT_DSP_B: + i2s_config = EC_DAI_FMT_PCM_B; + break; + + default: + return -EINVAL; + } + + set_i2s_config(component, i2s_config); + + return 0; +} + +static int set_i2s_sample_depth(struct snd_soc_component *component, + enum ec_sample_depth_value depth) +{ + struct ec_param_codec_i2s param; + int ret; + + dev_dbg(component->dev, "%s set depth to %u\n", __func__, depth); + + param.cmd = EC_CODEC_SET_SAMPLE_DEPTH; + param.depth = depth; + + ret = ec_command(component, 0, EC_CMD_CODEC_I2S, + (u8 *)¶m, sizeof(param), + NULL, 0); + if (ret < 0) { + dev_err(component->dev, "I2S sample depth %u returned %d\n", + depth, ret); + return -EINVAL; + } + return 0; +} + +static int set_bclk(struct snd_soc_component *component, uint32_t bclk) +{ + struct ec_param_codec_i2s param; + int ret; + + dev_dbg(component->dev, "%s set i2s bclk to %u\n", __func__, bclk); + + param.cmd = EC_CODEC_I2S_SET_BCLK; + param.bclk = bclk; + + ret = ec_command(component, 0, EC_CMD_CODEC_I2S, + (u8 *)¶m, sizeof(param), + NULL, 0); + if (ret < 0) { + dev_err(component->dev, "I2S set bclk %u command returned %d\n", + bclk, ret); + return -EINVAL; + } + return 0; +} + +static int cros_ec_i2s_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_component *component = dai->component; + int frame_size; + unsigned int rate, bclk; + int ret; + + frame_size = snd_soc_params_to_frame_size(params); + if (frame_size < 0) { + dev_err(component->dev, "Unsupported frame size: %d\n", + frame_size); + return -EINVAL; + } + + rate = params_rate(params); + if (rate != 48000) { + dev_err(component->dev, "Unsupported rate\n"); + return -EINVAL; + } + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + ret = set_i2s_sample_depth(component, EC_CODEC_SAMPLE_DEPTH_16); + break; + case SNDRV_PCM_FORMAT_S24_LE: + ret = set_i2s_sample_depth(component, EC_CODEC_SAMPLE_DEPTH_24); + break; + default: + return -EINVAL; + } + + if (ret) + return ret; + + bclk = snd_soc_params_to_bclk(params); + ret = set_bclk(component, bclk); + + return ret; +} + +static const struct snd_soc_dai_ops cros_ec_i2s_dai_ops = { + .hw_params = cros_ec_i2s_hw_params, + .set_fmt = cros_ec_i2s_set_dai_fmt, +}; + +struct snd_soc_dai_driver cros_ec_dai[] = { + { + .name = "cros_ec_codec I2S", + .id = 0, + .capture = { + .stream_name = "I2S Capture", + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE, + }, + .ops = &cros_ec_i2s_dai_ops, + } +}; + +static int get_ec_mic_gain(struct snd_soc_component *component, + u8 *left, u8 *right) +{ + struct ec_param_codec_i2s param; + struct ec_response_codec_gain resp; + int ret; + + param.cmd = EC_CODEC_GET_GAIN; + + ret = ec_command(component, 0, EC_CMD_CODEC_I2S, + (u8 *)¶m, sizeof(param), + (u8 *)&resp, sizeof(resp)); + if (ret < 0) { + dev_err(component->dev, "I2S get gain command returned %d\n", + ret); + return -EINVAL; + } + + *left = resp.left; + *right = resp.right; + + dev_dbg(component->dev, "%s get mic gain %u, %u\n", __func__, + *left, *right); + + return 0; +} + +static int mic_gain_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + u8 left, right; + int ret; + + ret = get_ec_mic_gain(component, &left, &right); + + if (ret) + return ret; + + ucontrol->value.integer.value[0] = left; + ucontrol->value.integer.value[1] = right; + + return 0; +} + +static int set_ec_mic_gain(struct snd_soc_component *component, + u8 left, u8 right) +{ + struct ec_param_codec_i2s param; + int ret; + + dev_dbg(component->dev, "%s set mic gain to %u, %u\n", + __func__, left, right); + + param.cmd = EC_CODEC_SET_GAIN; + param.gain.left = left; + param.gain.right = right; + + ret = ec_command(component, 0, EC_CMD_CODEC_I2S, + (u8 *)¶m, sizeof(param), + NULL, 0); + if (ret < 0) { + dev_err(component->dev, "I2S set gain command returned %d\n", + ret); + return -EINVAL; + } + + return 0; +} + +static int mic_gain_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + int left = ucontrol->value.integer.value[0]; + int right = ucontrol->value.integer.value[1]; + int ret; + + if (left > MAX_GAIN || right > MAX_GAIN) + return -EINVAL; + + ret = set_ec_mic_gain(component, (u8)left, (u8)right); + + if (ret) + return ret; + + return 0; +} + +static const struct snd_kcontrol_new cros_ec_snd_controls[] = { + SOC_DOUBLE_EXT_TLV("EC Mic Gain", SND_SOC_NOPM, SND_SOC_NOPM, 0, 43, 0, + mic_gain_get, mic_gain_put, ec_mic_gain_tlv) +}; + +static int enable_i2s(struct snd_soc_component *component, int enable) +{ + struct ec_param_codec_i2s param; + int ret; + + dev_dbg(component->dev, "%s set i2s to %u\n", __func__, enable); + + param.cmd = EC_CODEC_I2S_ENABLE; + param.i2s_enable = enable; + + ret = ec_command(component, 0, EC_CMD_CODEC_I2S, + (u8 *)¶m, sizeof(param), + NULL, 0); + if (ret < 0) { + dev_err(component->dev, "I2S enable %d command returned %d\n", + enable, ret); + return -EINVAL; + } + return 0; +} + +static int cros_ec_i2s_enable_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + dev_dbg(component->dev, + "%s got SND_SOC_DAPM_PRE_PMU event\n", __func__); + return enable_i2s(component, 1); + + case SND_SOC_DAPM_PRE_PMD: + dev_dbg(component->dev, + "%s got SND_SOC_DAPM_PRE_PMD event\n", __func__); + return enable_i2s(component, 0); + } + + return 0; +} + +/* + * The goal of this DAPM route is to turn on/off I2S using EC + * host command when capture stream is started/stopped. + */ +static const struct snd_soc_dapm_widget cros_ec_dapm_widgets[] = { + SND_SOC_DAPM_INPUT("DMIC"), + + /* + * Control EC to enable/disable I2S. + */ + SND_SOC_DAPM_SUPPLY("I2S Enable", SND_SOC_NOPM, + 0, 0, cros_ec_i2s_enable_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), + + SND_SOC_DAPM_AIF_OUT("I2STX", "I2S Capture", 0, SND_SOC_NOPM, 0, 0), +}; + +static const struct snd_soc_dapm_route cros_ec_dapm_routes[] = { + { "I2STX", NULL, "DMIC" }, + { "I2STX", NULL, "I2S Enable" }, +}; + +static const struct snd_soc_component_driver cros_ec_component_driver = { + .controls = cros_ec_snd_controls, + .num_controls = ARRAY_SIZE(cros_ec_snd_controls), + .dapm_widgets = cros_ec_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(cros_ec_dapm_widgets), + .dapm_routes = cros_ec_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(cros_ec_dapm_routes), +}; + +/* + * Platform device and platform driver fro cros-ec-codec. + */ +static int cros_ec_codec_platform_probe(struct platform_device *pd) +{ + struct device *dev = &pd->dev; + struct cros_ec_device *ec_device = dev_get_drvdata(pd->dev.parent); + struct cros_ec_codec_data *codec_data; + int rc; + + codec_data = devm_kzalloc(dev, sizeof(struct cros_ec_codec_data), + GFP_KERNEL); + if (!codec_data) + return -ENOMEM; + + codec_data->dev = dev; + codec_data->ec_device = ec_device; + + platform_set_drvdata(pd, codec_data); + + rc = snd_soc_register_component(dev, &cros_ec_component_driver, + cros_ec_dai, ARRAY_SIZE(cros_ec_dai)); + + dev_dbg(dev, "%s done\n", __func__); + + return 0; +} + +#ifdef CONFIG_OF +static const struct of_device_id cros_ec_codec_of_match[] = { + { .compatible = "google,cros-ec-codec" }, + {}, +}; +MODULE_DEVICE_TABLE(of, cros_ec_codec_of_match); +#endif + +static struct platform_driver cros_ec_codec_platform_driver = { + .driver = { + .name = DRV_NAME, + .of_match_table = of_match_ptr(cros_ec_codec_of_match), + }, + .probe = cros_ec_codec_platform_probe, +}; + +module_platform_driver(cros_ec_codec_platform_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("ChromeOS EC codec driver"); +MODULE_AUTHOR("Cheng-Yi Chiang "); +MODULE_ALIAS("platform:" DRV_NAME); diff --git a/sound/soc/codecs/cros_ec_codec.h b/sound/soc/codecs/cros_ec_codec.h new file mode 100644 index 0000000000000..3c566079f4ee2 --- /dev/null +++ b/sound/soc/codecs/cros_ec_codec.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * ChromeOS EC Codec + */ + +#ifndef __CROS_EC_CODEC_H +#define __CROS_EC_CODEC_H + +/** + * struct cros_ec_codec_data - ChromeOS EC codec driver data. + * @dev: Device structure used in sysfs. + * @ec_device: cros_ec_device structure to talk to the physical device. + * @component: Pointer to the component. + */ +struct cros_ec_codec_data { + struct device *dev; + struct cros_ec_device *ec_device; + struct snd_soc_component *component; +}; + +#endif /* __CROS_EC_CODEC_H */