From patchwork Tue Jan 4 15:35:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12703587 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E4F2C433FE for ; Tue, 4 Jan 2022 15:38:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234939AbiADPib (ORCPT ); Tue, 4 Jan 2022 10:38:31 -0500 Received: from sin.source.kernel.org ([145.40.73.55]:39668 "EHLO sin.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234913AbiADPi2 (ORCPT ); Tue, 4 Jan 2022 10:38:28 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id E3387CE1935; Tue, 4 Jan 2022 15:38:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C0B36C36AED; Tue, 4 Jan 2022 15:38:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1641310704; bh=LmIvwN+8OkjMH1DjfDomkvep/jAw4+oYe61KXvDecmM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aS5JdUyauJXj1y6ZJEkQTtqKzc9SX++og9+vJqljHPow+7PFNvoyJJQcnMLbPNEnr rhvBGthKCzjV/Fs9X/6IJWH+gAqOO8UFgEFHdNlMmOU/iRtrY8ASO1e+vnDFZBpbR0 j/tQuuA4m8KNbdwIaI16pvqvsbBSnteBKqvDroNC/yuisS0U9tOn7wxv4I7ZkcWxuj cdA71Mq7db2Fex+ZWyBOvS65epoxBsWiqZ+I799z6P31okCjjER9EqNPsEI40JT/LV 22QF2DvGBMgXxagr0U4W4yJjm6cx3Ktil2+gPcQNUGGVQL68wU+oO+2v2kON56go0y Y9OSfiYvyHrUQ== Received: by pali.im (Postfix) id 8E11A284C; Tue, 4 Jan 2022 16:38:22 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Thomas Petazzoni , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 01/11] =?utf-8?q?MAINTAINERS=3A_Add_Pali_Roh=C3=A1r_as_pc?= =?utf-8?q?i-mvebu=2Ec_maintainer?= Date: Tue, 4 Jan 2022 16:35:19 +0100 Message-Id: <20220104153529.31647-2-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220104153529.31647-1-pali@kernel.org> References: <20211221141455.30011-1-pali@kernel.org> <20220104153529.31647-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Signed-off-by: Pali Rohár Acked-by: Thomas Petazzoni --- I discussed with Thomas and he ask me for taking maintenance of pci-mvebu.c driver. --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 7a2345ce8521..24527789d933 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14617,6 +14617,7 @@ F: drivers/pci/controller/mobiveil/pcie-mobiveil* PCI DRIVER FOR MVEBU (Marvell Armada 370 and Armada XP SOC support) M: Thomas Petazzoni +M: Pali Rohár L: linux-pci@vger.kernel.org L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained From patchwork Tue Jan 4 15:35:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12703588 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 917EBC433EF for ; Tue, 4 Jan 2022 15:38:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234953AbiADPic (ORCPT ); Tue, 4 Jan 2022 10:38:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42454 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234933AbiADPia (ORCPT ); Tue, 4 Jan 2022 10:38:30 -0500 Received: from sin.source.kernel.org (sin.source.kernel.org [IPv6:2604:1380:40e1:4800::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81C3DC061761; Tue, 4 Jan 2022 07:38:29 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id A40AACE1938; Tue, 4 Jan 2022 15:38:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id CE2ACC36AEF; Tue, 4 Jan 2022 15:38:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1641310706; bh=iOvSQ3cr2/obvzVJYtbtVJIt4qlKE0TfvlWcR/y5KNc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ihp68iLoajs9P67lIgANXlBx1wOHuflcmm3mUkvP9jAChN6Gwjq5NdJyXjPeAhyM5 BM2DuWnjm/4Jafcp/NVk8bsnLDJO1jTE6T92Qkx07VmWEnB30sFJHosLjQB15TlRg3 8n409X8KThCu+Hiya4sXCKGTJnGLSgvS2MVROM1E8UOK2fmZLbHGs5J7bkYeL9tDjS CDsAaZP6kfVPj3xjhHJ2gYlGCFpw0sJ1+t0Ce0hSTp5DBI9RKpH9fUtPsqPYJaE2nt xM3u4/yD9hD3Ye+K64w6J+4aP25yp8piVEPqOw5z+N7AfKU8HIV92+zeaQniqCiv19 bbPNuLteURzQg== Received: by pali.im (Postfix) id 9B1EB284D; Tue, 4 Jan 2022 16:38:23 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Thomas Petazzoni , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 02/11] PCI: pci-bridge-emul: Make struct pci_bridge_emul_ops as const Date: Tue, 4 Jan 2022 16:35:20 +0100 Message-Id: <20220104153529.31647-3-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220104153529.31647-1-pali@kernel.org> References: <20211221141455.30011-1-pali@kernel.org> <20220104153529.31647-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org It is read-only constant structure, so properly mark it with const keyword. Signed-off-by: Pali Rohár Acked-by: Thomas Petazzoni --- drivers/pci/controller/pci-aardvark.c | 2 +- drivers/pci/controller/pci-mvebu.c | 2 +- drivers/pci/pci-bridge-emul.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 62fc55f2ed40..1fa6fe1e022a 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -928,7 +928,7 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, } } -static struct pci_bridge_emul_ops advk_pci_bridge_emul_ops = { +static const struct pci_bridge_emul_ops advk_pci_bridge_emul_ops = { .read_base = advk_pci_bridge_emul_base_conf_read, .write_base = advk_pci_bridge_emul_base_conf_write, .read_pcie = advk_pci_bridge_emul_pcie_conf_read, diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 68aa94a258ff..2ecc1ab12249 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -709,7 +709,7 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, } } -static struct pci_bridge_emul_ops mvebu_pci_bridge_emul_ops = { +static const struct pci_bridge_emul_ops mvebu_pci_bridge_emul_ops = { .read_base = mvebu_pci_bridge_emul_base_conf_read, .write_base = mvebu_pci_bridge_emul_base_conf_write, .read_pcie = mvebu_pci_bridge_emul_pcie_conf_read, diff --git a/drivers/pci/pci-bridge-emul.h b/drivers/pci/pci-bridge-emul.h index 49bbd37ee318..0690b6369755 100644 --- a/drivers/pci/pci-bridge-emul.h +++ b/drivers/pci/pci-bridge-emul.h @@ -112,7 +112,7 @@ struct pci_bridge_reg_behavior; struct pci_bridge_emul { struct pci_bridge_emul_conf conf; struct pci_bridge_emul_pcie_conf pcie_conf; - struct pci_bridge_emul_ops *ops; + const struct pci_bridge_emul_ops *ops; struct pci_bridge_reg_behavior *pci_regs_behavior; struct pci_bridge_reg_behavior *pcie_cap_regs_behavior; void *data; From patchwork Tue Jan 4 15:35:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12703585 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CCEEEC433F5 for ; Tue, 4 Jan 2022 15:38:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234925AbiADPi3 (ORCPT ); Tue, 4 Jan 2022 10:38:29 -0500 Received: from dfw.source.kernel.org ([139.178.84.217]:36470 "EHLO dfw.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234911AbiADPi1 (ORCPT ); Tue, 4 Jan 2022 10:38:27 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0DF0A614CF; Tue, 4 Jan 2022 15:38:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B41E7C36AE9; Tue, 4 Jan 2022 15:38:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1641310706; bh=D10rA3MjwxR7qTzv97luAxovzVKA6suYoqpXAFLKS9k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OzpgEAElAyWzz/0nZBUIsCwel/q7ZhFrboYFoIwxEBG1KcxMn9yKT8fho2XQuWHwx pXR6qU4doQhumTzzA5CntyeowzznY73QsLxrxvpf3r6zDAQnYK8xf62hwzvrtIGRjE +kdl/z3udLQxOP1hupaWtVIs2hyRbtzCGtiPr4pz9+axBiCkCsWSimwHyGjtbhdmdb F46aJ+ZGMIB9lsfEy+Ub0pcyEYLFjZO6zXUxWWVc9khmVSOmRRCwC6RV8a8B4kJLpo gYeW3/PDnOvX/B8lyIwRzgjyoLdwRdU5wga8xfMpmt34b/gXXLWug8n+DLjWTxzeu4 vRSEhEIbGS76Q== Received: by pali.im (Postfix) id ABA8F284E; Tue, 4 Jan 2022 16:38:24 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Thomas Petazzoni , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 03/11] PCI: pci-bridge-emul: Rename PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR to PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD Date: Tue, 4 Jan 2022 16:35:21 +0100 Message-Id: <20220104153529.31647-4-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220104153529.31647-1-pali@kernel.org> References: <20211221141455.30011-1-pali@kernel.org> <20220104153529.31647-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This flag describe whether PCI bridge supports forwarding of prefetchable memory requests in given range between primary and secondary buses. It does not specify if bridge has support for prefetchable memory BAR (moreover this pci-bridge-emul.c driver does not provide support for BARs). So change name of this flag to be less misleading and add comment. Signed-off-by: Pali Rohár --- Changes in v2: * Add comment into code. --- drivers/pci/controller/pci-mvebu.c | 2 +- drivers/pci/pci-bridge-emul.c | 2 +- drivers/pci/pci-bridge-emul.h | 6 +++++- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 2ecc1ab12249..2e10ade660a1 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -747,7 +747,7 @@ static int mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port) bridge->data = port; bridge->ops = &mvebu_pci_bridge_emul_ops; - return pci_bridge_emul_init(bridge, PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR); + return pci_bridge_emul_init(bridge, PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD); } static inline struct mvebu_pcie *sys_to_pcie(struct pci_sys_data *sys) diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c index 79b947528455..432b1bec2e22 100644 --- a/drivers/pci/pci-bridge-emul.c +++ b/drivers/pci/pci-bridge-emul.c @@ -373,7 +373,7 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge, ~(BIT(10) << 16); } - if (flags & PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR) { + if (flags & PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD) { bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].ro = ~0; bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].rw = 0; } diff --git a/drivers/pci/pci-bridge-emul.h b/drivers/pci/pci-bridge-emul.h index 0690b6369755..087b5fa01bcf 100644 --- a/drivers/pci/pci-bridge-emul.h +++ b/drivers/pci/pci-bridge-emul.h @@ -120,7 +120,11 @@ struct pci_bridge_emul { }; enum { - PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR = BIT(0), + /* + * PCI bridge does not support forwarding of prefetchable memory + * requests between primary and secondary buses. + */ + PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD = BIT(0), }; int pci_bridge_emul_init(struct pci_bridge_emul *bridge, From patchwork Tue Jan 4 15:35:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12703584 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8ADD4C433EF for ; Tue, 4 Jan 2022 15:38:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234917AbiADPi2 (ORCPT ); Tue, 4 Jan 2022 10:38:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233661AbiADPi1 (ORCPT ); Tue, 4 Jan 2022 10:38:27 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3624DC061761; Tue, 4 Jan 2022 07:38:27 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C807A614D1; Tue, 4 Jan 2022 15:38:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 17A9DC36AF5; Tue, 4 Jan 2022 15:38:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1641310706; bh=hVpmL6carw5FHfSaRzrs6Ykkswp2VyP7qkjYE90lc6o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jwm6LKxmU62KKfm+HrSdDh8ADqOhqWlb+/oP/+V0k+FUJZor620FE2qpr5RtPkaAN ez502/JmHsBooNlJN4XDTu8iiDv/Py6mvFy6p5EhIDV6nXObmdNadFnltDMRstWkxv WPgc8rG8S8Y9xrYXe9SHOSNYyxXU7B7BBLxU6mQH24ht5Z0t3rERzAkdMpXP+s74MS oliyVGFr0nPIb0q0kAx+TGvtXDinUKuC/W6E9WxA26ATmCv7vznoBqmTG/lzv8AYFu Uz8MYdfl+gCWHsxD1sVOfPh3m786XqHPYNSDwmzN2En8yVWX83JqIejuGXnD+KrsAc MTQKQ9xZJ/baA== Received: by pali.im (Postfix) id C17E496B; Tue, 4 Jan 2022 16:38:25 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Thomas Petazzoni , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 04/11] PCI: pci-bridge-emul: Add support for new flag PCI_BRIDGE_EMUL_NO_IO_FORWARD Date: Tue, 4 Jan 2022 16:35:22 +0100 Message-Id: <20220104153529.31647-5-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220104153529.31647-1-pali@kernel.org> References: <20211221141455.30011-1-pali@kernel.org> <20220104153529.31647-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Like PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD, this new flag specifies that emulated PCI bridge does not support forwarding of IO requests in given range between primary and secondary buses. This flag should be used as argument for pci_bridge_emul_init() for hardware setup without IO support. Setting this flag cause that IO base and limit registers are read-only. Signed-off-by: Pali Rohár --- Changes in v2: * Add comment into code. --- drivers/pci/pci-bridge-emul.c | 9 +++++++++ drivers/pci/pci-bridge-emul.h | 6 ++++++ 2 files changed, 15 insertions(+) diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c index 432b1bec2e22..033bbeb99176 100644 --- a/drivers/pci/pci-bridge-emul.c +++ b/drivers/pci/pci-bridge-emul.c @@ -378,6 +378,15 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge, bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].rw = 0; } + if (flags & PCI_BRIDGE_EMUL_NO_IO_FORWARD) { + bridge->pci_regs_behavior[PCI_COMMAND / 4].ro |= PCI_COMMAND_IO; + bridge->pci_regs_behavior[PCI_COMMAND / 4].rw &= ~PCI_COMMAND_IO; + bridge->pci_regs_behavior[PCI_IO_BASE / 4].ro |= GENMASK(15, 0); + bridge->pci_regs_behavior[PCI_IO_BASE / 4].rw &= ~GENMASK(15, 0); + bridge->pci_regs_behavior[PCI_IO_BASE_UPPER16 / 4].ro = ~0; + bridge->pci_regs_behavior[PCI_IO_BASE_UPPER16 / 4].rw = 0; + } + return 0; } EXPORT_SYMBOL_GPL(pci_bridge_emul_init); diff --git a/drivers/pci/pci-bridge-emul.h b/drivers/pci/pci-bridge-emul.h index 087b5fa01bcf..4953274cac18 100644 --- a/drivers/pci/pci-bridge-emul.h +++ b/drivers/pci/pci-bridge-emul.h @@ -125,6 +125,12 @@ enum { * requests between primary and secondary buses. */ PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD = BIT(0), + + /* + * PCI bridge does not support forwarding of IO requests between + * primary and secondary buses. + */ + PCI_BRIDGE_EMUL_NO_IO_FORWARD = BIT(1), }; int pci_bridge_emul_init(struct pci_bridge_emul *bridge, From patchwork Tue Jan 4 15:35:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12703586 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9AAB0C4332F for ; Tue, 4 Jan 2022 15:38:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234938AbiADPia (ORCPT ); Tue, 4 Jan 2022 10:38:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42442 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234915AbiADPi2 (ORCPT ); Tue, 4 Jan 2022 10:38:28 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2E36C061761; Tue, 4 Jan 2022 07:38:27 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 809DA614D1; Tue, 4 Jan 2022 15:38:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 33146C36AE9; Tue, 4 Jan 2022 15:38:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1641310707; bh=EL6nV59bNUjoxrhXUx09Q1zdCGJZe3e7ihi5Ki9qF/k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pNmQBIaqor3ghqwL/89v2mUPuXjkbtIT2OjRUx1YQ7wGTkrq4O8P4INsSe8eidYXs grSvQVWe3T4mUGWJqQ7q7KobrjFiXotm3orcOi7wFFOcjyTwzSKuuQ9pyc9cS2fVdp O6O75AKdMRFuxYumlbEPLZGiQMvXMkV6ctXYl66TYQWHVX6gxb3/2Rk/fMveonVuty /oAaWzktIc5vYFJ5uexWWG87muNCnc8BcamRmDwgIZoVNKNWOK7mgxTNJa1Bufaykh m8/JwbcZBDlJlLZTUb0oq+X5wh3kKh1t31/aU/WNStaF7qTi1NH+BPuDELQYCnDodX JS3jlHI/8bzqg== Received: by pali.im (Postfix) id DDB5996B; Tue, 4 Jan 2022 16:38:26 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Thomas Petazzoni , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 05/11] PCI: mvebu: Add help string for CONFIG_PCI_MVEBU option Date: Tue, 4 Jan 2022 16:35:23 +0100 Message-Id: <20220104153529.31647-6-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220104153529.31647-1-pali@kernel.org> References: <20211221141455.30011-1-pali@kernel.org> <20220104153529.31647-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org There is no description for CONFIG_PCI_MVEBU option. Add it. Signed-off-by: Pali Rohár Acked-by: Thomas Petazzoni --- drivers/pci/controller/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 67189bcd5d89..534b446f2cf0 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -10,6 +10,10 @@ config PCI_MVEBU depends on ARM depends on OF select PCI_BRIDGE_EMUL + help + Add support for Marvell EBU PCIe controller. This PCIe controller + is used on 32-bit Marvell ARM SoCs: Dove, Kirkwood, Armada 370, + Armada XP, Armada 375, Armada 38x and Armada 39x. config PCI_AARDVARK tristate "Aardvark PCIe controller" From patchwork Tue Jan 4 15:35:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12703590 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1D4EC4332F for ; Tue, 4 Jan 2022 15:38:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234967AbiADPie (ORCPT ); Tue, 4 Jan 2022 10:38:34 -0500 Received: from sin.source.kernel.org ([145.40.73.55]:39720 "EHLO sin.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234929AbiADPic (ORCPT ); Tue, 4 Jan 2022 10:38:32 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id D2F87CE1804; Tue, 4 Jan 2022 15:38:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2D7EBC36AE9; Tue, 4 Jan 2022 15:38:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1641310708; bh=BAz0sgl9jkfKnkSJVwW7u56anhqkAh5YBXeqtAKyf+8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=L+SHJXwP5tVS0BcMLd5wYZ78HFBj8s3KajKQIKoD3eIAxi4M4qHSBe5n3s4m4rQeZ GZJ0MyqHyTz+X9jBYgheZmg4mp9EzzkjabvbmiCsSkGMcwAHBw7mzthGezdot9mPh7 7SVqMRq4dquPz7B85u6Vf8DlWpT0fYV4sxzTnOcx72hjdyw5StSsUFWxDxorigEjw1 aLM6p2+QMiXifJMP/9E4wlvez2tw7JI2zBlkfwrKAPYd4VU8JFSfnF7cG6/t+vQU6w B+RIhOmUjAMO9X2/cXmGPLJmLBeqbS+x78jGq/r/Cm3cTTL1ERkPL0/bcPIubg5G6G GCtrA3pB/4DDQ== Received: by pali.im (Postfix) id D76AC96B; Tue, 4 Jan 2022 16:38:27 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Thomas Petazzoni , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 06/11] PCI: mvebu: Remove duplicate nports assignment Date: Tue, 4 Jan 2022 16:35:24 +0100 Message-Id: <20220104153529.31647-7-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220104153529.31647-1-pali@kernel.org> References: <20211221141455.30011-1-pali@kernel.org> <20220104153529.31647-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Member pcie->nports is initialized to correct value before the previous for-loop. There is not need to initialize it more times. Signed-off-by: Pali Rohár Acked-by: Thomas Petazzoni --- drivers/pci/controller/pci-mvebu.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 2e10ade660a1..016f709b3067 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -1337,8 +1337,6 @@ static int mvebu_pcie_probe(struct platform_device *pdev) mvebu_pcie_set_local_bus_nr(port, 0); } - pcie->nports = i; - bridge->sysdata = pcie; bridge->ops = &mvebu_pcie_ops; bridge->align_resource = mvebu_pcie_align_resource; From patchwork Tue Jan 4 15:35:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12703589 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC8A4C433F5 for ; Tue, 4 Jan 2022 15:38:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234927AbiADPid (ORCPT ); Tue, 4 Jan 2022 10:38:33 -0500 Received: from dfw.source.kernel.org ([139.178.84.217]:36578 "EHLO dfw.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234937AbiADPia (ORCPT ); Tue, 4 Jan 2022 10:38:30 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0807E614DF; Tue, 4 Jan 2022 15:38:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 25B4CC36AF2; Tue, 4 Jan 2022 15:38:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1641310709; bh=rDql2jTgdjUK7vxWWT90TbqSpfdmGCwQYg2uMRYgxk4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=E9n88pQUWTaGb0/WN+em+D7DvZfKG0IshjNhPQEYVsR0+tkwKhpfCqpfVnpiLE4wz Nm5u3JbylCgBYSFJTP4rpMek5oZebIRx5he7KeoalM5Ppon20ul93s/O0fvCyPIyJ+ 0XPa209J91JOdODpfsDe043eORvRv8JNPTK3jBFXkXNsxbkGNNhjCGDOvQ0ArAN64x TWpr9tii5ZKecUwWj6N+hR1a2BLReU8tHlMo4u41mil0yUEMGj6/3EvnO67M+V16Qs L+A14BEee9CjCA6+0Zoz3W7gWyPXLCbRDZxdZSt18+XrUH9aqeao7BkgX2c0FzWZc4 MABXgJkkUuSUg== Received: by pali.im (Postfix) id CFF8796B; Tue, 4 Jan 2022 16:38:28 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Thomas Petazzoni , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 07/11] PCI: mvebu: Set PCI_BRIDGE_EMUL_NO_IO_FORWARD when IO is unsupported Date: Tue, 4 Jan 2022 16:35:25 +0100 Message-Id: <20220104153529.31647-8-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220104153529.31647-1-pali@kernel.org> References: <20211221141455.30011-1-pali@kernel.org> <20220104153529.31647-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This will make PCI bridge to return zeros when accessing IO base and limit registers, as required by PCIe base specification. This allows to remove adhoc checks around mvebu_pcie_handle_iobase_change() function for unsupported IO ranges. PCI_BRIDGE_EMUL_NO_IO_FORWARD ensures that there will be no non-zeros write to IO registers when IO is not supported. Signed-off-by: Pali Rohár --- drivers/pci/controller/pci-mvebu.c | 29 ++++++++++------------------- 1 file changed, 10 insertions(+), 19 deletions(-) diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 016f709b3067..551f55af5226 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -438,12 +438,6 @@ static int mvebu_pcie_handle_iobase_change(struct mvebu_pcie_port *port) return mvebu_pcie_set_window(port, port->io_target, port->io_attr, &desired, &port->iowin); - if (!mvebu_has_ioport(port)) { - dev_WARN(&port->pcie->pdev->dev, - "Attempt to set IO when IO is disabled\n"); - return -EOPNOTSUPP; - } - /* * We read the PCI-to-PCI bridge emulated registers, and * calculate the base address and size of the address decoding @@ -599,24 +593,18 @@ mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge, switch (reg) { case PCI_COMMAND: - if (!mvebu_has_ioport(port)) { - conf->command = cpu_to_le16( - le16_to_cpu(conf->command) & ~PCI_COMMAND_IO); - new &= ~PCI_COMMAND_IO; - } - mvebu_writel(port, new, PCIE_CMD_OFF); break; case PCI_IO_BASE: - if ((mask & 0xffff) && mvebu_pcie_handle_iobase_change(port)) { + if ((mask & 0xffff) && mvebu_has_ioport(port) && + mvebu_pcie_handle_iobase_change(port)) { /* On error disable IO range */ conf->iobase &= ~0xf0; conf->iolimit &= ~0xf0; + conf->iobase |= 0xf0; conf->iobaseupper = cpu_to_le16(0x0000); conf->iolimitupper = cpu_to_le16(0x0000); - if (mvebu_has_ioport(port)) - conf->iobase |= 0xf0; } break; @@ -630,14 +618,14 @@ mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge, break; case PCI_IO_BASE_UPPER16: - if (mvebu_pcie_handle_iobase_change(port)) { + if (mvebu_has_ioport(port) && + mvebu_pcie_handle_iobase_change(port)) { /* On error disable IO range */ conf->iobase &= ~0xf0; conf->iolimit &= ~0xf0; + conf->iobase |= 0xf0; conf->iobaseupper = cpu_to_le16(0x0000); conf->iolimitupper = cpu_to_le16(0x0000); - if (mvebu_has_ioport(port)) - conf->iobase |= 0xf0; } break; @@ -722,6 +710,7 @@ static const struct pci_bridge_emul_ops mvebu_pci_bridge_emul_ops = { */ static int mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port) { + unsigned int bridge_flags = PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD; struct pci_bridge_emul *bridge = &port->bridge; u32 pcie_cap = mvebu_readl(port, PCIE_CAP_PCIEXP); u8 pcie_cap_ver = ((pcie_cap >> 16) & PCI_EXP_FLAGS_VERS); @@ -735,6 +724,8 @@ static int mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port) /* We support 32 bits I/O addressing */ bridge->conf.iobase = PCI_IO_RANGE_TYPE_32; bridge->conf.iolimit = PCI_IO_RANGE_TYPE_32; + } else { + bridge_flags |= PCI_BRIDGE_EMUL_NO_IO_FORWARD; } /* @@ -747,7 +738,7 @@ static int mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port) bridge->data = port; bridge->ops = &mvebu_pci_bridge_emul_ops; - return pci_bridge_emul_init(bridge, PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD); + return pci_bridge_emul_init(bridge, bridge_flags); } static inline struct mvebu_pcie *sys_to_pcie(struct pci_sys_data *sys) From patchwork Tue Jan 4 15:35:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12703591 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 330F8C433F5 for ; Tue, 4 Jan 2022 15:38:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234995AbiADPih (ORCPT ); Tue, 4 Jan 2022 10:38:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42474 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234949AbiADPie (ORCPT ); Tue, 4 Jan 2022 10:38:34 -0500 Received: from sin.source.kernel.org (sin.source.kernel.org [IPv6:2604:1380:40e1:4800::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9BBA2C061784; Tue, 4 Jan 2022 07:38:33 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id EC0E6CE1932; Tue, 4 Jan 2022 15:38:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 236F2C36AEF; Tue, 4 Jan 2022 15:38:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1641310710; bh=5rM1AcOc3PS1pgnZALHKjdSUqdfRbqAmu6E9C1EEBE4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=U6gcBpme1aYsh/J7oE//Q9RLb3oRu6s/Jw9uFlfyTiiV3hTO/Ld41pXs6egeRkw30 dkbNFr85zdHrKA+mJaJqHu4YK7UFeB+njxfSWoHT0ukCTkpULEaMLNOS0S77VJjBLv seWG4Vt943PDn8hRZEXlBe3JtdjHGUpWqwDdxBT7jfHjmDrAiXPyNvVkSQqHNHyFKo swUygjxETfekPokTLm8fBMCwX47YOP7CANBTF4FYGe4ehOxmEHLZOFUrS/D61G5Mam y8I0bI6uyT7JZgWzcvChXfVqiKlyujpodXgVioMF2RhGhPFS7Mh/O5PiNgYqoVnuG/ PLDzhMQ3xLrPA== Received: by pali.im (Postfix) id CC23096B; Tue, 4 Jan 2022 16:38:29 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Thomas Petazzoni , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 08/11] PCI: mvebu: Properly initialize vendor, device and revision of emulated bridge Date: Tue, 4 Jan 2022 16:35:26 +0100 Message-Id: <20220104153529.31647-9-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220104153529.31647-1-pali@kernel.org> References: <20211221141455.30011-1-pali@kernel.org> <20220104153529.31647-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org With this change also PCI vendor id is read from mvebu registers. Signed-off-by: Pali Rohár --- drivers/pci/controller/pci-mvebu.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 551f55af5226..94ef00b6d697 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -712,13 +712,14 @@ static int mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port) { unsigned int bridge_flags = PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD; struct pci_bridge_emul *bridge = &port->bridge; + u32 dev_id = mvebu_readl(port, PCIE_DEV_ID_OFF); + u32 dev_rev = mvebu_readl(port, PCIE_DEV_REV_OFF); u32 pcie_cap = mvebu_readl(port, PCIE_CAP_PCIEXP); u8 pcie_cap_ver = ((pcie_cap >> 16) & PCI_EXP_FLAGS_VERS); - bridge->conf.vendor = PCI_VENDOR_ID_MARVELL; - bridge->conf.device = mvebu_readl(port, PCIE_DEV_ID_OFF) >> 16; - bridge->conf.class_revision = - mvebu_readl(port, PCIE_DEV_REV_OFF) & 0xff; + bridge->conf.vendor = cpu_to_le16(dev_id & 0xffff); + bridge->conf.device = cpu_to_le16(dev_id >> 16); + bridge->conf.class_revision = cpu_to_le32(dev_rev & 0xff); if (mvebu_has_ioport(port)) { /* We support 32 bits I/O addressing */ From patchwork Tue Jan 4 15:35:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12703594 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95549C433F5 for ; Tue, 4 Jan 2022 15:38:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235061AbiADPiu (ORCPT ); Tue, 4 Jan 2022 10:38:50 -0500 Received: from sin.source.kernel.org ([145.40.73.55]:39720 "EHLO sin.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234956AbiADPie (ORCPT ); Tue, 4 Jan 2022 10:38:34 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id DC71ACE1804; Tue, 4 Jan 2022 15:38:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1AE12C36AED; Tue, 4 Jan 2022 15:38:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1641310711; bh=uG8b6cgDUIxA5J6r1/yrflQam4I3mKXv7eeo14u0x7E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IvjrDICeVUGx6VykznQC5Oic9ATMkvTaZ4VFqY+ekiAxw53IkUiLQ710i6ISZ02C5 sqs0bfd5++kAlQV9mjjrY0x13WXuuVQdU+jZ1Yek6sRNHTINW6ekl/uzY+9X1XEc8R WCjqEel8Nc9+13qi3tEl/bpeuw6DCwDhThCr1oDmzrGErmuxRsteBvLBkKzD/lfB2v 61ufPHQun/aNCEfyb9f8ozfcCZc5L1GcLBQy+wDJ5iXBJPpLq7+SmjY3rNxwUoG9rN zzYx8KJH32JaNUcP7kQiiFXQWWtl5J07yZmTFkviqvBqvhhBSfQPrkReI7STS8tls9 UdEglEOXk0wvg== Received: by pali.im (Postfix) id C442396B; Tue, 4 Jan 2022 16:38:30 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Thomas Petazzoni , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 09/11] PCI: mvebu: Update comment for PCI_EXP_LNKCAP register on emulated bridge Date: Tue, 4 Jan 2022 16:35:27 +0100 Message-Id: <20220104153529.31647-10-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220104153529.31647-1-pali@kernel.org> References: <20211221141455.30011-1-pali@kernel.org> <20220104153529.31647-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Reason for clearing this bit is because mvebu hw returns incorrectly this bit set to 1. Signed-off-by: Pali Rohár --- drivers/pci/controller/pci-mvebu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 94ef00b6d697..1aac65977b97 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -546,8 +546,8 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge, case PCI_EXP_LNKCAP: /* - * PCIe requires the clock power management capability to be - * hard-wired to zero for downstream ports + * PCIe requires that the Clock Power Management capability bit + * is hard-wired to zero for downstream ports but HW returns 1. */ *value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP) & ~PCI_EXP_LNKCAP_CLKPM; From patchwork Tue Jan 4 15:35:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12703593 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C05EFC43217 for ; Tue, 4 Jan 2022 15:38:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234986AbiADPig (ORCPT ); Tue, 4 Jan 2022 10:38:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42470 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234957AbiADPid (ORCPT ); Tue, 4 Jan 2022 10:38:33 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3417BC061761; Tue, 4 Jan 2022 07:38:33 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C5C97614CF; Tue, 4 Jan 2022 15:38:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 17B87C36AF2; Tue, 4 Jan 2022 15:38:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1641310712; bh=xxyZnGOuH63mToYeFJtMrqvVZxip4BN1x7ap3lhZeHA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BS0s+Z26wLT5UtAOTKS7r2L2eShBR7d099GDOIG09ymgvHAXOdP/3MA7zVXYsckTC bLYbOYH0jfGZNJxAjDxp0XojSI55IQTjJv5kxt3LcjIy6lumb33kc/74X94U0pVocl MWmNyywDVS01UQLQlCg2qaQh17yGZ9qxCABrrfO40FVuSogkQEBFkC3BxZqZm4ZLQW znP28m4nbBfolVseQuC8+CVtpj59eBqERZCMhWOriXMKIba/Wi9Ll2l2BXlvYCPd3t 0KNE9fwa01enLlH8TXibPVN9PylSuU27Krc/GvzXW1EhzleTYuqgTX6b8DWYSDGXHL r8XPSeZMixjvQ== Received: by pali.im (Postfix) id BFFE096B; Tue, 4 Jan 2022 16:38:31 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Thomas Petazzoni , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 10/11] PCI: mvebu: Update comment for PCI_EXP_LNKCTL register on emulated bridge Date: Tue, 4 Jan 2022 16:35:28 +0100 Message-Id: <20220104153529.31647-11-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220104153529.31647-1-pali@kernel.org> References: <20211221141455.30011-1-pali@kernel.org> <20220104153529.31647-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Logic and code for clearing PCI_EXP_LNKCTL_CLKREQ_EN bit is correct, but comment describing it is misleading. PCI_EXP_LNKCTL_CLKREQ_EN bit should be hardwired to zero but mvebu hw allows to change it. Signed-off-by: Pali Rohár --- drivers/pci/controller/pci-mvebu.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 1aac65977b97..dffa330de174 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -663,10 +663,9 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, case PCI_EXP_LNKCTL: /* - * If we don't support CLKREQ, we must ensure that the - * CLKREQ enable bit always reads zero. Since we haven't - * had this capability, and it's dependent on board wiring, - * disable it for the time being. + * PCIe requires that the Enable Clock Power Management bit + * is hard-wired to zero for downstream ports but HW allows + * to change it. */ new &= ~PCI_EXP_LNKCTL_CLKREQ_EN; From patchwork Tue Jan 4 15:35:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12703592 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA73DC433EF for ; Tue, 4 Jan 2022 15:38:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235000AbiADPii (ORCPT ); Tue, 4 Jan 2022 10:38:38 -0500 Received: from sin.source.kernel.org ([145.40.73.55]:39786 "EHLO sin.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234977AbiADPig (ORCPT ); Tue, 4 Jan 2022 10:38:36 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id E350DCE1936; Tue, 4 Jan 2022 15:38:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 31C85C36AEF; Tue, 4 Jan 2022 15:38:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1641310713; bh=GN5jKZEodCfeZz6pv/k5h1jk1jhWdZrxDcJsdMUC48E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SwU9uOgh4vFdXy1/SQJV/TuohYJYyzYMQ0QOjr5DIiyFWLJMyy23EIOzPcZurX+HC RkNfi1lO4d7KYcH41/OJpJUaLAbzM76JrCXoC8e4lBoQt1JyH4X9JiAsWTt7FJvUc5 NA9D1RwCicjh79+MvjbraH4cWdPENQ20QD3C2zk7J4JWFunJguwzrG4fg9jhk/Of7I qTlfuBjLpKnjMKzyeoSIztQNClXm1OZztkZ/5LvyEoOKAv9UJB9XQxlCaaB3KYRrKt IAvR4B92VXwJKEzHUBMJKcMbZ5hflXnydsCmQiKHUQ1gKsF49EoaM2NJJsn3SbijAY SY1/JvH+/Ln+g== Received: by pali.im (Postfix) id DC54A96B; Tue, 4 Jan 2022 16:38:32 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Thomas Petazzoni , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 11/11] PCI: mvebu: Fix reporting Data Link Layer Link Active on emulated bridge Date: Tue, 4 Jan 2022 16:35:29 +0100 Message-Id: <20220104153529.31647-12-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220104153529.31647-1-pali@kernel.org> References: <20211221141455.30011-1-pali@kernel.org> <20220104153529.31647-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add support for reporting PCI_EXP_LNKSTA_DLLLA bit in Link Control register on emulated bridge via PCIE_STAT_OFF reg. Function mvebu_pcie_link_up() already parses this register and returns if Data Link is Active or not. Also correctly indicate DLLLA capability via PCI_EXP_LNKCAP_DLLLARC bit in Link Control Capability register which is required for reporting DLLLA bit. Signed-off-by: Pali Rohár --- drivers/pci/controller/pci-mvebu.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index dffa330de174..a075ba26cff1 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -548,13 +548,18 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge, /* * PCIe requires that the Clock Power Management capability bit * is hard-wired to zero for downstream ports but HW returns 1. + * Additionally enable Data Link Layer Link Active Reporting + * Capable bit as DL_Active indication is provided too. */ - *value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP) & - ~PCI_EXP_LNKCAP_CLKPM; + *value = (mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP) & + ~PCI_EXP_LNKCAP_CLKPM) | PCI_EXP_LNKCAP_DLLLARC; break; case PCI_EXP_LNKCTL: - *value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL); + /* DL_Active indication is provided via PCIE_STAT_OFF */ + *value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL) | + (mvebu_pcie_link_up(port) ? + (PCI_EXP_LNKSTA_DLLLA << 16) : 0); break; case PCI_EXP_SLTCTL: