From patchwork Thu Jan 6 23:09:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Titus Rwantare X-Patchwork-Id: 12705894 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5BF8BC433EF for ; Thu, 6 Jan 2022 23:18:37 +0000 (UTC) Received: from localhost ([::1]:43334 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n5c1k-0004SU-Ez for qemu-devel@archiver.kernel.org; Thu, 06 Jan 2022 18:18:36 -0500 Received: from eggs.gnu.org ([209.51.188.92]:34558) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from <3wHbXYQYKCiEQFQRPODLLDIB.9LJNBJR-ABSBIKLKDKR.LOD@flex--titusr.bounces.google.com>) id 1n5bz6-0001ee-An for qemu-devel@nongnu.org; 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envelope-from=3wHbXYQYKCiEQFQRPODLLDIB.9LJNBJR-ABSBIKLKDKR.LOD@flex--titusr.bounces.google.com; helo=mail-pf1-x44a.google.com X-Spam_score_int: -87 X-Spam_score: -8.8 X-Spam_bar: -------- X-Spam_report: (-8.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" - add vout min register - add PEC unsupported warning to pmbus_device class - guard against out of range pmbus page accesses Signed-off-by: Titus Rwantare Reviewed-by: Hao Wu --- MAINTAINERS | 12 ++++- hw/i2c/pmbus_device.c | 88 +++++++++++++++++++++++++++++++---- include/hw/i2c/pmbus_device.h | 3 ++ 3 files changed, 92 insertions(+), 11 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index f871d759fd..6349e3da1f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2790,7 +2790,7 @@ R: Paolo Bonzini R: Bandan Das R: Stefan Hajnoczi R: Thomas Huth -R: Darren Kenny +R: Darren Kenny R: Qiuhao Li S: Maintained F: tests/qtest/fuzz/ @@ -3029,6 +3029,16 @@ F: include/hw/i2c/smbus_master.h F: include/hw/i2c/smbus_slave.h F: include/hw/i2c/smbus_eeprom.h +PMBus +M: Titus Rwantare +S: Maintained +F: hw/i2c/pmbus_device.c +F: hw/sensor/adm1272.c +F: hw/sensor/max34451.c +F: include/hw/i2c/pmbus_device.h +F: tests/qtest/adm1272-test.c +F: tests/qtest/max34451-test.c + Firmware schema specifications M: Philippe Mathieu-Daudé R: Daniel P. Berrange diff --git a/hw/i2c/pmbus_device.c b/hw/i2c/pmbus_device.c index 24f8f522d9..3beb02afad 100644 --- a/hw/i2c/pmbus_device.c +++ b/hw/i2c/pmbus_device.c @@ -89,16 +89,16 @@ void pmbus_send_string(PMBusDevice *pmdev, const char *data) } -static uint64_t pmbus_receive_uint(const uint8_t *buf, uint8_t len) +static uint64_t pmbus_receive_uint(PMBusDevice *pmdev) { uint64_t ret = 0; /* Exclude command code from return value */ - buf++; - len--; + pmdev->in_buf++; + pmdev->in_buf_len--; - for (int i = len - 1; i >= 0; i--) { - ret = ret << 8 | buf[i]; + for (int i = pmdev->in_buf_len - 1; i >= 0; i--) { + ret = ret << 8 | pmdev->in_buf[i]; } return ret; } @@ -110,7 +110,7 @@ uint8_t pmbus_receive8(PMBusDevice *pmdev) "%s: length mismatch. Expected 1 byte, got %d bytes\n", __func__, pmdev->in_buf_len - 1); } - return pmbus_receive_uint(pmdev->in_buf, pmdev->in_buf_len); + return pmbus_receive_uint(pmdev); } uint16_t pmbus_receive16(PMBusDevice *pmdev) @@ -120,7 +120,7 @@ uint16_t pmbus_receive16(PMBusDevice *pmdev) "%s: length mismatch. Expected 2 bytes, got %d bytes\n", __func__, pmdev->in_buf_len - 1); } - return pmbus_receive_uint(pmdev->in_buf, pmdev->in_buf_len); + return pmbus_receive_uint(pmdev); } uint32_t pmbus_receive32(PMBusDevice *pmdev) @@ -130,7 +130,7 @@ uint32_t pmbus_receive32(PMBusDevice *pmdev) "%s: length mismatch. Expected 4 bytes, got %d bytes\n", __func__, pmdev->in_buf_len - 1); } - return pmbus_receive_uint(pmdev->in_buf, pmdev->in_buf_len); + return pmbus_receive_uint(pmdev); } uint64_t pmbus_receive64(PMBusDevice *pmdev) @@ -140,7 +140,7 @@ uint64_t pmbus_receive64(PMBusDevice *pmdev) "%s: length mismatch. Expected 8 bytes, got %d bytes\n", __func__, pmdev->in_buf_len - 1); } - return pmbus_receive_uint(pmdev->in_buf, pmdev->in_buf_len); + return pmbus_receive_uint(pmdev); } static uint8_t pmbus_out_buf_pop(PMBusDevice *pmdev) @@ -243,18 +243,47 @@ void pmbus_check_limits(PMBusDevice *pmdev) } } +/* assert the status_cml error upon receipt of malformed command */ +static void pmbus_cml_error(PMBusDevice *pmdev) +{ + for (int i = 0; i < pmdev->num_pages; i++) { + pmdev->pages[i].status_word |= PMBUS_STATUS_CML; + pmdev->pages[i].status_cml |= PB_CML_FAULT_INVALID_CMD; + } +} + static uint8_t pmbus_receive_byte(SMBusDevice *smd) { PMBusDevice *pmdev = PMBUS_DEVICE(smd); PMBusDeviceClass *pmdc = PMBUS_DEVICE_GET_CLASS(pmdev); uint8_t ret = 0xFF; - uint8_t index = pmdev->page; + uint8_t index; if (pmdev->out_buf_len != 0) { ret = pmbus_out_buf_pop(pmdev); return ret; } + /* + * Reading from all pages will return the value from page 0, + * this is unspecified behaviour in general. + */ + if (pmdev->page == PB_ALL_PAGES) { + index = 0; + qemu_log_mask(LOG_GUEST_ERROR, + "%s: tried to read from all pages\n", + __func__); + pmbus_cml_error(pmdev); + } else if (pmdev->page > pmdev->num_pages - 1) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: page %d is out of range\n", + __func__, pmdev->page); + pmbus_cml_error(pmdev); + return -1; + } else { + index = pmdev->page; + } + switch (pmdev->code) { case PMBUS_PAGE: pmbus_send8(pmdev, pmdev->page); @@ -278,6 +307,11 @@ static uint8_t pmbus_receive_byte(SMBusDevice *smd) case PMBUS_CAPABILITY: pmbus_send8(pmdev, pmdev->capability); + if (pmdev->capability & BIT(7)) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: PEC is enabled but not yet supported.\n", + __func__); + } break; case PMBUS_VOUT_MODE: /* R/W byte */ @@ -368,6 +402,14 @@ static uint8_t pmbus_receive_byte(SMBusDevice *smd) } break; + case PMBUS_VOUT_MIN: /* R/W word */ + if (pmdev->pages[index].page_flags & PB_HAS_VOUT_RATING) { + pmbus_send16(pmdev, pmdev->pages[index].vout_min); + } else { + goto passthough; + } + break; + /* TODO: implement coefficients support */ case PMBUS_POUT_MAX: /* R/W word */ @@ -708,6 +750,10 @@ static uint8_t pmbus_receive_byte(SMBusDevice *smd) pmbus_send8(pmdev, pmdev->pages[index].status_other); break; + case PMBUS_STATUS_MFR_SPECIFIC: /* R/W byte */ + pmbus_send8(pmdev, pmdev->pages[index].status_mfr_specific); + break; + case PMBUS_READ_EIN: /* Read-Only block 5 bytes */ if (pmdev->pages[index].page_flags & PB_HAS_EIN) { pmbus_send(pmdev, pmdev->pages[index].read_ein, 5); @@ -1026,6 +1072,7 @@ static int pmbus_write_data(SMBusDevice *smd, uint8_t *buf, uint8_t len) pmdev->page = pmbus_receive8(pmdev); return 0; } + /* loop through all the pages when 0xFF is received */ if (pmdev->page == PB_ALL_PAGES) { for (int i = 0; i < pmdev->num_pages; i++) { @@ -1036,6 +1083,15 @@ static int pmbus_write_data(SMBusDevice *smd, uint8_t *buf, uint8_t len) return 0; } + if (pmdev->page > pmdev->num_pages - 1) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: page %u is out of range\n", + __func__, pmdev->page); + pmdev->page = 0; /* undefined behaviour - reset to page 0 */ + pmbus_cml_error(pmdev); + return -1; + } + index = pmdev->page; switch (pmdev->code) { @@ -1149,6 +1205,14 @@ static int pmbus_write_data(SMBusDevice *smd, uint8_t *buf, uint8_t len) } break; + case PMBUS_VOUT_MIN: /* R/W word */ + if (pmdev->pages[index].page_flags & PB_HAS_VOUT_RATING) { + pmdev->pages[index].vout_min = pmbus_receive16(pmdev); + } else { + goto passthrough; + } + break; + case PMBUS_POUT_MAX: /* R/W word */ if (pmdev->pages[index].page_flags & PB_HAS_VOUT) { pmdev->pages[index].pout_max = pmbus_receive16(pmdev); @@ -1482,6 +1546,10 @@ static int pmbus_write_data(SMBusDevice *smd, uint8_t *buf, uint8_t len) pmdev->pages[index].status_other = pmbus_receive8(pmdev); break; + case PMBUS_STATUS_MFR_SPECIFIC: /* R/W byte */ + pmdev->pages[index].status_mfr_specific = pmbus_receive8(pmdev); + break; + case PMBUS_PAGE_PLUS_READ: /* Block Read-only */ case PMBUS_CAPABILITY: /* Read-Only byte */ case PMBUS_COEFFICIENTS: /* Read-only block 5 bytes */ diff --git a/include/hw/i2c/pmbus_device.h b/include/hw/i2c/pmbus_device.h index 62bd38c83f..72c0483149 100644 --- a/include/hw/i2c/pmbus_device.h +++ b/include/hw/i2c/pmbus_device.h @@ -43,6 +43,7 @@ enum pmbus_registers { PMBUS_VOUT_DROOP = 0x28, /* R/W word */ PMBUS_VOUT_SCALE_LOOP = 0x29, /* R/W word */ PMBUS_VOUT_SCALE_MONITOR = 0x2A, /* R/W word */ + PMBUS_VOUT_MIN = 0x2B, /* R/W word */ PMBUS_COEFFICIENTS = 0x30, /* Read-only block 5 bytes */ PMBUS_POUT_MAX = 0x31, /* R/W word */ PMBUS_MAX_DUTY = 0x32, /* R/W word */ @@ -255,6 +256,7 @@ OBJECT_DECLARE_TYPE(PMBusDevice, PMBusDeviceClass, #define PB_HAS_TEMP3 BIT_ULL(42) #define PB_HAS_TEMP_RATING BIT_ULL(43) #define PB_HAS_MFR_INFO BIT_ULL(50) +#define PB_HAS_STATUS_MFR_SPECIFIC BIT_ULL(51) struct PMBusDeviceClass { SMBusDeviceClass parent_class; @@ -295,6 +297,7 @@ typedef struct PMBusPage { uint16_t vout_droop; /* R/W word */ uint16_t vout_scale_loop; /* R/W word */ uint16_t vout_scale_monitor; /* R/W word */ + uint16_t vout_min; /* R/W word */ uint8_t coefficients[5]; /* Read-only block 5 bytes */ uint16_t pout_max; /* R/W word */ uint16_t max_duty; /* R/W word */ From patchwork Thu Jan 6 23:09:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Titus Rwantare X-Patchwork-Id: 12705896 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 883DCC433F5 for ; Thu, 6 Jan 2022 23:21:41 +0000 (UTC) Received: from localhost ([::1]:49554 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n5c4i-0000UC-Je for qemu-devel@archiver.kernel.org; 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Thu, 06 Jan 2022 15:09:53 -0800 (PST) Date: Thu, 6 Jan 2022 23:09:33 +0000 In-Reply-To: <20220106230936.417020-1-titusr@google.com> Message-Id: <20220106230936.417020-3-titusr@google.com> Mime-Version: 1.0 References: <20220106230936.417020-1-titusr@google.com> X-Mailer: git-send-email 2.34.1.448.ga2b2bfdf31-goog Subject: [PATCH 2/5] hw/i2c: Added linear mode translation for pmbus devices From: Titus Rwantare To: f4bug@amsat.org, minyard@acm.org Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, venture@google.com, Shengtan Mao , Titus Rwantare X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::b49 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::b49; envelope-from=3wXbXYQYKCiIRGRSQPEMMEJC.AMKOCKS-BCTCJLMLELS.MPE@flex--titusr.bounces.google.com; helo=mail-yb1-xb49.google.com X-Spam_score_int: -87 X-Spam_score: -8.8 X-Spam_bar: -------- X-Spam_report: (-8.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Shengtan Mao Signed-off-by: Shengtan Mao Reviewed-by: Titus Rwantare Reviewed-by: Philippe Mathieu-Daudé --- hw/i2c/pmbus_device.c | 18 ++++++++++++++++++ include/hw/i2c/pmbus_device.h | 20 +++++++++++++++++++- 2 files changed, 37 insertions(+), 1 deletion(-) diff --git a/hw/i2c/pmbus_device.c b/hw/i2c/pmbus_device.c index 3beb02afad..1036c41c49 100644 --- a/hw/i2c/pmbus_device.c +++ b/hw/i2c/pmbus_device.c @@ -28,6 +28,24 @@ uint32_t pmbus_direct_mode2data(PMBusCoefficients c, uint16_t value) return x; } +uint16_t pmbus_data2linear_mode(uint16_t value, int exp) +{ + /* L = D * 2^(-e) */ + if (exp < 0) { + return value << (-exp); + } + return value >> exp; +} + +uint16_t pmbus_linear_mode2data(uint16_t value, int exp) +{ + /* D = L * 2^e */ + if (exp < 0) { + return value >> (-exp); + } + return value << exp; +} + void pmbus_send(PMBusDevice *pmdev, const uint8_t *data, uint16_t len) { if (pmdev->out_buf_len + len > SMBUS_DATA_MAX_LEN) { diff --git a/include/hw/i2c/pmbus_device.h b/include/hw/i2c/pmbus_device.h index 72c0483149..9a274247ab 100644 --- a/include/hw/i2c/pmbus_device.h +++ b/include/hw/i2c/pmbus_device.h @@ -446,7 +446,7 @@ typedef struct PMBusCoefficients { * * Y = (m * x - b) * 10^R * - * @return uint32_t + * @return uint16_t */ uint16_t pmbus_data2direct_mode(PMBusCoefficients c, uint32_t value); @@ -459,6 +459,24 @@ uint16_t pmbus_data2direct_mode(PMBusCoefficients c, uint32_t value); */ uint32_t pmbus_direct_mode2data(PMBusCoefficients c, uint16_t value); +/** + * Convert sensor values to linear mode format + * + * L = D * 2^(-e) + * + * @return uint16 + */ +uint16_t pmbus_data2linear_mode(uint16_t value, int exp); + +/** + * Convert linear mode formatted data into sensor reading + * + * D = L * 2^e + * + * @return uint16 + */ +uint16_t pmbus_linear_mode2data(uint16_t value, int exp); + /** * @brief Send a block of data over PMBus * Assumes that the bytes in the block are already ordered correctly, From patchwork Thu Jan 6 23:09:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Titus Rwantare X-Patchwork-Id: 12705897 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8A892C433EF for ; Thu, 6 Jan 2022 23:22:06 +0000 (UTC) Received: from localhost ([::1]:50112 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n5c55-0000zU-Ma for qemu-devel@archiver.kernel.org; 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Thu, 06 Jan 2022 15:09:54 -0800 (PST) Date: Thu, 6 Jan 2022 23:09:34 +0000 In-Reply-To: <20220106230936.417020-1-titusr@google.com> Message-Id: <20220106230936.417020-4-titusr@google.com> Mime-Version: 1.0 References: <20220106230936.417020-1-titusr@google.com> X-Mailer: git-send-email 2.34.1.448.ga2b2bfdf31-goog Subject: [PATCH 3/5] hw/sensor: add Intersil ISL69260 device model From: Titus Rwantare To: f4bug@amsat.org, minyard@acm.org Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, venture@google.com, Titus Rwantare , Hao Wu X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::74a (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::74a; envelope-from=3wnbXYQYKCiMSHSTRQFNNFKD.BNLPDLT-CDUDKMNMFMT.NQF@flex--titusr.bounces.google.com; helo=mail-qk1-x74a.google.com X-Spam_score_int: -87 X-Spam_score: -8.8 X-Spam_bar: -------- X-Spam_report: (-8.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Titus Rwantare Reviewed-by: Hao Wu --- MAINTAINERS | 3 + hw/arm/Kconfig | 1 + hw/sensor/Kconfig | 5 + hw/sensor/isl_pmbus.c | 210 +++++++++++++++++++ hw/sensor/meson.build | 1 + include/hw/sensor/isl_pmbus.h | 50 +++++ tests/qtest/isl_pmbus-test.c | 381 ++++++++++++++++++++++++++++++++++ tests/qtest/meson.build | 1 + 8 files changed, 652 insertions(+) create mode 100644 hw/sensor/isl_pmbus.c create mode 100644 include/hw/sensor/isl_pmbus.h create mode 100644 tests/qtest/isl_pmbus-test.c diff --git a/MAINTAINERS b/MAINTAINERS index 6349e3da1f..156c5812a8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3034,10 +3034,13 @@ M: Titus Rwantare S: Maintained F: hw/i2c/pmbus_device.c F: hw/sensor/adm1272.c +F: hw/sensor/isl_pmbus.c F: hw/sensor/max34451.c F: include/hw/i2c/pmbus_device.h +F: include/hw/sensor/isl_pmbus.h F: tests/qtest/adm1272-test.c F: tests/qtest/max34451-test.c +F: tests/qtest/isl_pmbus-test.c Firmware schema specifications M: Philippe Mathieu-Daudé diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index e652590943..019099df96 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -393,6 +393,7 @@ config NPCM7XX select SMBUS select AT24C # EEPROM select MAX34451 + select ISL_PMBUS select PL310 # cache controller select PMBUS select SERIAL diff --git a/hw/sensor/Kconfig b/hw/sensor/Kconfig index 9c8a049b06..f935d9cccb 100644 --- a/hw/sensor/Kconfig +++ b/hw/sensor/Kconfig @@ -21,3 +21,8 @@ config ADM1272 config MAX34451 bool depends on I2C + +config ISL_PMBUS + bool + depends on I2C + diff --git a/hw/sensor/isl_pmbus.c b/hw/sensor/isl_pmbus.c new file mode 100644 index 0000000000..8cc7220a57 --- /dev/null +++ b/hw/sensor/isl_pmbus.c @@ -0,0 +1,210 @@ +/* + * PMBus device for Renesas Digital Multiphase Voltage Regulators + * + * Copyright 2021 Google LLC + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "hw/sensor/isl_pmbus.h" +#include "hw/qdev-properties.h" +#include "qapi/visitor.h" +#include "qemu/log.h" +#include "qemu/module.h" + +static uint8_t isl_pmbus_read_byte(PMBusDevice *pmdev) +{ + qemu_log_mask(LOG_GUEST_ERROR, + "%s: reading from unsupported register: 0x%02x\n", + __func__, pmdev->code); + return 0xFF; +} + +static int isl_pmbus_write_data(PMBusDevice *pmdev, const uint8_t *buf, + uint8_t len) +{ + qemu_log_mask(LOG_GUEST_ERROR, + "%s: write to unsupported register: 0x%02x\n", + __func__, pmdev->code); + return 0xFF; +} + +/* TODO: Implement coefficients support in pmbus_device.c for qmp */ +static void isl_pmbus_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + visit_type_uint16(v, name, (uint16_t *)opaque, errp); +} + +static void isl_pmbus_set(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + PMBusDevice *pmdev = PMBUS_DEVICE(obj); + uint16_t *internal = opaque; + uint16_t value; + if (!visit_type_uint16(v, name, &value, errp)) { + return; + } + + *internal = value; + pmbus_check_limits(pmdev); +} + +static void isl_pmbus_exit_reset(Object *obj) +{ + PMBusDevice *pmdev = PMBUS_DEVICE(obj); + + pmdev->page = 0; + pmdev->capability = ISL_CAPABILITY_DEFAULT; + for (int i = 0; i < pmdev->num_pages; i++) { + pmdev->pages[i].operation = ISL_OPERATION_DEFAULT; + pmdev->pages[i].on_off_config = ISL_ON_OFF_CONFIG_DEFAULT; + pmdev->pages[i].vout_mode = ISL_VOUT_MODE_DEFAULT; + pmdev->pages[i].vout_command = ISL_VOUT_COMMAND_DEFAULT; + pmdev->pages[i].vout_max = ISL_VOUT_MAX_DEFAULT; + pmdev->pages[i].vout_margin_high = ISL_VOUT_MARGIN_HIGH_DEFAULT; + pmdev->pages[i].vout_margin_low = ISL_VOUT_MARGIN_LOW_DEFAULT; + pmdev->pages[i].vout_transition_rate = ISL_VOUT_TRANSITION_RATE_DEFAULT; + pmdev->pages[i].vout_ov_fault_limit = ISL_VOUT_OV_FAULT_LIMIT_DEFAULT; + pmdev->pages[i].ot_fault_limit = ISL_OT_FAULT_LIMIT_DEFAULT; + pmdev->pages[i].ot_warn_limit = ISL_OT_WARN_LIMIT_DEFAULT; + pmdev->pages[i].vin_ov_warn_limit = ISL_VIN_OV_WARN_LIMIT_DEFAULT; + pmdev->pages[i].vin_uv_warn_limit = ISL_VIN_UV_WARN_LIMIT_DEFAULT; + pmdev->pages[i].iin_oc_fault_limit = ISL_IIN_OC_FAULT_LIMIT_DEFAULT; + pmdev->pages[i].ton_delay = ISL_TON_DELAY_DEFAULT; + pmdev->pages[i].ton_rise = ISL_TON_RISE_DEFAULT; + pmdev->pages[i].toff_fall = ISL_TOFF_FALL_DEFAULT; + pmdev->pages[i].revision = ISL_REVISION_DEFAULT; + + pmdev->pages[i].read_vout = ISL_READ_VOUT_DEFAULT; + pmdev->pages[i].read_iout = ISL_READ_IOUT_DEFAULT; + pmdev->pages[i].read_pout = ISL_READ_POUT_DEFAULT; + pmdev->pages[i].read_vin = ISL_READ_VIN_DEFAULT; + pmdev->pages[i].read_iin = ISL_READ_IIN_DEFAULT; + pmdev->pages[i].read_pin = ISL_READ_PIN_DEFAULT; + pmdev->pages[i].read_temperature_1 = ISL_READ_TEMP_DEFAULT; + pmdev->pages[i].read_temperature_2 = ISL_READ_TEMP_DEFAULT; + pmdev->pages[i].read_temperature_3 = ISL_READ_TEMP_DEFAULT; + } +} + +static void isl_pmbus_add_props(Object *obj, uint64_t *flags, uint8_t pages) +{ + PMBusDevice *pmdev = PMBUS_DEVICE(obj); + for (int i = 0; i < pages; i++) { + if (flags[i] & PB_HAS_VIN) { + object_property_add(obj, "vin[*]", "uint16", + isl_pmbus_get, + isl_pmbus_set, + NULL, &pmdev->pages[i].read_vin); + } + + if (flags[i] & PB_HAS_VOUT) { + object_property_add(obj, "vout[*]", "uint16", + isl_pmbus_get, + isl_pmbus_set, + NULL, &pmdev->pages[i].read_vout); + } + + if (flags[i] & PB_HAS_IIN) { + object_property_add(obj, "iin[*]", "uint16", + isl_pmbus_get, + isl_pmbus_set, + NULL, &pmdev->pages[i].read_iin); + } + + if (flags[i] & PB_HAS_IOUT) { + object_property_add(obj, "iout[*]", "uint16", + isl_pmbus_get, + isl_pmbus_set, + NULL, &pmdev->pages[i].read_iout); + } + + if (flags[i] & PB_HAS_PIN) { + object_property_add(obj, "pin[*]", "uint16", + isl_pmbus_get, + isl_pmbus_set, + NULL, &pmdev->pages[i].read_pin); + } + + if (flags[i] & PB_HAS_POUT) { + object_property_add(obj, "pout[*]", "uint16", + isl_pmbus_get, + isl_pmbus_set, + NULL, &pmdev->pages[i].read_pout); + } + + if (flags[i] & PB_HAS_TEMPERATURE) { + object_property_add(obj, "temp1[*]", "uint16", + isl_pmbus_get, + isl_pmbus_set, + NULL, &pmdev->pages[i].read_temperature_1); + } + + if (flags[i] & PB_HAS_TEMP2) { + object_property_add(obj, "temp2[*]", "uint16", + isl_pmbus_get, + isl_pmbus_set, + NULL, &pmdev->pages[i].read_temperature_2); + } + + if (flags[i] & PB_HAS_TEMP3) { + object_property_add(obj, "temp3[*]", "uint16", + isl_pmbus_get, + isl_pmbus_set, + NULL, &pmdev->pages[i].read_temperature_3); + } + } +} + +static void raa22xx_init(Object *obj) +{ + PMBusDevice *pmdev = PMBUS_DEVICE(obj); + uint64_t flags[2]; + + flags[0] = PB_HAS_VIN | PB_HAS_VOUT | PB_HAS_VOUT_MODE | + PB_HAS_VOUT_RATING | PB_HAS_VOUT_MARGIN | PB_HAS_IIN | + PB_HAS_IOUT | PB_HAS_PIN | PB_HAS_POUT | PB_HAS_TEMPERATURE | + PB_HAS_TEMP2 | PB_HAS_TEMP3 | PB_HAS_STATUS_MFR_SPECIFIC; + flags[1] = PB_HAS_IIN | PB_HAS_PIN | PB_HAS_TEMPERATURE | PB_HAS_TEMP3 | + PB_HAS_VOUT | PB_HAS_VOUT_MODE | PB_HAS_VOUT_MARGIN | + PB_HAS_VOUT_RATING | PB_HAS_IOUT | PB_HAS_POUT | + PB_HAS_STATUS_MFR_SPECIFIC; + + pmbus_page_config(pmdev, 0, flags[0]); + pmbus_page_config(pmdev, 1, flags[1]); + isl_pmbus_add_props(obj, flags, 2); +} + +static void isl_pmbus_class_init(ObjectClass *klass, void *data, uint8_t pages) +{ + PMBusDeviceClass *k = PMBUS_DEVICE_CLASS(klass); + k->write_data = isl_pmbus_write_data; + k->receive_byte = isl_pmbus_read_byte; + k->device_num_pages = pages; +} + +static void isl69260_class_init(ObjectClass *klass, void *data) +{ + ResettableClass *rc = RESETTABLE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); + dc->desc = "Renesas ISL69260 Digital Multiphase Voltage Regulator"; + rc->phases.exit = isl_pmbus_exit_reset; + isl_pmbus_class_init(klass, data, 2); +} + +static const TypeInfo isl69260_info = { + .name = TYPE_ISL69260, + .parent = TYPE_PMBUS_DEVICE, + .instance_size = sizeof(ISLState), + .instance_init = raa22xx_init, + .class_init = isl69260_class_init, +}; + +static void isl_pmbus_register_types(void) +{ + type_register_static(&isl69260_info); +} + +type_init(isl_pmbus_register_types) diff --git a/hw/sensor/meson.build b/hw/sensor/meson.build index 059c4ca935..d511994d0c 100644 --- a/hw/sensor/meson.build +++ b/hw/sensor/meson.build @@ -4,3 +4,4 @@ softmmu_ss.add(when: 'CONFIG_DPS310', if_true: files('dps310.c')) softmmu_ss.add(when: 'CONFIG_EMC141X', if_true: files('emc141x.c')) softmmu_ss.add(when: 'CONFIG_ADM1272', if_true: files('adm1272.c')) softmmu_ss.add(when: 'CONFIG_MAX34451', if_true: files('max34451.c')) +softmmu_ss.add(when: 'CONFIG_ISL_PMBUS', if_true: files('isl_pmbus.c')) diff --git a/include/hw/sensor/isl_pmbus.h b/include/hw/sensor/isl_pmbus.h new file mode 100644 index 0000000000..8115aaa698 --- /dev/null +++ b/include/hw/sensor/isl_pmbus.h @@ -0,0 +1,50 @@ +/* + * PMBus device for Renesas Digital Multiphase Voltage Regulators + * + * Copyright 2022 Google LLC + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef HW_MISC_ISL_PMBUS_H +#define HW_MISC_ISL_PMBUS_H + +#include "hw/i2c/pmbus_device.h" +#include "qom/object.h" + +#define TYPE_ISL69260 "isl69260" + +struct ISLState { + PMBusDevice parent; +}; + +OBJECT_DECLARE_SIMPLE_TYPE(ISLState, ISL69260) + +#define ISL_CAPABILITY_DEFAULT 0x40 +#define ISL_OPERATION_DEFAULT 0x80 +#define ISL_ON_OFF_CONFIG_DEFAULT 0x16 +#define ISL_VOUT_MODE_DEFAULT 0x40 +#define ISL_VOUT_COMMAND_DEFAULT 0x0384 +#define ISL_VOUT_MAX_DEFAULT 0x08FC +#define ISL_VOUT_MARGIN_HIGH_DEFAULT 0x0640 +#define ISL_VOUT_MARGIN_LOW_DEFAULT 0xFA +#define ISL_VOUT_TRANSITION_RATE_DEFAULT 0x64 +#define ISL_VOUT_OV_FAULT_LIMIT_DEFAULT 0x076C +#define ISL_OT_FAULT_LIMIT_DEFAULT 0x7D +#define ISL_OT_WARN_LIMIT_DEFAULT 0x07D0 +#define ISL_VIN_OV_WARN_LIMIT_DEFAULT 0x36B0 +#define ISL_VIN_UV_WARN_LIMIT_DEFAULT 0x1F40 +#define ISL_IIN_OC_FAULT_LIMIT_DEFAULT 0x32 +#define ISL_TON_DELAY_DEFAULT 0x14 +#define ISL_TON_RISE_DEFAULT 0x01F4 +#define ISL_TOFF_FALL_DEFAULT 0x01F4 +#define ISL_REVISION_DEFAULT 0x33 +#define ISL_READ_VOUT_DEFAULT 1000 +#define ISL_READ_IOUT_DEFAULT 40 +#define ISL_READ_POUT_DEFAULT 4 +#define ISL_READ_TEMP_DEFAULT 25 +#define ISL_READ_VIN_DEFAULT 1100 +#define ISL_READ_IIN_DEFAULT 40 +#define ISL_READ_PIN_DEFAULT 4 + +#endif diff --git a/tests/qtest/isl_pmbus-test.c b/tests/qtest/isl_pmbus-test.c new file mode 100644 index 0000000000..3e956f912c --- /dev/null +++ b/tests/qtest/isl_pmbus-test.c @@ -0,0 +1,381 @@ +/* + * QTests for the ISL_PMBUS digital voltage regulators + * + * Copyright 2021 Google LLC + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ + +#include "qemu/osdep.h" +#include +#include "hw/i2c/pmbus_device.h" +#include "hw/sensor/isl_pmbus.h" +#include "libqtest-single.h" +#include "libqos/qgraph.h" +#include "libqos/i2c.h" +#include "qapi/qmp/qdict.h" +#include "qapi/qmp/qnum.h" +#include "qemu/bitops.h" + +#define TEST_ID "isl_pmbus-test" +#define TEST_ADDR (0x43) + +static uint16_t qmp_isl_pmbus_get(const char *id, const char *property) +{ + QDict *response; + uint64_t ret; + + response = qmp("{ 'execute': 'qom-get', 'arguments': { 'path': %s, " + "'property': %s } }", id, property); + g_assert(qdict_haskey(response, "return")); + ret = qnum_get_uint(qobject_to(QNum, qdict_get(response, "return"))); + qobject_unref(response); + return ret; +} + +static void qmp_isl_pmbus_set(const char *id, + const char *property, + uint16_t value) +{ + QDict *response; + + response = qmp("{ 'execute': 'qom-set', 'arguments': { 'path': %s, " + "'property': %s, 'value': %u } }", id, property, value); + g_assert(qdict_haskey(response, "return")); + qobject_unref(response); +} + +/* PMBus commands are little endian vs i2c_set16 in i2c.h which is big endian */ +static uint16_t isl_pmbus_i2c_get16(QI2CDevice *i2cdev, uint8_t reg) +{ + uint8_t resp[2]; + i2c_read_block(i2cdev, reg, resp, sizeof(resp)); + return (resp[1] << 8) | resp[0]; +} + +/* PMBus commands are little endian vs i2c_set16 in i2c.h which is big endian */ +static void isl_pmbus_i2c_set16(QI2CDevice *i2cdev, uint8_t reg, uint16_t value) +{ + uint8_t data[2]; + + data[0] = value & 255; + data[1] = value >> 8; + i2c_write_block(i2cdev, reg, data, sizeof(data)); +} + +static void test_defaults(void *obj, void *data, QGuestAllocator *alloc) +{ + uint16_t value, i2c_value; + QI2CDevice *i2cdev = (QI2CDevice *)obj; + + value = qmp_isl_pmbus_get(TEST_ID, "vout[0]"); + g_assert_cmpuint(value, ==, ISL_READ_VOUT_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_IOUT); + g_assert_cmpuint(i2c_value, ==, ISL_READ_IOUT_DEFAULT); + + value = qmp_isl_pmbus_get(TEST_ID, "pout[0]"); + g_assert_cmpuint(value, ==, ISL_READ_POUT_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_VIN); + g_assert_cmpuint(i2c_value, ==, ISL_READ_VIN_DEFAULT); + + value = qmp_isl_pmbus_get(TEST_ID, "iin[0]"); + g_assert_cmpuint(value, ==, ISL_READ_IIN_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_PIN); + g_assert_cmpuint(i2c_value, ==, ISL_READ_PIN_DEFAULT); + + value = qmp_isl_pmbus_get(TEST_ID, "temp1[0]"); + g_assert_cmpuint(value, ==, ISL_READ_TEMP_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_TEMPERATURE_2); + g_assert_cmpuint(i2c_value, ==, ISL_READ_TEMP_DEFAULT); + + i2c_value = i2c_get8(i2cdev, PMBUS_CAPABILITY); + g_assert_cmphex(i2c_value, ==, ISL_CAPABILITY_DEFAULT); + + i2c_value = i2c_get8(i2cdev, PMBUS_OPERATION); + g_assert_cmphex(i2c_value, ==, ISL_OPERATION_DEFAULT); + + i2c_value = i2c_get8(i2cdev, PMBUS_ON_OFF_CONFIG); + g_assert_cmphex(i2c_value, ==, ISL_ON_OFF_CONFIG_DEFAULT); + + i2c_value = i2c_get8(i2cdev, PMBUS_VOUT_MODE); + g_assert_cmphex(i2c_value, ==, ISL_VOUT_MODE_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_COMMAND); + g_assert_cmphex(i2c_value, ==, ISL_VOUT_COMMAND_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_MAX); + g_assert_cmphex(i2c_value, ==, ISL_VOUT_MAX_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_MARGIN_HIGH); + g_assert_cmphex(i2c_value, ==, ISL_VOUT_MARGIN_HIGH_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_MARGIN_LOW); + g_assert_cmphex(i2c_value, ==, ISL_VOUT_MARGIN_LOW_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_TRANSITION_RATE); + g_assert_cmphex(i2c_value, ==, ISL_VOUT_TRANSITION_RATE_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_OV_FAULT_LIMIT); + g_assert_cmphex(i2c_value, ==, ISL_VOUT_OV_FAULT_LIMIT_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_OT_FAULT_LIMIT); + g_assert_cmphex(i2c_value, ==, ISL_OT_FAULT_LIMIT_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_OT_WARN_LIMIT); + g_assert_cmphex(i2c_value, ==, ISL_OT_WARN_LIMIT_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VIN_OV_WARN_LIMIT); + g_assert_cmphex(i2c_value, ==, ISL_VIN_OV_WARN_LIMIT_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VIN_UV_WARN_LIMIT); + g_assert_cmphex(i2c_value, ==, ISL_VIN_UV_WARN_LIMIT_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_IIN_OC_FAULT_LIMIT); + g_assert_cmphex(i2c_value, ==, ISL_IIN_OC_FAULT_LIMIT_DEFAULT); + + i2c_value = i2c_get8(i2cdev, PMBUS_REVISION); + g_assert_cmphex(i2c_value, ==, ISL_REVISION_DEFAULT); +} + +/* test qmp access */ +static void test_tx_rx(void *obj, void *data, QGuestAllocator *alloc) +{ + uint16_t i2c_value, value; + QI2CDevice *i2cdev = (QI2CDevice *)obj; + + qmp_isl_pmbus_set(TEST_ID, "vin[0]", 200); + value = qmp_isl_pmbus_get(TEST_ID, "vin[0]"); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_VIN); + g_assert_cmpuint(value, ==, i2c_value); + + qmp_isl_pmbus_set(TEST_ID, "vout[0]", 2500); + value = qmp_isl_pmbus_get(TEST_ID, "vout[0]"); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_VOUT); + g_assert_cmpuint(value, ==, i2c_value); + + qmp_isl_pmbus_set(TEST_ID, "iin[0]", 300); + value = qmp_isl_pmbus_get(TEST_ID, "iin[0]"); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_IIN); + g_assert_cmpuint(value, ==, i2c_value); + + qmp_isl_pmbus_set(TEST_ID, "iout[0]", 310); + value = qmp_isl_pmbus_get(TEST_ID, "iout[0]"); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_IOUT); + g_assert_cmpuint(value, ==, i2c_value); + + qmp_isl_pmbus_set(TEST_ID, "pin[0]", 100); + value = qmp_isl_pmbus_get(TEST_ID, "pin[0]"); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_PIN); + g_assert_cmpuint(value, ==, i2c_value); + + qmp_isl_pmbus_set(TEST_ID, "pout[0]", 95); + value = qmp_isl_pmbus_get(TEST_ID, "pout[0]"); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_POUT); + g_assert_cmpuint(value, ==, i2c_value); + + qmp_isl_pmbus_set(TEST_ID, "temp1[0]", 26); + value = qmp_isl_pmbus_get(TEST_ID, "temp1[0]"); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_TEMPERATURE_1); + g_assert_cmpuint(value, ==, i2c_value); + + qmp_isl_pmbus_set(TEST_ID, "temp2[0]", 27); + value = qmp_isl_pmbus_get(TEST_ID, "temp2[0]"); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_TEMPERATURE_2); + g_assert_cmpuint(value, ==, i2c_value); + + qmp_isl_pmbus_set(TEST_ID, "temp3[0]", 28); + value = qmp_isl_pmbus_get(TEST_ID, "temp3[0]"); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_TEMPERATURE_3); + g_assert_cmpuint(value, ==, i2c_value); + +} + +/* test r/w registers */ +static void test_rw_regs(void *obj, void *data, QGuestAllocator *alloc) +{ + uint16_t i2c_value; + QI2CDevice *i2cdev = (QI2CDevice *)obj; + + isl_pmbus_i2c_set16(i2cdev, PMBUS_VOUT_COMMAND, 0x1234); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_COMMAND); + g_assert_cmphex(i2c_value, ==, 0x1234); + + isl_pmbus_i2c_set16(i2cdev, PMBUS_VOUT_TRIM, 0x4567); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_TRIM); + g_assert_cmphex(i2c_value, ==, 0x4567); + + isl_pmbus_i2c_set16(i2cdev, PMBUS_VOUT_MAX, 0x9876); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_MAX); + g_assert_cmphex(i2c_value, ==, 0x9876); + + isl_pmbus_i2c_set16(i2cdev, PMBUS_VOUT_MARGIN_HIGH, 0xABCD); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_MARGIN_HIGH); + g_assert_cmphex(i2c_value, ==, 0xABCD); + + isl_pmbus_i2c_set16(i2cdev, PMBUS_VOUT_MARGIN_LOW, 0xA1B2); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_MARGIN_LOW); + g_assert_cmphex(i2c_value, ==, 0xA1B2); + + isl_pmbus_i2c_set16(i2cdev, PMBUS_VOUT_TRANSITION_RATE, 0xDEF1); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_TRANSITION_RATE); + g_assert_cmphex(i2c_value, ==, 0xDEF1); + + isl_pmbus_i2c_set16(i2cdev, PMBUS_VOUT_DROOP, 0x5678); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_DROOP); + g_assert_cmphex(i2c_value, ==, 0x5678); + + isl_pmbus_i2c_set16(i2cdev, PMBUS_VOUT_MIN, 0x1234); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_MIN); + g_assert_cmphex(i2c_value, ==, 0x1234); + + isl_pmbus_i2c_set16(i2cdev, PMBUS_VOUT_OV_FAULT_LIMIT, 0x2345); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_OV_FAULT_LIMIT); + g_assert_cmphex(i2c_value, ==, 0x2345); + + isl_pmbus_i2c_set16(i2cdev, PMBUS_VOUT_UV_FAULT_LIMIT, 0xFA12); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_UV_FAULT_LIMIT); + g_assert_cmphex(i2c_value, ==, 0xFA12); + + isl_pmbus_i2c_set16(i2cdev, PMBUS_OT_FAULT_LIMIT, 0xF077); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_OT_FAULT_LIMIT); + g_assert_cmphex(i2c_value, ==, 0xF077); + + isl_pmbus_i2c_set16(i2cdev, PMBUS_OT_WARN_LIMIT, 0x7137); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_OT_WARN_LIMIT); + g_assert_cmphex(i2c_value, ==, 0x7137); + + isl_pmbus_i2c_set16(i2cdev, PMBUS_VIN_OV_FAULT_LIMIT, 0x3456); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VIN_OV_FAULT_LIMIT); + g_assert_cmphex(i2c_value, ==, 0x3456); + + isl_pmbus_i2c_set16(i2cdev, PMBUS_VIN_UV_FAULT_LIMIT, 0xBADA); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VIN_UV_FAULT_LIMIT); + g_assert_cmphex(i2c_value, ==, 0xBADA); + + isl_pmbus_i2c_set16(i2cdev, PMBUS_IIN_OC_FAULT_LIMIT, 0xB1B0); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_IIN_OC_FAULT_LIMIT); + g_assert_cmphex(i2c_value, ==, 0xB1B0); + + i2c_set8(i2cdev, PMBUS_PAGE, 2); + i2c_value = i2c_get8(i2cdev, PMBUS_PAGE); + g_assert_cmphex(i2c_value, ==, 2); + + i2c_set8(i2cdev, PMBUS_OPERATION, 0xA); + i2c_value = i2c_get8(i2cdev, PMBUS_OPERATION); + g_assert_cmphex(i2c_value, ==, 0xA); + + i2c_set8(i2cdev, PMBUS_ON_OFF_CONFIG, 0x42); + i2c_value = i2c_get8(i2cdev, PMBUS_ON_OFF_CONFIG); + g_assert_cmphex(i2c_value, ==, 0x42); +} + +/* test read-only registers */ +static void test_ro_regs(void *obj, void *data, QGuestAllocator *alloc) +{ + uint16_t i2c_init_value, i2c_value; + QI2CDevice *i2cdev = (QI2CDevice *)obj; + + i2c_init_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_VIN); + isl_pmbus_i2c_set16(i2cdev, PMBUS_READ_VIN, 0xBEEF); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_VIN); + g_assert_cmphex(i2c_init_value, ==, i2c_value); + + i2c_init_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_IIN); + isl_pmbus_i2c_set16(i2cdev, PMBUS_READ_IIN, 0xB00F); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_IIN); + g_assert_cmphex(i2c_init_value, ==, i2c_value); + + i2c_init_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_VOUT); + isl_pmbus_i2c_set16(i2cdev, PMBUS_READ_VOUT, 0x1234); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_VOUT); + g_assert_cmphex(i2c_init_value, ==, i2c_value); + + i2c_init_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_IOUT); + isl_pmbus_i2c_set16(i2cdev, PMBUS_READ_IOUT, 0x6547); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_IOUT); + g_assert_cmphex(i2c_init_value, ==, i2c_value); + + i2c_init_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_TEMPERATURE_1); + isl_pmbus_i2c_set16(i2cdev, PMBUS_READ_TEMPERATURE_1, 0x1597); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_TEMPERATURE_1); + g_assert_cmphex(i2c_init_value, ==, i2c_value); + + i2c_init_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_TEMPERATURE_2); + isl_pmbus_i2c_set16(i2cdev, PMBUS_READ_TEMPERATURE_2, 0x1897); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_TEMPERATURE_2); + g_assert_cmphex(i2c_init_value, ==, i2c_value); + + i2c_init_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_TEMPERATURE_3); + isl_pmbus_i2c_set16(i2cdev, PMBUS_READ_TEMPERATURE_3, 0x1007); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_TEMPERATURE_3); + g_assert_cmphex(i2c_init_value, ==, i2c_value); + + i2c_init_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_PIN); + isl_pmbus_i2c_set16(i2cdev, PMBUS_READ_PIN, 0xDEAD); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_PIN); + g_assert_cmphex(i2c_init_value, ==, i2c_value); + + i2c_init_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_POUT); + isl_pmbus_i2c_set16(i2cdev, PMBUS_READ_POUT, 0xD00D); + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_POUT); + g_assert_cmphex(i2c_init_value, ==, i2c_value); +} + +/* test voltage fault handling */ +static void test_voltage_faults(void *obj, void *data, QGuestAllocator *alloc) +{ + uint16_t i2c_value; + uint8_t i2c_byte; + QI2CDevice *i2cdev = (QI2CDevice *)obj; + + isl_pmbus_i2c_set16(i2cdev, PMBUS_VOUT_OV_WARN_LIMIT, 5000); + qmp_isl_pmbus_set(TEST_ID, "vout[0]", 5100); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_STATUS_WORD); + i2c_byte = i2c_get8(i2cdev, PMBUS_STATUS_VOUT); + g_assert_true((i2c_value & PB_STATUS_VOUT) != 0); + g_assert_true((i2c_byte & PB_STATUS_VOUT_OV_WARN) != 0); + + qmp_isl_pmbus_set(TEST_ID, "vout[0]", 4500); + i2c_set8(i2cdev, PMBUS_CLEAR_FAULTS, 0); + i2c_byte = i2c_get8(i2cdev, PMBUS_STATUS_VOUT); + g_assert_true((i2c_byte & PB_STATUS_VOUT_OV_WARN) == 0); + + isl_pmbus_i2c_set16(i2cdev, PMBUS_VOUT_UV_WARN_LIMIT, 4600); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_STATUS_WORD); + i2c_byte = i2c_get8(i2cdev, PMBUS_STATUS_VOUT); + g_assert_true((i2c_value & PB_STATUS_VOUT) != 0); + g_assert_true((i2c_byte & PB_STATUS_VOUT_UV_WARN) != 0); + +} + +static void isl_pmbus_register_nodes(void) +{ + QOSGraphEdgeOptions opts = { + .extra_device_opts = "id=" TEST_ID ",address=0x43" + }; + add_qi2c_address(&opts, &(QI2CAddress) { TEST_ADDR }); + + qos_node_create_driver("isl69260", i2c_device_create); + qos_node_consumes("isl69260", "i2c-bus", &opts); + + qos_add_test("test_defaults", "isl69260", test_defaults, NULL); + qos_add_test("test_tx_rx", "isl69260", test_tx_rx, NULL); + qos_add_test("test_rw_regs", "isl69260", test_rw_regs, NULL); + qos_add_test("test_ro_regs", "isl69260", test_ro_regs, NULL); + qos_add_test("test_ov_faults", "isl69260", test_voltage_faults, NULL); +} +libqos_init(isl_pmbus_register_nodes); diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index 37e1eaa449..7a580d6d9f 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -242,6 +242,7 @@ qos_test_ss.add( 'eepro100-test.c', 'es1370-test.c', 'ipoctal232-test.c', + 'isl_pmbus-test.c', 'max34451-test.c', 'megasas-test.c', 'ne2000-test.c', From patchwork Thu Jan 6 23:09:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Titus Rwantare X-Patchwork-Id: 12705900 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 97B92C433EF for ; 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Thu, 06 Jan 2022 15:09:55 -0800 (PST) Date: Thu, 6 Jan 2022 23:09:35 +0000 In-Reply-To: <20220106230936.417020-1-titusr@google.com> Message-Id: <20220106230936.417020-5-titusr@google.com> Mime-Version: 1.0 References: <20220106230936.417020-1-titusr@google.com> X-Mailer: git-send-email 2.34.1.448.ga2b2bfdf31-goog Subject: [PATCH 4/5] hw/sensor: add Renesas raa229004 PMBus device From: Titus Rwantare To: f4bug@amsat.org, minyard@acm.org Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, venture@google.com, Titus Rwantare , Hao Wu X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::b4a (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::b4a; envelope-from=3w3bXYQYKCiQTITUSRGOOGLE.COMQEMU-DEVELNONGNU.ORG@flex--titusr.bounces.google.com; helo=mail-yb1-xb4a.google.com X-Spam_score_int: -87 X-Spam_score: -8.8 X-Spam_bar: -------- X-Spam_report: (-8.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The Renesas RAA229004 is a PMBus Multiphase Voltage Regulator Signed-off-by: Titus Rwantare Reviewed-by: Hao Wu --- hw/sensor/isl_pmbus.c | 18 ++++++++++++++++++ include/hw/sensor/isl_pmbus.h | 1 + tests/qtest/isl_pmbus-test.c | 7 +++++++ 3 files changed, 26 insertions(+) diff --git a/hw/sensor/isl_pmbus.c b/hw/sensor/isl_pmbus.c index 8cc7220a57..4ff848f663 100644 --- a/hw/sensor/isl_pmbus.c +++ b/hw/sensor/isl_pmbus.c @@ -194,6 +194,15 @@ static void isl69260_class_init(ObjectClass *klass, void *data) isl_pmbus_class_init(klass, data, 2); } +static void raa229004_class_init(ObjectClass *klass, void *data) +{ + ResettableClass *rc = RESETTABLE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); + dc->desc = "Renesas 229004 Digital Multiphase Voltage Regulator"; + rc->phases.exit = isl_pmbus_exit_reset; + isl_pmbus_class_init(klass, data, 2); +} + static const TypeInfo isl69260_info = { .name = TYPE_ISL69260, .parent = TYPE_PMBUS_DEVICE, @@ -202,9 +211,18 @@ static const TypeInfo isl69260_info = { .class_init = isl69260_class_init, }; +static const TypeInfo raa229004_info = { + .name = TYPE_RAA229004, + .parent = TYPE_PMBUS_DEVICE, + .instance_size = sizeof(ISLState), + .instance_init = raa22xx_init, + .class_init = raa229004_class_init, +}; + static void isl_pmbus_register_types(void) { type_register_static(&isl69260_info); + type_register_static(&raa229004_info); } type_init(isl_pmbus_register_types) diff --git a/include/hw/sensor/isl_pmbus.h b/include/hw/sensor/isl_pmbus.h index 8115aaa698..a947fd3903 100644 --- a/include/hw/sensor/isl_pmbus.h +++ b/include/hw/sensor/isl_pmbus.h @@ -13,6 +13,7 @@ #include "qom/object.h" #define TYPE_ISL69260 "isl69260" +#define TYPE_RAA229004 "raa229004" struct ISLState { PMBusDevice parent; diff --git a/tests/qtest/isl_pmbus-test.c b/tests/qtest/isl_pmbus-test.c index 3e956f912c..5bdc247428 100644 --- a/tests/qtest/isl_pmbus-test.c +++ b/tests/qtest/isl_pmbus-test.c @@ -372,10 +372,17 @@ static void isl_pmbus_register_nodes(void) qos_node_create_driver("isl69260", i2c_device_create); qos_node_consumes("isl69260", "i2c-bus", &opts); + qos_node_create_driver("raa229004", i2c_device_create); + qos_node_consumes("raa229004", "i2c-bus", &opts); + qos_add_test("test_defaults", "isl69260", test_defaults, NULL); qos_add_test("test_tx_rx", "isl69260", test_tx_rx, NULL); qos_add_test("test_rw_regs", "isl69260", test_rw_regs, NULL); qos_add_test("test_ro_regs", "isl69260", test_ro_regs, NULL); qos_add_test("test_ov_faults", "isl69260", test_voltage_faults, NULL); + + qos_add_test("test_tx_rx", "raa229004", test_tx_rx, NULL); + qos_add_test("test_rw_regs", "raa229004", test_rw_regs, NULL); + qos_add_test("test_ov_faults", "raa229004", test_voltage_faults, NULL); } libqos_init(isl_pmbus_register_nodes); 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envelope-from=3xHbXYQYKCiUUJUVTSHPPHMF.DPNRFNV-EFWFMOPOHOV.PSH@flex--titusr.bounces.google.com; helo=mail-qv1-xf49.google.com X-Spam_score_int: -87 X-Spam_score: -8.8 X-Spam_bar: -------- X-Spam_report: (-8.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Titus Rwantare Reviewed-by: Hao Wu --- hw/sensor/isl_pmbus.c | 50 ++++++++++++++++++++++ include/hw/sensor/isl_pmbus.h | 1 + tests/qtest/isl_pmbus-test.c | 78 +++++++++++++++++++++++++++++++++-- 3 files changed, 126 insertions(+), 3 deletions(-) diff --git a/hw/sensor/isl_pmbus.c b/hw/sensor/isl_pmbus.c index 4ff848f663..e3b42b119e 100644 --- a/hw/sensor/isl_pmbus.c +++ b/hw/sensor/isl_pmbus.c @@ -89,6 +89,24 @@ static void isl_pmbus_exit_reset(Object *obj) } } +/* The raa228000 uses different direct mode coefficents from most isl devices */ +static void raa228000_exit_reset(Object *obj) +{ + isl_pmbus_exit_reset(obj); + + PMBusDevice *pmdev = PMBUS_DEVICE(obj); + + pmdev->pages[0].read_vout = 0; + pmdev->pages[0].read_iout = 0; + pmdev->pages[0].read_pout = 0; + pmdev->pages[0].read_vin = 0; + pmdev->pages[0].read_iin = 0; + pmdev->pages[0].read_pin = 0; + pmdev->pages[0].read_temperature_1 = 0; + pmdev->pages[0].read_temperature_2 = 0; + pmdev->pages[0].read_temperature_3 = 0; +} + static void isl_pmbus_add_props(Object *obj, uint64_t *flags, uint8_t pages) { PMBusDevice *pmdev = PMBUS_DEVICE(obj); @@ -177,6 +195,20 @@ static void raa22xx_init(Object *obj) isl_pmbus_add_props(obj, flags, 2); } +static void raa228000_init(Object *obj) +{ + PMBusDevice *pmdev = PMBUS_DEVICE(obj); + uint64_t flags[1]; + + flags[0] = PB_HAS_VIN | PB_HAS_VOUT | PB_HAS_VOUT_MODE | + PB_HAS_VOUT_RATING | PB_HAS_VOUT_MARGIN | PB_HAS_IIN | + PB_HAS_IOUT | PB_HAS_PIN | PB_HAS_POUT | PB_HAS_TEMPERATURE | + PB_HAS_TEMP2 | PB_HAS_TEMP3 | PB_HAS_STATUS_MFR_SPECIFIC; + + pmbus_page_config(pmdev, 0, flags[0]); + isl_pmbus_add_props(obj, flags, 1); +} + static void isl_pmbus_class_init(ObjectClass *klass, void *data, uint8_t pages) { PMBusDeviceClass *k = PMBUS_DEVICE_CLASS(klass); @@ -194,6 +226,15 @@ static void isl69260_class_init(ObjectClass *klass, void *data) isl_pmbus_class_init(klass, data, 2); } +static void raa228000_class_init(ObjectClass *klass, void *data) +{ + ResettableClass *rc = RESETTABLE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); + dc->desc = "Renesas 228000 Digital Multiphase Voltage Regulator"; + rc->phases.exit = raa228000_exit_reset; + isl_pmbus_class_init(klass, data, 1); +} + static void raa229004_class_init(ObjectClass *klass, void *data) { ResettableClass *rc = RESETTABLE_CLASS(klass); @@ -219,9 +260,18 @@ static const TypeInfo raa229004_info = { .class_init = raa229004_class_init, }; +static const TypeInfo raa228000_info = { + .name = TYPE_RAA228000, + .parent = TYPE_PMBUS_DEVICE, + .instance_size = sizeof(ISLState), + .instance_init = raa228000_init, + .class_init = raa228000_class_init, +}; + static void isl_pmbus_register_types(void) { type_register_static(&isl69260_info); + type_register_static(&raa228000_info); type_register_static(&raa229004_info); } diff --git a/include/hw/sensor/isl_pmbus.h b/include/hw/sensor/isl_pmbus.h index a947fd3903..7ead1dc4a2 100644 --- a/include/hw/sensor/isl_pmbus.h +++ b/include/hw/sensor/isl_pmbus.h @@ -13,6 +13,7 @@ #include "qom/object.h" #define TYPE_ISL69260 "isl69260" +#define TYPE_RAA228000 "raa228000" #define TYPE_RAA229004 "raa229004" struct ISLState { diff --git a/tests/qtest/isl_pmbus-test.c b/tests/qtest/isl_pmbus-test.c index 5bdc247428..3b5fb2208d 100644 --- a/tests/qtest/isl_pmbus-test.c +++ b/tests/qtest/isl_pmbus-test.c @@ -149,6 +149,70 @@ static void test_defaults(void *obj, void *data, QGuestAllocator *alloc) g_assert_cmphex(i2c_value, ==, ISL_REVISION_DEFAULT); } +static void raa228000_test_defaults(void *obj, void *data, + QGuestAllocator *alloc) +{ + uint16_t value, i2c_value; + QI2CDevice *i2cdev = (QI2CDevice *)obj; + + value = qmp_isl_pmbus_get(TEST_ID, "vout[0]"); + g_assert_cmpuint(value, ==, 0); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_READ_IOUT); + g_assert_cmpuint(i2c_value, ==, 0); + + value = qmp_isl_pmbus_get(TEST_ID, "pout[0]"); + g_assert_cmpuint(value, ==, 0); + + i2c_value = i2c_get8(i2cdev, PMBUS_CAPABILITY); + g_assert_cmphex(i2c_value, ==, ISL_CAPABILITY_DEFAULT); + + i2c_value = i2c_get8(i2cdev, PMBUS_OPERATION); + g_assert_cmphex(i2c_value, ==, ISL_OPERATION_DEFAULT); + + i2c_value = i2c_get8(i2cdev, PMBUS_ON_OFF_CONFIG); + g_assert_cmphex(i2c_value, ==, ISL_ON_OFF_CONFIG_DEFAULT); + + i2c_value = i2c_get8(i2cdev, PMBUS_VOUT_MODE); + g_assert_cmphex(i2c_value, ==, ISL_VOUT_MODE_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_COMMAND); + g_assert_cmphex(i2c_value, ==, ISL_VOUT_COMMAND_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_MAX); + g_assert_cmphex(i2c_value, ==, ISL_VOUT_MAX_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_MARGIN_HIGH); + g_assert_cmphex(i2c_value, ==, ISL_VOUT_MARGIN_HIGH_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_MARGIN_LOW); + g_assert_cmphex(i2c_value, ==, ISL_VOUT_MARGIN_LOW_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_TRANSITION_RATE); + g_assert_cmphex(i2c_value, ==, ISL_VOUT_TRANSITION_RATE_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VOUT_OV_FAULT_LIMIT); + g_assert_cmphex(i2c_value, ==, ISL_VOUT_OV_FAULT_LIMIT_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_OT_FAULT_LIMIT); + g_assert_cmphex(i2c_value, ==, ISL_OT_FAULT_LIMIT_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_OT_WARN_LIMIT); + g_assert_cmphex(i2c_value, ==, ISL_OT_WARN_LIMIT_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VIN_OV_WARN_LIMIT); + g_assert_cmphex(i2c_value, ==, ISL_VIN_OV_WARN_LIMIT_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_VIN_UV_WARN_LIMIT); + g_assert_cmphex(i2c_value, ==, ISL_VIN_UV_WARN_LIMIT_DEFAULT); + + i2c_value = isl_pmbus_i2c_get16(i2cdev, PMBUS_IIN_OC_FAULT_LIMIT); + g_assert_cmphex(i2c_value, ==, ISL_IIN_OC_FAULT_LIMIT_DEFAULT); + + i2c_value = i2c_get8(i2cdev, PMBUS_REVISION); + g_assert_cmphex(i2c_value, ==, ISL_REVISION_DEFAULT); +} + /* test qmp access */ static void test_tx_rx(void *obj, void *data, QGuestAllocator *alloc) { @@ -372,17 +436,25 @@ static void isl_pmbus_register_nodes(void) qos_node_create_driver("isl69260", i2c_device_create); qos_node_consumes("isl69260", "i2c-bus", &opts); - qos_node_create_driver("raa229004", i2c_device_create); - qos_node_consumes("raa229004", "i2c-bus", &opts); - qos_add_test("test_defaults", "isl69260", test_defaults, NULL); qos_add_test("test_tx_rx", "isl69260", test_tx_rx, NULL); qos_add_test("test_rw_regs", "isl69260", test_rw_regs, NULL); qos_add_test("test_ro_regs", "isl69260", test_ro_regs, NULL); qos_add_test("test_ov_faults", "isl69260", test_voltage_faults, NULL); + qos_node_create_driver("raa229004", i2c_device_create); + qos_node_consumes("raa229004", "i2c-bus", &opts); + qos_add_test("test_tx_rx", "raa229004", test_tx_rx, NULL); qos_add_test("test_rw_regs", "raa229004", test_rw_regs, NULL); qos_add_test("test_ov_faults", "raa229004", test_voltage_faults, NULL); + + qos_node_create_driver("raa22800", i2c_device_create); + qos_node_consumes("raa22800", "i2c-bus", &opts); + + qos_add_test("test_defaults", "raa22800", raa228000_test_defaults, NULL); + qos_add_test("test_tx_rx", "raa22800", test_tx_rx, NULL); + qos_add_test("test_rw_regs", "raa22800", test_rw_regs, NULL); + qos_add_test("test_ov_faults", "raa22800", test_voltage_faults, NULL); } libqos_init(isl_pmbus_register_nodes);