From patchwork Fri Jan 7 02:39:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: zelong dong X-Patchwork-Id: 12706114 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 805B0C433F5 for ; Fri, 7 Jan 2022 02:41:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=gEk2wMS6szr5JlaGdnvwiLPli4ChtTKRPAJmm85kuDg=; b=ZUemshl+GuOZ3K HFuZHg7LUIkX/EFfaDmavLYL7XspmCgjwr2LiIzVNbNdC8zy2l/IpaUE69AUOtMmp0VARGpM78VPJ hTnoykbTItspZ7CZtXt/vIkwq/9brd+8W1or3rTC3iRHTpJBrw5oguQmX2k7EubaDWd3D0jRfzNzw Ack9UGwXa6AWwc1Z8+UXEOKxKtRJx2nGSO3pifbEV+fcqQe8iY+mu0LjoLII+tNbh/+wGI2XECqDz WZ8ag6CKGOa8XHSSS0ru5alZhWsuYIKwxwm1XlW4S5QTekOW/vabdJei5Ta9JDftdBbZitx60hvqY H7q3F+uWn9AUUybj/eZw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n5fB2-0020r0-Ld; Fri, 07 Jan 2022 02:40:24 +0000 Received: from mail-sh.amlogic.com ([58.32.228.43]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1n5fAy-0020oo-CP; Fri, 07 Jan 2022 02:40:21 +0000 Received: from droid10-sz.amlogic.com (10.28.8.20) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2176.14; Fri, 7 Jan 2022 10:40:17 +0800 From: Zelong Dong To: , , , , CC: , , , , , Zelong Dong Subject: [PATCH 1/3] dt-bindings: reset: Add compatible for Meson-S4 Reset Controller Date: Fri, 7 Jan 2022 10:39:29 +0800 Message-ID: <20220107023931.13251-2-zelong.dong@amlogic.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220107023931.13251-1-zelong.dong@amlogic.com> References: <20220107023931.13251-1-zelong.dong@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.28.8.20] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220106_184020_453230_0CDC92C5 X-CRM114-Status: UNSURE ( 6.00 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add new compatible for Amlogic's Meson-S4 Reset Controller Signed-off-by: Zelong Dong Reviewed-by: Martin Blumenstingl Acked-by: Rob Herring --- Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml index 92922d3afd14..494a454928ce 100644 --- a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml +++ b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml @@ -17,6 +17,7 @@ properties: - amlogic,meson-gxbb-reset # Reset Controller on GXBB and compatible SoCs - amlogic,meson-axg-reset # Reset Controller on AXG and compatible SoCs - amlogic,meson-a1-reset # Reset Controller on A1 and compatible SoCs + - amlogic,meson-s4-reset # Reset Controller on S4 and compatible SoCs reg: maxItems: 1 From patchwork Fri Jan 7 02:39:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: zelong dong X-Patchwork-Id: 12706115 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 22410C433EF for ; Fri, 7 Jan 2022 02:41:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WcrCjMOJiLeIFOiJSf3GeN1ZcIztBECh4Lm13I5pNYA=; b=vxhc5TOucQaCIe ZKQqYj0O1fntLRaa2HlTWt8eR+wu9VaWdARmbUD6L5/ZItAbbB2R2wTJwwoVdwinqrD7MFL+xmpD4 MEsqYUglv936BhAsHoFdm5szqyQXv+NXDWc4Jd4Huhtc9b8lJb0x5e1jYR5+zUBAqnsSyZzMbdo1q VR+7DkGHicJh2fCLz2yL66Y2lnAV23ctjkblgCqUlHbYdrcCJdzqUqJ/GuOfXsQbfk9au0b8ymcw/ xTn0xcljtJsR5i6Y9armmS+/lP/JJeUupksMSee/gRXCdk3Nc6xuf9y7pXwgtros53bfyl1MUMZaU huTFHJE1CFt93ovM0d/A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n5fBF-0020yI-RY; Fri, 07 Jan 2022 02:40:37 +0000 Received: from mail-sh.amlogic.com ([58.32.228.43]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1n5fB0-0020oo-47; Fri, 07 Jan 2022 02:40:23 +0000 Received: from droid10-sz.amlogic.com (10.28.8.20) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2176.14; Fri, 7 Jan 2022 10:40:19 +0800 From: Zelong Dong To: , , , , CC: , , , , , Zelong Dong Subject: [PATCH 2/3] dt-bindings: reset: add bindings for the Meson-S4 SoC Reset Controller Date: Fri, 7 Jan 2022 10:39:30 +0800 Message-ID: <20220107023931.13251-3-zelong.dong@amlogic.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220107023931.13251-1-zelong.dong@amlogic.com> References: <20220107023931.13251-1-zelong.dong@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.28.8.20] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220106_184022_190475_C9F396FE X-CRM114-Status: UNSURE ( 9.27 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add DT bindings for the Meson-S4 SoC Reset Controller include file. Signed-off-by: Zelong Dong Reviewed-by: Martin Blumenstingl --- .../reset/amlogic,meson-s4-reset.h | 125 ++++++++++++++++++ 1 file changed, 125 insertions(+) create mode 100644 include/dt-bindings/reset/amlogic,meson-s4-reset.h diff --git a/include/dt-bindings/reset/amlogic,meson-s4-reset.h b/include/dt-bindings/reset/amlogic,meson-s4-reset.h new file mode 100644 index 000000000000..eab428eb8ad6 --- /dev/null +++ b/include/dt-bindings/reset/amlogic,meson-s4-reset.h @@ -0,0 +1,125 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Copyright (c) 2021 Amlogic, Inc. All rights reserved. + * Author: Zelong Dong + * + */ + +#ifndef _DT_BINDINGS_AMLOGIC_MESON_S4_RESET_H +#define _DT_BINDINGS_AMLOGIC_MESON_S4_RESET_H + +/* RESET0 */ +#define RESET_USB_DDR0 0 +#define RESET_USB_DDR1 1 +#define RESET_USB_DDR2 2 +#define RESET_USB_DDR3 3 +#define RESET_USBCTRL 4 +/* 5-7 */ +#define RESET_USBPHY20 8 +#define RESET_USBPHY21 9 +/* 10-15 */ +#define RESET_HDMITX_APB 16 +#define RESET_BRG_VCBUS_DEC 17 +#define RESET_VCBUS 18 +#define RESET_VID_PLL_DIV 19 +#define RESET_VDI6 20 +#define RESET_GE2D 21 +#define RESET_HDMITXPHY 22 +#define RESET_VID_LOCK 23 +#define RESET_VENCL 24 +#define RESET_VDAC 25 +#define RESET_VENCP 26 +#define RESET_VENCI 27 +#define RESET_RDMA 28 +#define RESET_HDMI_TX 29 +#define RESET_VIU 30 +#define RESET_VENC 31 + +/* RESET1 */ +#define RESET_AUDIO 32 +#define RESET_MALI_APB 33 +#define RESET_MALI 34 +#define RESET_DDR_APB 35 +#define RESET_DDR 36 +#define RESET_DOS_APB 37 +#define RESET_DOS 38 +/* 39-47 */ +#define RESET_ETH 48 +/* 49-51 */ +#define RESET_DEMOD 52 +/* 53-63 */ + +/* RESET2 */ +#define RESET_ABUS_ARB 64 +#define RESET_IR_CTRL 65 +#define RESET_TEMPSENSOR_DDR 66 +#define RESET_TEMPSENSOR_PLL 67 +/* 68-71 */ +#define RESET_SMART_CARD 72 +#define RESET_SPICC0 73 +/* 74 */ +#define RESET_RSA 75 +/* 76-79 */ +#define RESET_MSR_CLK 80 +#define RESET_SPIFC 81 +#define RESET_SARADC 82 +/* 83-87 */ +#define RESET_ACODEC 88 +#define RESET_CEC 89 +#define RESET_AFIFO 90 +#define RESET_WATCHDOG 91 +/* 92-95 */ + +/* RESET3 */ +/* 96-127 */ + +/* RESET4 */ +/* 128-131 */ +#define RESET_PWM_AB 132 +#define RESET_PWM_CD 133 +#define RESET_PWM_EF 134 +#define RESET_PWM_GH 135 +#define RESET_PWM_IJ 136 +/* 137 */ +#define RESET_UART_A 138 +#define RESET_UART_B 139 +#define RESET_UART_C 140 +#define RESET_UART_D 141 +#define RESET_UART_E 142 +/* 143 */ +#define RESET_I2C_S_A 144 +#define RESET_I2C_M_A 145 +#define RESET_I2C_M_B 146 +#define RESET_I2C_M_C 147 +#define RESET_I2C_M_D 148 +#define RESET_I2C_M_E 149 +/* 150-151 */ +#define RESET_SD_EMMC_A 152 +#define RESET_SD_EMMC_B 153 +#define RESET_NAND_EMMC 154 +/* 155-159 */ + +/* RESET5 */ +#define RESET_BRG_VDEC_PIPL0 160 +#define RESET_BRG_HEVCF_PIPL0 161 +/* 162 */ +#define RESET_BRG_HCODEC_PIPL0 163 +#define RESET_BRG_GE2D_PIPL0 164 +#define RESET_BRG_VPU_PIPL0 165 +#define RESET_BRG_CPU_PIPL0 166 +#define RESET_BRG_MALI_PIPL0 167 +/* 168 */ +#define RESET_BRG_MALI_PIPL1 169 +/* 170-171 */ +#define RESET_BRG_HEVCF_PIPL1 172 +#define RESET_BRG_HEVCB_PIPL1 173 +/* 174-183 */ +#define RESET_RAMA 184 +/* 185-186 */ +#define RESET_BRG_NIC_VAPB 187 +#define RESET_BRG_NIC_DSU 188 +#define RESET_BRG_NIC_SYSCLK 189 +#define RESET_BRG_NIC_MAIN 190 +#define RESET_BRG_NIC_ALL 191 + +#endif From patchwork Fri Jan 7 02:39:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: zelong dong X-Patchwork-Id: 12706116 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0B97EC433EF for ; Fri, 7 Jan 2022 02:42:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=3l6UN/IIvI+JOm8VeSSF/2ZRpbzk3DgR5OY+fRUGfAw=; b=uMOu0OwXwEQqzx VOyAZfN6GQ1L7YFFXLHjuueoDcxnzKFCLiu9tEKozj35M4zyJnCe5UprgwD0QCxWZk9WeSjYFr0EL VIQXdjKDpMdjkIgqUac0UySi3cdW2ba9F5hLrDNdUG2TTSncEiG9Omj6ZM1ueDIpR5M5bpjvRde65 Ur4nOHz0wAiNQn6dDkrVfYhmUwpNvOj2iDG4SvKQIjqqy+cH6peMnmkaO7Zk1/b5hNvUewxOvu3aS teuscJqspxXilS/pRieOjGQ3n+zyGh3hkJQpSLY21RmRra/azeFaRbgVGao3o2oJrlUgCfd0ZVTAj iLtndZ7kayQvSKCuURuw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n5fBa-0021AP-Cs; Fri, 07 Jan 2022 02:40:58 +0000 Received: from mail-sh.amlogic.com ([58.32.228.43]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1n5fB2-0020oo-0l; Fri, 07 Jan 2022 02:40:25 +0000 Received: from droid10-sz.amlogic.com (10.28.8.20) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2176.14; Fri, 7 Jan 2022 10:40:20 +0800 From: Zelong Dong To: , , , , CC: , , , , , Zelong Dong Subject: [PATCH 3/3] reset: reset-meson: add support for the Meson-S4 SoC Reset Controller Date: Fri, 7 Jan 2022 10:39:31 +0800 Message-ID: <20220107023931.13251-4-zelong.dong@amlogic.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220107023931.13251-1-zelong.dong@amlogic.com> References: <20220107023931.13251-1-zelong.dong@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.28.8.20] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220106_184024_103647_ADAF704A X-CRM114-Status: UNSURE ( 8.38 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Compared to the A1 SoCs the number of RESET registers is different and the offset for the level registers is the same. Add a new compatible string and struct meson_reset_param to add support for the reset controller on the S4 SoC. Signed-off-by: Zelong Dong Reviewed-by: Martin Blumenstingl --- drivers/reset/reset-meson.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c index c9bc325ad65a..26dc54778615 100644 --- a/drivers/reset/reset-meson.c +++ b/drivers/reset/reset-meson.c @@ -98,11 +98,17 @@ static const struct meson_reset_param meson_a1_param = { .level_offset = 0x40, }; +static const struct meson_reset_param meson_s4_param = { + .reg_count = 6, + .level_offset = 0x40, +}; + static const struct of_device_id meson_reset_dt_ids[] = { { .compatible = "amlogic,meson8b-reset", .data = &meson8b_param}, { .compatible = "amlogic,meson-gxbb-reset", .data = &meson8b_param}, { .compatible = "amlogic,meson-axg-reset", .data = &meson8b_param}, { .compatible = "amlogic,meson-a1-reset", .data = &meson_a1_param}, + { .compatible = "amlogic,meson-s4-reset", .data = &meson_s4_param}, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, meson_reset_dt_ids);