From patchwork Thu Jan 13 23:51:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 12713196 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EFB23C433F5 for ; Thu, 13 Jan 2022 23:51:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2727810E809; Thu, 13 Jan 2022 23:51:21 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id C5F8710E80B; Thu, 13 Jan 2022 23:51:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642117879; x=1673653879; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EGUqvwufRLocPQ6vvRULh0hIPrGzzPCgxxW3imVHCDQ=; b=bbluj53H6dI9HVzjABISoQ9RKU3VFAT6HabVFotR9Ju9Mi3Kh+jp55aJ tBh0wqb9lajbMIG9CPOA7q/xfQKZYRq2EEHB0P6GAQ+qYEjaKIjlHCRmZ gNfcROKRHfoLE729NvKfvcnOvyx+QhOAKvyWl5QhgPF+fOBk4dbkfcZcr Fe2VC9I9OdgKUbxRJDvQPprW9rM4rxVaajbZEiH6eqahg/RGuBkjyxj46 3BBBgXt4aA4l717Dr50z/6Af2WvsN2/lNLLPgui8Qp3O+0tXGtMyav2g7 qB90tKNvYcfYAE3E23F5rl+JBjJcTYTyy3KaRsu6LDhqCowvxgxv81mzM g==; X-IronPort-AV: E=McAfee;i="6200,9189,10226"; a="244096534" X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="244096534" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 15:51:19 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="620782979" Received: from relo-linux-5.jf.intel.com ([10.165.21.134]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2022 15:51:18 -0800 From: John.C.Harrison@Intel.com To: IGT-Dev@Lists.FreeDesktop.Org Date: Thu, 13 Jan 2022 15:51:04 -0800 Message-Id: <20220113235118.1575410-2-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113235118.1575410-1-John.C.Harrison@Intel.com> References: <20220113235118.1575410-1-John.C.Harrison@Intel.com> MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v4 i-g-t 01/15] tests/i915/i915_hangman: Add descriptions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison Added descriptions of the various sub-tests and the test as a whole. v2: Added missing linefeed (spotted by Petri) Signed-off-by: John Harrison Reviewed-by: Petri Latvala --- tests/i915/i915_hangman.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c index 4c18c22db..b9c4d9983 100644 --- a/tests/i915/i915_hangman.c +++ b/tests/i915/i915_hangman.c @@ -46,6 +46,8 @@ static int device = -1; static int sysfs = -1; +IGT_TEST_DESCRIPTION("Tests for hang detection and recovery"); + static bool has_error_state(int dir) { bool result; @@ -315,9 +317,9 @@ static void hangcheck_unterminated(void) gem_execbuf(device, &execbuf); if (gem_wait(device, handle, &timeout_ns) != 0) { - /* need to manually trigger an hang to clean before failing */ + /* need to manually trigger a hang to clean before failing */ igt_force_gpu_reset(device); - igt_assert_f(0, "unterminated batch did not trigger an hang!"); + igt_assert_f(0, "unterminated batch did not trigger a hang!\n"); } } @@ -341,9 +343,11 @@ igt_main igt_require(has_error_state(sysfs)); } + igt_describe("Basic error capture"); igt_subtest("error-state-basic") test_error_state_basic(); + igt_describe("Per engine error capture"); igt_subtest_with_dynamic("error-state-capture") { for_each_ctx_engine(device, ctx, e) { igt_dynamic_f("%s", e->name) @@ -351,6 +355,7 @@ igt_main } } + igt_describe("Per engine hang recovery (spin)"); igt_subtest_with_dynamic("engine-hang") { int has_gpu_reset = 0; struct drm_i915_getparam gp = { @@ -369,6 +374,7 @@ igt_main } } + igt_describe("Per engine hang recovery (invalid CS)"); igt_subtest_with_dynamic("engine-error") { int has_gpu_reset = 0; struct drm_i915_getparam gp = { @@ -386,6 +392,7 @@ igt_main } } + igt_describe("Check that executing unintialised memory causes a hang"); igt_subtest("hangcheck-unterminated") hangcheck_unterminated(); From patchwork Thu Jan 13 23:51:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 12713199 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9C833C433EF for ; Thu, 13 Jan 2022 23:51:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9816F10E820; Thu, 13 Jan 2022 23:51:23 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1C7DA10E809; Thu, 13 Jan 2022 23:51:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642117880; x=1673653880; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=G9R7shW2zOAQmMJG+3XJqH2JXS+FN7zd0eIZMDSECBI=; b=lNTOFJn6AVWxNdKRFHJKCqSjtQL6jiJjvMudLKQkseMWSt/hcCAeERKo BxDE3sb7F3dpGRsBAQEsLHGIpE5B3UsuooGNgnBIpt+BnnqPj4NhLz0bw Be1qAWF5aNopcqsj7nEEdG/5+Ifhkbxi7EPh9rkGU1gK0jjY/anLU82Rt EqNjTa7mfBQJjop7/Q3x49iJGVhqOgI0ITNVF6TB4VgvsdQQZbkN4hCli VkWa39U5ZQo/23TkhdjEtWX2HZukh/1zKiQaJG7oS5dr9Ui9/hCA5e6iP UX5MG3BVRscy05RTC4DMjCwGiU6hqul2RRnTrXS/NVMd8tYq4sJliffzr w==; X-IronPort-AV: E=McAfee;i="6200,9189,10226"; a="244096536" X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="244096536" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 15:51:19 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="620782983" Received: from relo-linux-5.jf.intel.com ([10.165.21.134]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2022 15:51:18 -0800 From: John.C.Harrison@Intel.com To: IGT-Dev@Lists.FreeDesktop.Org Date: Thu, 13 Jan 2022 15:51:05 -0800 Message-Id: <20220113235118.1575410-3-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113235118.1575410-1-John.C.Harrison@Intel.com> References: <20220113235118.1575410-1-John.C.Harrison@Intel.com> MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v4 i-g-t 02/15] lib/hang: Fix igt_require_hang_ring to work with all engines X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison The above function was checking for valid rings via the old interface. The new scheme is to check for engines on contexts as there are now more engines than could be supported. Signed-off-by: John Harrison Reviewed-by: Matthew Brost --- lib/igt_gt.c | 6 +++--- lib/igt_gt.h | 2 +- tests/i915/i915_hangman.c | 6 +++--- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/lib/igt_gt.c b/lib/igt_gt.c index 7c7df95ee..50da512f2 100644 --- a/lib/igt_gt.c +++ b/lib/igt_gt.c @@ -122,12 +122,12 @@ static void eat_error_state(int dev) * to be done under hang injection. * Default: false */ -void igt_require_hang_ring(int fd, int ring) +void igt_require_hang_ring(int fd, uint32_t ctx, int ring) { if (!igt_check_boolean_env_var("IGT_HANG", true)) igt_skip("hang injection disabled by user [IGT_HANG=0]\n"); - gem_require_ring(fd, ring); + igt_require(gem_context_has_engine(fd, ctx, ring)); gem_context_require_bannable(fd); if (!igt_check_boolean_env_var("IGT_HANG_WITHOUT_RESET", false)) igt_require(has_gpu_reset(fd)); @@ -290,7 +290,7 @@ static igt_hang_t __igt_hang_ctx(int fd, uint64_t ahnd, uint32_t ctx, int ring, igt_spin_t *spin; unsigned ban; - igt_require_hang_ring(fd, ring); + igt_require_hang_ring(fd, ctx, ring); /* check if non-default ctx submission is allowed */ igt_require(ctx == 0 || has_ctx_exec(fd, ring, ctx)); diff --git a/lib/igt_gt.h b/lib/igt_gt.h index c5059817b..3d10349e4 100644 --- a/lib/igt_gt.h +++ b/lib/igt_gt.h @@ -31,7 +31,7 @@ #include "i915/i915_drm_local.h" #include "i915_drm.h" -void igt_require_hang_ring(int fd, int ring); +void igt_require_hang_ring(int fd, uint32_t ctx, int ring); typedef struct igt_hang { igt_spin_t *spin; diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c index b9c4d9983..f64b8819d 100644 --- a/tests/i915/i915_hangman.c +++ b/tests/i915/i915_hangman.c @@ -295,7 +295,7 @@ test_engine_hang(const intel_ctx_t *ctx, * case and it takes a lot more time to wrap, so the acthd can potentially keep * increasing for a long time */ -static void hangcheck_unterminated(void) +static void hangcheck_unterminated(const intel_ctx_t *ctx) { /* timeout needs to be greater than ~5*hangcheck */ int64_t timeout_ns = 100ull * NSEC_PER_SEC; /* 100 seconds */ @@ -304,7 +304,7 @@ static void hangcheck_unterminated(void) uint32_t handle; igt_require(gem_uses_full_ppgtt(device)); - igt_require_hang_ring(device, 0); + igt_require_hang_ring(device, ctx->id, 0); handle = gem_create(device, 4096); @@ -394,7 +394,7 @@ igt_main igt_describe("Check that executing unintialised memory causes a hang"); igt_subtest("hangcheck-unterminated") - hangcheck_unterminated(); + hangcheck_unterminated(ctx); igt_fixture { igt_disallow_hang(device, hang); From patchwork Thu Jan 13 23:51:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 12713202 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 90E2FC433F5 for ; Thu, 13 Jan 2022 23:51:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7071A10E80F; Thu, 13 Jan 2022 23:51:24 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 64E8B10E80B; Thu, 13 Jan 2022 23:51:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642117880; x=1673653880; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=m2ZB1MXjbnOYZdt8lH/W81hG0UBJBW6IS/bET58+qxc=; b=dylISRcS2cS5/ZSOdQjQm3YMaKYFX6B9e/OJPmBv4Qw9EUTOfny+GIl2 7fNk7BvzoP4oHJBCOPHsq9bhuKaV35IZ9eWhargULwij5Y+tCNThLSoKq QHv8jvk8y4XDMTd+b+G487zsOVRse5rSbSFCiXt1mM2nABqecWvYRxc+T r532FL1JqD0oFX9xkBHCD5g5JjCAGHT0k4iiyP4pzvNMBu8JPLaxXnqyW +vGRCPlRK/Fwo8tqHcTx/AzH5gTcYMnQVSfGWr5+lVV51YEWNdUGa/CHd +B8aSNpOpkjRC1PCjfAYxp4CXVjBdcXBnXrTOcVYrPQlfL32sLSsILYMj A==; X-IronPort-AV: E=McAfee;i="6200,9189,10226"; a="244096538" X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="244096538" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 15:51:19 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="620782986" Received: from relo-linux-5.jf.intel.com ([10.165.21.134]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2022 15:51:19 -0800 From: John.C.Harrison@Intel.com To: IGT-Dev@Lists.FreeDesktop.Org Date: Thu, 13 Jan 2022 15:51:06 -0800 Message-Id: <20220113235118.1575410-4-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113235118.1575410-1-John.C.Harrison@Intel.com> References: <20220113235118.1575410-1-John.C.Harrison@Intel.com> MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v4 i-g-t 03/15] tests/i915/i915_hangman: Update capture test to use engine structure X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison The capture test was still using old style ring_id and ring_name (derived from the engine structure at the higher level). Update it to just take the engine structure directly. Signed-off-by: John Harrison Reviewed-by: Matthew Brost --- tests/i915/i915_hangman.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c index f64b8819d..280eac197 100644 --- a/tests/i915/i915_hangman.c +++ b/tests/i915/i915_hangman.c @@ -207,8 +207,8 @@ static void check_error_state(const char *expected_ring_name, igt_assert(found); } -static void test_error_state_capture(const intel_ctx_t *ctx, unsigned ring_id, - const char *ring_name) +static void test_error_state_capture(const intel_ctx_t *ctx, + const struct intel_execution_engine2 *e) { uint32_t *batch; igt_hang_t hang; @@ -217,7 +217,7 @@ static void test_error_state_capture(const intel_ctx_t *ctx, unsigned ring_id, clear_error_state(); - hang = igt_hang_ctx_with_ahnd(device, ahnd, ctx->id, ring_id, + hang = igt_hang_ctx_with_ahnd(device, ahnd, ctx->id, e->flags, HANG_ALLOW_CAPTURE); offset = hang.spin->obj[IGT_SPIN_BATCH].offset; @@ -226,7 +226,7 @@ static void test_error_state_capture(const intel_ctx_t *ctx, unsigned ring_id, igt_post_hang_ring(device, hang); - check_error_state(ring_name, offset, batch); + check_error_state(e->name, offset, batch); munmap(batch, 4096); put_ahnd(ahnd); } @@ -351,7 +351,7 @@ igt_main igt_subtest_with_dynamic("error-state-capture") { for_each_ctx_engine(device, ctx, e) { igt_dynamic_f("%s", e->name) - test_error_state_capture(ctx, e->flags, e->name); + test_error_state_capture(ctx, e); } } From patchwork Thu Jan 13 23:51:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 12713207 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A21F5C433EF for ; Thu, 13 Jan 2022 23:51:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 960E810E830; Thu, 13 Jan 2022 23:51:24 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id B165110E80D; Thu, 13 Jan 2022 23:51:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642117881; x=1673653881; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=K3jPJpQTeic6zp56inDr1MNH8duJnRRchk+iNPrI0VA=; b=FbXr9TG3Hwi+MA/3aqwllUdwZfR9niQTfMP8WIfAGYUIKpslYBRVBPs8 gsIVcSAq+r8ec5DDyakilizSx0Pw8Qfc5/L2Mfffj1fX/b//WE4cdLqau onAEjpmqRp2W2TSEFjY5kMjJiWgO0F+uisw+EDFknLYnQNU0+ANmU/vhB IeL0kDO+lu8KqjCI0/pffrqRt673srPUns5bH1aklUJyEMteYVz/URmUj +m8CQTCBvCD9IXoia0k7ART9tYO8oTTDDS/NbiAYrs4LfIljDHeDCC3bx WbQeUuXI0E+C0CwZP5OUEEdC5j/qjMI8dMVn1HYFJllVqwvYn4XXCGWqf Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10226"; a="244096540" X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="244096540" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 15:51:19 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="620782992" Received: from relo-linux-5.jf.intel.com ([10.165.21.134]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2022 15:51:19 -0800 From: John.C.Harrison@Intel.com To: IGT-Dev@Lists.FreeDesktop.Org Date: Thu, 13 Jan 2022 15:51:07 -0800 Message-Id: <20220113235118.1575410-5-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113235118.1575410-1-John.C.Harrison@Intel.com> References: <20220113235118.1575410-1-John.C.Harrison@Intel.com> MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v4 i-g-t 04/15] tests/i915/i915_hangman: Explicitly test per engine reset vs full GPU reset X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison Although the hangman test was ensuring that *some* reset functionality was enabled, it did not differentiate what kind. The infrastructure required to choose between per engine reset or full GT reset was recently added. So update this test to use it as well. Signed-off-by: John Harrison Reviewed-by: Matthew Brost --- tests/i915/i915_hangman.c | 76 +++++++++++++++++++++++++-------------- 1 file changed, 49 insertions(+), 27 deletions(-) diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c index 280eac197..7b8390a6c 100644 --- a/tests/i915/i915_hangman.c +++ b/tests/i915/i915_hangman.c @@ -323,40 +323,26 @@ static void hangcheck_unterminated(const intel_ctx_t *ctx) } } -igt_main +static void do_tests(const char *name, const char *prefix, + const intel_ctx_t *ctx) { const struct intel_execution_engine2 *e; - const intel_ctx_t *ctx; - igt_hang_t hang = {}; - - igt_fixture { - device = drm_open_driver(DRIVER_INTEL); - igt_require_gem(device); - - ctx = intel_ctx_create_all_physical(device); - - hang = igt_allow_hang(device, ctx->id, HANG_ALLOW_CAPTURE); - - sysfs = igt_sysfs_open(device); - igt_assert(sysfs != -1); - - igt_require(has_error_state(sysfs)); - } + char buff[256]; - igt_describe("Basic error capture"); - igt_subtest("error-state-basic") - test_error_state_basic(); - - igt_describe("Per engine error capture"); - igt_subtest_with_dynamic("error-state-capture") { + snprintf(buff, sizeof(buff), "Per engine error capture (%s reset)", name); + igt_describe(buff); + snprintf(buff, sizeof(buff), "%s-error-state-capture", prefix); + igt_subtest_with_dynamic(buff) { for_each_ctx_engine(device, ctx, e) { igt_dynamic_f("%s", e->name) test_error_state_capture(ctx, e); } } - igt_describe("Per engine hang recovery (spin)"); - igt_subtest_with_dynamic("engine-hang") { + snprintf(buff, sizeof(buff), "Per engine hang recovery (spin, %s reset)", name); + igt_describe(buff); + snprintf(buff, sizeof(buff), "%s-engine-hang", prefix); + igt_subtest_with_dynamic(buff) { int has_gpu_reset = 0; struct drm_i915_getparam gp = { .param = I915_PARAM_HAS_GPU_RESET, @@ -374,8 +360,10 @@ igt_main } } - igt_describe("Per engine hang recovery (invalid CS)"); - igt_subtest_with_dynamic("engine-error") { + snprintf(buff, sizeof(buff), "Per engine hang recovery (invalid CS, %s reset)", name); + igt_describe(buff); + snprintf(buff, sizeof(buff), "%s-engine-error", prefix); + igt_subtest_with_dynamic(buff) { int has_gpu_reset = 0; struct drm_i915_getparam gp = { .param = I915_PARAM_HAS_GPU_RESET, @@ -391,11 +379,45 @@ igt_main test_engine_hang(ctx, e, IGT_SPIN_INVALID_CS); } } +} + +igt_main +{ + const intel_ctx_t *ctx; + igt_hang_t hang = {}; + + igt_fixture { + device = drm_open_driver(DRIVER_INTEL); + igt_require_gem(device); + + ctx = intel_ctx_create_all_physical(device); + + hang = igt_allow_hang(device, ctx->id, HANG_ALLOW_CAPTURE); + + sysfs = igt_sysfs_open(device); + igt_assert(sysfs != -1); + + igt_require(has_error_state(sysfs)); + } + + igt_describe("Basic error capture"); + igt_subtest("error-state-basic") + test_error_state_basic(); igt_describe("Check that executing unintialised memory causes a hang"); igt_subtest("hangcheck-unterminated") hangcheck_unterminated(ctx); + do_tests("GT", "gt", ctx); + + igt_fixture { + igt_disallow_hang(device, hang); + + hang = igt_allow_hang(device, ctx->id, HANG_ALLOW_CAPTURE | HANG_WANT_ENGINE_RESET); + } + + do_tests("engine", "engine", ctx); + igt_fixture { igt_disallow_hang(device, hang); intel_ctx_destroy(device, ctx); From patchwork Thu Jan 13 23:51:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 12713198 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4B2BBC433FE for ; Thu, 13 Jan 2022 23:51:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8A50B10E819; Thu, 13 Jan 2022 23:51:23 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 959BA10E809; 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d="scan'208";a="620782997" Received: from relo-linux-5.jf.intel.com ([10.165.21.134]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2022 15:51:19 -0800 From: John.C.Harrison@Intel.com To: IGT-Dev@Lists.FreeDesktop.Org Date: Thu, 13 Jan 2022 15:51:08 -0800 Message-Id: <20220113235118.1575410-6-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113235118.1575410-1-John.C.Harrison@Intel.com> References: <20220113235118.1575410-1-John.C.Harrison@Intel.com> MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v4 i-g-t 05/15] tests/i915/i915_hangman: Add uevent test & fix detector X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison Some of the IGT framework relies on receving a uevent when a hang occurs. So add a test that this actually works. While testing this, noticed that hangs could sometimes be missed because the uevent was (presumably) still in flight by the time the handler was de-registered. So add an extra delay during cleanup to give the uevent chance to arrive. Signed-off-by: John Harrison Reviewed-by: Matthew Brost --- lib/igt_aux.c | 7 +++++++ tests/i915/i915_hangman.c | 43 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 50 insertions(+) diff --git a/lib/igt_aux.c b/lib/igt_aux.c index c247a1aa4..03cc38c93 100644 --- a/lib/igt_aux.c +++ b/lib/igt_aux.c @@ -523,6 +523,13 @@ void igt_fork_hang_detector(int fd) void igt_stop_hang_detector(void) { + /* + * Give the uevent time to arrive. No sleep at all misses about 20% of + * hangs (at least, in the i915_hangman/detector test). A sleep of 1ms + * seems to miss about 2%, 10ms loses <1%, so 100ms should be safe. + */ + usleep(100 * 1000); + igt_stop_helper(&hang_detector); } diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c index 7b8390a6c..354769f39 100644 --- a/tests/i915/i915_hangman.c +++ b/tests/i915/i915_hangman.c @@ -31,6 +31,7 @@ #include #include #include +#include #include "i915/gem.h" #include "i915/gem_create.h" @@ -289,6 +290,38 @@ test_engine_hang(const intel_ctx_t *ctx, put_ahnd(ahnd); } +static int hang_count; + +static void sig_io(int sig) +{ + hang_count++; +} + +static void test_hang_detector(const intel_ctx_t *ctx, + const struct intel_execution_engine2 *e) +{ + igt_hang_t hang; + uint64_t ahnd = get_reloc_ahnd(device, ctx->id); + + hang_count = 0; + + igt_fork_hang_detector(device); + + /* Steal the signal handler */ + signal(SIGIO, sig_io); + + /* Make a hang... */ + hang = igt_hang_ctx_with_ahnd(device, ahnd, ctx->id, e->flags, 0); + + igt_post_hang_ring(device, hang); + put_ahnd(ahnd); + + igt_stop_hang_detector(); + + /* Did it work? */ + igt_assert(hang_count == 1); +} + /* This test covers the case where we end up in an uninitialised area of the * ppgtt and keep executing through it. This is particularly relevant if 48b * ppgtt is enabled because the ppgtt is massively bigger compared to the 32b @@ -408,6 +441,16 @@ igt_main igt_subtest("hangcheck-unterminated") hangcheck_unterminated(ctx); + igt_describe("Check that hang detector works"); + igt_subtest_with_dynamic("detector") { + const struct intel_execution_engine2 *e; + + for_each_ctx_engine(device, ctx, e) { + igt_dynamic_f("%s", e->name) + test_hang_detector(ctx, e); + } + } + do_tests("GT", "gt", ctx); igt_fixture { From patchwork Thu Jan 13 23:51:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 12713201 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AF2BEC433FE for ; Thu, 13 Jan 2022 23:51:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AFDC510E834; Thu, 13 Jan 2022 23:51:24 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4636910E81E; Thu, 13 Jan 2022 23:51:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642117881; x=1673653881; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OhEJyJXf2Vl7qR7dFgQg9nWj0g2brWMGkOkahhusPKA=; b=L969wQwONYtWuHPxSGuUO4wNepOvz1RgrSUDXaFubFLp4yBedTVIAUgR rQorDDlcuJ9MQK9R9Xed5nlF1mz9UYRIMfFVEcv+ckgSEzO+j2YZOmQPs erNe84/YGw1a71+rQwFUxG5FinwtfPJK0+Nm6wtG4RQC0VFt+9OokmrRx UqXv0xxoCfaoEjBk/hryUXiRcObBO3qN6Ut4QY4oX9aBUL+0/zldnOAEw PHHA4XQ9vrqMpgxowlhjmhw3eYBw9FUdsbiTbk8qqaSZZpEObzrz2VA63 1FgW0njeLS0tqYEBgVpQizGe9/e7l5AISddIOsb7XH19agUi5qGduaAhV w==; X-IronPort-AV: E=McAfee;i="6200,9189,10226"; a="244096544" X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="244096544" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 15:51:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="620783001" Received: from relo-linux-5.jf.intel.com ([10.165.21.134]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2022 15:51:19 -0800 From: John.C.Harrison@Intel.com To: IGT-Dev@Lists.FreeDesktop.Org Date: Thu, 13 Jan 2022 15:51:09 -0800 Message-Id: <20220113235118.1575410-7-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113235118.1575410-1-John.C.Harrison@Intel.com> References: <20220113235118.1575410-1-John.C.Harrison@Intel.com> MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v4 i-g-t 06/15] tests/i915/i915_hangman: Use the correct context in hangcheck_unterminated X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison The hangman framework sets up a context that is valid for all engines and has things like banning disabled. The 'unterminated' test then ignores it and uses the default context. Fix that. Signed-off-by: John Harrison Reviewed-by: Matthew Brost --- tests/i915/i915_hangman.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c index 354769f39..6656b3fcd 100644 --- a/tests/i915/i915_hangman.c +++ b/tests/i915/i915_hangman.c @@ -347,6 +347,7 @@ static void hangcheck_unterminated(const intel_ctx_t *ctx) memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)&gem_exec; execbuf.buffer_count = 1; + execbuf.rsvd1 = ctx->id; gem_execbuf(device, &execbuf); if (gem_wait(device, handle, &timeout_ns) != 0) { From patchwork Thu Jan 13 23:51:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 12713197 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 762F6C433EF for ; Thu, 13 Jan 2022 23:51:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3428610E832; Thu, 13 Jan 2022 23:51:23 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id CDC2910E80F; Thu, 13 Jan 2022 23:51:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642117880; x=1673653880; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1WEs6r6HDgbA+0KGkja1OnEfKMBnE2yrbDiWkHfI0jQ=; b=K/ayYDMvobTbQxaHByCnUg+eFlSVJXkBGv4lvMh16n3DL9TPwn19quyL RoQOEJvcKEEmVX7VlbyGPc/v5Qwf4xQibGymiw40PQ66NYUhkKp46mdOK OMk6coNsqSmF2UpQsDPJ4Q8Q/64mtSmIWyZyWIvHMTeP4GoY5Q5ZQvfRx 3W5H8S43fJLwmWDNFFM1Sy4DRN2/RiGXalpxWeNdgwe80PLMTvYEE7PVA ivLQnDgFzxrlvMTUWCnww4JnxSJFFozWycJtoDXfj63Lh+IEKBu71jw1s TpyYnbiwHknaaHwZ8FOmVs/6cdpqLHkcRYALwoIan/BSvwiQy3Jx1ns84 Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10226"; a="268502288" X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="268502288" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 15:51:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="620783010" Received: from relo-linux-5.jf.intel.com ([10.165.21.134]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2022 15:51:19 -0800 From: John.C.Harrison@Intel.com To: IGT-Dev@Lists.FreeDesktop.Org Date: Thu, 13 Jan 2022 15:51:10 -0800 Message-Id: <20220113235118.1575410-8-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113235118.1575410-1-John.C.Harrison@Intel.com> References: <20220113235118.1575410-1-John.C.Harrison@Intel.com> MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v4 i-g-t 07/15] lib/store: Refactor common store code into helper function X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison A lot of tests use almost identical code for creating a batch buffer which does a single write to memory and another is about to be added. Instead, move the most generic version into a common helper function. Unfortunately, the other instances are all subtly different enough to make it not so trivial to try to use the helper. It could be done but it is unclear if it is worth the effort at this point. This patch proves the concept, if people like it enough then it can be extended. v2: Fix up object address vs store offset confusion (with help from Zbigniew K). v3: Cope with >32bit store_offset (review feedback from Matthew Brost). Signed-off-by: John Harrison Reviewed-by: Matthew Brost --- lib/igt_store.c | 100 ++++++++++++++++++++++++++++++++++++ lib/igt_store.h | 12 +++++ lib/meson.build | 1 + tests/i915/gem_exec_fence.c | 77 ++------------------------- tests/i915/i915_hangman.c | 1 + 5 files changed, 119 insertions(+), 72 deletions(-) create mode 100644 lib/igt_store.c create mode 100644 lib/igt_store.h diff --git a/lib/igt_store.c b/lib/igt_store.c new file mode 100644 index 000000000..98c6c4fbd --- /dev/null +++ b/lib/igt_store.c @@ -0,0 +1,100 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2021 Intel Corporation + */ + +#include "i915/gem_create.h" +#include "igt_core.h" +#include "drmtest.h" +#include "igt_store.h" +#include "intel_chipset.h" +#include "intel_reg.h" +#include "ioctl_wrappers.h" +#include "lib/intel_allocator.h" + +/** + * SECTION:igt_store_word + * @short_description: Library for writing a value to memory + * @title: StoreWord + * @include: igt.h + * + * A lot of igt testcases need some mechanism for writing a value to memory + * as a test that a batch buffer has executed. + * + * NB: Requires master for STORE_DWORD on gen4/5. + */ +void igt_store_word(int fd, uint64_t ahnd, const intel_ctx_t *ctx, + const struct intel_execution_engine2 *e, + int fence, uint32_t target_handle, + uint64_t target_gpu_addr, + uint64_t store_offset, uint32_t store_value) +{ + const int SCRATCH = 0; + const int BATCH = 1; + const unsigned int gen = intel_gen(intel_get_drm_devid(fd)); + struct drm_i915_gem_exec_object2 obj[2]; + struct drm_i915_gem_relocation_entry reloc; + struct drm_i915_gem_execbuffer2 execbuf; + uint32_t batch[16]; + uint64_t bb_offset, delta; + int i; + + memset(&execbuf, 0, sizeof(execbuf)); + execbuf.buffers_ptr = to_user_pointer(obj); + execbuf.buffer_count = ARRAY_SIZE(obj); + execbuf.flags = e->flags; + execbuf.rsvd1 = ctx->id; + if (fence != -1) { + execbuf.flags |= I915_EXEC_FENCE_IN; + execbuf.rsvd2 = fence; + } + if (gen < 6) + execbuf.flags |= I915_EXEC_SECURE; + + memset(obj, 0, sizeof(obj)); + obj[SCRATCH].handle = target_handle; + + obj[BATCH].handle = gem_create(fd, 4096); + obj[BATCH].relocs_ptr = to_user_pointer(&reloc); + obj[BATCH].relocation_count = !ahnd ? 1 : 0; + bb_offset = get_offset(ahnd, obj[BATCH].handle, 4096, 0); + memset(&reloc, 0, sizeof(reloc)); + + i = 0; + delta = sizeof(uint32_t) * store_offset; + if (!ahnd) { + reloc.target_handle = obj[SCRATCH].handle; + reloc.presumed_offset = -1; + reloc.offset = sizeof(uint32_t) * (i + 1); + reloc.delta = lower_32_bits(delta); + igt_assert_eq(upper_32_bits(delta), 0); + reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION; + reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION; + } else { + obj[SCRATCH].offset = target_gpu_addr; + obj[SCRATCH].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE; + obj[BATCH].offset = bb_offset; + obj[BATCH].flags |= EXEC_OBJECT_PINNED; + } + batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0); + if (gen >= 8) { + uint64_t addr = target_gpu_addr + delta; + batch[++i] = lower_32_bits(addr); + batch[++i] = upper_32_bits(addr); + } else if (gen >= 4) { + batch[++i] = 0; + batch[++i] = lower_32_bits(delta); + igt_assert_eq(upper_32_bits(delta), 0); + reloc.offset += sizeof(uint32_t); + } else { + batch[i]--; + batch[++i] = lower_32_bits(delta); + igt_assert_eq(upper_32_bits(delta), 0); + } + batch[++i] = store_value; + batch[++i] = MI_BATCH_BUFFER_END; + gem_write(fd, obj[BATCH].handle, 0, batch, sizeof(batch)); + gem_execbuf(fd, &execbuf); + gem_close(fd, obj[BATCH].handle); + put_offset(ahnd, obj[BATCH].handle); +} diff --git a/lib/igt_store.h b/lib/igt_store.h new file mode 100644 index 000000000..5c6c8263c --- /dev/null +++ b/lib/igt_store.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2021 Intel Corporation + */ + +#include "igt_gt.h" + +void igt_store_word(int fd, uint64_t ahnd, const intel_ctx_t *ctx, + const struct intel_execution_engine2 *e, + int fence, uint32_t target_handle, + uint64_t target_gpu_addr, + uint64_t store_offset, uint32_t store_value); diff --git a/lib/meson.build b/lib/meson.build index b9568a71b..3e43316d1 100644 --- a/lib/meson.build +++ b/lib/meson.build @@ -72,6 +72,7 @@ lib_sources = [ 'igt_map.c', 'igt_pm.c', 'igt_dummyload.c', + 'igt_store.c', 'uwildmat/uwildmat.c', 'igt_kmod.c', 'igt_panfrost.c', diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c index 9a6336ce9..196236b27 100644 --- a/tests/i915/gem_exec_fence.c +++ b/tests/i915/gem_exec_fence.c @@ -28,6 +28,7 @@ #include "i915/gem.h" #include "i915/gem_create.h" #include "igt.h" +#include "igt_store.h" #include "igt_syncobj.h" #include "igt_sysfs.h" #include "igt_vgem.h" @@ -57,74 +58,6 @@ struct sync_merge_data { #define MI_SEMAPHORE_SAD_EQ_SDD (4 << 12) #define MI_SEMAPHORE_SAD_NEQ_SDD (5 << 12) -static void store(int fd, uint64_t ahnd, const intel_ctx_t *ctx, - const struct intel_execution_engine2 *e, - int fence, uint32_t target, uint64_t target_offset, - unsigned offset_value) -{ - const int SCRATCH = 0; - const int BATCH = 1; - const unsigned int gen = intel_gen(intel_get_drm_devid(fd)); - struct drm_i915_gem_exec_object2 obj[2]; - struct drm_i915_gem_relocation_entry reloc; - struct drm_i915_gem_execbuffer2 execbuf; - uint32_t batch[16], delta; - uint64_t bb_offset; - int i; - - memset(&execbuf, 0, sizeof(execbuf)); - execbuf.buffers_ptr = to_user_pointer(obj); - execbuf.buffer_count = 2; - execbuf.flags = e->flags | I915_EXEC_FENCE_IN; - execbuf.rsvd1 = ctx->id; - execbuf.rsvd2 = fence; - if (gen < 6) - execbuf.flags |= I915_EXEC_SECURE; - - memset(obj, 0, sizeof(obj)); - obj[SCRATCH].handle = target; - - obj[BATCH].handle = gem_create(fd, 4096); - obj[BATCH].relocs_ptr = to_user_pointer(&reloc); - obj[BATCH].relocation_count = !ahnd ? 1 : 0; - bb_offset = get_offset(ahnd, obj[BATCH].handle, 4096, 0); - memset(&reloc, 0, sizeof(reloc)); - - i = 0; - delta = sizeof(uint32_t) * offset_value; - if (!ahnd) { - reloc.target_handle = obj[SCRATCH].handle; - reloc.presumed_offset = -1; - reloc.offset = sizeof(uint32_t) * (i + 1); - reloc.delta = delta; - reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION; - reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION; - } else { - obj[SCRATCH].offset = target_offset; - obj[SCRATCH].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE; - obj[BATCH].offset = bb_offset; - obj[BATCH].flags |= EXEC_OBJECT_PINNED; - } - batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0); - if (gen >= 8) { - batch[++i] = target_offset + delta; - batch[++i] = target_offset >> 32; - } else if (gen >= 4) { - batch[++i] = 0; - batch[++i] = delta; - reloc.offset += sizeof(uint32_t); - } else { - batch[i]--; - batch[++i] = delta; - } - batch[++i] = offset_value; - batch[++i] = MI_BATCH_BUFFER_END; - gem_write(fd, obj[BATCH].handle, 0, batch, sizeof(batch)); - gem_execbuf(fd, &execbuf); - gem_close(fd, obj[BATCH].handle); - put_offset(ahnd, obj[BATCH].handle); -} - static bool fence_busy(int fence) { return poll(&(struct pollfd){fence, POLLIN}, 1, 0) == 0; @@ -400,13 +333,13 @@ static void test_fence_await(int fd, const intel_ctx_t *ctx, continue; if (flags & NONBLOCK) { - store(fd, ahnd, ctx, e2, spin->out_fence, - scratch, scratch_offset, i); + igt_store_word(fd, ahnd, ctx, e2, spin->out_fence, + scratch, scratch_offset, i, i); } else { igt_fork(child, 1) { ahnd = get_reloc_ahnd(fd, ctx->id); - store(fd, ahnd, ctx, e2, spin->out_fence, - scratch, scratch_offset, i); + igt_store_word(fd, ahnd, ctx, e2, spin->out_fence, + scratch, scratch_offset, i, i); put_ahnd(ahnd); } } diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c index 6656b3fcd..5a0c9497c 100644 --- a/tests/i915/i915_hangman.c +++ b/tests/i915/i915_hangman.c @@ -36,6 +36,7 @@ #include "i915/gem.h" #include "i915/gem_create.h" #include "igt.h" +#include "igt_store.h" #include "igt_sysfs.h" #include "igt_debugfs.h" #include "sw_sync.h" From patchwork Thu Jan 13 23:51:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 12713205 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 86C3AC433EF for ; Thu, 13 Jan 2022 23:51:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 20A6110E823; Thu, 13 Jan 2022 23:51:25 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 090CC10E811; Thu, 13 Jan 2022 23:51:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642117881; x=1673653881; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EnyT+dq+GuzzwfvvcH4v+mjZUdOE5Al4DQ+ee95tbRA=; b=WAqUAYU1Q2LsleDyUFTuHfFU3FR76B6k1qwk/sZrp7VRdFLkrfrZ/oMu uI2NkziPd4HyOBriWyuhQUISrnoprI/ZQrhzpg2BAjbCN/XtQUw/OyhUD QJSUBkQZ7VtH0RrY/AniApr0/qRUjzOrbCwUsZmG5IEubYMtM+0aA8NP2 6O6PfL7umPistR9Uk6xlWi0eiRmgnng/HKh/zI3e0mIAR19CsWvWPvh/P iovGZAUxOBw+MHhK30tMAc3pxBsCGyKs2c+vDZfp6L+C5VwnmhqtUa9CJ LU1i2PhQrd3FIdsYiC1qh7KmTs0pNisci2AxG92nkTz2cbCi5ei3CRa05 Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10226"; a="268502290" X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="268502290" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 15:51:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="620783014" Received: from relo-linux-5.jf.intel.com ([10.165.21.134]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2022 15:51:20 -0800 From: John.C.Harrison@Intel.com To: IGT-Dev@Lists.FreeDesktop.Org Date: Thu, 13 Jan 2022 15:51:11 -0800 Message-Id: <20220113235118.1575410-9-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113235118.1575410-1-John.C.Harrison@Intel.com> References: <20220113235118.1575410-1-John.C.Harrison@Intel.com> MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v4 i-g-t 08/15] tests/i915/i915_hangman: Add alive-ness test after error capture X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison Added a an extra step to the i915_hangman tests to check that the system is still alive after the hang and recovery. This submits a simple batch to each engine which does a write to memory and checks that the write occurred. v2: Use _device_coherent instead of _wc for mapping memory to support discrete boards. Signed-off-by: John Harrison Reviewed-by: Matthew Brost --- tests/i915/i915_hangman.c | 59 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c index 5a0c9497c..73a86ec9e 100644 --- a/tests/i915/i915_hangman.c +++ b/tests/i915/i915_hangman.c @@ -48,8 +48,57 @@ static int device = -1; static int sysfs = -1; +#define OFFSET_ALIVE 10 + IGT_TEST_DESCRIPTION("Tests for hang detection and recovery"); +static void check_alive(void) +{ + const struct intel_execution_engine2 *engine; + const intel_ctx_t *ctx; + uint32_t scratch, *out; + int fd, i = 0; + uint64_t ahnd, scratch_addr; + + fd = drm_open_driver(DRIVER_INTEL); + igt_require(gem_class_can_store_dword(fd, 0)); + + ctx = intel_ctx_create_all_physical(fd); + ahnd = get_reloc_ahnd(fd, ctx->id); + scratch = gem_create(fd, 4096); + scratch_addr = get_offset(ahnd, scratch, 4096, 0); + out = gem_mmap__device_coherent(fd, scratch, 0, 4096, PROT_WRITE | PROT_READ); + gem_set_domain(fd, scratch, + I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT); + + for_each_physical_engine(fd, engine) { + igt_assert_eq_u32(out[i + OFFSET_ALIVE], 0); + i++; + } + + i = 0; + for_each_ctx_engine(fd, ctx, engine) { + if (!gem_class_can_store_dword(fd, engine->class)) + continue; + + /* +OFFSET_ALIVE to ensure engine zero doesn't get a false negative */ + igt_store_word(fd, ahnd, ctx, engine, -1, scratch, scratch_addr, + i + OFFSET_ALIVE, i + OFFSET_ALIVE); + i++; + } + + gem_set_domain(fd, scratch, I915_GEM_DOMAIN_GTT, 0); + + while (i--) + igt_assert_eq_u32(out[i + OFFSET_ALIVE], i + OFFSET_ALIVE); + + munmap(out, 4096); + gem_close(fd, scratch); + put_ahnd(ahnd); + intel_ctx_destroy(fd, ctx); + close(fd); +} + static bool has_error_state(int dir) { bool result; @@ -231,6 +280,8 @@ static void test_error_state_capture(const intel_ctx_t *ctx, check_error_state(e->name, offset, batch); munmap(batch, 4096); put_ahnd(ahnd); + + check_alive(); } static void @@ -289,6 +340,8 @@ test_engine_hang(const intel_ctx_t *ctx, put_ahnd(ahndN); } put_ahnd(ahnd); + + check_alive(); } static int hang_count; @@ -321,6 +374,8 @@ static void test_hang_detector(const intel_ctx_t *ctx, /* Did it work? */ igt_assert(hang_count == 1); + + check_alive(); } /* This test covers the case where we end up in an uninitialised area of the @@ -356,6 +411,8 @@ static void hangcheck_unterminated(const intel_ctx_t *ctx) igt_force_gpu_reset(device); igt_assert_f(0, "unterminated batch did not trigger a hang!\n"); } + + check_alive(); } static void do_tests(const char *name, const char *prefix, @@ -433,6 +490,8 @@ igt_main igt_assert(sysfs != -1); igt_require(has_error_state(sysfs)); + + gem_require_mmap_device_coherent(device); } igt_describe("Basic error capture"); From patchwork Thu Jan 13 23:51:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 12713210 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C7C7DC433EF for ; Thu, 13 Jan 2022 23:51:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6DE7B10E845; Thu, 13 Jan 2022 23:51:28 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 37E1810E819; Thu, 13 Jan 2022 23:51:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642117881; x=1673653881; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=cs5gQSsP0d/L1sEikswy9RQh+s+74zBLBuqvD98IuGE=; b=YCV71N2x9FDdOXvu4bIg7TpuiEoE+g5kuKxPfct6KHvQR5YBhXn2O4tB ohfGqXiTuux43ycJ3OPf0H3B5UjEYlebI5M5pQwhHngC9HwJicoEpjoGP Gs4k9OqWoaTOEBoPU3zHr+IwdjAOa1rHuV0OnRABHjU9LVeL4HEkt+OrE ZpZdh6ez23lA1RA9+udEvPqhbRJUUxhz3xxVQIBoLwaFl5M18MC0jgmyA hpgljmVoEIlnkrASybDk3kgey6cR/bCsSx51PSoQ34CL4S5kBiqAwFrrc 3hRAHXoFalFQdm1DBwY/gQr2uBEre0cZ/s72tNviSyjy/JZeltTzpikgj w==; X-IronPort-AV: E=McAfee;i="6200,9189,10226"; a="268502292" X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="268502292" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 15:51:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="620783019" Received: from relo-linux-5.jf.intel.com ([10.165.21.134]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2022 15:51:20 -0800 From: John.C.Harrison@Intel.com To: IGT-Dev@Lists.FreeDesktop.Org Date: Thu, 13 Jan 2022 15:51:12 -0800 Message-Id: <20220113235118.1575410-10-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113235118.1575410-1-John.C.Harrison@Intel.com> References: <20220113235118.1575410-1-John.C.Harrison@Intel.com> MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v4 i-g-t 09/15] tests/i915/i915_hangman: Remove reliance on context persistance X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison The hang test was relying on context persitence for no particular reason. That is, it would set a bunch of background spinners running then immediately destroy the active contexts but expect the spinners to keep spinning. With the current implementation of context persistence in i915, that means that super high priority pings are sent to each engine at the start of the test. Depending upon the timing and platform, one of those unexpected pings could cause test failures. There is no need to require context persitence in this test. So change to managing the contexts cleanly and only destroying them when they are no longer in use. Signed-off-by: John Harrison Reviewed-by: Matthew Brost --- tests/i915/i915_hangman.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c index 73a86ec9e..24087931c 100644 --- a/tests/i915/i915_hangman.c +++ b/tests/i915/i915_hangman.c @@ -289,27 +289,29 @@ test_engine_hang(const intel_ctx_t *ctx, const struct intel_execution_engine2 *e, unsigned int flags) { const struct intel_execution_engine2 *other; - const intel_ctx_t *tmp_ctx; + const intel_ctx_t *local_ctx[GEM_MAX_ENGINES]; igt_spin_t *spin, *next; IGT_LIST_HEAD(list); uint64_t ahnd = get_reloc_ahnd(device, ctx->id), ahndN; + int num_ctx; igt_skip_on(flags & IGT_SPIN_INVALID_CS && gem_engine_has_cmdparser(device, &ctx->cfg, e->flags)); /* Fill all the other engines with background load */ + num_ctx = 0; for_each_ctx_engine(device, ctx, other) { if (other->flags == e->flags) continue; - tmp_ctx = intel_ctx_create(device, &ctx->cfg); - ahndN = get_reloc_ahnd(device, tmp_ctx->id); + local_ctx[num_ctx] = intel_ctx_create(device, &ctx->cfg); + ahndN = get_reloc_ahnd(device, local_ctx[num_ctx]->id); spin = __igt_spin_new(device, .ahnd = ahndN, - .ctx = tmp_ctx, + .ctx = local_ctx[num_ctx], .engine = other->flags, .flags = IGT_SPIN_FENCE_OUT); - intel_ctx_destroy(device, tmp_ctx); + num_ctx++; igt_list_move(&spin->link, &list); } @@ -339,7 +341,10 @@ test_engine_hang(const intel_ctx_t *ctx, igt_spin_free(device, spin); put_ahnd(ahndN); } + put_ahnd(ahnd); + while (num_ctx) + intel_ctx_destroy(device, local_ctx[--num_ctx]); check_alive(); } From patchwork Thu Jan 13 23:51:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 12713206 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C3BE7C433FE for ; Thu, 13 Jan 2022 23:51:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F1F9310E84F; Thu, 13 Jan 2022 23:51:26 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 67EB810E80F; Thu, 13 Jan 2022 23:51:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642117881; x=1673653881; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Z6smWQJGvexpulqbAYXaLPR4Fr+AEtDam+zkR4d/lHc=; b=M8Q/8uwiKUq/8lRWQriGkA6PpyGPjLOCWcpJz0q5tVEk2fROd9W0tmjM Qo1Fo+NCqMcn/IQfBCXPH5cRe9DG7mDzEspgqj5NDCB14+3K+/6GVvB82 k6fYduLO0qGbgTwLuFvoXBvm9LQN/B1+H/RqVg1N89r8deb8nFce8vJSr 16noafqg3Mx12EUX/guEA538cJWGBBfWo0tHsb4pj9qnnNBKECoRSD5P3 7LXJ9uN2sLk5MPoTT2BJnGHRdiTSsXqq61RcU/g4Y7UGHmbIEUY1M1Kgd ot9yTsOqMoQC+NKAR4uL2A6HcqKxImXhT9kmsZvMTdumm6IKmVrzqekE6 w==; X-IronPort-AV: E=McAfee;i="6200,9189,10226"; a="268502297" X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="268502297" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 15:51:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="620783028" Received: from relo-linux-5.jf.intel.com ([10.165.21.134]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2022 15:51:20 -0800 From: John.C.Harrison@Intel.com To: IGT-Dev@Lists.FreeDesktop.Org Date: Thu, 13 Jan 2022 15:51:13 -0800 Message-Id: <20220113235118.1575410-11-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113235118.1575410-1-John.C.Harrison@Intel.com> References: <20220113235118.1575410-1-John.C.Harrison@Intel.com> MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v4 i-g-t 10/15] tests/i915/i915_hangman: Run background task on all engines X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison As opposed to only on the non-target engines. This means that there is some other workload present for the scheduler to switch between and so detet the hang immediately. Signed-off-by: John Harrison Reviewed-by: Matthew Brost --- tests/i915/i915_hangman.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c index 24087931c..a1aeeba6d 100644 --- a/tests/i915/i915_hangman.c +++ b/tests/i915/i915_hangman.c @@ -298,12 +298,14 @@ test_engine_hang(const intel_ctx_t *ctx, igt_skip_on(flags & IGT_SPIN_INVALID_CS && gem_engine_has_cmdparser(device, &ctx->cfg, e->flags)); - /* Fill all the other engines with background load */ + /* + * Fill all engines with background load. + * This verifies that independent engines are unaffected and gives + * the target engine something to switch between so it notices the + * hang. + */ num_ctx = 0; for_each_ctx_engine(device, ctx, other) { - if (other->flags == e->flags) - continue; - local_ctx[num_ctx] = intel_ctx_create(device, &ctx->cfg); ahndN = get_reloc_ahnd(device, local_ctx[num_ctx]->id); spin = __igt_spin_new(device, From patchwork Thu Jan 13 23:51:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 12713200 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 79E60C4332F for ; Thu, 13 Jan 2022 23:51:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0DDC110E831; Thu, 13 Jan 2022 23:51:25 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id D8D6410E820; Thu, 13 Jan 2022 23:51:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642117881; x=1673653881; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XNaUABaAhd0Hs3dyMVFyNvJrgO+inyn+eyw36s+S1Wo=; b=Lfq/PCTpxLkQeqmldMLEZq0IIBUMvXj3ZAtXPpVL6m35J8QC3+lrLZWu KGQKy1mwWEl5hbfYAoPX0es+fdOAbLXAfPsqXELxY5dCqIhyuaBvLt4WD g/Jx1B4R7xX02ZTG66+dUMcy/0C0dzJX5ZGrWqHTtcnOagW3UhCMZkwiJ yYA0rZ1t8p1YiPw/7LcpDJ4mhP1SecF+4Doi90J/+OWIFgYmMLlZivgD5 KGMWBJUSudmJilpVSgceqfZne1jlbFI3WspA2rsJMpoC4UA7LKheLMo1I j/maum6xpIVGou3LT16nf/wvTroLunP9p1xTWOUwPMmrdAMzGU+v5rhX3 Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10226"; a="268502299" X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="268502299" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 15:51:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="620783035" Received: from relo-linux-5.jf.intel.com ([10.165.21.134]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2022 15:51:21 -0800 From: John.C.Harrison@Intel.com To: IGT-Dev@Lists.FreeDesktop.Org Date: Thu, 13 Jan 2022 15:51:14 -0800 Message-Id: <20220113235118.1575410-12-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113235118.1575410-1-John.C.Harrison@Intel.com> References: <20220113235118.1575410-1-John.C.Harrison@Intel.com> MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v4 i-g-t 11/15] tests/i915/i915_hangman: Don't let background contexts cause a ban X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison The global context used by all the subtests for causing hangs is marked as unbannable. However, some of the subtests set background spinners running on all engines using a freshly created context. If there is a test failure for any reason, all of those spinners can be killed off as hanging contexts. On systems with lots of engines, that can result in the test being banned from creating any new contexts. So make the spinner contexts unbannable as well. That way if one subtest fails it won't necessarily bring down all subsequent subtests. v2: Simplify anti-banning code (review feedback from Matthew Brost). Signed-off-by: John Harrison Reviewed-by: Matthew Brost --- tests/i915/i915_hangman.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c index a1aeeba6d..e661b8ad0 100644 --- a/tests/i915/i915_hangman.c +++ b/tests/i915/i915_hangman.c @@ -284,6 +284,17 @@ static void test_error_state_capture(const intel_ctx_t *ctx, check_alive(); } +static void context_unban(int fd, unsigned ctx) +{ + struct drm_i915_gem_context_param param = { + .ctx_id = ctx, + .param = I915_CONTEXT_PARAM_BANNABLE, + .value = 0, + }; + + gem_context_set_param(fd, ¶m); +} + static void test_engine_hang(const intel_ctx_t *ctx, const struct intel_execution_engine2 *e, unsigned int flags) @@ -307,6 +318,7 @@ test_engine_hang(const intel_ctx_t *ctx, num_ctx = 0; for_each_ctx_engine(device, ctx, other) { local_ctx[num_ctx] = intel_ctx_create(device, &ctx->cfg); + context_unban(device, local_ctx[num_ctx]->id); ahndN = get_reloc_ahnd(device, local_ctx[num_ctx]->id); spin = __igt_spin_new(device, .ahnd = ahndN, From patchwork Thu Jan 13 23:51:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 12713204 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8D670C433F5 for ; Thu, 13 Jan 2022 23:51:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 343D110E848; Thu, 13 Jan 2022 23:51:26 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 13A1710E828; Thu, 13 Jan 2022 23:51:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642117882; x=1673653882; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0Ns9f54sQ0FFKcckW1Q8QuWkdIa7EiFseSzm7AxV988=; b=a179MEMQeRJcxHXZh4qn1G+kJvu59K+O6CId6i8VkBuL9XnphF5gst4T LU7mTIDGUKXDAFXNvxmaVm6o976NeNd62CfAaaYWB7mLnspGOTckZL/rF mWMZh8a6jxg2Dchs9kr3yVj8Q3gS2XZ4KXh7T27erT7K9noGOTF7OIij8 5jNeWoML3BnZIQhWS1xlXurCcqf5oGdLZVCSQEWXkYugHNS41vPkv10f3 R05TSYZIeVentHie1Ax2Oa+jRyTC/UfEMlnodCZDct6ew3YjvHJ1BlcKi DEPgpWvubQDtIHN0zlB7qM5asZjqjBzFc53kthU8NrzlICQAfTn8fMIo2 g==; X-IronPort-AV: E=McAfee;i="6200,9189,10226"; a="268502301" X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="268502301" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 15:51:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="620783044" Received: from relo-linux-5.jf.intel.com ([10.165.21.134]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2022 15:51:21 -0800 From: John.C.Harrison@Intel.com To: IGT-Dev@Lists.FreeDesktop.Org Date: Thu, 13 Jan 2022 15:51:15 -0800 Message-Id: <20220113235118.1575410-13-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113235118.1575410-1-John.C.Harrison@Intel.com> References: <20220113235118.1575410-1-John.C.Harrison@Intel.com> MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v4 i-g-t 12/15] tests/i915/gem_exec_fence: Configure correct context X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison The update to use intel_ctx_t missed a line that configures the context to allow hanging. Fix that. Fixes: 09c36188b ("tests/i915/gem_exec_fence: Convert to intel_ctx_t (v2)") Signed-off-by: John Harrison Reviewed-by: Matthew Brost --- tests/i915/gem_exec_fence.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c index 196236b27..5e45d0518 100644 --- a/tests/i915/gem_exec_fence.c +++ b/tests/i915/gem_exec_fence.c @@ -3139,7 +3139,7 @@ igt_main igt_hang_t hang; igt_fixture { - hang = igt_allow_hang(i915, 0, 0); + hang = igt_allow_hang(i915, ctx->id, 0); intel_allocator_multiprocess_start(); } From patchwork Thu Jan 13 23:51:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 12713208 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4F223C433F5 for ; Thu, 13 Jan 2022 23:51:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6347A10E84B; Thu, 13 Jan 2022 23:51:26 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7626810E830; Thu, 13 Jan 2022 23:51:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642117882; x=1673653882; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kWEDePAmLif+gIyj+ZdyY0kO5wDTBpqOFRg0tOpVc1M=; b=BzjO1YyNopTVZjAhsG4Q7CjtoaSGKe3l+jxgrt1tWYQrzRx/52hPOosO vGm2RIin32Cx8vmGtUB45rf5GH2XKoIHrXNJTWJxc33go7jrEMKzgdkY/ kAxG+VA47cB/GKbU3L2A/vFHHASzhABfBF5TiPZMc5H9kZJVfZlYOUdNu bgxFCVUcsjUTYVGpkl9owPs+FC3Fd1R9ngaB48ktF7FJhR0m9RleHwzZD wdmEM/9Fc1lMFGBd22T4XwNdZNIRWh/flJsu9ttEH2iKontTSzFfObrbq +hb422q88pWApIUmi3vpAVX7mGZVZDYWvxthf7MHC/IGNW9QyLErLlOkD Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10226"; a="268502305" X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="268502305" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 15:51:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="620783050" Received: from relo-linux-5.jf.intel.com ([10.165.21.134]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2022 15:51:21 -0800 From: John.C.Harrison@Intel.com To: IGT-Dev@Lists.FreeDesktop.Org Date: Thu, 13 Jan 2022 15:51:16 -0800 Message-Id: <20220113235118.1575410-14-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113235118.1575410-1-John.C.Harrison@Intel.com> References: <20220113235118.1575410-1-John.C.Harrison@Intel.com> MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v4 i-g-t 13/15] lib/i915: Add helper for non-destructive engine property updates X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison Various tests want to configure engine properties such as pre-emption timeout and heartbeat interval. Some don't bother to restore the original values again afterwards. So, add a helper to make it easier to do this. v2: Fix for platforms with no pre-emption capability. Signed-off-by: John Harrison Reviewed-by: Matthew Brost --- lib/i915/gem_engine_topology.c | 46 ++++++++++++++++++++++++++++++++++ lib/i915/gem_engine_topology.h | 9 +++++++ 2 files changed, 55 insertions(+) diff --git a/lib/i915/gem_engine_topology.c b/lib/i915/gem_engine_topology.c index 729f42b0a..bd12d0bc9 100644 --- a/lib/i915/gem_engine_topology.c +++ b/lib/i915/gem_engine_topology.c @@ -488,6 +488,52 @@ int gem_engine_property_printf(int i915, const char *engine, const char *attr, return ret; } +/* Ensure fast hang detection */ +void gem_engine_properties_configure(int fd, struct gem_engine_properties *params) +{ + int ret; + struct gem_engine_properties write = *params; + + ret = gem_engine_property_scanf(fd, write.engine->name, + "heartbeat_interval_ms", + "%d", ¶ms->heartbeat_interval); + igt_assert_eq(ret, 1); + + ret = gem_engine_property_printf(fd, write.engine->name, + "heartbeat_interval_ms", "%d", + write.heartbeat_interval); + igt_assert_lt(0, ret); + + if (gem_scheduler_has_preemption(fd)) { + ret = gem_engine_property_scanf(fd, write.engine->name, + "preempt_timeout_ms", + "%d", ¶ms->preempt_timeout); + igt_assert_eq(ret, 1); + + ret = gem_engine_property_printf(fd, write.engine->name, + "preempt_timeout_ms", "%d", + write.preempt_timeout); + igt_assert_lt(0, ret); + } +} + +void gem_engine_properties_restore(int fd, const struct gem_engine_properties *saved) +{ + int ret; + + ret = gem_engine_property_printf(fd, saved->engine->name, + "heartbeat_interval_ms", "%d", + saved->heartbeat_interval); + igt_assert_lt(0, ret); + + if (gem_scheduler_has_preemption(fd)) { + ret = gem_engine_property_printf(fd, saved->engine->name, + "preempt_timeout_ms", "%d", + saved->preempt_timeout); + igt_assert_lt(0, ret); + } +} + uint32_t gem_engine_mmio_base(int i915, const char *engine) { unsigned int mmio = 0; diff --git a/lib/i915/gem_engine_topology.h b/lib/i915/gem_engine_topology.h index 4cfab560b..b413aa8ab 100644 --- a/lib/i915/gem_engine_topology.h +++ b/lib/i915/gem_engine_topology.h @@ -115,6 +115,15 @@ struct intel_execution_engine2 gem_eb_flags_to_engine(unsigned int flags); ((e__) = intel_get_current_physical_engine(&i__##e__)); \ intel_next_engine(&i__##e__)) +struct gem_engine_properties { + const struct intel_execution_engine2 *engine; + int preempt_timeout; + int heartbeat_interval; +}; + +void gem_engine_properties_configure(int fd, struct gem_engine_properties *params); +void gem_engine_properties_restore(int fd, const struct gem_engine_properties *saved); + __attribute__((format(scanf, 4, 5))) int gem_engine_property_scanf(int i915, const char *engine, const char *attr, const char *fmt, ...); From patchwork Thu Jan 13 23:51:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 12713203 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B5F41C433EF for ; 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a="268502306" X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="268502306" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 15:51:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="620783058" Received: from relo-linux-5.jf.intel.com ([10.165.21.134]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2022 15:51:22 -0800 From: John.C.Harrison@Intel.com To: IGT-Dev@Lists.FreeDesktop.Org Date: Thu, 13 Jan 2022 15:51:17 -0800 Message-Id: <20220113235118.1575410-15-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113235118.1575410-1-John.C.Harrison@Intel.com> References: <20220113235118.1575410-1-John.C.Harrison@Intel.com> MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v4 i-g-t 14/15] tests/i915/i915_hangman: Configure engine properties for quicker hangs X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison Some platforms have very long timeouts configured for some engines. Some have them disabled completely. That makes for a very slow (or broken) hangman test. So explicitly configure the engines to have reasonable settings first. Signed-off-by: John Harrison Reviewed-by: Matthew Brost --- tests/i915/i915_hangman.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/tests/i915/i915_hangman.c b/tests/i915/i915_hangman.c index e661b8ad0..23055c271 100644 --- a/tests/i915/i915_hangman.c +++ b/tests/i915/i915_hangman.c @@ -496,8 +496,12 @@ igt_main { const intel_ctx_t *ctx; igt_hang_t hang = {}; + struct gem_engine_properties saved_params[GEM_MAX_ENGINES]; + int num_engines = 0; igt_fixture { + const struct intel_execution_engine2 *e; + device = drm_open_driver(DRIVER_INTEL); igt_require_gem(device); @@ -511,6 +515,13 @@ igt_main igt_require(has_error_state(sysfs)); gem_require_mmap_device_coherent(device); + + for_each_physical_engine(device, e) { + saved_params[num_engines].engine = e; + saved_params[num_engines].preempt_timeout = 500; + saved_params[num_engines].heartbeat_interval = 1000; + gem_engine_properties_configure(device, saved_params + num_engines++); + } } igt_describe("Basic error capture"); @@ -542,6 +553,11 @@ igt_main do_tests("engine", "engine", ctx); igt_fixture { + int i; + + for (i = 0; i < num_engines; i++) + gem_engine_properties_restore(device, saved_params + i); + igt_disallow_hang(device, hang); intel_ctx_destroy(device, ctx); close(device); From patchwork Thu Jan 13 23:51:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Harrison X-Patchwork-Id: 12713209 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7A716C433FE for ; Thu, 13 Jan 2022 23:51:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D34E910E84C; Thu, 13 Jan 2022 23:51:26 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2C62510E823; Thu, 13 Jan 2022 23:51:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642117883; x=1673653883; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GvTeMj4p496eF/cgKeteC+4cJZcBT8YpC6yo0tfo/ds=; b=kBoOsfF5fpqZhdXCavDDghMD7SmsPcYtd4X0m6LEAVwKA0Q622BoVlHO H90ZvBdG1z8IXw8N77B5xbThcGk0z01XCKVbLk6ueyUVerlwDT7C7xiCU 5UdWZwaOtXUBdp8gSELCWxRNLyAfOpogaOk6zh4X1w2+8kLCWJWc4aHTR 11hexWjbeq4pGugRAeVW6ZmlfZl049SreYBpKrLFeig4v0fz7vbGne9+C XQlWBBmjGPz5Vix/SPHU2SL8J0ZFtNk3LmzkFIsMKZYLVE5qVOufWvnEH 1xwqWdlbXar+h9cz5SZk47dvc5BItg1LAJzESFsymTeasq81Z1vM9Lzxn w==; X-IronPort-AV: E=McAfee;i="6200,9189,10226"; a="268502308" X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="268502308" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 15:51:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="620783062" Received: from relo-linux-5.jf.intel.com ([10.165.21.134]) by fmsmga002.fm.intel.com with ESMTP; 13 Jan 2022 15:51:22 -0800 From: John.C.Harrison@Intel.com To: IGT-Dev@Lists.FreeDesktop.Org Date: Thu, 13 Jan 2022 15:51:18 -0800 Message-Id: <20220113235118.1575410-16-John.C.Harrison@Intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220113235118.1575410-1-John.C.Harrison@Intel.com> References: <20220113235118.1575410-1-John.C.Harrison@Intel.com> MIME-Version: 1.0 Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH v4 i-g-t 15/15] tests/i915/gem_exec_capture: Restore engines X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-GFX@Lists.FreeDesktop.Org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: John Harrison The test was updated some engine properties but not restoring them afterwards. That would leave the system in a non-default state which could potentially affect subsequent tests. Fix it by using the new save/restore engine properties helper functions. Signed-off-by: John Harrison Reviewed-by: Matthew Brost --- tests/i915/gem_exec_capture.c | 37 ++++++++++++++++++++++++++--------- 1 file changed, 28 insertions(+), 9 deletions(-) diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c index 9beb36fc7..51db07c41 100644 --- a/tests/i915/gem_exec_capture.c +++ b/tests/i915/gem_exec_capture.c @@ -209,14 +209,21 @@ static int check_error_state(int dir, struct offset *obj_offsets, int obj_count, return blobs; } -static void configure_hangs(int fd, const struct intel_execution_engine2 *e, int ctxt_id) +static struct gem_engine_properties +configure_hangs(int fd, const struct intel_execution_engine2 *e, int ctxt_id) { + struct gem_engine_properties props; + /* Ensure fast hang detection */ - gem_engine_property_printf(fd, e->name, "preempt_timeout_ms", "%d", 250); - gem_engine_property_printf(fd, e->name, "heartbeat_interval_ms", "%d", 500); + props.engine = e; + props.preempt_timeout = 250; + props.heartbeat_interval = 500; + gem_engine_properties_configure(fd, &props); /* Allow engine based resets and disable banning */ igt_allow_hang(fd, ctxt_id, HANG_ALLOW_CAPTURE | HANG_WANT_ENGINE_RESET); + + return props; } static bool fence_busy(int fence) @@ -256,8 +263,9 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx, uint32_t *batch, *seqno; struct offset offset; int i, fence_out; + struct gem_engine_properties saved_engine; - configure_hangs(fd, e, ctx->id); + saved_engine = configure_hangs(fd, e, ctx->id); memset(obj, 0, sizeof(obj)); obj[SCRATCH].handle = gem_create_in_memory_regions(fd, 4096, region); @@ -371,6 +379,8 @@ static void __capture1(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx, gem_close(fd, obj[BATCH].handle); gem_close(fd, obj[NOCAPTURE].handle); gem_close(fd, obj[SCRATCH].handle); + + gem_engine_properties_restore(fd, &saved_engine); } static void capture(int fd, int dir, const intel_ctx_t *ctx, @@ -417,8 +427,9 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx, uint32_t *batch, *seqno; struct offset *offsets; int i, fence_out; + struct gem_engine_properties saved_engine; - configure_hangs(fd, e, ctx->id); + saved_engine = configure_hangs(fd, e, ctx->id); offsets = calloc(count, sizeof(*offsets)); igt_assert(offsets); @@ -559,10 +570,12 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx, qsort(offsets, count, sizeof(*offsets), cmp); igt_assert(offsets[0].addr <= offsets[count-1].addr); + + gem_engine_properties_restore(fd, &saved_engine); return offsets; } -#define find_first_available_engine(fd, ctx, e) \ +#define find_first_available_engine(fd, ctx, e, saved) \ do { \ ctx = intel_ctx_create_all_physical(fd); \ igt_assert(ctx); \ @@ -570,7 +583,7 @@ __captureN(int fd, int dir, uint64_t ahnd, const intel_ctx_t *ctx, for_each_if(gem_class_can_store_dword(fd, e->class)) \ break; \ igt_assert(e); \ - configure_hangs(fd, e, ctx->id); \ + saved = configure_hangs(fd, e, ctx->id); \ } while(0) static void many(int fd, int dir, uint64_t size, unsigned int flags) @@ -580,8 +593,9 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags) uint64_t ram, gtt, ahnd; unsigned long count, blobs; struct offset *offsets; + struct gem_engine_properties saved_engine; - find_first_available_engine(fd, ctx, e); + find_first_available_engine(fd, ctx, e, saved_engine); gtt = gem_aperture_size(fd) / size; ram = (intel_get_avail_ram_mb() << 20) / size; @@ -602,6 +616,8 @@ static void many(int fd, int dir, uint64_t size, unsigned int flags) free(offsets); put_ahnd(ahnd); + + gem_engine_properties_restore(fd, &saved_engine); } static void prioinv(int fd, int dir, const intel_ctx_t *ctx, @@ -697,8 +713,9 @@ static void userptr(int fd, int dir) void *ptr; int obj_size = 4096; uint32_t system_region = INTEL_MEMORY_REGION_ID(I915_SYSTEM_MEMORY, 0); + struct gem_engine_properties saved_engine; - find_first_available_engine(fd, ctx, e); + find_first_available_engine(fd, ctx, e, saved_engine); igt_assert(posix_memalign(&ptr, obj_size, obj_size) == 0); memset(ptr, 0, obj_size); @@ -710,6 +727,8 @@ static void userptr(int fd, int dir) gem_close(fd, handle); put_ahnd(ahnd); free(ptr); + + gem_engine_properties_restore(fd, &saved_engine); } static bool has_capture(int fd)