From patchwork Mon Jan 17 01:35:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zong Li X-Patchwork-Id: 12714703 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3E4A5C433F5 for ; Mon, 17 Jan 2022 01:35:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236721AbiAQBfi (ORCPT ); Sun, 16 Jan 2022 20:35:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236743AbiAQBfi (ORCPT ); Sun, 16 Jan 2022 20:35:38 -0500 Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA613C06161C for ; Sun, 16 Jan 2022 17:35:37 -0800 (PST) Received: by mail-pf1-x42a.google.com with SMTP id x83so8795433pfc.0 for ; Sun, 16 Jan 2022 17:35:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=K49u+vw8xuJoyxVWZcA3NU+d4XvPmTqJkyhbFma1tEc=; b=fx5o8gOeg/Q4/nXN2S9EzfZaKH4Lq4w65YWm1MW939pyqPAJnVhF5MI32yLl+mMVxN xKQ7igoeXYDbaz1SoigpFPhD5N/f+iMD7inhwZsZNmOFYwjjReuHVKcXhsY45lqsdY4E kz1H/srdzXbpAR5oubHNCHf0Tpb5MqzWq+mzblEWnvoCf34LDYUqVJ9VtG3FzfDOi9/X RoSzDuzy+cciW0PSMaLlMA20kkL/Unv1fDDGbaEvJF3vCopP+dOQmXLN+rE6ZDUgH2Ha QIDZDJfD63Z2jxFwY/0RnfgMCantTV07P/6WECYOQlwH/e8NsNJIiH91WKb2Avw8Omdv A/JA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=K49u+vw8xuJoyxVWZcA3NU+d4XvPmTqJkyhbFma1tEc=; b=G0cvKqLszyHvNWyoz1Se30mvHKrRnkCUvL8w61uaC9o3MZMPj1X0X+WwXuHrkzYIoc tm1ynX5JSxjsYJfW/u3RR4VbwZkk9mel95EV8u+mNOJHJssxgmIFUnutRZc4/BoSwL6G +gD3q1M58nKDxZooeg/+7C34jlP43fYyKgYZjHEVRM1XjZg0pgg+BBOzMMUVVe8SSszC J0+x7QYw/t0f4J7J9y0GYDfq5egoJPyHgHwrGX7k0QRgXSZ+vZ6nZtEyVQfn9P6CONAs +l375FZFsuLGUL6ZBPau6Ry4clvo+Mcoj4HgSkzw6Zb+XD4Ga3zpc2X9VeJ9CCWJDGth mcgw== X-Gm-Message-State: AOAM533YoZoZ8PSe6e2h7Qx5ZWzx7YtR3Kn4JbuXjTNKaADAWKzYqDFU aFffJJhrs99r7toaEu2yFWp/nA== X-Google-Smtp-Source: ABdhPJy3cCK6M6/ymBigZBfwJeQAU3nzgG2r0QdbcItZb2aPSm1DwimovkWfD1QGC4ROmx67vrk6Vw== X-Received: by 2002:a63:5d0e:: with SMTP id r14mr930560pgb.110.1642383337389; Sun, 16 Jan 2022 17:35:37 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id l1sm10008335pgn.35.2022.01.16.17.35.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 16 Jan 2022 17:35:36 -0800 (PST) From: Zong Li To: robh+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, krzysztof.kozlowski@canonical.com, conor.dooley@microchip.com, geert@linux-m68k.org, bin.meng@windriver.com, green.wan@sifive.com, vkoul@kernel.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Zong Li Subject: [PATCH v4 1/3] riscv: dts: Add dma-channels property in dma node Date: Mon, 17 Jan 2022 09:35:26 +0800 Message-Id: <163a2cf11b2aceee2a1b8dc83251576d2371d4a6.1642383007.git.zong.li@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Add dma-channels property, then we can determine how many channels there by device tree. Signed-off-by: Zong Li Reviewed-by: Palmer Dabbelt Acked-by: Palmer Dabbelt --- arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 1 + arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi index c9f6d205d2ba..3c48f2d7a4a4 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi @@ -188,6 +188,7 @@ dma@3000000 { reg = <0x0 0x3000000 0x0 0x8000>; interrupt-parent = <&plic>; interrupts = <23 24 25 26 27 28 29 30>; + dma-channels = <4>; #dma-cells = <1>; }; diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi index 0655b5c4201d..2bdfe7f06e4b 100644 --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi @@ -171,6 +171,7 @@ dma: dma@3000000 { reg = <0x0 0x3000000 0x0 0x8000>; interrupt-parent = <&plic0>; interrupts = <23 24 25 26 27 28 29 30>; + dma-channels = <4>; #dma-cells = <1>; }; uart1: serial@10011000 { From patchwork Mon Jan 17 01:35:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zong Li X-Patchwork-Id: 12714704 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2BFB0C433EF for ; Mon, 17 Jan 2022 01:35:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236787AbiAQBfq (ORCPT ); Sun, 16 Jan 2022 20:35:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32774 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236758AbiAQBfl (ORCPT ); Sun, 16 Jan 2022 20:35:41 -0500 Received: from mail-pg1-x530.google.com (mail-pg1-x530.google.com [IPv6:2607:f8b0:4864:20::530]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DCB07C06173E for ; Sun, 16 Jan 2022 17:35:40 -0800 (PST) Received: by mail-pg1-x530.google.com with SMTP id r135so6062638pgr.6 for ; Sun, 16 Jan 2022 17:35:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=95yOM2oPjDW4I8teUQkYRlUXa8kIk+GmIx7gO72jBTY=; b=P+GoisCraOgxlHu4ekz372AMVjqGk0k3oxAotFVY+JXZ1wKhghK/9VUBiHjSULBAuP YT4wwsz1owUO6iPKiWsGy1oGSOL98t8npnafFRWj4DEjOXLcNTXLnrLnipNYmy/X/59V zv0G3qMbqQOTkecphSBHdfCzauar+Qn4EvJPR8jFtiEevja0Dtfpo2IarctGfKHjFxDk RDRT+OUyc72T9apyF/om+OYvNxSz/TyAz0HE3JwmeR91oHCM5yiG8rB9AraAmv3V5Uyr V34ti5X4PUmue5qVTDpJii8D9glNa22wkQgNu9rqk8ukaXF1h0hiqtROVWDQaiPGjKfM 7mFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=95yOM2oPjDW4I8teUQkYRlUXa8kIk+GmIx7gO72jBTY=; b=XLzpILjswo3eaBzkUmqXevFb6hOH+SYuMAQufZLKtrgYywH5ev+VooLJEFA/vCWeuh UEZqw7yAc9JmLu03E4UFXwW8Z8uQZHzkMMlPjg4BMFMJ+gHQfmE5x1ihhqhvkeIXVMLL hMXBgMMse8C+AbrWSXwr+dS0GvC08afMN3wuZzG1Q0Ytlp3QgVnuKghBTejFD0qZAq2C xRt1OgVMFuQCcmcLlxakzDRrF00BBneePhiGPznsDgU5XMMW5ESe3lvP5rL+PdirKsJ8 IQXvS/6IVTNPQGFnl362teGEBFHAaPIXGNCskes7VVBCAuG4AWgL2Z8qf9+0fSfdBZDJ 61Gw== X-Gm-Message-State: AOAM531J3s0+v69/ht8kD1ecbCLwu55s/c0oOPWn2N1LrRoF64VcHxc3 3n1hJCMqXKqqfkbq28jEGGMaZQ== X-Google-Smtp-Source: ABdhPJzYYuCt8lJjXiFcWFdBW421Oc4GF3QS64Lff1lAlXxFDNO5aZc7/9nqJvZybIZwWwo2dzrwBQ== X-Received: by 2002:a63:284:: with SMTP id 126mr16642095pgc.328.1642383340489; Sun, 16 Jan 2022 17:35:40 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id l1sm10008335pgn.35.2022.01.16.17.35.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 16 Jan 2022 17:35:39 -0800 (PST) From: Zong Li To: robh+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, krzysztof.kozlowski@canonical.com, conor.dooley@microchip.com, geert@linux-m68k.org, bin.meng@windriver.com, green.wan@sifive.com, vkoul@kernel.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Zong Li Subject: [PATCH v4 2/3] dt-bindings: Add dma-channels for pdma device node Date: Mon, 17 Jan 2022 09:35:27 +0800 Message-Id: <5db314b798cd9cfcb5cb61bc56515220b7d50315.1642383007.git.zong.li@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Add dma-channels property, then we can determine how many channels there by device tree, rather than statically defines it in PDMA driver Signed-off-by: Zong Li --- .../devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml index d32a71b975fe..3dbb8caefc17 100644 --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml @@ -34,6 +34,12 @@ properties: minItems: 1 maxItems: 8 + dma-channels: + description: For backwards-compatible, the default value is 4 + minimum: 1 + maximum: 4 + default: 4 + '#dma-cells': const: 1 @@ -50,6 +56,7 @@ examples: dma@3000000 { compatible = "sifive,fu540-c000-pdma"; reg = <0x3000000 0x8000>; + dma-channels = <4>; interrupts = <23 24 25 26 27 28 29 30>; #dma-cells = <1>; }; From patchwork Mon Jan 17 01:35:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zong Li X-Patchwork-Id: 12714705 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71AB3C4332F for ; Mon, 17 Jan 2022 01:35:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236769AbiAQBfv (ORCPT ); Sun, 16 Jan 2022 20:35:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236790AbiAQBfr (ORCPT ); Sun, 16 Jan 2022 20:35:47 -0500 Received: from mail-pf1-x431.google.com (mail-pf1-x431.google.com [IPv6:2607:f8b0:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0CE3CC061749 for ; Sun, 16 Jan 2022 17:35:44 -0800 (PST) Received: by mail-pf1-x431.google.com with SMTP id f144so8031379pfa.6 for ; Sun, 16 Jan 2022 17:35:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=OqMpSNI9o/wkUts3PmMeUCyav5wo+up/ZcTRwyLImaU=; b=gPRlR1Hf1DlVbJZaGtmNkw21jKWi4su9kEjnfc5X377q7Nd2Y7HtBZ8vt7o0fPFteE OnSEKYrRPfCyC+GNzQBc5ldetBk0daHxdb3Lxbb2kSvLFTtfMnrai26rR6lfsiJhA5Wh ZG3abik8TZjlyWBQ3+2YgYRT7TtoLmhp+gqoNM/89EpwrKyOXju1Je6li41y6FXwPrJH dMJPV+RtTQIrMVx5XXr6iEbXB/ffBTzSh66nJcqwLpN0A/uXf2sg77dt2oyTc+D1BQQh jMIqejCOwnTteD3HvNIxv5WFJwq0OotlC0m99621XL3g5wInYZe8k9DeWd3ha9CepGAn Sz/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OqMpSNI9o/wkUts3PmMeUCyav5wo+up/ZcTRwyLImaU=; b=P0x/0GPMUi51m7yFtMQMgPjzdhchjbI97LSsQlGWZa83+9yKhDRZm+EAIqoBl0MKcY 29isEybNkTTKJolbOF3aXp+oji5469UvYsbM0W35VmoXX5pncoJIas6mVUQagg6NkDtY q0X0+y+6diKf8fYLnPZbiN44PYjTmNJ4sDdm5kwoUmegBwkME4DqFLNcPPWiocKWgsxY WyKHTAWJ1DhV9+ayHlBJ9LSuPizTIIEXG5FYfCAfBnkwQJl2Kk3jnKGlropcHa6nehnc 2STB1d1gM9LrvsdNPkLc1oEIyRNrI93GK/9FwsInfpnTMbzN1gh7uIVPD6QjxO+Kr7Vg /YRA== X-Gm-Message-State: AOAM532dorthON0ESF5ktOX+uYO9bYIKsmuOSEQX5oo1s1aD5toOEMVO F/d3xC+ArtK+yYe1ClZ3NmN0jg== X-Google-Smtp-Source: ABdhPJwuYjavF52j9NgVoipdfAqM8ttzlG86FOpEh3FLfEagU2BCeR800imtawrLV3moDeYClwsDHQ== X-Received: by 2002:aa7:92d1:0:b0:4bb:9d7:6951 with SMTP id k17-20020aa792d1000000b004bb09d76951mr18916569pfa.40.1642383343595; Sun, 16 Jan 2022 17:35:43 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id l1sm10008335pgn.35.2022.01.16.17.35.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 16 Jan 2022 17:35:43 -0800 (PST) From: Zong Li To: robh+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, krzysztof.kozlowski@canonical.com, conor.dooley@microchip.com, geert@linux-m68k.org, bin.meng@windriver.com, green.wan@sifive.com, vkoul@kernel.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Zong Li Subject: [PATCH v4 3/3] dmaengine: sf-pdma: Get number of channel by device tree Date: Mon, 17 Jan 2022 09:35:28 +0800 Message-Id: <0d0b0a3ad703f5ef50611e2dd80439675bda666a.1642383007.git.zong.li@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org It currently assumes that there are always four channels, it would cause the error if there is actually less than four channels. Change that by getting number of channel from device tree. For backwards-compatible, it uses the default value (i.e. 4) when there is no 'dma-channels' information in dts. Signed-off-by: Zong Li --- drivers/dma/sf-pdma/sf-pdma.c | 20 +++++++++++++------- drivers/dma/sf-pdma/sf-pdma.h | 8 ++------ 2 files changed, 15 insertions(+), 13 deletions(-) diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c index f12606aeff87..1264add9897e 100644 --- a/drivers/dma/sf-pdma/sf-pdma.c +++ b/drivers/dma/sf-pdma/sf-pdma.c @@ -482,9 +482,7 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma) static int sf_pdma_probe(struct platform_device *pdev) { struct sf_pdma *pdma; - struct sf_pdma_chan *chan; struct resource *res; - int len, chans; int ret; const enum dma_slave_buswidth widths = DMA_SLAVE_BUSWIDTH_1_BYTE | DMA_SLAVE_BUSWIDTH_2_BYTES | @@ -492,13 +490,21 @@ static int sf_pdma_probe(struct platform_device *pdev) DMA_SLAVE_BUSWIDTH_16_BYTES | DMA_SLAVE_BUSWIDTH_32_BYTES | DMA_SLAVE_BUSWIDTH_64_BYTES; - chans = PDMA_NR_CH; - len = sizeof(*pdma) + sizeof(*chan) * chans; - pdma = devm_kzalloc(&pdev->dev, len, GFP_KERNEL); + pdma = devm_kzalloc(&pdev->dev, sizeof(*pdma), GFP_KERNEL); if (!pdma) return -ENOMEM; - pdma->n_chans = chans; + ret = of_property_read_u32(pdev->dev.of_node, "dma-channels", + &pdma->n_chans); + if (ret) { + dev_notice(&pdev->dev, "set number of channels to default value: 4\n"); + pdma->n_chans = PDMA_MAX_NR_CH; + } + + if (pdma->n_chans > PDMA_MAX_NR_CH) { + dev_err(&pdev->dev, "the number of channels exceeds the maximum\n"); + return -EINVAL; + } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); pdma->membase = devm_ioremap_resource(&pdev->dev, res); @@ -556,7 +562,7 @@ static int sf_pdma_remove(struct platform_device *pdev) struct sf_pdma_chan *ch; int i; - for (i = 0; i < PDMA_NR_CH; i++) { + for (i = 0; i < pdma->n_chans; i++) { ch = &pdma->chans[i]; devm_free_irq(&pdev->dev, ch->txirq, ch); diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h index 0c20167b097d..8127d792f639 100644 --- a/drivers/dma/sf-pdma/sf-pdma.h +++ b/drivers/dma/sf-pdma/sf-pdma.h @@ -22,11 +22,7 @@ #include "../dmaengine.h" #include "../virt-dma.h" -#define PDMA_NR_CH 4 - -#if (PDMA_NR_CH != 4) -#error "Please define PDMA_NR_CH to 4" -#endif +#define PDMA_MAX_NR_CH 4 #define PDMA_BASE_ADDR 0x3000000 #define PDMA_CHAN_OFFSET 0x1000 @@ -118,7 +114,7 @@ struct sf_pdma { void __iomem *membase; void __iomem *mappedbase; u32 n_chans; - struct sf_pdma_chan chans[PDMA_NR_CH]; + struct sf_pdma_chan chans[PDMA_MAX_NR_CH]; }; #endif /* _SF_PDMA_H */