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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.45.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:45:30 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 01/17] target/riscv: rvv-1.0: Add Zve64f extension into RISC-V Date: Tue, 18 Jan 2022 09:45:04 +0800 Message-Id: <20220118014522.13613-2-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::102c (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=frank.chang@sifive.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Frank Chang , Alistair Francis , Bin Meng , qemu-riscv@nongnu.org, Palmer Dabbelt Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 4 ++++ target/riscv/cpu.h | 1 + target/riscv/cpu_helper.c | 5 ++++- target/riscv/csr.c | 6 +++++- target/riscv/translate.c | 2 ++ 5 files changed, 16 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 9bc25d3055..2ba22503da 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -589,6 +589,10 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) } set_vext_version(env, vext_version); } + if (cpu->cfg.ext_zve64f && !cpu->cfg.ext_f) { + error_setg(errp, "Zve64f extension depends upon RVF."); + return; + } if (cpu->cfg.ext_j) { ext |= RVJ; } diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 4d63086765..86cc94d3bb 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -329,6 +329,7 @@ struct RISCVCPU { bool ext_icsr; bool ext_zfh; bool ext_zfhmin; + bool ext_zve64f; char *priv_spec; char *user_spec; diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 434a83e66a..43d498aae1 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -69,12 +69,15 @@ static RISCVMXL cpu_get_xl(CPURISCVState *env) void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc, target_ulong *cs_base, uint32_t *pflags) { + CPUState *cs = env_cpu(env); + RISCVCPU *cpu = RISCV_CPU(cs); + uint32_t flags = 0; *pc = env->pc; *cs_base = 0; - if (riscv_has_ext(env, RVV)) { + if (riscv_has_ext(env, RVV) || cpu->cfg.ext_zve64f) { /* * If env->vl equals to VLMAX, we can use generic vector operation * expanders (GVEC) to accerlate the vector operations. diff --git a/target/riscv/csr.c b/target/riscv/csr.c index adb3d4381d..e9311cfd9d 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -47,7 +47,11 @@ static RISCVException fs(CPURISCVState *env, int csrno) static RISCVException vs(CPURISCVState *env, int csrno) { - if (env->misa_ext & RVV) { + CPUState *cs = env_cpu(env); + RISCVCPU *cpu = RISCV_CPU(cs); + + if (env->misa_ext & RVV || + cpu->cfg.ext_zve64f) { #if !defined(CONFIG_USER_ONLY) if (!env->debugger && !riscv_cpu_vector_enabled(env)) { return RISCV_EXCP_ILLEGAL_INST; diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 615048ec87..d3c0d44e2e 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -79,6 +79,7 @@ typedef struct DisasContext { bool ext_ifencei; bool ext_zfh; bool ext_zfhmin; + bool ext_zve64f; bool hlsx; /* vector extension */ bool vill; @@ -894,6 +895,7 @@ static void riscv_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) ctx->ext_ifencei = cpu->cfg.ext_ifencei; ctx->ext_zfh = cpu->cfg.ext_zfh; ctx->ext_zfhmin = cpu->cfg.ext_zfhmin; + ctx->ext_zve64f = cpu->cfg.ext_zve64f; ctx->vlen = cpu->cfg.vlen; ctx->elen = cpu->cfg.elen; ctx->mstatus_hs_fs = FIELD_EX32(tb_flags, TB_FLAGS, MSTATUS_HS_FS); From patchwork Tue Jan 18 01:45:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Chang X-Patchwork-Id: 12715803 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 79994C433EF for ; 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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.45.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:45:33 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 02/17] target/riscv: rvv-1.0: Add Zve64f support for configuration insns Date: Tue, 18 Jan 2022 09:45:05 +0800 Message-Id: <20220118014522.13613-3-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52a (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=frank.chang@sifive.com; helo=mail-pg1-x52a.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Frank Chang , Bin Meng , Richard Henderson , Alistair Francis , Palmer Dabbelt , LIU Zhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang All Zve* extensions support the vector configuration instructions. Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rvv.c.inc | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 6c285c958b..5b47729a21 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -129,7 +129,8 @@ static bool do_vsetvl(DisasContext *s, int rd, int rs1, TCGv s2) { TCGv s1, dst; - if (!require_rvv(s) || !has_ext(s, RVV)) { + if (!require_rvv(s) || + !(has_ext(s, RVV) || s->ext_zve64f)) { return false; } @@ -164,7 +165,8 @@ static bool do_vsetivli(DisasContext *s, int rd, TCGv s1, TCGv s2) { TCGv dst; - if (!require_rvv(s) || !has_ext(s, RVV)) { + if (!require_rvv(s) || + !(has_ext(s, RVV) || s->ext_zve64f)) { return false; } From patchwork Tue Jan 18 01:45:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Chang X-Patchwork-Id: 12715820 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 10827C433F5 for ; Tue, 18 Jan 2022 02:00:45 +0000 (UTC) Received: from localhost ([::1]:55050 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n9dnf-00011P-Vp for qemu-devel@archiver.kernel.org; Mon, 17 Jan 2022 21:00:44 -0500 Received: from eggs.gnu.org ([209.51.188.92]:50322) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n9dZ6-0008S3-RB for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:45:40 -0500 Received: from [2607:f8b0:4864:20::1033] (port=36506 helo=mail-pj1-x1033.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1n9dZ5-0007Rr-4U for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:45:40 -0500 Received: by mail-pj1-x1033.google.com with SMTP id i8-20020a17090a138800b001b3936fb375so848678pja.1 for ; Mon, 17 Jan 2022 17:45:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wTumydVPN7vaOmVu2aTT01lAWA4wv+vG4rcMpjjNZeY=; b=GVBt7n0w8F44kCg3YTs5Pr8kfOKWZGjGji/su8aO/9yiaeh9JBw9ujkvZC2DBqupsN Wp4xP/wUNYETC7kkurYP8l9pbCLOAXaHvq4gT8/eI/njz5WJT1Rpvfa6Zu/kaAKvkJPi Cm3bG/YvFZyxBCdlPeJvDvjiHQhHLquIlcDrI0Fw/roB3WTTRWSEGGIlE8gaoKVepCVt 61zA9/hejBit4+4JhhJlw/FcVz+3iLQvxdlCwu7SgDBIUCZFVMCilrCK9kTppp+SOGa5 tMSjyRye/QpuxdkLd5LXkrArwsLP+TqE30L0iI5j7GLzG4O7ZHvpYIbViaDl0AQ/ejmx z4gw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wTumydVPN7vaOmVu2aTT01lAWA4wv+vG4rcMpjjNZeY=; b=6UM7gG7AV5mmKuOiRGpCTeL3cFAnOY4axzigADU3kuisi1etkspyvI7vy8/qTreGnT WNCh9qKzNavNKBXWTT2YRCgg3RpTkdADOVgBoC4G++7JmmIem7ZLAowKdahi5Nb3HKZt gm+4XeEBbofWr18QDNLkezAqjhaT0k4ANlAErQCiFccOIzMRIlMyqm0C4vhLemtDHwOe qkqMxmM6wLvJTdeoIJwU1HHLykKuEJwY8s8ya/Ob/WBxXAGD11VdhZ6tbIp7TStC5ozO Qvp3cYy8J9pAzpKC3Wxfwxe8UMSbHWKfnB48UvNVLpMWmEwnBDEVohXbSvy9IrDpy8hO 5V9Q== X-Gm-Message-State: AOAM533GQhvpS3eh5avn52ugiqXdGgPPbY7vqhqb8e0vJbbgrHhC82VM cmxlGY/STElYGDm9P1xnSfAUHmvGi4u+PGsX X-Google-Smtp-Source: ABdhPJx2jVPpjZxh/Su2WU1EZ1r3bVlLa1d2WqCiNqnqjrFowSQVlmSS52UodxJP2HTRforClOPcJw== X-Received: by 2002:a17:902:e8c2:b0:149:fdf8:270 with SMTP id v2-20020a170902e8c200b00149fdf80270mr25492166plg.167.1642470337681; Mon, 17 Jan 2022 17:45:37 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.45.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:45:37 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 03/17] target/riscv: rvv-1.0: Add Zve64f support for load and store insns Date: Tue, 18 Jan 2022 09:45:06 +0800 Message-Id: <20220118014522.13613-4-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1033 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=frank.chang@sifive.com; helo=mail-pj1-x1033.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Frank Chang , Bin Meng , Richard Henderson , Palmer Dabbelt , Alistair Francis , LIU Zhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang All Zve* extensions support all vector load and store instructions, except Zve64* extensions do not support EEW=64 for index values when XLEN=32. Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rvv.c.inc | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 5b47729a21..0bf41aaa1e 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -263,10 +263,21 @@ static bool vext_check_st_index(DisasContext *s, int vd, int vs2, int nf, uint8_t eew) { int8_t emul = eew - s->sew + s->lmul; - return (emul >= -3 && emul <= 3) && - require_align(vs2, emul) && - require_align(vd, s->lmul) && - require_nf(vd, nf, s->lmul); + bool ret = (emul >= -3 && emul <= 3) && + require_align(vs2, emul) && + require_align(vd, s->lmul) && + require_nf(vd, nf, s->lmul); + + /* + * All Zve* extensions support all vector load and store instructions, + * except Zve64* extensions do not support EEW=64 for index values + * when XLEN=32. (Section 18.2) + */ + if (get_xl(s) == MXL_RV32) { + ret &= (!has_ext(s, RVV) && s->ext_zve64f ? eew != MO_64 : true); + } + + return ret; } /* From patchwork Tue Jan 18 01:45:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Chang X-Patchwork-Id: 12715805 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EFF5EC433F5 for ; Tue, 18 Jan 2022 01:51:25 +0000 (UTC) Received: from localhost ([::1]:37344 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n9dee-0004Bq-TI for qemu-devel@archiver.kernel.org; Mon, 17 Jan 2022 20:51:24 -0500 Received: from eggs.gnu.org ([209.51.188.92]:50430) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n9dZE-0000BW-1h for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:45:49 -0500 Received: from [2607:f8b0:4864:20::52b] (port=43784 helo=mail-pg1-x52b.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1n9dZB-0007SY-0V for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:45:47 -0500 Received: by mail-pg1-x52b.google.com with SMTP id 8so12447376pgc.10 for ; Mon, 17 Jan 2022 17:45:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1m+JcT+vHGXeGWQ9nN6B6HxWx0BHiVNJzT6xLLRo3aA=; b=CfJbFooD44MwHND8HZqhz3sPXE3B0W75erLKJqsmmYhYvHzbWqbg9tuxOsiS6j5o0G WRRXkGjCyTP2osYFwNAw4kKThb0ZcqxUONfTjtns1UGpuHIOUfL9N/F5nt06PtJVf7ND AfEX0u5kL9HCPDIzoaeUxa/ZMTvfkRb+XGSuvhf6bu8G+XlCTkxwLiVpKf8LIKodyMFH u6MsUsp54xoEl7WPbz8WBR8B7zUKNVfp4EuBBkUWt3pl3n6PIxquvSHWWQ8a9Rvr5L/i hqL6qomQA+nXW5FHhxPQCPWSRV2i9rxWvpj6WI5UfKCXxYQTspsY4yPZITPnEAkDTSi4 4HTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1m+JcT+vHGXeGWQ9nN6B6HxWx0BHiVNJzT6xLLRo3aA=; b=5wp9+v2pjYk34QZJBknY4iJnSCwU+gGoyXYzp6XQbNz5Cl26DKlrCG6696LBXjQWy9 xT3BWdML2sue9R07pRoOEO4p4pUKwtqzZ1WfhHnUTOHlAaYQqSF71GyckHM8LQDqrY+L qTzzDtt2V+KoKxGaEwtUEwz36l8BX6fr7qK7xW/gSUlINrxUoSFbXcxUZ9wlipVsni1G YjIOYQ+k65350+eI6yHv3rGz+r+7sQqGWfG0N7cvqku/Fl1B667zw2xjAOZVjUBqzCV1 chiEbSaZ48kngii9ml3YBYOGtfX0KwutO3VJEiUOB1lgu2lv+eJjGCRE/aewk4q2+rli SxHA== X-Gm-Message-State: AOAM531AvXyTvaW3XlHRQe6u3TbHdBBm8+/bYPbtI3tZaXejEDrOvhNR xpMLKYJwnf/b4crD+lmVC4VqS6sdh6QYOx1r X-Google-Smtp-Source: ABdhPJxjIpC7JasRuqXdS3PWWQePvD7fssU5yVlPvD3+vQ6BBPreiDjEBZvdvdi7PMxNPDnTaA7C5Q== X-Received: by 2002:a63:6b44:: with SMTP id g65mr20987877pgc.175.1642470341056; Mon, 17 Jan 2022 17:45:41 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.45.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:45:40 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 04/17] target/riscv: rvv-1.0: Add Zve64f support for vmulh variant insns Date: Tue, 18 Jan 2022 09:45:07 +0800 Message-Id: <20220118014522.13613-5-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52b (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=frank.chang@sifive.com; helo=mail-pg1-x52b.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Frank Chang , Bin Meng , Richard Henderson , Alistair Francis , Palmer Dabbelt , LIU Zhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang All Zve* extensions support all vector integer instructions, except that the vmulh integer multiply variants that return the high word of the product (vmulh.vv, vmulh.vx, vmulhu.vv, vmulhu.vx, vmulhsu.vv, vmulhsu.vx) are not included for EEW=64 in Zve64*. Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rvv.c.inc | 39 +++++++++++++++++++++---- 1 file changed, 33 insertions(+), 6 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 0bf41aaa1e..e64dddda28 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -1908,14 +1908,41 @@ GEN_OPIVX_TRANS(vmaxu_vx, opivx_check) GEN_OPIVX_TRANS(vmax_vx, opivx_check) /* Vector Single-Width Integer Multiply Instructions */ + +static bool vmulh_vv_check(DisasContext *s, arg_rmrr *a) +{ + /* + * All Zve* extensions support all vector integer instructions, + * except that the vmulh integer multiply variants + * that return the high word of the product + * (vmulh.vv, vmulh.vx, vmulhu.vv, vmulhu.vx, vmulhsu.vv, vmulhsu.vx) + * are not included for EEW=64 in Zve64*. (Section 18.2) + */ + return opivv_check(s, a) && + (!has_ext(s, RVV) && s->ext_zve64f ? s->sew != MO_64 : true); +} + +static bool vmulh_vx_check(DisasContext *s, arg_rmrr *a) +{ + /* + * All Zve* extensions support all vector integer instructions, + * except that the vmulh integer multiply variants + * that return the high word of the product + * (vmulh.vv, vmulh.vx, vmulhu.vv, vmulhu.vx, vmulhsu.vv, vmulhsu.vx) + * are not included for EEW=64 in Zve64*. (Section 18.2) + */ + return opivx_check(s, a) && + (!has_ext(s, RVV) && s->ext_zve64f ? s->sew != MO_64 : true); +} + GEN_OPIVV_GVEC_TRANS(vmul_vv, mul) -GEN_OPIVV_TRANS(vmulh_vv, opivv_check) -GEN_OPIVV_TRANS(vmulhu_vv, opivv_check) -GEN_OPIVV_TRANS(vmulhsu_vv, opivv_check) +GEN_OPIVV_TRANS(vmulh_vv, vmulh_vv_check) +GEN_OPIVV_TRANS(vmulhu_vv, vmulh_vv_check) +GEN_OPIVV_TRANS(vmulhsu_vv, vmulh_vv_check) GEN_OPIVX_GVEC_TRANS(vmul_vx, muls) -GEN_OPIVX_TRANS(vmulh_vx, opivx_check) -GEN_OPIVX_TRANS(vmulhu_vx, opivx_check) -GEN_OPIVX_TRANS(vmulhsu_vx, opivx_check) +GEN_OPIVX_TRANS(vmulh_vx, vmulh_vx_check) +GEN_OPIVX_TRANS(vmulhu_vx, vmulh_vx_check) +GEN_OPIVX_TRANS(vmulhsu_vx, vmulh_vx_check) /* Vector Integer Divide Instructions */ GEN_OPIVV_TRANS(vdivu_vv, opivv_check) From patchwork Tue Jan 18 01:45:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Chang X-Patchwork-Id: 12715824 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5975FC433F5 for ; Tue, 18 Jan 2022 02:03:26 +0000 (UTC) Received: from localhost ([::1]:33352 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n9dqG-0005Ux-6U for qemu-devel@archiver.kernel.org; Mon, 17 Jan 2022 21:03:24 -0500 Received: from eggs.gnu.org ([209.51.188.92]:50456) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n9dZG-0000FF-1e for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:45:55 -0500 Received: from [2607:f8b0:4864:20::633] (port=35636 helo=mail-pl1-x633.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1n9dZC-0007Sq-3b for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:45:48 -0500 Received: by mail-pl1-x633.google.com with SMTP id u15so23025795ple.2 for ; Mon, 17 Jan 2022 17:45:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1+LHi+MwDv8WRRjPrUiQv8yGNTdHo3x15N4GYRkE264=; b=lGnhMSzuLXuwpt47U7mQs3yTtuBUf/1bfKoUd4z360YmaBdZr/2Mszkl0pSXivHu4u Rd+ADhTmdrznUmVfmN5iorlru1S4hvVj6M0IXe9foK2Onk21EUxsfSqnPzk0XOl4oFzo gID7i/xHuZjgX71GxLwairoKh4C/epbS1f2ip+ncLabt+9oTYwbH2TkeAiM692lhQn0e HEWNaSmgIZdagaLo/s1kCQXTeMlTFc0X7fHYvVuy0vY0p3AzJwPyBt1SPw6Opwj+aQOa vrBSyr89NxHg8lRSMoQJOAW53fQ/QuaNW16fdVuzpzxFf0LB9t3uTq7UagWvtYgE+vYJ iUIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1+LHi+MwDv8WRRjPrUiQv8yGNTdHo3x15N4GYRkE264=; b=TrjFTb6/uLbCTtLQRtgK3LjZ4rCTDEkyoXostSzWLu21Nqp8nICf+RWfRLktWImEGD BoSHIGuvWJ5c650DBN65fh8nZonUVNJQwznML17Gj0APQACUK+K9RbcgX6XFvg84RSIY 2RvKZN4KQwmlmiA3NPpSqNsW5bSKflZ7x4j6ClLFSN/xUTRfuEEYbgH3JFoxz6Oh3qdz JaNtgsbecnxgxg9v8hE+W7+oU15IEGW28PRDfCH68aDXy7ToGdK9eCAReG20+iOpukU+ sO0QVRDfSaWFGl1BCEkQiQUQw0K7+TBXGktZWAgEYrQNRq//vx3li28H4ZpuIX3OgknL 0H9Q== X-Gm-Message-State: AOAM531vOntiz0+9n+76iLjim1qm7OyGElFDCdO8oRk53kRnaAIvQIGy UHLRzU8qoDzmmp4EghCOIPu8QyxTlckJbQen X-Google-Smtp-Source: ABdhPJymyYvZTAnScNlEYMGkGZ1+HpzxbHClfmbgKpIIP2rtTZ8Xl1m50Lz7Vm/jdjZLtKZFlNSJFA== X-Received: by 2002:a17:902:a9c3:b0:14a:d1dc:303 with SMTP id b3-20020a170902a9c300b0014ad1dc0303mr1775386plr.86.1642470344423; Mon, 17 Jan 2022 17:45:44 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.45.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:45:43 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 05/17] target/riscv: rvv-1.0: Add Zve64f support for vsmul.vv and vsmul.vx insns Date: Tue, 18 Jan 2022 09:45:08 +0800 Message-Id: <20220118014522.13613-6-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::633 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=frank.chang@sifive.com; helo=mail-pl1-x633.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Frank Chang , Bin Meng , Richard Henderson , Alistair Francis , Palmer Dabbelt , LIU Zhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang All Zve* extensions support all vector fixed-point arithmetic instructions, except that vsmul.vv and vsmul.vx are not supported for EEW=64 in Zve64*. Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rvv.c.inc | 27 +++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index e64dddda28..8e493b7933 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -2123,8 +2123,31 @@ GEN_OPIVX_TRANS(vasub_vx, opivx_check) GEN_OPIVX_TRANS(vasubu_vx, opivx_check) /* Vector Single-Width Fractional Multiply with Rounding and Saturation */ -GEN_OPIVV_TRANS(vsmul_vv, opivv_check) -GEN_OPIVX_TRANS(vsmul_vx, opivx_check) + +static bool vsmul_vv_check(DisasContext *s, arg_rmrr *a) +{ + /* + * All Zve* extensions support all vector fixed-point arithmetic + * instructions, except that vsmul.vv and vsmul.vx are not supported + * for EEW=64 in Zve64*. (Section 18.2) + */ + return opivv_check(s, a) && + (!has_ext(s, RVV) && s->ext_zve64f ? s->sew != MO_64 : true); +} + +static bool vsmul_vx_check(DisasContext *s, arg_rmrr *a) +{ + /* + * All Zve* extensions support all vector fixed-point arithmetic + * instructions, except that vsmul.vv and vsmul.vx are not supported + * for EEW=64 in Zve64*. (Section 18.2) + */ + return opivx_check(s, a) && + (!has_ext(s, RVV) && s->ext_zve64f ? s->sew != MO_64 : true); +} + +GEN_OPIVV_TRANS(vsmul_vv, vsmul_vv_check) +GEN_OPIVX_TRANS(vsmul_vx, vsmul_vx_check) /* Vector Single-Width Scaling Shift Instructions */ GEN_OPIVV_TRANS(vssrl_vv, opivv_check) From patchwork Tue Jan 18 01:45:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Chang X-Patchwork-Id: 12715822 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AC020C433F5 for ; Tue, 18 Jan 2022 02:01:49 +0000 (UTC) Received: from localhost ([::1]:56500 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n9doi-000213-Mm for qemu-devel@archiver.kernel.org; Mon, 17 Jan 2022 21:01:48 -0500 Received: from eggs.gnu.org ([209.51.188.92]:50482) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n9dZH-0000FY-Gr for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:46:00 -0500 Received: from [2607:f8b0:4864:20::530] (port=35812 helo=mail-pg1-x530.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1n9dZF-0007TU-La for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:45:51 -0500 Received: by mail-pg1-x530.google.com with SMTP id p125so1277224pga.2 for ; Mon, 17 Jan 2022 17:45:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kmGLBeYJtQdrHYl1yWO9CEisyBhnQs1aM9ox720afbw=; b=Db0D8xBNyn5nyHadlHXfCnTScmAgNBGACBSOl4jqllmjP/PSDJNw8StXNg784Q6zN/ 4nsgVhXgNWP4XMbrjdXQzOrH0zTqIfi3qZ4eTOrulx5F+F6sHGzs2aShmFcP/zhjZUpE b4oNt+XB52q0oRIiux22o1GGnkyOne1Y3WSE7qrPH8aoukTZ9z/GijrOt9FAGJ6Wni0Q 5HVZk9d5YAIgBabM4+JF8YU5+msloA7CqQxp6BoWuEJb9RlHcJ9XZ7xqlNzRawpHX9Ce zGPRm7tY+2krKFw49UI/5hXS7pD6JV69bWYoTDVEUWdd39e2EzOoL6Iga8vNcCoY4f4p OC/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kmGLBeYJtQdrHYl1yWO9CEisyBhnQs1aM9ox720afbw=; b=Csg92AQuJ4CwBa70jNqpN+UvjUDBQM+gVxa8D1cDJc/lwdDlPhHecw6J4cKbKoaWh9 4pmM6a1U2TSSob+3x1dVgl3jBQI8brMGJ97+5aRKDijqhzaswyh3n16mZWdtWIwnKLoW GIGUPEU0XYkRpSSevwFGE74IvJOyE0CSbgm0LASa6KMXHA+ItzqynHcEBG6Zxhj9ujf8 hZpqey4le7TmjvcjwkcDk12yj9vu/F2BWX6DuoGOmDEAA2mL7zKdC0Xlb9YaVgMPPkyz Kyc3hqcUXvpDB91NkzbfY2hRofErQNEaAHHjmd3wzzWVTNQjVS/huUoQ4wA5uCRw2W2P aV7A== X-Gm-Message-State: AOAM530AMSavdRoNC2bW2fzM7RhPDpyxZFClRlWi3wfxeKFgT/dkD0/D AnlZ2PVUd6VRuX0TKxagUGnNbC5FvlYXkOZw X-Google-Smtp-Source: ABdhPJx4IinryJU+h21BUV+YgSLrPIfgWSbqvkBpaczpzO1QHkylEZ13Sw8BpYAYUburrm6bUBD6tQ== X-Received: by 2002:a63:6c04:: with SMTP id h4mr21066744pgc.30.1642470347826; Mon, 17 Jan 2022 17:45:47 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.45.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:45:47 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 06/17] target/riscv: rvv-1.0: Add Zve64f support for scalar fp insns Date: Tue, 18 Jan 2022 09:45:09 +0800 Message-Id: <20220118014522.13613-7-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::530 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::530; envelope-from=frank.chang@sifive.com; helo=mail-pg1-x530.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Frank Chang , Bin Meng , Richard Henderson , Alistair Francis , Palmer Dabbelt , LIU Zhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang Zve64f extension requires the scalar processor to implement the F extension and implement all vector floating-point instructions for floating-point operands with EEW=32 (i.e., no widening floating-point operations). Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rvv.c.inc | 41 +++++++++++++++++++------ 1 file changed, 31 insertions(+), 10 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 8e493b7933..56246a5d88 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -66,6 +66,17 @@ static bool require_scale_rvf(DisasContext *s) } } +static bool require_zve64f(DisasContext *s) +{ + /* RVV + Zve64f = RVV. */ + if (has_ext(s, RVV)) { + return true; + } + + /* Zve64f doesn't support FP64. (Section 18.2) */ + return s->ext_zve64f ? s->sew <= MO_32 : true; +} + /* Destination vector register group cannot overlap source mask register. */ static bool require_vm(int vm, int vd) { @@ -2206,7 +2217,8 @@ static bool opfvv_check(DisasContext *s, arg_rmrr *a) return require_rvv(s) && require_rvf(s) && vext_check_isa_ill(s) && - vext_check_sss(s, a->rd, a->rs1, a->rs2, a->vm); + vext_check_sss(s, a->rd, a->rs1, a->rs2, a->vm) && + require_zve64f(s); } /* OPFVV without GVEC IR */ @@ -2286,7 +2298,8 @@ static bool opfvf_check(DisasContext *s, arg_rmrr *a) return require_rvv(s) && require_rvf(s) && vext_check_isa_ill(s) && - vext_check_ss(s, a->rd, a->rs2, a->vm); + vext_check_ss(s, a->rd, a->rs2, a->vm) && + require_zve64f(s); } /* OPFVF without GVEC IR */ @@ -2503,7 +2516,8 @@ static bool opfv_check(DisasContext *s, arg_rmr *a) require_rvf(s) && vext_check_isa_ill(s) && /* OPFV instructions ignore vs1 check */ - vext_check_ss(s, a->rd, a->rs2, a->vm); + vext_check_ss(s, a->rd, a->rs2, a->vm) && + require_zve64f(s); } static bool do_opfv(DisasContext *s, arg_rmr *a, @@ -2568,7 +2582,8 @@ static bool opfvv_cmp_check(DisasContext *s, arg_rmrr *a) return require_rvv(s) && require_rvf(s) && vext_check_isa_ill(s) && - vext_check_mss(s, a->rd, a->rs1, a->rs2); + vext_check_mss(s, a->rd, a->rs1, a->rs2) && + require_zve64f(s); } GEN_OPFVV_TRANS(vmfeq_vv, opfvv_cmp_check) @@ -2581,7 +2596,8 @@ static bool opfvf_cmp_check(DisasContext *s, arg_rmrr *a) return require_rvv(s) && require_rvf(s) && vext_check_isa_ill(s) && - vext_check_ms(s, a->rd, a->rs2); + vext_check_ms(s, a->rd, a->rs2) && + require_zve64f(s); } GEN_OPFVF_TRANS(vmfeq_vf, opfvf_cmp_check) @@ -2602,7 +2618,8 @@ static bool trans_vfmv_v_f(DisasContext *s, arg_vfmv_v_f *a) if (require_rvv(s) && require_rvf(s) && vext_check_isa_ill(s) && - require_align(a->rd, s->lmul)) { + require_align(a->rd, s->lmul) && + require_zve64f(s)) { gen_set_rm(s, RISCV_FRM_DYN); TCGv_i64 t1; @@ -3328,7 +3345,8 @@ static bool trans_vfmv_f_s(DisasContext *s, arg_vfmv_f_s *a) { if (require_rvv(s) && require_rvf(s) && - vext_check_isa_ill(s)) { + vext_check_isa_ill(s) && + require_zve64f(s)) { gen_set_rm(s, RISCV_FRM_DYN); unsigned int ofs = (8 << s->sew); @@ -3354,7 +3372,8 @@ static bool trans_vfmv_s_f(DisasContext *s, arg_vfmv_s_f *a) { if (require_rvv(s) && require_rvf(s) && - vext_check_isa_ill(s)) { + vext_check_isa_ill(s) && + require_zve64f(s)) { gen_set_rm(s, RISCV_FRM_DYN); /* The instructions ignore LMUL and vector register group. */ @@ -3405,13 +3424,15 @@ GEN_OPIVI_TRANS(vslidedown_vi, IMM_ZX, vslidedown_vx, slidedown_check) static bool fslideup_check(DisasContext *s, arg_rmrr *a) { return slideup_check(s, a) && - require_rvf(s); + require_rvf(s) && + require_zve64f(s); } static bool fslidedown_check(DisasContext *s, arg_rmrr *a) { return slidedown_check(s, a) && - require_rvf(s); + require_rvf(s) && + require_zve64f(s); } GEN_OPFVF_TRANS(vfslide1up_vf, fslideup_check) From patchwork Tue Jan 18 01:45:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Chang X-Patchwork-Id: 12715812 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CD1EDC433EF for ; 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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.45.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:45:50 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 07/17] target/riscv: rvv-1.0: Add Zve64f support for single-width fp reduction insns Date: Tue, 18 Jan 2022 09:45:10 +0800 Message-Id: <20220118014522.13613-8-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1035 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=frank.chang@sifive.com; helo=mail-pj1-x1035.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Frank Chang , Bin Meng , Richard Henderson , Alistair Francis , Palmer Dabbelt , LIU Zhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang Vector single-width floating-point reduction operations for EEW=32 are supported for Zve64f extension. Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rvv.c.inc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 56246a5d88..08f25e3ce4 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -2937,7 +2937,8 @@ GEN_OPIVV_WIDEN_TRANS(vwredsumu_vs, reduction_widen_check) static bool freduction_check(DisasContext *s, arg_rmrr *a) { return reduction_check(s, a) && - require_rvf(s); + require_rvf(s) && + require_zve64f(s); } GEN_OPFVV_TRANS(vfredsum_vs, freduction_check) From patchwork Tue Jan 18 01:45:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Chang X-Patchwork-Id: 12715826 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 590EEC433F5 for ; Tue, 18 Jan 2022 02:04:20 +0000 (UTC) Received: from localhost ([::1]:34752 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n9dr6-0006Oz-UF for qemu-devel@archiver.kernel.org; Mon, 17 Jan 2022 21:04:17 -0500 Received: from eggs.gnu.org ([209.51.188.92]:50584) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n9dZO-0000Hw-Ss for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:46:02 -0500 Received: from [2607:f8b0:4864:20::62e] (port=37591 helo=mail-pl1-x62e.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1n9dZM-0007Vc-2B for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:45:58 -0500 Received: by mail-pl1-x62e.google.com with SMTP id n11so21019736plf.4 for ; Mon, 17 Jan 2022 17:45:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6X6uKJ2JNZMFaH4JOhQuJr7oqwjryS8q6Pz6EFPHQyM=; b=eYbdtwT/7C7Dpb1/QQi2ZR1H4GSx3Fjf1pvuQrNJDqc9mimKY0NqL2schChYpLbzFI stLQ4NjCqdpsMb0S9pvOzI2fdmbdS+rDELXR6U8Fe9H/jpH2YuyG6DqL89IAGsURpypt IzuRorZVUbh9gRrI5LfobGLfb02rKDeMSJIj5ZRgQLWPJZ0idkdH+//vMnlqL9CSWqgA p8aMyngtak6gTY8nsTkQ9LoCXE01ubRngi/C/sW6Cib/7kd3FSTnXU5n7qAx6kuTtVdH nzPp8LMvtW2brxp4qo2CxZB7QAF4DGE1gUj31OYNEDi3Ay2mm4j6SDn9JTB3EUKL9Niz YT6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6X6uKJ2JNZMFaH4JOhQuJr7oqwjryS8q6Pz6EFPHQyM=; b=5HRVSt9DKINtHYYi24FF8Qh7r1Bh8uozyztQSalpiyf0oys9k1tXmxsSPJMFWcMVat TM/25byLz+KbTQ/a2GxJA3Kw3znbTqVVcKy0LH0cQcANzr2SLQBZmc4vKb52D9gkwtJU vEhXt3uCQV3kUTFdmqzYOwA2xAg6AgwmXg6i0sRmbVZ+lXQv5OFMRtMkbnpfYlY0pans S93TjV3/secm8UDt5/KjrCptuCP60HzFaKsCZi+ZOrWcdIP0fzhpq6emt0uJ/rERFbZs JxJMDaL19KZQ7Bpfqsy1on7oOufE+gh2Jv4l/TYk0eTitrq0zPKIDNE6Rdhf7Aoe6vkT /fMQ== X-Gm-Message-State: AOAM533UrVA2jf+/7DJTSFwn7/lBTkD3MJDDDvatdPZI5O0A65dpRWtV 1FSoS2LvqyApiZciuVjA34CQUzgIXCMQHfPu X-Google-Smtp-Source: ABdhPJz0eqcEWHNOc3M5yqgfSSniQdIyh01JE7Iku7dKxLHv8IhV/8lG8NuRnU8BtLhVi6R52o1iLA== X-Received: by 2002:a17:902:b78b:b0:14a:1f78:2739 with SMTP id e11-20020a170902b78b00b0014a1f782739mr25150927pls.45.1642470354640; Mon, 17 Jan 2022 17:45:54 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.45.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:45:54 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 08/17] target/riscv: rvv-1.0: Add Zve64f support for widening type-convert insns Date: Tue, 18 Jan 2022 09:45:11 +0800 Message-Id: <20220118014522.13613-9-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::62e (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=frank.chang@sifive.com; helo=mail-pl1-x62e.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Frank Chang , Bin Meng , Richard Henderson , Alistair Francis , Palmer Dabbelt , LIU Zhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang Vector widening conversion instructions are provided to and from all supported integer EEWs for Zve64f extension. Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rvv.c.inc | 32 +++++++++++++++++++------ 1 file changed, 25 insertions(+), 7 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 08f25e3ce4..58f12366dd 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -77,6 +77,17 @@ static bool require_zve64f(DisasContext *s) return s->ext_zve64f ? s->sew <= MO_32 : true; } +static bool require_scale_zve64f(DisasContext *s) +{ + /* RVV + Zve64f = RVV. */ + if (has_ext(s, RVV)) { + return true; + } + + /* Zve64f doesn't support FP64. (Section 18.2) */ + return s->ext_zve64f ? s->sew <= MO_16 : true; +} + /* Destination vector register group cannot overlap source mask register. */ static bool require_vm(int vm, int vd) { @@ -2333,7 +2344,8 @@ static bool opfvv_widen_check(DisasContext *s, arg_rmrr *a) require_scale_rvf(s) && (s->sew != MO_8) && vext_check_isa_ill(s) && - vext_check_dss(s, a->rd, a->rs1, a->rs2, a->vm); + vext_check_dss(s, a->rd, a->rs1, a->rs2, a->vm) && + require_scale_zve64f(s); } /* OPFVV with WIDEN */ @@ -2372,7 +2384,8 @@ static bool opfvf_widen_check(DisasContext *s, arg_rmrr *a) require_scale_rvf(s) && (s->sew != MO_8) && vext_check_isa_ill(s) && - vext_check_ds(s, a->rd, a->rs2, a->vm); + vext_check_ds(s, a->rd, a->rs2, a->vm) && + require_scale_zve64f(s); } /* OPFVF with WIDEN */ @@ -2402,7 +2415,8 @@ static bool opfwv_widen_check(DisasContext *s, arg_rmrr *a) require_scale_rvf(s) && (s->sew != MO_8) && vext_check_isa_ill(s) && - vext_check_dds(s, a->rd, a->rs1, a->rs2, a->vm); + vext_check_dds(s, a->rd, a->rs1, a->rs2, a->vm) && + require_scale_zve64f(s); } /* WIDEN OPFVV with WIDEN */ @@ -2441,7 +2455,8 @@ static bool opfwf_widen_check(DisasContext *s, arg_rmrr *a) require_scale_rvf(s) && (s->sew != MO_8) && vext_check_isa_ill(s) && - vext_check_dd(s, a->rd, a->rs2, a->vm); + vext_check_dd(s, a->rd, a->rs2, a->vm) && + require_scale_zve64f(s); } /* WIDEN OPFVF with WIDEN */ @@ -2700,14 +2715,16 @@ static bool opfv_widen_check(DisasContext *s, arg_rmr *a) static bool opxfv_widen_check(DisasContext *s, arg_rmr *a) { return opfv_widen_check(s, a) && - require_rvf(s); + require_rvf(s) && + require_zve64f(s); } static bool opffv_widen_check(DisasContext *s, arg_rmr *a) { return opfv_widen_check(s, a) && require_scale_rvf(s) && - (s->sew != MO_8); + (s->sew != MO_8) && + require_scale_zve64f(s); } #define GEN_OPFV_WIDEN_TRANS(NAME, CHECK, HELPER, FRM) \ @@ -2758,7 +2775,8 @@ static bool opfxv_widen_check(DisasContext *s, arg_rmr *a) require_scale_rvf(s) && vext_check_isa_ill(s) && /* OPFV widening instructions ignore vs1 check */ - vext_check_ds(s, a->rd, a->rs2, a->vm); + vext_check_ds(s, a->rd, a->rs2, a->vm) && + require_scale_zve64f(s); } #define GEN_OPFXV_WIDEN_TRANS(NAME) \ From patchwork Tue Jan 18 01:45:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Chang X-Patchwork-Id: 12715806 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 10D5BC433F5 for ; Tue, 18 Jan 2022 01:52:49 +0000 (UTC) Received: from localhost ([::1]:39856 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n9dg0-0006jv-6C for qemu-devel@archiver.kernel.org; Mon, 17 Jan 2022 20:52:48 -0500 Received: from eggs.gnu.org ([209.51.188.92]:50616) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n9dZR-0000Im-0q for qemu-devel@nongnu.org; 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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.45.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:45:57 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 09/17] target/riscv: rvv-1.0: Add Zve64f support for narrowing type-convert insns Date: Tue, 18 Jan 2022 09:45:12 +0800 Message-Id: <20220118014522.13613-10-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52d (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=frank.chang@sifive.com; helo=mail-pg1-x52d.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Frank Chang , Bin Meng , Richard Henderson , Alistair Francis , Palmer Dabbelt , LIU Zhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang Vector narrowing conversion instructions are provided to and from all supported integer EEWs for Zve64f extension. Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rvv.c.inc | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 58f12366dd..9fa3862620 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -2826,14 +2826,16 @@ static bool opfxv_narrow_check(DisasContext *s, arg_rmr *a) { return opfv_narrow_check(s, a) && require_rvf(s) && - (s->sew != MO_64); + (s->sew != MO_64) && + require_zve64f(s); } static bool opffv_narrow_check(DisasContext *s, arg_rmr *a) { return opfv_narrow_check(s, a) && require_scale_rvf(s) && - (s->sew != MO_8); + (s->sew != MO_8) && + require_scale_zve64f(s); } #define GEN_OPFV_NARROW_TRANS(NAME, CHECK, HELPER, FRM) \ @@ -2882,7 +2884,8 @@ static bool opxfv_narrow_check(DisasContext *s, arg_rmr *a) require_scale_rvf(s) && vext_check_isa_ill(s) && /* OPFV narrowing instructions ignore vs1 check */ - vext_check_sd(s, a->rd, a->rs2, a->vm); + vext_check_sd(s, a->rd, a->rs2, a->vm) && + require_scale_zve64f(s); } #define GEN_OPXFV_NARROW_TRANS(NAME, HELPER, FRM) \ From patchwork Tue Jan 18 01:45:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Chang X-Patchwork-Id: 12715828 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DACE5C433F5 for ; Tue, 18 Jan 2022 02:08:06 +0000 (UTC) Received: from localhost ([::1]:40486 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n9dun-0001uU-Pz for qemu-devel@archiver.kernel.org; Mon, 17 Jan 2022 21:08:05 -0500 Received: from eggs.gnu.org ([209.51.188.92]:50664) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n9dZV-0000LM-IT for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:46:07 -0500 Received: from [2607:f8b0:4864:20::1030] (port=54087 helo=mail-pj1-x1030.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1n9dZS-0007Wp-KP for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:46:05 -0500 Received: by mail-pj1-x1030.google.com with SMTP id o62so149873pjo.3 for ; Mon, 17 Jan 2022 17:46:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0E+jsSIyhESPgE5vQhhkoZMMUENEo08068vAmOzqG14=; b=YMyGDGrhEKUmzBn77M+ZTKOtrIf/LHHSs7kMB6BiGTfvLXzW/q5AF2pToBccAP7bk3 60Zf9BlMc/GjN6SqTiXVqnK8ZroByB1NQQz5oc0TK6LaaYK6Du0PoNGOYBrFWaFJ1Gv2 Im6TChmYUiQnIxxfFZwFBl6NVoVjiT7rmMCaJbas8y76tK425lb+N/F0N//1ZywNSaNT NifwYVMwcH+QUgg0dDxW8lyBS+q/6WofqMEBtp5gP9lCK/Ayj7tfzxJzIcDyZAsI4crq Znq/FFACUGTwdgzvf7zFkHn32GFaYP9LF1SU9JO2BQd66N++TCjhWiAUmI1wj9t9YCbp ku+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0E+jsSIyhESPgE5vQhhkoZMMUENEo08068vAmOzqG14=; b=j8H20/amuldod03zlHR0OvG023zonIdRo4nHDKeZj6XAprF+ZYfe6nueqcaCzi94fA EaIAT4OITei39pTvSSSGvEAxlUInbuHhVPJk5dFOc8ui30xoAKKCtyFsrCVzmf4TOWF4 7cyRJs1xtSHSqVhSSZE9TNYMD4UVL/4LWRYsgYmPlB26/+zZM+p6FN2AaQAniBn96KNZ 8crvV2svr0GNjqbqoozmzNLS+Xy+w03Mgi0wX2dDWVBXdboj27N64uUBPNHOyRi4HyXh CTqeCsmW9G8bKKvsZ6bNUekoHqI2pE9MJSZqa39CyzE99C04fN6AFo0znN1LhZkzbfPx w72Q== X-Gm-Message-State: AOAM532WuerrEqtX9weGkiAPm5YC8/YLOwaNOtv9QZKVqVQlXWyU8xpN DpXRIUN+RG1VSq2xcQx0pDhNhdWe31ZXXJXM X-Google-Smtp-Source: ABdhPJxzcAXcPCPbYEYxRZ42tluuoRli3d4mt5q1ecPD94GnYtNsCIaN/aVIClqAfMjZkieNBYBeMg== X-Received: by 2002:a17:90b:4b8c:: with SMTP id lr12mr21913651pjb.32.1642470361093; Mon, 17 Jan 2022 17:46:01 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.45.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:46:00 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 10/17] target/riscv: rvv-1.0: Allow Zve64f extension to be turned on Date: Tue, 18 Jan 2022 09:45:13 +0800 Message-Id: <20220118014522.13613-11-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1030 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=frank.chang@sifive.com; helo=mail-pj1-x1030.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Frank Chang , Alistair Francis , Bin Meng , qemu-riscv@nongnu.org, Palmer Dabbelt Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 2ba22503da..4bca1cd289 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -664,6 +664,7 @@ static Property riscv_cpu_properties[] = { DEFINE_PROP_BOOL("Zicsr", RISCVCPU, cfg.ext_icsr, true), DEFINE_PROP_BOOL("Zfh", RISCVCPU, cfg.ext_zfh, false), DEFINE_PROP_BOOL("Zfhmin", RISCVCPU, cfg.ext_zfhmin, false), + DEFINE_PROP_BOOL("Zve64f", RISCVCPU, cfg.ext_zve64f, false), DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true), DEFINE_PROP_BOOL("pmp", RISCVCPU, cfg.pmp, true), From patchwork Tue Jan 18 01:45:14 2022 Content-Type: text/plain; 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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.46.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:46:03 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 11/17] target/riscv: rvv-1.0: Add Zve32f extension into RISC-V Date: Tue, 18 Jan 2022 09:45:14 +0800 Message-Id: <20220118014522.13613-12-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::52f (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=frank.chang@sifive.com; helo=mail-pg1-x52f.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Frank Chang , Alistair Francis , Bin Meng , qemu-riscv@nongnu.org, Palmer Dabbelt Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 4 ++-- target/riscv/cpu.h | 1 + target/riscv/cpu_helper.c | 2 +- target/riscv/csr.c | 2 +- target/riscv/translate.c | 2 ++ 5 files changed, 7 insertions(+), 4 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 4bca1cd289..0898954c02 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -589,8 +589,8 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) } set_vext_version(env, vext_version); } - if (cpu->cfg.ext_zve64f && !cpu->cfg.ext_f) { - error_setg(errp, "Zve64f extension depends upon RVF."); + if ((cpu->cfg.ext_zve32f || cpu->cfg.ext_zve64f) && !cpu->cfg.ext_f) { + error_setg(errp, "Zve32f/Zve64f extension depends upon RVF."); return; } if (cpu->cfg.ext_j) { diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 86cc94d3bb..21772496b3 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -329,6 +329,7 @@ struct RISCVCPU { bool ext_icsr; bool ext_zfh; bool ext_zfhmin; + bool ext_zve32f; bool ext_zve64f; char *priv_spec; diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 43d498aae1..afee770951 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -77,7 +77,7 @@ void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc, *pc = env->pc; *cs_base = 0; - if (riscv_has_ext(env, RVV) || cpu->cfg.ext_zve64f) { + if (riscv_has_ext(env, RVV) || cpu->cfg.ext_zve32f || cpu->cfg.ext_zve64f) { /* * If env->vl equals to VLMAX, we can use generic vector operation * expanders (GVEC) to accerlate the vector operations. diff --git a/target/riscv/csr.c b/target/riscv/csr.c index e9311cfd9d..a9e7ac903b 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -51,7 +51,7 @@ static RISCVException vs(CPURISCVState *env, int csrno) RISCVCPU *cpu = RISCV_CPU(cs); if (env->misa_ext & RVV || - cpu->cfg.ext_zve64f) { + cpu->cfg.ext_zve32f || cpu->cfg.ext_zve64f) { #if !defined(CONFIG_USER_ONLY) if (!env->debugger && !riscv_cpu_vector_enabled(env)) { return RISCV_EXCP_ILLEGAL_INST; diff --git a/target/riscv/translate.c b/target/riscv/translate.c index d3c0d44e2e..330904265e 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -79,6 +79,7 @@ typedef struct DisasContext { bool ext_ifencei; bool ext_zfh; bool ext_zfhmin; + bool ext_zve32f; bool ext_zve64f; bool hlsx; /* vector extension */ @@ -895,6 +896,7 @@ static void riscv_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) ctx->ext_ifencei = cpu->cfg.ext_ifencei; ctx->ext_zfh = cpu->cfg.ext_zfh; ctx->ext_zfhmin = cpu->cfg.ext_zfhmin; + ctx->ext_zve32f = cpu->cfg.ext_zve32f; ctx->ext_zve64f = cpu->cfg.ext_zve64f; ctx->vlen = cpu->cfg.vlen; ctx->elen = cpu->cfg.elen; From patchwork Tue Jan 18 01:45:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Chang X-Patchwork-Id: 12715830 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A5AF9C433EF for ; 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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.46.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:46:07 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 12/17] target/riscv: rvv-1.0: Add Zve32f support for configuration insns Date: Tue, 18 Jan 2022 09:45:15 +0800 Message-Id: <20220118014522.13613-13-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42f (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=frank.chang@sifive.com; helo=mail-pf1-x42f.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Frank Chang , Bin Meng , Richard Henderson , Alistair Francis , Palmer Dabbelt , LIU Zhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang All Zve* extensions support the vector configuration instructions. Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rvv.c.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 9fa3862620..fd6e74c232 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -152,7 +152,7 @@ static bool do_vsetvl(DisasContext *s, int rd, int rs1, TCGv s2) TCGv s1, dst; if (!require_rvv(s) || - !(has_ext(s, RVV) || s->ext_zve64f)) { + !(has_ext(s, RVV) || s->ext_zve32f || s->ext_zve64f)) { return false; } @@ -188,7 +188,7 @@ static bool do_vsetivli(DisasContext *s, int rd, TCGv s1, TCGv s2) TCGv dst; if (!require_rvv(s) || - !(has_ext(s, RVV) || s->ext_zve64f)) { + !(has_ext(s, RVV) || s->ext_zve32f || s->ext_zve64f)) { return false; } From patchwork Tue Jan 18 01:45:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Chang X-Patchwork-Id: 12715811 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A934AC433EF for ; Tue, 18 Jan 2022 01:56:17 +0000 (UTC) Received: from localhost ([::1]:47266 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n9djM-0004CY-NF for qemu-devel@archiver.kernel.org; Mon, 17 Jan 2022 20:56:16 -0500 Received: from eggs.gnu.org ([209.51.188.92]:50774) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n9dZe-0000i0-9b for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:46:14 -0500 Received: from [2607:f8b0:4864:20::102d] (port=37726 helo=mail-pj1-x102d.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1n9dZc-0007bX-Cp for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:46:13 -0500 Received: by mail-pj1-x102d.google.com with SMTP id z17-20020a17090ab11100b001b4d8817e04so5571pjq.2 for ; Mon, 17 Jan 2022 17:46:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZUyO5s8ENw2LP2qrVziOGLZWVALkqMJ2OuVxDBZjPqU=; b=QFYApEnIp0unUWejFD6kofcxESR6ePuDQL5WzHz1eUuOwhd25oum0fIS0bVX9stTMg 9D7fP0ovj2bAaSLAuKQbpfHdrXuSfIHts78kjPjK5rFTel95tu221HuEnJLbzE52Uz4Z VZrdKzj3fxmnSRVDcRpB4mabVhR9hz69W8T+tjjrRC1H2TJwBxqVTEWHk8DIre4TUvBO PmZJy6Yt2wCHBd7cFwFh4KloME1wZR21atci5GkGhWDmq87w3YaNqmfG3qMTgO+BiHDF SJEYbHbgVNRYn74fns7liciAq6CFr3wLXa/wrNmLruITZzzEvt2c9u3T0RWY2L3WaM5o EbGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZUyO5s8ENw2LP2qrVziOGLZWVALkqMJ2OuVxDBZjPqU=; b=CK1L2ns70DdOAY57JdzYViWKThrDz3E0YW/p0+hLDpxyQpfEYfW949v0OzywlZWYiI smgrks1wrE44VPPZx5RDolE6fQULkxD6NVzxIO5LGYz3UlVta6Wt+rVGk+bbpGTsDKWu husAwSsJf+7AesMzv2RzHkaMtgv3FpcdgL7KmhRCawppVe05DVYRW5Qqz1GdRMR3XUSK bpVs3+pVkW2hZCB6sNNdxA1P8xoV4QM+WT01jsuxAtWTtqF46PorUKnr1y2+lTuLLtQO bDFjT0jc6chhlnoDf50ktGjoM+aoY+Ad3STpY/Zmq2afEGDY2tZwBCW4J0/5DytiL+Ty 8T4A== X-Gm-Message-State: AOAM530/JrDONmQ2acsbD1F/PNe6deavXg7bkDCnT54F5glih9dddv5L 6pvRha2s2a9Iw/i20hNFOSHo+vKUoZR9J8UZ X-Google-Smtp-Source: ABdhPJxelBnx17VaSOh1TXY6ydy3Rneafv6xnfOnuvNEcpiHi5kTEfpfjyLdpLON4W/grgsjXzaNYQ== X-Received: by 2002:a17:902:7001:b0:14a:9ab0:5d03 with SMTP id y1-20020a170902700100b0014a9ab05d03mr15108156plk.128.1642470370749; Mon, 17 Jan 2022 17:46:10 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.46.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:46:10 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 13/17] target/riscv: rvv-1.0: Add Zve32f support for scalar fp insns Date: Tue, 18 Jan 2022 09:45:16 +0800 Message-Id: <20220118014522.13613-14-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::102d (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=frank.chang@sifive.com; helo=mail-pj1-x102d.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Frank Chang , Bin Meng , Richard Henderson , Alistair Francis , Palmer Dabbelt , LIU Zhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang Zve32f extension requires the scalar processor to implement the F extension and implement all vector floating-point instructions for floating-point operands with EEW=32 (i.e., no widening floating-point operations). Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rvv.c.inc | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index fd6e74c232..fe4ad5d008 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -66,6 +66,17 @@ static bool require_scale_rvf(DisasContext *s) } } +static bool require_zve32f(DisasContext *s) +{ + /* RVV + Zve32f = RVV. */ + if (has_ext(s, RVV)) { + return true; + } + + /* Zve32f doesn't support FP64. (Section 18.2) */ + return s->ext_zve32f ? s->sew <= MO_32 : true; +} + static bool require_zve64f(DisasContext *s) { /* RVV + Zve64f = RVV. */ @@ -2229,6 +2240,7 @@ static bool opfvv_check(DisasContext *s, arg_rmrr *a) require_rvf(s) && vext_check_isa_ill(s) && vext_check_sss(s, a->rd, a->rs1, a->rs2, a->vm) && + require_zve32f(s) && require_zve64f(s); } @@ -2310,6 +2322,7 @@ static bool opfvf_check(DisasContext *s, arg_rmrr *a) require_rvf(s) && vext_check_isa_ill(s) && vext_check_ss(s, a->rd, a->rs2, a->vm) && + require_zve32f(s) && require_zve64f(s); } @@ -2532,6 +2545,7 @@ static bool opfv_check(DisasContext *s, arg_rmr *a) vext_check_isa_ill(s) && /* OPFV instructions ignore vs1 check */ vext_check_ss(s, a->rd, a->rs2, a->vm) && + require_zve32f(s) && require_zve64f(s); } @@ -2598,6 +2612,7 @@ static bool opfvv_cmp_check(DisasContext *s, arg_rmrr *a) require_rvf(s) && vext_check_isa_ill(s) && vext_check_mss(s, a->rd, a->rs1, a->rs2) && + require_zve32f(s) && require_zve64f(s); } @@ -2612,6 +2627,7 @@ static bool opfvf_cmp_check(DisasContext *s, arg_rmrr *a) require_rvf(s) && vext_check_isa_ill(s) && vext_check_ms(s, a->rd, a->rs2) && + require_zve32f(s) && require_zve64f(s); } @@ -2634,6 +2650,7 @@ static bool trans_vfmv_v_f(DisasContext *s, arg_vfmv_v_f *a) require_rvf(s) && vext_check_isa_ill(s) && require_align(a->rd, s->lmul) && + require_zve32f(s) && require_zve64f(s)) { gen_set_rm(s, RISCV_FRM_DYN); @@ -3368,6 +3385,7 @@ static bool trans_vfmv_f_s(DisasContext *s, arg_vfmv_f_s *a) if (require_rvv(s) && require_rvf(s) && vext_check_isa_ill(s) && + require_zve32f(s) && require_zve64f(s)) { gen_set_rm(s, RISCV_FRM_DYN); @@ -3395,6 +3413,7 @@ static bool trans_vfmv_s_f(DisasContext *s, arg_vfmv_s_f *a) if (require_rvv(s) && require_rvf(s) && vext_check_isa_ill(s) && + require_zve32f(s) && require_zve64f(s)) { gen_set_rm(s, RISCV_FRM_DYN); @@ -3447,6 +3466,7 @@ static bool fslideup_check(DisasContext *s, arg_rmrr *a) { return slideup_check(s, a) && require_rvf(s) && + require_zve32f(s) && require_zve64f(s); } @@ -3454,6 +3474,7 @@ static bool fslidedown_check(DisasContext *s, arg_rmrr *a) { return slidedown_check(s, a) && require_rvf(s) && + require_zve32f(s) && require_zve64f(s); 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Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rvv.c.inc | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index fe4ad5d008..b02bb555a6 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -2976,6 +2976,7 @@ static bool freduction_check(DisasContext *s, arg_rmrr *a) { return reduction_check(s, a) && require_rvf(s) && + require_zve32f(s) && require_zve64f(s); } From patchwork Tue Jan 18 01:45:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Chang X-Patchwork-Id: 12715827 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7A2DCC433F5 for ; Tue, 18 Jan 2022 02:07:08 +0000 (UTC) Received: from localhost ([::1]:39266 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n9dtr-00014a-HT for qemu-devel@archiver.kernel.org; Mon, 17 Jan 2022 21:07:07 -0500 Received: from eggs.gnu.org ([209.51.188.92]:50932) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n9dal-0000uI-Im for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:47:23 -0500 Received: from [2607:f8b0:4864:20::1031] (port=51832 helo=mail-pj1-x1031.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1n9da0-0007eA-9Y for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:46:56 -0500 Received: by mail-pj1-x1031.google.com with SMTP id o3so21947013pjs.1 for ; Mon, 17 Jan 2022 17:46:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3KXfyIgNNfg76I5EkwaL7PW/lgAedfx1kwsBP2EJ2oo=; b=Vqa0YTZQ/ue8eGYogQqt6gUIpvbMd3V9vOZqAKAcdv48EyAkJ3o/fB96D+nrQaJNzK yeq6pA64zvOWawqfoL+GmjTV878Ev1nB3sefDuMna/NtZSm4XY5gcUKs+cHB+xOf/MYg AMoBGPqewF2BoECXQnYwcuToaDJ3Ur+yRc7XmlkHznSTmsYdwz+63omPN8xmwsnMdloZ E0Dunh+kOs32T3rEBZdfmKpFf5Vy7e45PACrkHYKJpYZqIpmGBZw//dzjbSfCPAvXWVw zSJnYn8+i6rriCQgz9xL7PQK7qOeV3mWGnVRs59nqpGwavq45mrN4IYskuyzVG21Gp+A N7EQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3KXfyIgNNfg76I5EkwaL7PW/lgAedfx1kwsBP2EJ2oo=; b=7RGts+toYnQdUnpQXHA8IVHudTWzoj/j8BT6LzxsCV7ySsJbLxUU3Lb1dHd4r+O9e6 IUnHkQWGV+eYqmYeBDGgpXRBP0HtAjE4coBaN8pPvZrBtJGX5pnzE/hpYIFqPdMxi+m2 /jUJjdGMa1rwd/mxANHqPNeYKDwY6QiKNJWLKFjzaBLQ9kZKO7b9RVFYxENQ6jt+lCL3 jrNpPSs8nBbl+JHVUl/F8BHJBDth4hzWH7GCo7F505hAX/TvAeNd1HcBfSLvnGyoOEN3 J02tThARvtL9iE00UHtf6+bDI5XGUPFoNRQhaz8vDKbNp402Pr+S9/CnhIViV1Bm/DxF MYKw== X-Gm-Message-State: AOAM531zeCDxmUdbyARvIFvtkJOdWTIjg8d52wbFShII/mV7fXzhcFM1 ixuzVQ4aPEuyMn0KWzi3TgNeI/GlXLi8qAgb X-Google-Smtp-Source: ABdhPJx8c/i4zTQldiAU3VhUjl9mXG4q27jKqz0j7Gs8/SH+qk+dptHDpTfJ84HoBuEE3HBKEyCWYg== X-Received: by 2002:a17:90b:4a0e:: with SMTP id kk14mr28092547pjb.12.1642470377345; Mon, 17 Jan 2022 17:46:17 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.46.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:46:16 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 15/17] target/riscv: rvv-1.0: Add Zve32f support for widening type-convert insns Date: Tue, 18 Jan 2022 09:45:18 +0800 Message-Id: <20220118014522.13613-16-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1031 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=frank.chang@sifive.com; helo=mail-pj1-x1031.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Frank Chang , Bin Meng , Richard Henderson , Alistair Francis , Palmer Dabbelt , LIU Zhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang Vector widening conversion instructions are provided to and from all supported integer EEWs for Zve32f extension. Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rvv.c.inc | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index b02bb555a6..f2d3c9e8b9 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -77,6 +77,17 @@ static bool require_zve32f(DisasContext *s) return s->ext_zve32f ? s->sew <= MO_32 : true; } +static bool require_scale_zve32f(DisasContext *s) +{ + /* RVV + Zve32f = RVV. */ + if (has_ext(s, RVV)) { + return true; + } + + /* Zve32f doesn't support FP64. (Section 18.2) */ + return s->ext_zve64f ? s->sew <= MO_16 : true; +} + static bool require_zve64f(DisasContext *s) { /* RVV + Zve64f = RVV. */ @@ -2358,6 +2369,7 @@ static bool opfvv_widen_check(DisasContext *s, arg_rmrr *a) (s->sew != MO_8) && vext_check_isa_ill(s) && vext_check_dss(s, a->rd, a->rs1, a->rs2, a->vm) && + require_scale_zve32f(s) && require_scale_zve64f(s); } @@ -2398,6 +2410,7 @@ static bool opfvf_widen_check(DisasContext *s, arg_rmrr *a) (s->sew != MO_8) && vext_check_isa_ill(s) && vext_check_ds(s, a->rd, a->rs2, a->vm) && + require_scale_zve32f(s) && require_scale_zve64f(s); } @@ -2429,6 +2442,7 @@ static bool opfwv_widen_check(DisasContext *s, arg_rmrr *a) (s->sew != MO_8) && vext_check_isa_ill(s) && vext_check_dds(s, a->rd, a->rs1, a->rs2, a->vm) && + require_scale_zve32f(s) && require_scale_zve64f(s); } @@ -2469,6 +2483,7 @@ static bool opfwf_widen_check(DisasContext *s, arg_rmrr *a) (s->sew != MO_8) && vext_check_isa_ill(s) && vext_check_dd(s, a->rd, a->rs2, a->vm) && + require_scale_zve32f(s) && require_scale_zve64f(s); } @@ -2733,6 +2748,7 @@ static bool opxfv_widen_check(DisasContext *s, arg_rmr *a) { return opfv_widen_check(s, a) && require_rvf(s) && + require_zve32f(s) && require_zve64f(s); } @@ -2741,6 +2757,7 @@ static bool opffv_widen_check(DisasContext *s, arg_rmr *a) return opfv_widen_check(s, a) && require_scale_rvf(s) && (s->sew != MO_8) && + require_scale_zve32f(s) && require_scale_zve64f(s); } @@ -2793,6 +2810,7 @@ static bool opfxv_widen_check(DisasContext *s, arg_rmr *a) vext_check_isa_ill(s) && /* OPFV widening instructions ignore vs1 check */ vext_check_ds(s, a->rd, a->rs2, a->vm) && + require_scale_zve32f(s) && require_scale_zve64f(s); } From patchwork Tue Jan 18 01:45:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Chang X-Patchwork-Id: 12715813 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AD108C433F5 for ; Tue, 18 Jan 2022 01:56:57 +0000 (UTC) Received: from localhost ([::1]:48548 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n9dk0-000552-L2 for qemu-devel@archiver.kernel.org; Mon, 17 Jan 2022 20:56:56 -0500 Received: from eggs.gnu.org ([209.51.188.92]:50990) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n9das-0000wr-3n for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:47:32 -0500 Received: from [2607:f8b0:4864:20::42e] (port=39649 helo=mail-pf1-x42e.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1n9daV-0007eM-NK for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:47:29 -0500 Received: by mail-pf1-x42e.google.com with SMTP id f144so10941278pfa.6 for ; Mon, 17 Jan 2022 17:46:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=CiQ7qpUpeUPn7kb7WI+XOp9OTAKSfxy1iCOYUAh4jxI=; b=WY2ryExIfzybyeoeTMWtp2sDudgvouRRsJBnMG0tbrTZytJrrwX8tXLJqtIOUxGShX MWpnzZ3h1vrRq3aPwpbdwUjQv98aP9D+JUgPQQiq5Mm6vsyzHRPGTPFcDPLelQBnfxYx TH2lBqPKz65cLUEqnSUkz+MbtJzb66XqqDh3DSzBL2TbmqCWP8x9UeCh9wP09yxwKtic 3i9WZAD9+hE+jW2mEiHMCfSgaVrgNN4jZjzAv6+Rzq6G3h/z7AgD/awPGc+RQmfkCO15 ztJf+SaEaqYI2hKoBBYWIAVgfQw1UKCrsXrxzUVsGSJ8Zx8j0RdRcqDD65n299noNdOv evFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CiQ7qpUpeUPn7kb7WI+XOp9OTAKSfxy1iCOYUAh4jxI=; b=ku+/6cR+ra1u1J2R4UwiCz16SF+X8je7J/E4I/Dsb/GKs9iPQjRbQC6IG/F0pagdlK iNJSqfvFMX3xqQ7s2LUJKSge3Na1Dbs9rg0mpK6PrvGra6tDrLW3JNyCwxXwOU5E+LP8 VCxJiDpoSAgaDJxQjQMrSLfcPr3miNoh8xVndEGZqVjauQ4PZXH7XkNc7Ukaf8I1En9f Q4rZh3SszsvT95p/myOQknvM7g4gG6BRIvQiddv2Hu0QA3Ep7Wh8gutvyFl8eRK2RJEm +pjBVIL2Nd9/ys/9uQqOKo6AzjgAMUxI2kP/42t2oLLSybt2sxmig3N1cj4PfKgyxp8s B6dg== X-Gm-Message-State: AOAM5331NPjpFavvOlsAz9DIPjipmJopZK4ljyeh86r5CcUu5YRIkA33 qkWMBQ7jyTUgfUvjNBczs56KmdTiGS4MpcvB X-Google-Smtp-Source: ABdhPJyNa88I+B29WL2w7/JFckta+AUliQ3RiMh3DAo4P0lnTGDLjhYCHtqWKFBKzw33V9uKcCSUbA== X-Received: by 2002:a63:2205:: with SMTP id i5mr1637767pgi.365.1642470380944; Mon, 17 Jan 2022 17:46:20 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.46.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:46:20 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 16/17] target/riscv: rvv-1.0: Add Zve32f support for narrowing type-convert insns Date: Tue, 18 Jan 2022 09:45:19 +0800 Message-Id: <20220118014522.13613-17-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42e (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=frank.chang@sifive.com; helo=mail-pf1-x42e.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Frank Chang , Bin Meng , Richard Henderson , Alistair Francis , Palmer Dabbelt , LIU Zhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang Vector narrowing conversion instructions are provided to and from all supported integer EEWs for Zve32f extension. Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rvv.c.inc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index f2d3c9e8b9..7a040b3089 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -2862,6 +2862,7 @@ static bool opfxv_narrow_check(DisasContext *s, arg_rmr *a) return opfv_narrow_check(s, a) && require_rvf(s) && (s->sew != MO_64) && + require_zve32f(s) && require_zve64f(s); } @@ -2870,6 +2871,7 @@ static bool opffv_narrow_check(DisasContext *s, arg_rmr *a) return opfv_narrow_check(s, a) && require_scale_rvf(s) && (s->sew != MO_8) && + require_scale_zve32f(s) && require_scale_zve64f(s); } @@ -2920,6 +2922,7 @@ static bool opxfv_narrow_check(DisasContext *s, arg_rmr *a) vext_check_isa_ill(s) && /* OPFV narrowing instructions ignore vs1 check */ vext_check_sd(s, a->rd, a->rs2, a->vm) && + require_scale_zve32f(s) && require_scale_zve64f(s); } From patchwork Tue Jan 18 01:45:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Chang X-Patchwork-Id: 12715825 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 026F5C433EF for ; Tue, 18 Jan 2022 02:04:06 +0000 (UTC) Received: from localhost ([::1]:34386 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n9dqw-0006Ac-1F for qemu-devel@archiver.kernel.org; Mon, 17 Jan 2022 21:04:06 -0500 Received: from eggs.gnu.org ([209.51.188.92]:50982) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n9das-0000wB-ED for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:47:32 -0500 Received: from [2607:f8b0:4864:20::1034] (port=56114 helo=mail-pj1-x1034.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1n9dal-0007eV-MO for qemu-devel@nongnu.org; Mon, 17 Jan 2022 20:47:28 -0500 Received: by mail-pj1-x1034.google.com with SMTP id hv15so21898082pjb.5 for ; Mon, 17 Jan 2022 17:46:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QuND1ULQJ+/TaSqlnYNx8EL683pCF87FYDnAtdJNACU=; b=cU7ElmE8svPbDLciy9g/5DfyZ1CwYCnRg4InNDX5gfmwTCwV3INa4GL7CAIuO1x3dl kexCSU0E7+wO4xv59jqT2GO9N36pt0puSrJ3sUphZH4WaFCWfFWv+pi//9wlknzUTkQW ZdfIp9YX27U9i9lLQxOTiYcuOan/Istxvf2KwJZrinK+iERcZeERDXc51d7ZX41exMo6 LP/8kS6w1MMuFerbtwnq08xHOSFRU0sh+BWepebDVqQCMRtKLWTJnPTLfZPTjnng0XKA vPq5e/ySSKCoUpmu65QJRHd7wWxac891Dnru4CbekELQgjYViS3+q9dsojSICRWbuYhg Nhrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QuND1ULQJ+/TaSqlnYNx8EL683pCF87FYDnAtdJNACU=; b=ok4CT2Zf8GO2B1xYzjHUV+iHHEIg+xfux7NB+RSuU1YSUc/aoJUzQMaoosYaXo3T+9 0U4icU9k25IWtQAQ+/mYneKf4+76sZQi6I9Lrop5F2tzcJogjOKV1vXxFbTo3rFUVEl4 DVP6LmdIGG0sSZpTIsuZExl7zdIjBn0WmmVhKd8iyCJrMY5SbF6IE5Ngi+a3bFoekkgH Yfc+pbH0hG3kN+F55P7/rpKVFbSQkR2UDsMRNzwkjoetG6OOCbCdn6QDB1OhPknUrghw +BQVrgw473h9WByYFyNTYHShNKHxujq62FmUlYIYIC0ypLHhCjjLkQk+Pc/mO6+Lge3k 2JCQ== X-Gm-Message-State: AOAM530zscspEwaKztYD9SjcBrAbUnO1HxhkrtawNOn/rHyobM25mHi2 5SeqA4p8oLihF1JOFVNE7p2Cq0iCRJUXTXKu X-Google-Smtp-Source: ABdhPJxbhFkCA/4uEa4T4W+Hlta92zKRzYngFc5q8xieCmYxNFxWjJ9L/XsPMBK+C2THMLGzvTCWaw== X-Received: by 2002:a17:90a:d3c8:: with SMTP id d8mr27902572pjw.189.1642470383916; Mon, 17 Jan 2022 17:46:23 -0800 (PST) Received: from hsinchu16.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id c12sm8286136pfm.113.2022.01.17.17.46.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 17:46:23 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org Subject: [PATCH v2 17/17] target/riscv: rvv-1.0: Allow Zve32f extension to be turned on Date: Tue, 18 Jan 2022 09:45:20 +0800 Message-Id: <20220118014522.13613-18-frank.chang@sifive.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220118014522.13613-1-frank.chang@sifive.com> References: <20220118014522.13613-1-frank.chang@sifive.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1034 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=frank.chang@sifive.com; helo=mail-pj1-x1034.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Frank Chang , Alistair Francis , Bin Meng , qemu-riscv@nongnu.org, Palmer Dabbelt Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang Signed-off-by: Frank Chang Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 0898954c02..33c1df638b 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -664,6 +664,7 @@ static Property riscv_cpu_properties[] = { DEFINE_PROP_BOOL("Zicsr", RISCVCPU, cfg.ext_icsr, true), DEFINE_PROP_BOOL("Zfh", RISCVCPU, cfg.ext_zfh, false), DEFINE_PROP_BOOL("Zfhmin", RISCVCPU, cfg.ext_zfhmin, false), + DEFINE_PROP_BOOL("Zve32f", RISCVCPU, cfg.ext_zve32f, false), DEFINE_PROP_BOOL("Zve64f", RISCVCPU, cfg.ext_zve64f, false), DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true), DEFINE_PROP_BOOL("pmp", RISCVCPU, cfg.pmp, true),