From patchwork Tue Jan 18 08:44:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jammy Huang X-Patchwork-Id: 12716064 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14C47C433FE for ; Tue, 18 Jan 2022 08:46:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344910AbiARIqC (ORCPT ); Tue, 18 Jan 2022 03:46:02 -0500 Received: from twspam01.aspeedtech.com ([211.20.114.71]:29533 "EHLO twspam01.aspeedtech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239980AbiARIqC (ORCPT ); Tue, 18 Jan 2022 03:46:02 -0500 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 20I8c8xP013911; Tue, 18 Jan 2022 16:38:08 +0800 (GMT-8) (envelope-from jammy_huang@aspeedtech.com) Received: from JammyHuang-PC.aspeed.com (192.168.2.115) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 18 Jan 2022 16:45:05 +0800 From: Jammy Huang To: , , , , , , , , Subject: [PATCH v3 1/2] media: aspeed: Add macro for the fields of the mode-detect registers Date: Tue, 18 Jan 2022 16:44:48 +0800 Message-ID: <20220118084449.5182-2-jammy_huang@aspeedtech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220118084449.5182-1-jammy_huang@aspeedtech.com> References: <20220118084449.5182-1-jammy_huang@aspeedtech.com> MIME-Version: 1.0 X-Originating-IP: [192.168.2.115] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 20I8c8xP013911 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org VE_MODE_DT_HOR_TOLER: the tolerance in detecting for stable horizontal signal. VE_MODE_DT_VER_TOLER: the tolerance in detecting for stable vertical signal. VE_MODE_DT_HOR_STABLE: the minimum required count in detecting stable HSYNC signal to set mode detection horizontal signal stable. VE_MODE_DT_VER_STABLE: the minimum required count in detecting stable VSYNC signal to set mode detection vertical signal stable. Signed-off-by: Jammy Huang --- drivers/media/platform/aspeed-video.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c index 4f5f5dd364ee..5ba4d70c8dab 100644 --- a/drivers/media/platform/aspeed-video.c +++ b/drivers/media/platform/aspeed-video.c @@ -190,6 +190,12 @@ #define VE_INTERRUPT_VSYNC_DESC BIT(11) #define VE_MODE_DETECT 0x30c +#define VE_MODE_DT_HOR_TOLER GENMASK(31, 28) +#define VE_MODE_DT_VER_TOLER GENMASK(27, 24) +#define VE_MODE_DT_HOR_STABLE GENMASK(23, 20) +#define VE_MODE_DT_VER_STABLE GENMASK(19, 16) +#define VE_MODE_DT_EDG_THROD GENMASK(15, 8) + #define VE_MEM_RESTRICT_START 0x310 #define VE_MEM_RESTRICT_END 0x314 @@ -1238,7 +1244,12 @@ static void aspeed_video_init_regs(struct aspeed_video *video) aspeed_video_write(video, VE_SCALING_FILTER3, 0x00200000); /* Set mode detection defaults */ - aspeed_video_write(video, VE_MODE_DETECT, 0x22666500); + aspeed_video_write(video, VE_MODE_DETECT, + FIELD_PREP(VE_MODE_DT_HOR_TOLER, 2) | + FIELD_PREP(VE_MODE_DT_VER_TOLER, 2) | + FIELD_PREP(VE_MODE_DT_HOR_STABLE, 6) | + FIELD_PREP(VE_MODE_DT_VER_STABLE, 6) | + FIELD_PREP(VE_MODE_DT_EDG_THROD, 0x65)); aspeed_video_write(video, VE_BCD_CTRL, 0); } From patchwork Tue Jan 18 08:44:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jammy Huang X-Patchwork-Id: 12716063 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67716C433F5 for ; Tue, 18 Jan 2022 08:46:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344894AbiARIqB (ORCPT ); Tue, 18 Jan 2022 03:46:01 -0500 Received: from twspam01.aspeedtech.com ([211.20.114.71]:26176 "EHLO twspam01.aspeedtech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235174AbiARIqB (ORCPT ); Tue, 18 Jan 2022 03:46:01 -0500 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 20I8c8Qh013912; Tue, 18 Jan 2022 16:38:09 +0800 (GMT-8) (envelope-from jammy_huang@aspeedtech.com) Received: from JammyHuang-PC.aspeed.com (192.168.2.115) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 18 Jan 2022 16:45:05 +0800 From: Jammy Huang To: , , , , , , , , Subject: [PATCH v3 2/2] video: aspeed: Fix unstable timing detection Date: Tue, 18 Jan 2022 16:44:49 +0800 Message-ID: <20220118084449.5182-3-jammy_huang@aspeedtech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220118084449.5182-1-jammy_huang@aspeedtech.com> References: <20220118084449.5182-1-jammy_huang@aspeedtech.com> MIME-Version: 1.0 X-Originating-IP: [192.168.2.115] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 20I8c8Qh013912 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Using stable-signal in resolution detection, and try detection again if unstable. VE_MODE_DETECT_EXTSRC_ADC: 1 if video source is from ADC output. VE_MODE_DETECT_H_STABLE: 1 if horizontal signal detection is stable. VE_MODE_DETECT_V_STABLE: 1 if vertical signal detection is stable. Signed-off-by: Jammy Huang --- drivers/media/platform/aspeed-video.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c index 5ba4d70c8dab..585ee2997d44 100644 --- a/drivers/media/platform/aspeed-video.c +++ b/drivers/media/platform/aspeed-video.c @@ -165,9 +165,14 @@ #define VE_MODE_DETECT_STATUS 0x098 #define VE_MODE_DETECT_H_PERIOD GENMASK(11, 0) +#define VE_MODE_DETECT_EXTSRC_ADC BIT(12) +#define VE_MODE_DETECT_H_STABLE BIT(13) +#define VE_MODE_DETECT_V_STABLE BIT(14) #define VE_MODE_DETECT_V_LINES GENMASK(27, 16) #define VE_MODE_DETECT_STATUS_VSYNC BIT(28) #define VE_MODE_DETECT_STATUS_HSYNC BIT(29) +#define VE_MODE_DETECT_VSYNC_RDY BIT(30) +#define VE_MODE_DETECT_HSYNC_RDY BIT(31) #define VE_SYNC_STATUS 0x09c #define VE_SYNC_STATUS_HSYNC GENMASK(11, 0) @@ -971,6 +976,13 @@ static void aspeed_video_get_resolution(struct aspeed_video *video) return; } + mds = aspeed_video_read(video, VE_MODE_DETECT_STATUS); + // try detection again if current signal isn't stable + if (!(mds & VE_MODE_DETECT_H_STABLE) || + !(mds & VE_MODE_DETECT_V_STABLE) || + (mds & VE_MODE_DETECT_EXTSRC_ADC)) + continue; + aspeed_video_check_and_set_polarity(video); aspeed_video_enable_mode_detect(video);