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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2022 22:12:14.9433 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b6f9a502-167c-4c77-2769-08d9dacf956e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT037.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB3800 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org Replace number constant with #define to improve readability and maintainability. Signed-off-by: Terry Bowman To: Guenter Roeck To: linux-watchdog@vger.kernel.org To: Jean Delvare To: linux-i2c@vger.kernel.org To: Wolfram Sang To: Andy Shevchenko To: Rafael J. Wysocki Cc: linux-kernel@vger.kernel.org Cc: Wim Van Sebroeck Cc: Robert Richter Cc: Thomas Lendacky --- drivers/i2c/busses/i2c-piix4.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 8c1b31ed0c42..b88d990b013f 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -77,6 +77,7 @@ /* SB800 constants */ #define SB800_PIIX4_SMB_IDX 0xcd6 +#define SB800_PIIX4_SMB_MAP_SIZE 2 #define KERNCZ_IMC_IDX 0x3e #define KERNCZ_IMC_DATA 0x3f @@ -290,7 +291,9 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, else smb_en = (aux) ? 0x28 : 0x2c; - if (!request_muxed_region(SB800_PIIX4_SMB_IDX, 2, "sb800_piix4_smb")) { + if (!request_muxed_region(SB800_PIIX4_SMB_IDX, + SB800_PIIX4_SMB_MAP_SIZE, + "sb800_piix4_smb")) { dev_err(&PIIX4_dev->dev, "SMB base address index region 0x%x already in use.\n", SB800_PIIX4_SMB_IDX); @@ -302,7 +305,7 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX); smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1); - release_region(SB800_PIIX4_SMB_IDX, 2); + release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE); if (!smb_en) { smb_en_status = smba_en_lo & 0x10; @@ -371,7 +374,8 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT; } } else { - if (!request_muxed_region(SB800_PIIX4_SMB_IDX, 2, + if (!request_muxed_region(SB800_PIIX4_SMB_IDX, + SB800_PIIX4_SMB_MAP_SIZE, "sb800_piix4_smb")) { release_region(piix4_smba, SMBIOSIZE); return -EBUSY; @@ -384,7 +388,7 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, SB800_PIIX4_PORT_IDX; piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK; piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT; - release_region(SB800_PIIX4_SMB_IDX, 2); + release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE); } dev_info(&PIIX4_dev->dev, @@ -682,7 +686,9 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, u8 port; int retval; - if (!request_muxed_region(SB800_PIIX4_SMB_IDX, 2, "sb800_piix4_smb")) + if (!request_muxed_region(SB800_PIIX4_SMB_IDX, + SB800_PIIX4_SMB_MAP_SIZE, + "sb800_piix4_smb")) return -EBUSY; /* Request the SMBUS semaphore, avoid conflicts with the IMC */ @@ -758,7 +764,7 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, piix4_imc_wakeup(); release: - release_region(SB800_PIIX4_SMB_IDX, 2); + release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE); return retval; } From patchwork Tue Jan 18 22:11:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Bowman, Terry" X-Patchwork-Id: 12716953 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35055C4332F for ; Tue, 18 Jan 2022 22:12:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349813AbiARWMc (ORCPT ); Tue, 18 Jan 2022 17:12:32 -0500 Received: from mail-co1nam11on2046.outbound.protection.outlook.com ([40.107.220.46]:35947 "EHLO NAM11-CO1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S236714AbiARWM2 (ORCPT ); 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2022 22:12:24.8968 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0cb20d7b-ef55-4be6-55c3-08d9dacf9b5f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT061.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4301 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org Move duplicated region request and release code into a function. Move is in preparation for following MMIO changes. Signed-off-by: Terry Bowman To: Guenter Roeck To: linux-watchdog@vger.kernel.org To: Jean Delvare To: linux-i2c@vger.kernel.org To: Wolfram Sang To: Andy Shevchenko To: Rafael J. Wysocki Cc: linux-kernel@vger.kernel.org Cc: Wim Van Sebroeck Cc: Robert Richter Cc: Thomas Lendacky --- drivers/i2c/busses/i2c-piix4.c | 43 +++++++++++++++++++++++----------- 1 file changed, 29 insertions(+), 14 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index b88d990b013f..14324e03fe24 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -165,6 +165,26 @@ struct i2c_piix4_adapdata { u8 port; /* Port number, shifted */ }; +static int piix4_sb800_region_setup(struct device *dev) +{ + if (!request_muxed_region(SB800_PIIX4_SMB_IDX, + SB800_PIIX4_SMB_MAP_SIZE, + "sb800_piix4_smb")) { + dev_err(dev, + "SMB base address index region 0x%x already in use.\n", + SB800_PIIX4_SMB_IDX); + return -EBUSY; + } + + return 0; +} + +static void piix4_sb800_region_release(struct device *dev) +{ + release_region(SB800_PIIX4_SMB_IDX, + SB800_PIIX4_SMB_MAP_SIZE); +} + static int piix4_setup(struct pci_dev *PIIX4_dev, const struct pci_device_id *id) { @@ -270,6 +290,7 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, unsigned short piix4_smba; u8 smba_en_lo, smba_en_hi, smb_en, smb_en_status, port_sel; u8 i2ccfg, i2ccfg_offset = 0x10; + int retval; /* SB800 and later SMBus does not support forcing address */ if (force || force_addr) { @@ -291,21 +312,16 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, else smb_en = (aux) ? 0x28 : 0x2c; - if (!request_muxed_region(SB800_PIIX4_SMB_IDX, - SB800_PIIX4_SMB_MAP_SIZE, - "sb800_piix4_smb")) { - dev_err(&PIIX4_dev->dev, - "SMB base address index region 0x%x already in use.\n", - SB800_PIIX4_SMB_IDX); - return -EBUSY; - } + retval = piix4_sb800_region_setup(&PIIX4_dev->dev); + if (retval) + return retval; outb_p(smb_en, SB800_PIIX4_SMB_IDX); smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX); smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1); - release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE); + piix4_sb800_region_release(&PIIX4_dev->dev); if (!smb_en) { smb_en_status = smba_en_lo & 0x10; @@ -686,10 +702,9 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, u8 port; int retval; - if (!request_muxed_region(SB800_PIIX4_SMB_IDX, - SB800_PIIX4_SMB_MAP_SIZE, - "sb800_piix4_smb")) - return -EBUSY; + retval = piix4_sb800_region_setup(&adap->dev); + if (retval) + return retval; /* Request the SMBUS semaphore, avoid conflicts with the IMC */ smbslvcnt = inb_p(SMBSLVCNT); @@ -764,7 +779,7 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, piix4_imc_wakeup(); release: - release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE); + piix4_sb800_region_release(&adap->dev); return retval; } From patchwork Tue Jan 18 22:11:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Bowman, Terry" X-Patchwork-Id: 12716956 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8A65C433FE for ; Tue, 18 Jan 2022 22:12:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349843AbiARWMs (ORCPT ); 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Tue, 18 Jan 2022 16:12:30 -0600 From: Terry Bowman To: , , , , , , , CC: , , , , , , , , Subject: [PATCH v2 3/8] i2c: piix4: Move SMBus controller base address detect into function Date: Tue, 18 Jan 2022 16:11:47 -0600 Message-ID: <20220118221152.300444-4-terry.bowman@amd.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220118221152.300444-1-terry.bowman@amd.com> References: <20220118221152.300444-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 0358e801-36aa-484c-3072-08d9dacfa0ee X-MS-TrafficTypeDiagnostic: MWHPR12MB1440:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2958; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: GBFozH1I2vNjV3QnraoEiZj0MuoeUoVnOpTFhBKAArWaGIxn8PxiZxOx9MWeh8XR2lSEPARGtn6ULEbW0pq1Nj0/EOyRogAFeic7X7G7ZXGQvGEn520K+4nM+t3mJIxLff9f9uo8pNfwosJTlBwOIzQEWylD3sU5lbrbh94yEwchaO+c8hTU0h28UlHUrqsvpupSmcB5RvCKFUOilnzU2OyJbOMsTgNexWWJXeeJQebo1dsu1YA9je+XsAXl4lf8cpsp/ccc9DRdNPuIvnK2vO7OZx0rV4GuHgPpWOiALaYKdgR+vX8C2JvKqBrHG+RKJuGcXtyIlfbEimj7o0DhF+rDrfxxqmJQORXFC0TTNgVUeLIoHiR+0WdknBmoC97hHB0NOznxp1YMp0YipNTqZXXXAGrp+2MsdvCSHuBNkhIar3LNuSCtXmU+Xgt+vuU7FpOc0QEjM1koO2TQo4UP92bfh0dCqT0VP7TrGH1xpav2+AibP0nb125GC4egFD3KZV6qZgmrqr+AmWIHZEERfFt3rCfQGop5HKgaUcUwyrEAPI9UHE6vx/hn3PKYebwwWgCCbme23tWroV2VlC6gcjHTdiHL9EMEFuY9S9MzZ4iNB5+SLSygP0mmjyH/STy+Oddoyx7eVRSfVrtQ2wJyyYYSYxu6Rbr3WNl4ip9kI+L3+oPEKh2NV3362WRE5E01icMmMhjCl2jM7LbzgG8wwLLDR9nJNx8tMXmEbyyGDsbNUxL0Dx6BCAFCH85JTW/gpLYsUfMzXYoeJdFqp0a9TSPvkRn2UuHg0Ag/ZA3PGQZ26s2z46kPdPypwusmsxF8 X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(4636009)(46966006)(36840700001)(40470700002)(26005)(2616005)(110136005)(82310400004)(36860700001)(8676002)(47076005)(36756003)(54906003)(508600001)(6666004)(86362001)(5660300002)(40460700001)(44832011)(336012)(1076003)(83380400001)(356005)(8936002)(70206006)(7696005)(16526019)(186003)(70586007)(4326008)(316002)(81166007)(2906002)(426003)(36900700001)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2022 22:12:34.1748 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0358e801-36aa-484c-3072-08d9dacfa0ee X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT031.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1440 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org Move SMBus controller base address detection into function. Refactor is in preparation for following MMIO changes. Signed-off-by: Terry Bowman To: Guenter Roeck To: linux-watchdog@vger.kernel.org To: Jean Delvare To: linux-i2c@vger.kernel.org To: Wolfram Sang To: Andy Shevchenko To: Rafael J. Wysocki Cc: linux-kernel@vger.kernel.org Cc: Wim Van Sebroeck Cc: Robert Richter Cc: Thomas Lendacky --- drivers/i2c/busses/i2c-piix4.c | 68 +++++++++++++++++++++------------- 1 file changed, 43 insertions(+), 25 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 14324e03fe24..35fcb61f4750 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -284,11 +284,51 @@ static int piix4_setup(struct pci_dev *PIIX4_dev, return piix4_smba; } +static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev, + u8 smb_en, + u8 aux, + u8 *smb_en_status, + unsigned short *piix4_smba) +{ + u8 smba_en_lo; + u8 smba_en_hi; + int retval; + + retval = piix4_sb800_region_setup(&PIIX4_dev->dev); + if (retval) + return retval; + + outb_p(smb_en, SB800_PIIX4_SMB_IDX); + smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); + outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX); + smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1); + + piix4_sb800_region_release(&PIIX4_dev->dev); + + if (!smb_en) { + *smb_en_status = smba_en_lo & 0x10; + *piix4_smba = smba_en_hi << 8; + if (aux) + *piix4_smba |= 0x20; + } else { + *smb_en_status = smba_en_lo & 0x01; + *piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0; + } + + if (!*smb_en_status) { + dev_err(&PIIX4_dev->dev, + "SMBus Host Controller not enabled!\n"); + return -ENODEV; + } + + return retval; +} + static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, const struct pci_device_id *id, u8 aux) { unsigned short piix4_smba; - u8 smba_en_lo, smba_en_hi, smb_en, smb_en_status, port_sel; + u8 smb_en, smb_en_status, port_sel; u8 i2ccfg, i2ccfg_offset = 0x10; int retval; @@ -312,33 +352,11 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, else smb_en = (aux) ? 0x28 : 0x2c; - retval = piix4_sb800_region_setup(&PIIX4_dev->dev); + retval = piix4_setup_sb800_smba(PIIX4_dev, smb_en, + aux, &smb_en_status, &piix4_smba); if (retval) return retval; - outb_p(smb_en, SB800_PIIX4_SMB_IDX); - smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); 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Tue, 18 Jan 2022 16:12:41 -0600 From: Terry Bowman To: , , , , , , , CC: , , , , , , , , Subject: [PATCH v2 4/8] i2c: piix4: Move SMBus port selection into function Date: Tue, 18 Jan 2022 16:11:48 -0600 Message-ID: <20220118221152.300444-5-terry.bowman@amd.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220118221152.300444-1-terry.bowman@amd.com> References: <20220118221152.300444-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 340adffd-3a9d-45e5-bf44-08d9dacfa660 X-MS-TrafficTypeDiagnostic: BN9PR12MB5211:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6108; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 9vCxI9o3ylYstioHNxUpGiWOWsq9rNrTW/UruMQVaYoctpxn+7nzl852NBWJLinOBhSUdy6Da5kurdeyBdFjVshZTeeummlRnjTvcwRU/bx7lwgQAbO7/tOf51jh267d0po8GSb2XZaKIgjeWcWMCUr1Q0nJJXGzPnN8z8S2VAjA5xRl6yUF4tqxno4BhJYB13/IwHUCB2eEcizw903TYn21vPz2q03VHcA32Mksq2ZO/Rg3UazmOB5BXvVwXeFBx+NKVaianBFx7VmmQcmuXD//U2AiKd0CijpAzGk6dKo2j3JggYtUuuQUMFgE/Hfdd097WdHGaJuTOtxCm0oJkufN0LkfGqfa74kH+c8h7PVERqEGMT+g7O7aKDehhCAwZrLxF+iYwoW7SvXizLwId+zIxQrAiKfQd6N0kOClXDN20OBhWM2FlRJIk2KKoQ7O5mQwFCZUVglXw8qP/s8Rpc11FUXhrrA0ElzDJKCYEEV2hHsJjxG40LzHmYobfLoBxK5STySUI8gbvCJ5fiursXEIWVLht31R50Iu6NKd7eKG8qL4lVNbLilJFsIKDOu4Kb7FfhXnuVaU1KHtcjrCNyY1tjQDIYP9yZyiSvqN2q4ByAd/7asBXlRRbWwaF52i5BKh+v90btD6yzhic7l41/dOWgpJQvOA0zE4bLG7N5b7QMwSaLCwyu5rQTRy16qSJvKjyV2K6mB3UiuWkhk7B6qsJb5NZIW2B8uH7OkPC9mlEBZ5UeHkFODen/fAkqqwouDO4TY0OjrTTGjVc5hG8VHTmegk4aozp0T6HaExzW8b+3WIK2p6rxSIsDJukEzS X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(4636009)(36840700001)(40470700002)(46966006)(26005)(356005)(4326008)(186003)(110136005)(16526019)(81166007)(83380400001)(2906002)(8676002)(54906003)(8936002)(316002)(86362001)(336012)(70206006)(36860700001)(7696005)(40460700001)(5660300002)(426003)(47076005)(36756003)(2616005)(508600001)(1076003)(70586007)(82310400004)(44832011)(36900700001)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2022 22:12:43.3610 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 340adffd-3a9d-45e5-bf44-08d9dacfa660 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT039.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN9PR12MB5211 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org Move port selection code into a separate function. Refactor is in preparation for following MMIO changes. Signed-off-by: Terry Bowman To: Guenter Roeck To: linux-watchdog@vger.kernel.org To: Jean Delvare To: linux-i2c@vger.kernel.org To: Wolfram Sang To: Andy Shevchenko To: Rafael J. Wysocki Cc: linux-kernel@vger.kernel.org Cc: Wim Van Sebroeck Cc: Robert Richter Cc: Thomas Lendacky --- drivers/i2c/busses/i2c-piix4.c | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 35fcb61f4750..58b613b78c97 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -700,6 +700,19 @@ static void piix4_imc_wakeup(void) release_region(KERNCZ_IMC_IDX, 2); } +static int piix4_sb800_port_sel(u8 port) +{ + u8 smba_en_lo; + + outb_p(piix4_port_sel_sb800, SB800_PIIX4_SMB_IDX); + smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); + + if ((smba_en_lo & piix4_port_mask_sb800) != port) + outb_p((smba_en_lo & ~piix4_port_mask_sb800) | port, + SB800_PIIX4_SMB_IDX + 1); + + return (smba_en_lo & piix4_port_mask_sb800); +} /* * Handles access to multiple SMBus ports on the SB800. * The port is selected by bits 2:1 of the smb_en register (0x2c). @@ -716,8 +729,7 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, unsigned short piix4_smba = adapdata->smba; int retries = MAX_TIMEOUT; int smbslvcnt; - u8 smba_en_lo; - u8 port; + u8 prev_port; int retval; retval = piix4_sb800_region_setup(&adap->dev); @@ -777,18 +789,12 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, } } - outb_p(piix4_port_sel_sb800, SB800_PIIX4_SMB_IDX); - smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); - - port = adapdata->port; - if ((smba_en_lo & piix4_port_mask_sb800) != port) - outb_p((smba_en_lo & ~piix4_port_mask_sb800) | port, - SB800_PIIX4_SMB_IDX + 1); + prev_port = piix4_sb800_port_sel(adapdata->port); retval = piix4_access(adap, addr, flags, read_write, command, size, data); - outb_p(smba_en_lo, SB800_PIIX4_SMB_IDX + 1); + piix4_sb800_port_sel(prev_port); /* Release the semaphore */ outb_p(smbslvcnt | 0x20, SMBSLVCNT); From patchwork Tue Jan 18 22:11:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Bowman, Terry" X-Patchwork-Id: 12716957 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53E40C433EF for ; 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Tue, 18 Jan 2022 16:12:53 -0600 From: Terry Bowman To: , , , , , , , CC: , , , , , , , , Subject: [PATCH v2 5/8] i2c: piix4: Add EFCH MMIO support to region request and release Date: Tue, 18 Jan 2022 16:11:49 -0600 Message-ID: <20220118221152.300444-6-terry.bowman@amd.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220118221152.300444-1-terry.bowman@amd.com> References: <20220118221152.300444-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 81212426-764e-429f-d226-08d9dacfacf1 X-MS-TrafficTypeDiagnostic: MN2PR12MB2862:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7691; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: H7cpP+zb/dlEpxx/mA6Abu2DYfqbPwqAnv1oh1b/0TkgmMn469gY52MGjRx9UlX4GJEjB/3n4XRVmEQfPAz+79yw15FMnQ5Es6ZW2nkGOGS9x5fVwStIv3u5+voomowqrt39r+/vccT341fIA6b+ht6L3CktaxcGqgv5FNb6QUdSKeFU0iu6u+Bip/piC3AsS4xF8/t/zK/LcRsqbkTfbc+Ja+us38p0gca7adVt3Vv2jCPbHQ1L7S8PrO4/RitlZ+u4wppH6pKGBZPGbvZ0nW4fpEJCNuHSPAhiiKHxj2dP/0VC+/G25GivPZcfVNRtSz1uKWd0gxns0g6kVLkiMzSfOz1v/zKkiPxRK1cq/+AH7i37MIJT9NQTQdkvr8Lxl42dwRJuu8jRmWAdriv9Q72GiGp8W/xUD3dSZYnNaIlRd69fmTv9JIjTDc5JKtdVLr/xJumj2L/b2MTTk6NbVEHOv6gFsHosSi34quqXRAFsD5uGg5bMEmvWfZo+1zon7tZBiCXhJq3Ja1+Ss7BdRxjZh19ff+jug1kI2odQRE6V1NwL++XwfYsfhvxdV1uqdWs09/iq2Y54aFYffSwVjtFnYnUH2fole3NF27wr2Ho/SSoL8jgvv4a6w5dKa6do3glF3gLDpDuaXijby1wzJSyQltmsyPw5WhDAyxHh8Z05LTCUhfW9vyEmRxe71LtvY4ezpNRExfvY0EujS19XvjDj7Wo5AKYlQmDg6qVslZt5cx4RRGYCEsfPx2aU20iQywvkJtxVWUeNAyYQAk/AXhO2OCDjof9uTJC8iXLb06AZZSSUrps/TibdWVpC6Rnj X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(4636009)(46966006)(36840700001)(40470700002)(70206006)(16526019)(4326008)(54906003)(336012)(26005)(40460700001)(44832011)(426003)(86362001)(82310400004)(6666004)(186003)(110136005)(316002)(2616005)(70586007)(1076003)(5660300002)(36860700001)(356005)(508600001)(81166007)(83380400001)(7696005)(2906002)(36756003)(8676002)(8936002)(47076005)(36900700001)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2022 22:12:54.3937 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 81212426-764e-429f-d226-08d9dacfacf1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT040.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB2862 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org EFCH cd6h/cd7h port I/O may no longer be available on later AMD processors and it is recommended to use MMIO instead. Update the request and release functions to support MMIO. MMIO request/release and mmapping require details during cleanup. Add a MMIO configuration structure containing resource and vaddress details for mapping the region, accessing the region, and releasing the region. Signed-off-by: Terry Bowman To: Guenter Roeck To: linux-watchdog@vger.kernel.org To: Jean Delvare To: linux-i2c@vger.kernel.org To: Wolfram Sang To: Andy Shevchenko To: Rafael J. Wysocki Cc: linux-kernel@vger.kernel.org Cc: Wim Van Sebroeck Cc: Robert Richter Cc: Thomas Lendacky --- drivers/i2c/busses/i2c-piix4.c | 76 +++++++++++++++++++++++++++------- 1 file changed, 61 insertions(+), 15 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 58b613b78c97..ffb1367dd852 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -98,6 +98,9 @@ #define SB800_PIIX4_PORT_IDX_MASK_KERNCZ 0x18 #define SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ 3 +#define SB800_PIIX4_FCH_PM_ADDR 0xFED80300 +#define SB800_PIIX4_FCH_PM_SIZE 8 + /* insmod parameters */ /* If force is set to anything different from 0, we forcibly enable the @@ -156,6 +159,12 @@ static const char *piix4_main_port_names_sb800[PIIX4_MAX_ADAPTERS] = { }; static const char *piix4_aux_port_name_sb800 = " port 1"; +struct sb800_mmio_cfg { + void __iomem *addr; + struct resource *res; + bool use_mmio; +}; + struct i2c_piix4_adapdata { unsigned short smba; @@ -163,26 +172,60 @@ struct i2c_piix4_adapdata { bool sb800_main; bool notify_imc; u8 port; /* Port number, shifted */ + struct sb800_mmio_cfg mmio_cfg; }; -static int piix4_sb800_region_setup(struct device *dev) +static int piix4_sb800_region_setup(struct device *dev, + struct sb800_mmio_cfg *mmio_cfg) { - if (!request_muxed_region(SB800_PIIX4_SMB_IDX, - SB800_PIIX4_SMB_MAP_SIZE, - "sb800_piix4_smb")) { - dev_err(dev, - "SMB base address index region 0x%x already in use.\n", - SB800_PIIX4_SMB_IDX); - return -EBUSY; + if (mmio_cfg->use_mmio) { + struct resource *res; + void __iomem *addr; + + res = request_mem_region(SB800_PIIX4_FCH_PM_ADDR, + SB800_PIIX4_FCH_PM_SIZE, + "sb800_piix4_smb"); + if (!res) { + dev_err(dev, + "SMBus base address memory region 0x%x already in use.\n", + SB800_PIIX4_FCH_PM_ADDR); + return -EBUSY; + } + + addr = ioremap(SB800_PIIX4_FCH_PM_ADDR, + SB800_PIIX4_FCH_PM_SIZE); + if (!addr) { + release_resource(res); + dev_err(dev, "SMBus base address mapping failed.\n"); + return -ENOMEM; + } + + mmio_cfg->res = res; + mmio_cfg->addr = addr; + } else { + if (!request_muxed_region(SB800_PIIX4_SMB_IDX, + SB800_PIIX4_SMB_MAP_SIZE, + "sb800_piix4_smb")) { + dev_err(dev, + "SMBus base address index region 0x%x already in use.\n", + SB800_PIIX4_SMB_IDX); + return -EBUSY; + } } return 0; } -static void piix4_sb800_region_release(struct device *dev) +static void piix4_sb800_region_release(struct device *dev, + struct sb800_mmio_cfg *mmio_cfg) { - release_region(SB800_PIIX4_SMB_IDX, - SB800_PIIX4_SMB_MAP_SIZE); + if (mmio_cfg->use_mmio) { + iounmap(mmio_cfg->addr); + release_resource(mmio_cfg->res); + } else { + release_region(SB800_PIIX4_SMB_IDX, + SB800_PIIX4_SMB_MAP_SIZE); + } } static int piix4_setup(struct pci_dev *PIIX4_dev, @@ -290,11 +333,14 @@ static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev, u8 *smb_en_status, unsigned short *piix4_smba) { + struct sb800_mmio_cfg mmio_cfg; u8 smba_en_lo; u8 smba_en_hi; int retval; - retval = piix4_sb800_region_setup(&PIIX4_dev->dev); + mmio_cfg.use_mmio = 0; + + retval = piix4_sb800_region_setup(&PIIX4_dev->dev, &mmio_cfg); if (retval) return retval; @@ -303,7 +349,7 @@ static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev, outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX); smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1); - piix4_sb800_region_release(&PIIX4_dev->dev); + piix4_sb800_region_release(&PIIX4_dev->dev, &mmio_cfg); if (!smb_en) { *smb_en_status = smba_en_lo & 0x10; @@ -732,7 +778,7 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, u8 prev_port; int retval; - retval = piix4_sb800_region_setup(&adap->dev); + retval = piix4_sb800_region_setup(&adap->dev, &adapdata->mmio_cfg); if (retval) return retval; @@ -803,7 +849,7 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, piix4_imc_wakeup(); release: - piix4_sb800_region_release(&adap->dev); + piix4_sb800_region_release(&adap->dev, &adapdata->mmio_cfg); return retval; } From patchwork Tue Jan 18 22:11:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Bowman, Terry" X-Patchwork-Id: 12716958 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17C11C433FE for ; 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Tue, 18 Jan 2022 16:13:04 -0600 From: Terry Bowman To: , , , , , , , CC: , , , , , , , , Subject: [PATCH v2 6/8] i2c: piix4: Add EFCH MMIO support to SMBus base address detect Date: Tue, 18 Jan 2022 16:11:50 -0600 Message-ID: <20220118221152.300444-7-terry.bowman@amd.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220118221152.300444-1-terry.bowman@amd.com> References: <20220118221152.300444-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 6f7e6d0d-90d2-4d05-926c-08d9dacfb3a1 X-MS-TrafficTypeDiagnostic: BN8PR12MB3250:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3173; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: dslWlQXeh57zEWj5xc/JBpXjTJF/W0vov4x6Rant5o3CxmP5+0GLRfrbN59I0TwhLVPt04UBrzs8Euz95b4vWuGXEEcb2XyAblRIM6oHkJtchbS6RZUaan8EMeq4tXU7VtOui5zOG9LH2H4BiMgHdPqU18PJpWl+YcVuqbrdYQBQtZUqwHVIQF03yz0oX/DPokpNi4hBVGQxVOJa4T7K0f/NGWv5cMJBKLoiQJ7dVS0q8NXC9VDT8tS8ImzmNbOqHuVlxvZpe9NZx0+a42dLR2FCUJT85LSHuPt8hKEzN5Q2RLktQ0SiB7o6e1YcPsnhPBYgDWsSqCKnPQN1KSwg8bL1IywMj3coTXkGiTKrSPar0WXvd7RBSX1Ubd/Xtr6cshilw9IrjBB0z2IGmzTpFuTg57yuQn6CvjFa0vmzM7XTtPphq8ft708/21GQDkeXFfvOmB4OyFGvhJL/wg1rfi4Ts/Q3IyPMv48i51XAboLb+1ReZdAfDosfJTDv9vIGrvt6qBW6d0P0ldOGAXTvtREXT9Bg3zcL9q+jE4TVslUlqXfxvJvRQ64g5yzBWPIEl3kCzTMsj0u6UUDMvKIgZdQBb7nEGOUSqlduDx6/ef/XZd3cEtRlTI4ycRuKjMTeXR4rb74zQQ6oKHjmP+Ab/SgNPxHiNaLUEpC5mOCC0z8ZMBfU+l1Xfz+uEZ3KJ+c7L3TYXF7XLhR5bovxfngrxNawhF8/vlOJd9B7ILv2ii9ane/YHqosGQTvFzG8rJtdDCe983NVGjlBPUhlQgL04Kn9l2mHDvKoJjnYceNbUd5s7Farw7roeQNHdkbxg0+r X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(4636009)(40470700002)(46966006)(36840700001)(83380400001)(70206006)(81166007)(426003)(70586007)(356005)(2906002)(40460700001)(1076003)(86362001)(7696005)(82310400004)(54906003)(316002)(110136005)(36756003)(5660300002)(2616005)(47076005)(508600001)(186003)(44832011)(4326008)(8936002)(6666004)(26005)(336012)(16526019)(36860700001)(8676002)(2101003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2022 22:13:05.5963 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6f7e6d0d-90d2-4d05-926c-08d9dacfb3a1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT013.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB3250 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org The EFCH SMBus controller's base address is determined using details in FCH::PM::DECODEEN[smbusasfiobase] and FCH::PM::DECODEEN[smbusasfioen]. This code also writes to FCH::PM::ISACONTROL[mmioen] to enable MMIO decoding. These register fields were accessed using cd6h/cd7h port I/O. cd6h/cd7h port I/O is no longer available in later AMD processors. Change base address detection to use MMIO instead of port I/O cd6h/cd7h. Signed-off-by: Terry Bowman To: Guenter Roeck To: linux-watchdog@vger.kernel.org To: Jean Delvare To: linux-i2c@vger.kernel.org To: Wolfram Sang To: Andy Shevchenko To: Rafael J. Wysocki Cc: linux-kernel@vger.kernel.org Cc: Wim Van Sebroeck Cc: Robert Richter Cc: Thomas Lendacky --- drivers/i2c/busses/i2c-piix4.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index ffb1367dd852..2937f3254c31 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -98,6 +98,7 @@ #define SB800_PIIX4_PORT_IDX_MASK_KERNCZ 0x18 #define SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ 3 +#define SB800_PIIX4_FCH_PM_DECODEEN_MMIO BIT(1) #define SB800_PIIX4_FCH_PM_ADDR 0xFED80300 #define SB800_PIIX4_FCH_PM_SIZE 8 @@ -344,10 +345,18 @@ static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev, if (retval) return retval; - outb_p(smb_en, SB800_PIIX4_SMB_IDX); - smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); - outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX); - smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1); + if (mmio_cfg.use_mmio) { + iowrite32(ioread32(mmio_cfg.addr + 4) | SB800_PIIX4_FCH_PM_DECODEEN_MMIO, + mmio_cfg.addr + 4); + + smba_en_lo = ioread8(mmio_cfg.addr); + smba_en_hi = ioread8(mmio_cfg.addr + 1); + } else { + outb_p(smb_en, SB800_PIIX4_SMB_IDX); + smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); + outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX); + smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1); + } piix4_sb800_region_release(&PIIX4_dev->dev, &mmio_cfg); From patchwork Tue Jan 18 22:11:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Bowman, Terry" X-Patchwork-Id: 12716959 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 566FEC433F5 for ; Tue, 18 Jan 2022 22:13:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343845AbiARWNX (ORCPT ); Tue, 18 Jan 2022 17:13:23 -0500 Received: from mail-co1nam11on2073.outbound.protection.outlook.com ([40.107.220.73]:42401 "EHLO NAM11-CO1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1349909AbiARWNT (ORCPT ); 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Tue, 18 Jan 2022 22:13:16 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT037.mail.protection.outlook.com (10.13.177.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4888.9 via Frontend Transport; Tue, 18 Jan 2022 22:13:16 +0000 Received: from ethanolx7ea3host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Tue, 18 Jan 2022 16:13:15 -0600 From: Terry Bowman To: , , , , , , , CC: , , , , , , , , Subject: [PATCH v2 7/8] i2c: piix4: Add EFCH MMIO support for SMBus port select Date: Tue, 18 Jan 2022 16:11:51 -0600 Message-ID: <20220118221152.300444-8-terry.bowman@amd.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220118221152.300444-1-terry.bowman@amd.com> References: <20220118221152.300444-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3036f66b-bc20-4bfe-cf4f-08d9dacfba38 X-MS-TrafficTypeDiagnostic: MW3PR12MB4571:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3513; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2022 22:13:16.6537 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3036f66b-bc20-4bfe-cf4f-08d9dacfba38 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT037.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4571 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org AMD processors include registers capable of selecting between 2 SMBus ports. Port selection is made during each user access by writing to FCH::PM::DECODEEN[smbus0sel]. Change the driver to use MMIO during SMBus port selection because cd6h/cd7h port I/O is not available on later AMD processors. Signed-off-by: Terry Bowman To: Guenter Roeck To: linux-watchdog@vger.kernel.org To: Jean Delvare To: linux-i2c@vger.kernel.org To: Wolfram Sang To: Andy Shevchenko To: Rafael J. Wysocki Cc: linux-kernel@vger.kernel.org Cc: Wim Van Sebroeck Cc: Robert Richter Cc: Thomas Lendacky --- drivers/i2c/busses/i2c-piix4.c | 25 +++++++++++++++++-------- 1 file changed, 17 insertions(+), 8 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 2937f3254c31..b59d2c74abf6 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -755,19 +755,28 @@ static void piix4_imc_wakeup(void) release_region(KERNCZ_IMC_IDX, 2); } -static int piix4_sb800_port_sel(u8 port) +static int piix4_sb800_port_sel(u8 port, struct sb800_mmio_cfg *mmio_cfg) { u8 smba_en_lo; - outb_p(piix4_port_sel_sb800, SB800_PIIX4_SMB_IDX); - smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); + if (mmio_cfg->use_mmio) { + smba_en_lo = ioread8(mmio_cfg->addr + piix4_port_sel_sb800); + + if ((smba_en_lo & piix4_port_mask_sb800) != port) + iowrite8((smba_en_lo & ~piix4_port_mask_sb800) | port, + mmio_cfg->addr + piix4_port_sel_sb800); + } else { + outb_p(piix4_port_sel_sb800, SB800_PIIX4_SMB_IDX); + smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); - if ((smba_en_lo & piix4_port_mask_sb800) != port) - outb_p((smba_en_lo & ~piix4_port_mask_sb800) | port, - SB800_PIIX4_SMB_IDX + 1); + if ((smba_en_lo & piix4_port_mask_sb800) != port) + outb_p((smba_en_lo & ~piix4_port_mask_sb800) | port, + SB800_PIIX4_SMB_IDX + 1); + } return (smba_en_lo & piix4_port_mask_sb800); } + /* * Handles access to multiple SMBus ports on the SB800. * The port is selected by bits 2:1 of the smb_en register (0x2c). @@ -844,12 +853,12 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, } } - prev_port = piix4_sb800_port_sel(adapdata->port); + prev_port = piix4_sb800_port_sel(adapdata->port, &adapdata->mmio_cfg); retval = piix4_access(adap, addr, flags, read_write, command, size, data); - piix4_sb800_port_sel(prev_port); + piix4_sb800_port_sel(prev_port, &adapdata->mmio_cfg); /* Release the semaphore */ outb_p(smbslvcnt | 0x20, SMBSLVCNT); From patchwork Tue Jan 18 22:11:52 2022 Content-Type: text/plain; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Jan 2022 22:13:27.6481 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b050a68e-c947-4bca-0a57-08d9dacfc0c4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT008.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR1201MB2547 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org Enable EFCH MMIO using check for SMBus PCI revision ID value 0x51 or greater. SMBus PCI revision ID 0x51 is first used by family 17h. This PCI revision ID check will also enable future AMD processors with the same EFCH SMBus controller HW. Signed-off-by: Terry Bowman To: Guenter Roeck To: linux-watchdog@vger.kernel.org To: Jean Delvare To: linux-i2c@vger.kernel.org To: Wolfram Sang To: Andy Shevchenko To: Rafael J. Wysocki Cc: linux-kernel@vger.kernel.org Cc: Wim Van Sebroeck Cc: Robert Richter Cc: Thomas Lendacky --- drivers/i2c/busses/i2c-piix4.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index b59d2c74abf6..f5533a7d8a13 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -102,6 +102,8 @@ #define SB800_PIIX4_FCH_PM_ADDR 0xFED80300 #define SB800_PIIX4_FCH_PM_SIZE 8 +#define AMD_PCI_SMBUS_REVISION_MMIO 0x51 + /* insmod parameters */ /* If force is set to anything different from 0, we forcibly enable the @@ -229,6 +231,13 @@ static void piix4_sb800_region_release(struct device *dev, } } +static bool piix4_sb800_use_mmio(struct pci_dev *PIIX4_dev) +{ + return (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD && + PIIX4_dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS && + PIIX4_dev->revision >= AMD_PCI_SMBUS_REVISION_MMIO); +} + static int piix4_setup(struct pci_dev *PIIX4_dev, const struct pci_device_id *id) { @@ -339,7 +348,7 @@ static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev, u8 smba_en_hi; int retval; - mmio_cfg.use_mmio = 0; + mmio_cfg.use_mmio = piix4_sb800_use_mmio(PIIX4_dev); retval = piix4_sb800_region_setup(&PIIX4_dev->dev, &mmio_cfg); if (retval)