From patchwork Mon Jan 24 02:31:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12721424 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74A7CC4332F for ; Mon, 24 Jan 2022 02:31:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240823AbiAXCbg (ORCPT ); Sun, 23 Jan 2022 21:31:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43188 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235437AbiAXCbe (ORCPT ); Sun, 23 Jan 2022 21:31:34 -0500 Received: from mail-io1-xd35.google.com (mail-io1-xd35.google.com [IPv6:2607:f8b0:4864:20::d35]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 87E45C06173D; Sun, 23 Jan 2022 18:31:34 -0800 (PST) Received: by mail-io1-xd35.google.com with SMTP id n17so1907825iod.4; Sun, 23 Jan 2022 18:31:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fa6XTevFEqtbC/DVeN/V/vlo7FN29Xl+JkqDuO3dnjc=; b=EZqSX3m/b79QIHHKJpNK7iciDNnVqv2GsxsNslHqcu+b2/SVqWynl3l15N0qCsVK/I Yx1eudSWla7Dd8qyzF5qAsiUpkVMyj2XJDrDr9HOWdJKc2E+ay069qw97DTs4bgISlFK 03jL2XfE5E5sojSaVA4Y2QJO3McRJH0rg5E6MWnvvXqclq4FjCVS46AOUKMIhxg6kSHH ewK2KmoE9/IIpVFqmdwY5A+xkX0aM0/ibEuwupB4bQ1AEamqEVi0LPEW1oZGkBWyoRyO RW2MUulcBjX1lu2hG2irWeKiLysinNyNDbhVT0EOvKcB/VaUalJqUqaPzAw1bH4Z9bQP NX/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fa6XTevFEqtbC/DVeN/V/vlo7FN29Xl+JkqDuO3dnjc=; b=G9xn3uK7ndM0M13GPjSt7390NOYx7D9UlwFQfdJhjWU7fK04xUD2D8bhMvM4AcrK31 MT8P91hVLn6OfaIeNV4/XhdEhRwXX9kONycZDr0t9mkUCiTpost0YfE2pQumgy0qQivs 0cy0tGXOzMnzIs8J+VSZM76IFZH/g31JXBWx0kMPzojlpGUprxPW9b9SL5kCwf0FReht 9mtcv0AX0f0YZ9gZsC1Ugni74cMJRpb6FEgxfdW7s3+psYqyuCX6lV0JsBI3MKV6U5Q1 fhM4SLyRH7eWsNYUSAl9gB2puoxuXLKgc2p5ojnZJqpP2sNut7ah+UUzSr5m8+KunhIU yjnw== X-Gm-Message-State: AOAM532ts7nzuxpWZheoVmjXXJPSfkERqpBnEQ8qnvv1qpYkYhXYmDqB nU25hSzQfJuuqKKdxspISQ8fYaqmDVc= X-Google-Smtp-Source: ABdhPJzZXrS5FylPpYYU4zVBZQCSvGD3wFbcXnczpoUHVM/tfgVP3PLph+WJ6MmfCFVpINI7srDZMg== X-Received: by 2002:a05:6602:2e8d:: with SMTP id m13mr7155501iow.68.1642991493493; Sun, 23 Jan 2022 18:31:33 -0800 (PST) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:582d:ad0e:e5a6:94b6]) by smtp.gmail.com with ESMTPSA id w4sm6625633ilq.56.2022.01.23.18.31.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 23 Jan 2022 18:31:33 -0800 (PST) From: Adam Ford To: linux-media@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, shawnguo@kernel.org, aford@beaconembedded.com, Lucas Stach , Rob Herring , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Subject: [PATCH V3 01/10] dt-bindings: power: imx8mq: add defines for VPU blk-ctrl domains Date: Sun, 23 Jan 2022 20:31:15 -0600 Message-Id: <20220124023125.414794-2-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220124023125.414794-1-aford173@gmail.com> References: <20220124023125.414794-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Lucas Stach This adds the defines for the power domains provided by the VPU blk-ctrl on the i.MX8MQ. Signed-off-by: Lucas Stach Acked-by: Rob Herring diff --git a/include/dt-bindings/power/imx8mq-power.h b/include/dt-bindings/power/imx8mq-power.h index 8a513bd9166e..9f7d0f1e7c32 100644 --- a/include/dt-bindings/power/imx8mq-power.h +++ b/include/dt-bindings/power/imx8mq-power.h @@ -18,4 +18,7 @@ #define IMX8M_POWER_DOMAIN_MIPI_CSI2 9 #define IMX8M_POWER_DOMAIN_PCIE2 10 +#define IMX8MQ_VPUBLK_PD_G1 0 +#define IMX8MQ_VPUBLK_PD_G2 1 + #endif From patchwork Mon Jan 24 02:31:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12721425 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8EAB3C433F5 for ; Mon, 24 Jan 2022 02:31:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240836AbiAXCbk (ORCPT ); Sun, 23 Jan 2022 21:31:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43200 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240829AbiAXCbh (ORCPT ); Sun, 23 Jan 2022 21:31:37 -0500 Received: from mail-il1-x136.google.com (mail-il1-x136.google.com [IPv6:2607:f8b0:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E5EF6C06173B; Sun, 23 Jan 2022 18:31:36 -0800 (PST) Received: by mail-il1-x136.google.com with SMTP id i14so12607290ila.11; Sun, 23 Jan 2022 18:31:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kTohMKJe6b+aS5nC8tVrcxj3aKt5LtNCUkDL666J3iI=; b=DWdz2Gmn/OxlLt+ZL3Oi79/aoh+vlkt8+Jy/lctVQYoiWxNUZVZgRQ1MzfGAwHR01d 1vTFgTpTD5R0T5DwAZCKE1mqsqt75iKULaU8zzqEkFHVWLtebsS7aen2+BnIb17JAe98 4Nn2m8HAs5Wwe4YoxBbl7XRkR4tPeMVziMTFjrU34ltHkEWbtxG3jtRki+FV/K/b+q1A v5RhWOHB3HWHQHl25g/+C8kjNeE8500H8facI6VdLXbhz1KK1qkKZrVCDm/BHGjnWgsq /Hb0+f7xh5L06bhlsUdxSGlxmHRnVlEN9PSgz5Xo8IsbxEwa7bsguC9O9rfGhgxrBo6W xhWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kTohMKJe6b+aS5nC8tVrcxj3aKt5LtNCUkDL666J3iI=; b=TLERUditO4OcqEOEBcf7PQCEnly+G0E2RIo7YFTKSwrniKcjl1zvfz666gpb+SrSlN zaerPDgLnudF0HwZ5LcsP9iMea4fj/MVTqGP7G7wnrZFvIPSbgaxn8TA1tMxaxnV9uGN 5ylBE6Xz8unZi7D4Fw744gNSAOPThfbmHL0cozM+R9kgs4sw2OZL0F7KDQHNEoieBbZr VfasuxeXiwMBrs5S2/ER6xaZIRBHNOxtjpDTsA5HdVEvEvr2XYjADiKj95LXcCb5ld7s /H8BzTGySCnPJK0g2+CRPXLFvGhz6cJecgcvZysvOM8n8WLlksrBe6V12p13jfpztqZO FKhA== X-Gm-Message-State: AOAM532aKTvMQJ5IUuTXb0BaDsWHzdvdaVl+wNRiJEQivuQhztbuFLyT Y/Q1MQJZrQX1jGk4xS5eHvtIuTdkMVs= X-Google-Smtp-Source: ABdhPJzPT49xUHz+xvWATznYNwatDlpwDx1OQe+zH/Ir71zoyVxxIeEn1SMa80s7DZKRrXLs4pI2Qg== X-Received: by 2002:a92:cda7:: with SMTP id g7mr7475640ild.53.1642991495924; Sun, 23 Jan 2022 18:31:35 -0800 (PST) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:582d:ad0e:e5a6:94b6]) by smtp.gmail.com with ESMTPSA id w4sm6625633ilq.56.2022.01.23.18.31.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 23 Jan 2022 18:31:35 -0800 (PST) From: Adam Ford To: linux-media@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, shawnguo@kernel.org, aford@beaconembedded.com, Lucas Stach , Adam Ford , Rob Herring , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Subject: [PATCH V3 02/10] dt-bindings: soc: add binding for i.MX8MQ VPU blk-ctrl Date: Sun, 23 Jan 2022 20:31:16 -0600 Message-Id: <20220124023125.414794-3-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220124023125.414794-1-aford173@gmail.com> References: <20220124023125.414794-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Lucas Stach This adds the DT binding for the i.MX8MQ VPU blk-ctrl. Signed-off-by: Lucas Stach Signed-off-by: Adam Ford Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml new file mode 100644 index 000000000000..7263ebedf09f --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8MQ VPU blk-ctrl + +maintainers: + - Lucas Stach + +description: + The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to + the NoC and ensuring proper power sequencing of the VPU peripherals + located in the VPU domain of the SoC. + +properties: + compatible: + items: + - const: fsl,imx8mq-vpu-blk-ctrl + + reg: + maxItems: 1 + + '#power-domain-cells': + const: 1 + + power-domains: + minItems: 3 + maxItems: 3 + + power-domain-names: + items: + - const: bus + - const: g1 + - const: g2 + + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: g1 + - const: g2 + +required: + - compatible + - reg + - power-domains + - power-domain-names + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + + vpu_blk_ctrl: blk-ctrl@38320000 { + compatible = "fsl,imx8mq-vpu-blk-ctrl"; + reg = <0x38320000 0x100>; + power-domains = <&pgc_vpu>, <&pgc_vpu>, <&pgc_vpu>; + power-domain-names = "bus", "g1", "g2"; + clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>, + <&clk IMX8MQ_CLK_VPU_G2_ROOT>; + clock-names = "g1", "g2"; + #power-domain-cells = <1>; + }; From patchwork Mon Jan 24 02:31:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12721433 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 772EEC433EF for ; Mon, 24 Jan 2022 02:32:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240858AbiAXCc3 (ORCPT ); Sun, 23 Jan 2022 21:32:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43210 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240814AbiAXCbj (ORCPT ); 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Sun, 23 Jan 2022 18:31:37 -0800 (PST) From: Adam Ford To: linux-media@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, shawnguo@kernel.org, aford@beaconembedded.com, Lucas Stach , Adam Ford , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Subject: [PATCH V3 03/10] soc: imx: imx8m-blk-ctrl: add i.MX8MQ VPU blk-ctrl Date: Sun, 23 Jan 2022 20:31:17 -0600 Message-Id: <20220124023125.414794-4-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220124023125.414794-1-aford173@gmail.com> References: <20220124023125.414794-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Lucas Stach This adds the necessary bits to drive the VPU blk-ctrl on the i.MX8MQ, to avoid putting more of this functionality into the decoder driver. Signed-off-by: Lucas Stach Signed-off-by: Adam Ford diff --git a/drivers/soc/imx/imx8m-blk-ctrl.c b/drivers/soc/imx/imx8m-blk-ctrl.c index 511e74f0db8a..122f9c884b38 100644 --- a/drivers/soc/imx/imx8m-blk-ctrl.c +++ b/drivers/soc/imx/imx8m-blk-ctrl.c @@ -15,6 +15,7 @@ #include #include +#include #define BLK_SFT_RSTN 0x0 #define BLK_CLK_EN 0x4 @@ -589,6 +590,68 @@ static const struct imx8m_blk_ctrl_data imx8mn_disp_blk_ctl_dev_data = { .num_domains = ARRAY_SIZE(imx8mn_disp_blk_ctl_domain_data), }; +static int imx8mq_vpu_power_notifier(struct notifier_block *nb, + unsigned long action, void *data) +{ + struct imx8m_blk_ctrl *bc = container_of(nb, struct imx8m_blk_ctrl, + power_nb); + + if (action != GENPD_NOTIFY_ON && action != GENPD_NOTIFY_PRE_OFF) + return NOTIFY_OK; + + /* + * The ADB in the VPUMIX domain has no separate reset and clock + * enable bits, but is ungated and reset together with the VPUs. The + * reset and clock enable inputs to the ADB is a logical OR of the + * VPU bits. In order to set the G2 fuse bits, the G2 clock must + * also be enabled. + */ + regmap_set_bits(bc->regmap, BLK_SFT_RSTN, BIT(0) | BIT(1)); + regmap_set_bits(bc->regmap, BLK_CLK_EN, BIT(0) | BIT(1)); + + if (action == GENPD_NOTIFY_ON) { + /* + * On power up we have no software backchannel to the GPC to + * wait for the ADB handshake to happen, so we just delay for a + * bit. On power down the GPC driver waits for the handshake. + */ + udelay(5); + + /* set "fuse" bits to enable the VPUs */ + regmap_set_bits(bc->regmap, 0x8, 0xffffffff); + regmap_set_bits(bc->regmap, 0xc, 0xffffffff); + regmap_set_bits(bc->regmap, 0x10, 0xffffffff); + } + + return NOTIFY_OK; +} + +static const struct imx8m_blk_ctrl_domain_data imx8mq_vpu_blk_ctl_domain_data[] = { + [IMX8MQ_VPUBLK_PD_G1] = { + .name = "vpublk-g1", + .clk_names = (const char *[]){ "g1", }, + .num_clks = 1, + .gpc_name = "g1", + .rst_mask = BIT(1), + .clk_mask = BIT(1), + }, + [IMX8MQ_VPUBLK_PD_G2] = { + .name = "vpublk-g2", + .clk_names = (const char *[]){ "g2", }, + .num_clks = 1, + .gpc_name = "g2", + .rst_mask = BIT(0), + .clk_mask = BIT(0), + }, +}; + +static const struct imx8m_blk_ctrl_data imx8mq_vpu_blk_ctl_dev_data = { + .max_reg = 0x14, + .power_notifier_fn = imx8mq_vpu_power_notifier, + .domains = imx8mq_vpu_blk_ctl_domain_data, + .num_domains = ARRAY_SIZE(imx8mq_vpu_blk_ctl_domain_data), +}; + static const struct of_device_id imx8m_blk_ctrl_of_match[] = { { .compatible = "fsl,imx8mm-vpu-blk-ctrl", @@ -599,6 +662,9 @@ static const struct of_device_id imx8m_blk_ctrl_of_match[] = { }, { .compatible = "fsl,imx8mn-disp-blk-ctrl", .data = &imx8mn_disp_blk_ctl_dev_data + }, { + .compatible = "fsl,imx8mq-vpu-blk-ctrl", + .data = &imx8mq_vpu_blk_ctl_dev_data }, { /* Sentinel */ } From patchwork Mon Jan 24 02:31:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12721426 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 591D6C433FE for ; Mon, 24 Jan 2022 02:31:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240892AbiAXCbt (ORCPT ); Sun, 23 Jan 2022 21:31:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43232 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240865AbiAXCbm (ORCPT ); Sun, 23 Jan 2022 21:31:42 -0500 Received: from mail-io1-xd33.google.com (mail-io1-xd33.google.com [IPv6:2607:f8b0:4864:20::d33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C9E90C06173B; Sun, 23 Jan 2022 18:31:41 -0800 (PST) Received: by mail-io1-xd33.google.com with SMTP id h23so17705382iol.11; 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Sun, 23 Jan 2022 18:31:40 -0800 (PST) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:582d:ad0e:e5a6:94b6]) by smtp.gmail.com with ESMTPSA id w4sm6625633ilq.56.2022.01.23.18.31.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 23 Jan 2022 18:31:40 -0800 (PST) From: Adam Ford To: linux-media@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, shawnguo@kernel.org, aford@beaconembedded.com, Adam Ford , Rob Herring , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , Lucas Stach , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Subject: [PATCH V3 04/10] dt-bindings: media: nxp, imx8mq-vpu: Split G1 and G2 nodes Date: Sun, 23 Jan 2022 20:31:18 -0600 Message-Id: <20220124023125.414794-5-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220124023125.414794-1-aford173@gmail.com> References: <20220124023125.414794-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The G1 and G2 are independent and separate decoder blocks that are enabled by the vpu-blk-ctrl power-domain controller, which now has a proper driver. Because these blocks only share the power-domain, and can be independently fused out, update the bindings to support separate nodes for the G1 and G2 decoders with vpu-blk-ctrl power-domain support. The new DT + old kernel isn't a supported configuration. Signed-off-by: Adam Ford Reviewed-by: Rob Herring Reviewed-by: Ezequiel Garcia diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml index 762be3f96ce9..9c28d562112b 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml @@ -15,33 +15,20 @@ description: properties: compatible: - const: nxp,imx8mq-vpu + oneOf: + - const: nxp,imx8mq-vpu + deprecated: true + - const: nxp,imx8mq-vpu-g1 + - const: nxp,imx8mq-vpu-g2 reg: - maxItems: 3 - - reg-names: - items: - - const: g1 - - const: g2 - - const: ctrl + maxItems: 1 interrupts: - maxItems: 2 - - interrupt-names: - items: - - const: g1 - - const: g2 + maxItems: 1 clocks: - maxItems: 3 - - clock-names: - items: - - const: g1 - - const: g2 - - const: bus + maxItems: 1 power-domains: maxItems: 1 @@ -49,31 +36,33 @@ properties: required: - compatible - reg - - reg-names - interrupts - - interrupt-names - clocks - - clock-names additionalProperties: false examples: - | #include + #include + #include + + vpu_g1: video-codec@38300000 { + compatible = "nxp,imx8mq-vpu-g1"; + reg = <0x38300000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>; + power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>; + }; + - | + #include + #include #include - vpu: video-codec@38300000 { - compatible = "nxp,imx8mq-vpu"; - reg = <0x38300000 0x10000>, - <0x38310000 0x10000>, - <0x38320000 0x10000>; - reg-names = "g1", "g2", "ctrl"; - interrupts = , - ; - interrupt-names = "g1", "g2"; - clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>, - <&clk IMX8MQ_CLK_VPU_G2_ROOT>, - <&clk IMX8MQ_CLK_VPU_DEC_ROOT>; - clock-names = "g1", "g2", "bus"; - power-domains = <&pgc_vpu>; + vpu_g2: video-codec@38300000 { + compatible = "nxp,imx8mq-vpu-g2"; + reg = <0x38310000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>; + power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>; }; From patchwork Mon Jan 24 02:31:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12721429 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6CC8EC433EF for ; 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Sun, 23 Jan 2022 18:31:42 -0800 (PST) From: Adam Ford To: linux-media@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, shawnguo@kernel.org, aford@beaconembedded.com, Adam Ford , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , Lucas Stach , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Subject: [PATCH V3 05/10] media: hantro: Allow i.MX8MQ G1 and G2 to run independently Date: Sun, 23 Jan 2022 20:31:19 -0600 Message-Id: <20220124023125.414794-6-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220124023125.414794-1-aford173@gmail.com> References: <20220124023125.414794-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The VPU in the i.MX8MQ is really the combination of Hantro G1 and Hantro G2. With the updated vpu-blk-ctrl, the power domains system can enable and disable them separately as well as pull them out of reset. This simplifies the code and lets them run independently while still retaining backwards compatibility with older device trees for those using G1. Signed-off-by: Adam Ford Reviewed-by: Ezequiel Garcia diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c index 6a51f39dde56..a670ddd29c4c 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -616,6 +616,7 @@ static const struct of_device_id of_hantro_match[] = { #endif #ifdef CONFIG_VIDEO_HANTRO_IMX8M { .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, }, + { .compatible = "nxp,imx8mq-vpu-g1", .data = &imx8mq_vpu_g1_variant }, { .compatible = "nxp,imx8mq-vpu-g2", .data = &imx8mq_vpu_g2_variant }, #endif #ifdef CONFIG_VIDEO_HANTRO_SAMA5D4 diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h index 4a19ae8940b9..f0bd2ffe290b 100644 --- a/drivers/staging/media/hantro/hantro_hw.h +++ b/drivers/staging/media/hantro/hantro_hw.h @@ -299,6 +299,7 @@ enum hantro_enc_fmt { ROCKCHIP_VPU_ENC_FMT_UYVY422 = 3, }; +extern const struct hantro_variant imx8mq_vpu_g1_variant; extern const struct hantro_variant imx8mq_vpu_g2_variant; extern const struct hantro_variant imx8mq_vpu_variant; extern const struct hantro_variant px30_vpu_variant; diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c index f5991b8e553a..849ea7122d47 100644 --- a/drivers/staging/media/hantro/imx8m_vpu_hw.c +++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c @@ -205,13 +205,6 @@ static void imx8m_vpu_g1_reset(struct hantro_ctx *ctx) imx8m_soft_reset(vpu, RESET_G1); } -static void imx8m_vpu_g2_reset(struct hantro_ctx *ctx) -{ - struct hantro_dev *vpu = ctx->dev; - - imx8m_soft_reset(vpu, RESET_G2); -} - /* * Supported codec ops. */ @@ -237,17 +230,33 @@ static const struct hantro_codec_ops imx8mq_vpu_codec_ops[] = { }, }; +static const struct hantro_codec_ops imx8mq_vpu_g1_codec_ops[] = { + [HANTRO_MODE_MPEG2_DEC] = { + .run = hantro_g1_mpeg2_dec_run, + .init = hantro_mpeg2_dec_init, + .exit = hantro_mpeg2_dec_exit, + }, + [HANTRO_MODE_VP8_DEC] = { + .run = hantro_g1_vp8_dec_run, + .init = hantro_vp8_dec_init, + .exit = hantro_vp8_dec_exit, + }, + [HANTRO_MODE_H264_DEC] = { + .run = hantro_g1_h264_dec_run, + .init = hantro_h264_dec_init, + .exit = hantro_h264_dec_exit, + }, +}; + static const struct hantro_codec_ops imx8mq_vpu_g2_codec_ops[] = { [HANTRO_MODE_HEVC_DEC] = { .run = hantro_g2_hevc_dec_run, - .reset = imx8m_vpu_g2_reset, .init = hantro_hevc_dec_init, .exit = hantro_hevc_dec_exit, }, [HANTRO_MODE_VP9_DEC] = { .run = hantro_g2_vp9_dec_run, .done = hantro_g2_vp9_dec_done, - .reset = imx8m_vpu_g2_reset, .init = hantro_vp9_dec_init, .exit = hantro_vp9_dec_exit, }, @@ -267,6 +276,8 @@ static const struct hantro_irq imx8mq_g2_irqs[] = { static const char * const imx8mq_clk_names[] = { "g1", "g2", "bus" }; static const char * const imx8mq_reg_names[] = { "g1", "g2", "ctrl" }; +static const char * const imx8mq_g1_clk_names[] = { "g1" }; +static const char * const imx8mq_g2_clk_names[] = { "g2" }; const struct hantro_variant imx8mq_vpu_variant = { .dec_fmts = imx8m_vpu_dec_fmts, @@ -287,6 +298,21 @@ const struct hantro_variant imx8mq_vpu_variant = { .num_regs = ARRAY_SIZE(imx8mq_reg_names) }; +const struct hantro_variant imx8mq_vpu_g1_variant = { + .dec_fmts = imx8m_vpu_dec_fmts, + .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_dec_fmts), + .postproc_fmts = imx8m_vpu_postproc_fmts, + .num_postproc_fmts = ARRAY_SIZE(imx8m_vpu_postproc_fmts), + .postproc_ops = &hantro_g1_postproc_ops, + .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | + HANTRO_H264_DECODER, + .codec_ops = imx8mq_vpu_g1_codec_ops, + .irqs = imx8mq_irqs, + .num_irqs = ARRAY_SIZE(imx8mq_irqs), + .clk_names = imx8mq_g1_clk_names, + .num_clocks = ARRAY_SIZE(imx8mq_g1_clk_names), +}; + const struct hantro_variant imx8mq_vpu_g2_variant = { .dec_offset = 0x0, .dec_fmts = imx8m_vpu_g2_dec_fmts, @@ -296,10 +322,8 @@ const struct hantro_variant imx8mq_vpu_g2_variant = { .postproc_ops = &hantro_g2_postproc_ops, .codec = HANTRO_HEVC_DECODER | HANTRO_VP9_DECODER, .codec_ops = imx8mq_vpu_g2_codec_ops, - .init = imx8mq_vpu_hw_init, - .runtime_resume = imx8mq_runtime_resume, .irqs = imx8mq_g2_irqs, .num_irqs = ARRAY_SIZE(imx8mq_g2_irqs), - .clk_names = imx8mq_clk_names, - .num_clocks = ARRAY_SIZE(imx8mq_clk_names), + .clk_names = imx8mq_g2_clk_names, + .num_clocks = ARRAY_SIZE(imx8mq_g2_clk_names), }; From patchwork Mon Jan 24 02:31:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12721428 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7DE87C4332F for ; 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Sun, 23 Jan 2022 18:31:45 -0800 (PST) From: Adam Ford To: linux-media@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, shawnguo@kernel.org, aford@beaconembedded.com, Adam Ford , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , Lucas Stach , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Subject: [PATCH V3 06/10] arm64: dts: imx8mq: Enable both G1 and G2 VPU's with vpu-blk-ctrl Date: Sun, 23 Jan 2022 20:31:20 -0600 Message-Id: <20220124023125.414794-7-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220124023125.414794-1-aford173@gmail.com> References: <20220124023125.414794-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org With the Hantro G1 and G2 now setup to run independently, update the device tree to allow both to operate. This requires the vpu-blk-ctrl node to be configured. Since vpu-blk-ctrl needs certain clock enabled to handle the gating of the G1 and G2 fuses, the clock-parents and clock-rates for the various VPU's to be moved into the pgc_vpu because they cannot get re-parented once enabled, and the pgc_vpu is the highest in the chain. Signed-off-by: Adam Ford Reported-by: kernel test robot Reviewed-by: Ezequiel Garcia diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 2df2510d0118..549b2440f55d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -737,7 +737,21 @@ pgc_gpu: power-domain@5 { pgc_vpu: power-domain@6 { #power-domain-cells = <0>; reg = ; - clocks = <&clk IMX8MQ_CLK_VPU_DEC_ROOT>; + clocks = <&clk IMX8MQ_CLK_VPU_DEC_ROOT>, + <&clk IMX8MQ_CLK_VPU_G1_ROOT>, + <&clk IMX8MQ_CLK_VPU_G2_ROOT>; + assigned-clocks = <&clk IMX8MQ_CLK_VPU_G1>, + <&clk IMX8MQ_CLK_VPU_G2>, + <&clk IMX8MQ_CLK_VPU_BUS>, + <&clk IMX8MQ_VPU_PLL_BYPASS>; + assigned-clock-parents = <&clk IMX8MQ_VPU_PLL_OUT>, + <&clk IMX8MQ_VPU_PLL_OUT>, + <&clk IMX8MQ_SYS1_PLL_800M>, + <&clk IMX8MQ_VPU_PLL>; + assigned-clock-rates = <600000000>, + <600000000>, + <800000000>, + <0>; }; pgc_disp: power-domain@7 { @@ -1457,30 +1471,31 @@ usb3_phy1: usb-phy@382f0040 { status = "disabled"; }; - vpu: video-codec@38300000 { - compatible = "nxp,imx8mq-vpu"; - reg = <0x38300000 0x10000>, - <0x38310000 0x10000>, - <0x38320000 0x10000>; - reg-names = "g1", "g2", "ctrl"; - interrupts = , - ; - interrupt-names = "g1", "g2"; + vpu_g1: video-codec@38300000 { + compatible = "nxp,imx8mq-vpu-g1"; + reg = <0x38300000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>; + power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>; + }; + + vpu_g2: video-codec@38310000 { + compatible = "nxp,imx8mq-vpu-g2"; + reg = <0x38310000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>; + power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>; + }; + + vpu_blk_ctrl: blk-ctrl@38320000 { + compatible = "fsl,imx8mq-vpu-blk-ctrl"; + reg = <0x38320000 0x100>; + power-domains = <&pgc_vpu>, <&pgc_vpu>, <&pgc_vpu>; + power-domain-names = "bus", "g1", "g2"; clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>, - <&clk IMX8MQ_CLK_VPU_G2_ROOT>, - <&clk IMX8MQ_CLK_VPU_DEC_ROOT>; - clock-names = "g1", "g2", "bus"; - assigned-clocks = <&clk IMX8MQ_CLK_VPU_G1>, - <&clk IMX8MQ_CLK_VPU_G2>, - <&clk IMX8MQ_CLK_VPU_BUS>, - <&clk IMX8MQ_VPU_PLL_BYPASS>; - assigned-clock-parents = <&clk IMX8MQ_VPU_PLL_OUT>, - <&clk IMX8MQ_VPU_PLL_OUT>, - <&clk IMX8MQ_SYS1_PLL_800M>, - <&clk IMX8MQ_VPU_PLL>; - assigned-clock-rates = <600000000>, <600000000>, - <800000000>, <0>; - power-domains = <&pgc_vpu>; + <&clk IMX8MQ_CLK_VPU_G2_ROOT>; + clock-names = "g1", "g2"; + #power-domain-cells = <1>; }; pcie0: pcie@33800000 { From patchwork Mon Jan 24 02:31:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12721427 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52AA3C43219 for ; Mon, 24 Jan 2022 02:31:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240855AbiAXCbz (ORCPT ); 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Sun, 23 Jan 2022 18:31:47 -0800 (PST) From: Adam Ford To: linux-media@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, shawnguo@kernel.org, aford@beaconembedded.com, Adam Ford , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , Lucas Stach , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Subject: [PATCH V3 07/10] arm64: dts: imx8mm: Fix VPU Hanging Date: Sun, 23 Jan 2022 20:31:21 -0600 Message-Id: <20220124023125.414794-8-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220124023125.414794-1-aford173@gmail.com> References: <20220124023125.414794-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The vpumix power domain has a reset assigned to it, however when used, it causes a system hang. Testing has shown that it does not appear to be needed anywhere. Fixes: d39d4bb15310 ("arm64: dts: imx8mm: add GPC node") Signed-off-by: Adam Ford diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index f77f90ed416f..0c7a72c51a31 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -707,7 +707,6 @@ pgc_vpumix: power-domain@6 { clocks = <&clk IMX8MM_CLK_VPU_DEC_ROOT>; assigned-clocks = <&clk IMX8MM_CLK_VPU_BUS>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_800M>; - resets = <&src IMX8MQ_RESET_VPU_RESET>; }; pgc_vpu_g1: power-domain@7 { From patchwork Mon Jan 24 02:31:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12721430 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73283C433FE for ; Mon, 24 Jan 2022 02:31:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240943AbiAXCb5 (ORCPT ); Sun, 23 Jan 2022 21:31:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43280 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240918AbiAXCbw (ORCPT ); Sun, 23 Jan 2022 21:31:52 -0500 Received: from mail-io1-xd2e.google.com (mail-io1-xd2e.google.com [IPv6:2607:f8b0:4864:20::d2e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1B77C061744; Sun, 23 Jan 2022 18:31:51 -0800 (PST) Received: by mail-io1-xd2e.google.com with SMTP id 9so2141751iou.2; Sun, 23 Jan 2022 18:31:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wM27uiC4jZN6SIACqztmxLT6jE1eUS0JxDrZiiXzyRg=; b=OeEzUz+xSnEJ37CVSWNU73LKZ0yZoFVZW300ZrxE0zAlrUsF5B00SQDxDtIgduR0qe wjo+DFeHXaKCvIpUxXIFbK4SgqgFafQY2aFDBZtoanjokOm2VxhV7DApE36kYOI+qqk3 qXdObbAmy7fUyTuApsbsl8TCJxZuO/SnVDPIuV+Dstc4lZg2GlxRZUcgU9Y20Hji7HZ4 wzL/MIagejiycvC0z9eb39TB+hjzYvTywl7dF52F2Q+xmkcVkngQAHohfaqN2TiMSoKF kqZB5Unnk90Jlk5hThs1ymZYgncn4s9DwQzGWnmiI/JdMHdhBPu4x4TEj4WuUQ6wN4cS uOtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wM27uiC4jZN6SIACqztmxLT6jE1eUS0JxDrZiiXzyRg=; b=DAu3EyAji5mA5hoTF7sCBjeSrD8x179HmrCHV3wb+TlouICUxTr+CMjo45BYD7Q8ew m+U0yRsogBu82YEq/UOrIX8dQQuo4zJ98JgHLY9+QgDAQAdB0VfOI+c3eUwjiM0IsFNJ kea1V436Vk5R+3K6Zw+9EmCIjY0/auIOR+RRvMcslpJ+f2ai9V2SvWoiJih/2iPZQziW bPeLRXZUdsDalhKFoE2vi5VfJfqhARV5cwJudx43AZoHOSO3kqZMlsGcm/99FclvX9OX wD8xO5h8jQtbmNXKb7YNRVHg8SBQO8Syfh0V2mZib0OJRmcpOXbVh4Eu7MQKLbf6AiCa 7tpg== X-Gm-Message-State: AOAM530ytGOcgHsUBPm1O0oZU7IlHLLWThTtREEKTFK7MgPznp1qZH/i +ax37iFot6nbY1+sfnIkxZ/2PX/YNG0= X-Google-Smtp-Source: ABdhPJwVCAXerAQEZRw1wksjIQuYDlek3Gm5nUOSoAy/LVpBfHxOaxA2QAELIH/ZTZREKTlcu6u43w== X-Received: by 2002:a02:3904:: with SMTP id l4mr5957775jaa.161.1642991510607; Sun, 23 Jan 2022 18:31:50 -0800 (PST) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:582d:ad0e:e5a6:94b6]) by smtp.gmail.com with ESMTPSA id w4sm6625633ilq.56.2022.01.23.18.31.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 23 Jan 2022 18:31:50 -0800 (PST) From: Adam Ford To: linux-media@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, shawnguo@kernel.org, aford@beaconembedded.com, Adam Ford , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , Lucas Stach , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Subject: [PATCH V3 08/10] dt-bindings: media: nxp, imx8mq-vpu: Add support for G1 on imx8mm Date: Sun, 23 Jan 2022 20:31:22 -0600 Message-Id: <20220124023125.414794-9-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220124023125.414794-1-aford173@gmail.com> References: <20220124023125.414794-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The i.MX8M mini appears to have a similar G1 decoder but the post-processing isn't present, so different compatible flag is required. Since all the other parameters are the same with imx8mq, just add the new compatible flag to nxp,imx8mq-vpu.yaml. Signed-off-by: Adam Ford Reviewed-by: Ezequiel Garcia diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml index 9c28d562112b..7dc13a4b1805 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml @@ -5,7 +5,7 @@ $id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs +title: Hantro G1/G2 VPU codecs implemented on i.MX8M SoCs maintainers: - Philipp Zabel @@ -20,6 +20,7 @@ properties: deprecated: true - const: nxp,imx8mq-vpu-g1 - const: nxp,imx8mq-vpu-g2 + - const: nxp,imx8mm-vpu-g1 reg: maxItems: 1 From patchwork Mon Jan 24 02:31:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12721431 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92E6FC433F5 for ; Mon, 24 Jan 2022 02:32:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240846AbiAXCb6 (ORCPT ); Sun, 23 Jan 2022 21:31:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43266 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240938AbiAXCby (ORCPT ); Sun, 23 Jan 2022 21:31:54 -0500 Received: from mail-io1-xd2d.google.com (mail-io1-xd2d.google.com [IPv6:2607:f8b0:4864:20::d2d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 01CD8C061401; Sun, 23 Jan 2022 18:31:54 -0800 (PST) Received: by mail-io1-xd2d.google.com with SMTP id n17so1908489iod.4; Sun, 23 Jan 2022 18:31:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=py21+nfXCxvH9ed7Sw22S2QRAUR7jaIm1Q/EYwP+WYo=; b=da5jAzAfPPfk7mp4wncKvvJCkduKpIsOZSGZ4OC4dqDZ/6Md4hsvMmGsFAXJBLgQLJ P5mPJjhdeaaoS7l/uzxg0e/NbeInrpL4Ikdy7c19AhUAZBVGHP2oKNz5K5MzKyuxsJxl 2ivf5v7yHpBAw75VUsuSnqcH16Djq+vyvLo9jmPMpgoXYoLfkBZFv2iO7tuyvD19k3b1 s7qmOLY1siN8qT/ycFjkm65zbIq0f2/IQm1sZP8w1pAI9WHUvk/bwae694GpdWMZObv8 psFvVslJeDiGo9C30C+SE+i/cLLG6mFsrIw++B1UVOLdnA9Yhv5hoX1sv2yZDMzbRGn7 W/HQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=py21+nfXCxvH9ed7Sw22S2QRAUR7jaIm1Q/EYwP+WYo=; b=couxggUQBESYh359pmuJmwoNRPDpw86IbNQ8iiDMXqhoaoXJYkjTyapwOlWGHhGnqp jnwVdKvd/1Q+nsFEPSiKsA+FdLd9nmZ7Pe71H0Quw4O5OFNKHUrwD60skxNMqib6jQpD 5T6kDbvMMo0IvK32V9thaMf6DJ3JJ1zdIw7Wg+JXGUyZ7bzO4SMymud8E5qOjAywVNM2 kYReW2nwSQNJDUZp05wl8h0iSK2hb/uM+czBBELoIV3SkFPocbDHmerGjQJNwOfhd6eU /bsar+qfXBTjagqJTzeGyQaub8nLmUScZWBw3dnEGbnuPQeEr6RtS3pSNOcVDR4O8BfP XmTQ== X-Gm-Message-State: AOAM530YphnWJ/FVsCgIT/mTVqKBo4pOcZaWHXWgdIPL4dC/PfdhUS1A QJLRcChvzQNa769ouFJcC8ZMAyCy9Jg= X-Google-Smtp-Source: ABdhPJwUjw8XT5/iEV0iZ2cPeS0gZ9iHkopEETPmY56ydUqeJ6JKeUC8o3B9CTZsNY/bhPBfUXxbHg== X-Received: by 2002:a02:29cc:: with SMTP id p195mr5841271jap.134.1642991513028; Sun, 23 Jan 2022 18:31:53 -0800 (PST) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:582d:ad0e:e5a6:94b6]) by smtp.gmail.com with ESMTPSA id w4sm6625633ilq.56.2022.01.23.18.31.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 23 Jan 2022 18:31:52 -0800 (PST) From: Adam Ford To: linux-media@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, shawnguo@kernel.org, aford@beaconembedded.com, Adam Ford , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , Lucas Stach , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Subject: [PATCH V3 09/10] media: hantro: Add support for i.MX8MM Hantro-G1 Date: Sun, 23 Jan 2022 20:31:23 -0600 Message-Id: <20220124023125.414794-10-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220124023125.414794-1-aford173@gmail.com> References: <20220124023125.414794-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The i.MX8MM has a Hantro G1 video decoder similar to the imx8mq but lacks the post-processor present in the imx8mq. Add support in the driver for it with the post-processing removed. Signed-off-by: Adam Ford Reviewed-by: Ezequiel Garcia diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c index a670ddd29c4c..b281ac4fb79c 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -615,6 +615,7 @@ static const struct of_device_id of_hantro_match[] = { { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, }, #endif #ifdef CONFIG_VIDEO_HANTRO_IMX8M + { .compatible = "nxp,imx8mm-vpu-g1", .data = &imx8mm_vpu_g1_variant, }, { .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, }, { .compatible = "nxp,imx8mq-vpu-g1", .data = &imx8mq_vpu_g1_variant }, { .compatible = "nxp,imx8mq-vpu-g2", .data = &imx8mq_vpu_g2_variant }, diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h index f0bd2ffe290b..c00b46e06055 100644 --- a/drivers/staging/media/hantro/hantro_hw.h +++ b/drivers/staging/media/hantro/hantro_hw.h @@ -299,6 +299,7 @@ enum hantro_enc_fmt { ROCKCHIP_VPU_ENC_FMT_UYVY422 = 3, }; +extern const struct hantro_variant imx8mm_vpu_g1_variant; extern const struct hantro_variant imx8mq_vpu_g1_variant; extern const struct hantro_variant imx8mq_vpu_g2_variant; extern const struct hantro_variant imx8mq_vpu_variant; diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c index 849ea7122d47..9802508bade2 100644 --- a/drivers/staging/media/hantro/imx8m_vpu_hw.c +++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c @@ -327,3 +327,15 @@ const struct hantro_variant imx8mq_vpu_g2_variant = { .clk_names = imx8mq_g2_clk_names, .num_clocks = ARRAY_SIZE(imx8mq_g2_clk_names), }; + +const struct hantro_variant imx8mm_vpu_g1_variant = { + .dec_fmts = imx8m_vpu_dec_fmts, + .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_dec_fmts), + .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | + HANTRO_H264_DECODER, + .codec_ops = imx8mq_vpu_g1_codec_ops, + .irqs = imx8mq_irqs, + .num_irqs = ARRAY_SIZE(imx8mq_irqs), + .clk_names = imx8mq_g1_clk_names, + .num_clocks = ARRAY_SIZE(imx8mq_g1_clk_names), +}; From patchwork Mon Jan 24 02:31:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 12721432 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88FF9C433F5 for ; Mon, 24 Jan 2022 02:32:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240873AbiAXCcH (ORCPT ); Sun, 23 Jan 2022 21:32:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43274 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240878AbiAXCb4 (ORCPT ); Sun, 23 Jan 2022 21:31:56 -0500 Received: from mail-il1-x129.google.com (mail-il1-x129.google.com [IPv6:2607:f8b0:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 82595C06173D; Sun, 23 Jan 2022 18:31:56 -0800 (PST) Received: by mail-il1-x129.google.com with SMTP id a18so12641262ilq.6; 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Sun, 23 Jan 2022 18:31:55 -0800 (PST) Received: from aford-IdeaCentre-A730.lan ([2601:448:8400:9e8:582d:ad0e:e5a6:94b6]) by smtp.gmail.com with ESMTPSA id w4sm6625633ilq.56.2022.01.23.18.31.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 23 Jan 2022 18:31:54 -0800 (PST) From: Adam Ford To: linux-media@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, shawnguo@kernel.org, aford@beaconembedded.com, Adam Ford , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Greg Kroah-Hartman , Lucas Stach , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev Subject: [PATCH V3 10/10] arm64: dts: imx8mm: Enable Hantro G1 and G2 video decoders Date: Sun, 23 Jan 2022 20:31:24 -0600 Message-Id: <20220124023125.414794-11-aford173@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220124023125.414794-1-aford173@gmail.com> References: <20220124023125.414794-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org There are two decoders on the i.MX8M Mini controlled by the vpu-blk-ctrl. The G1 supports H264 and VP8 while the G2 support HEVC and VP9. Signed-off-by: Adam Ford Reviewed-by: Ezequiel Garcia diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 0c7a72c51a31..98aec4421713 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -1272,6 +1272,22 @@ gpu_2d: gpu@38008000 { power-domains = <&pgc_gpu>; }; + vpu_g1: video-codec@38300000 { + compatible = "nxp,imx8mm-vpu-g1"; + reg = <0x38300000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>; + power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G1>; + }; + + vpu_g2: video-codec@38310000 { + compatible = "nxp,imx8mq-vpu-g2"; + reg = <0x38310000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MM_CLK_VPU_G2_ROOT>; + power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G2>; + }; + vpu_blk_ctrl: blk-ctrl@38330000 { compatible = "fsl,imx8mm-vpu-blk-ctrl", "syscon"; reg = <0x38330000 0x100>; @@ -1282,6 +1298,12 @@ vpu_blk_ctrl: blk-ctrl@38330000 { <&clk IMX8MM_CLK_VPU_G2_ROOT>, <&clk IMX8MM_CLK_VPU_H1_ROOT>; clock-names = "g1", "g2", "h1"; + assigned-clocks = <&clk IMX8MM_CLK_VPU_G1>, + <&clk IMX8MM_CLK_VPU_G2>; + assigned-clock-parents = <&clk IMX8MM_VPU_PLL_OUT>, + <&clk IMX8MM_VPU_PLL_OUT>; + assigned-clock-rates = <600000000>, + <600000000>; #power-domain-cells = <1>; };