From patchwork Tue Jan 25 06:44:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jammy Huang X-Patchwork-Id: 12723330 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23E48C433F5 for ; Tue, 25 Jan 2022 06:49:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1359835AbiAYGtw (ORCPT ); Tue, 25 Jan 2022 01:49:52 -0500 Received: from twspam01.aspeedtech.com ([211.20.114.71]:24971 "EHLO twspam01.aspeedtech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353675AbiAYGrB (ORCPT ); Tue, 25 Jan 2022 01:47:01 -0500 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 20P6akpG078228; Tue, 25 Jan 2022 14:36:46 +0800 (GMT-8) (envelope-from jammy_huang@aspeedtech.com) Received: from JammyHuang-PC.aspeed.com (192.168.2.115) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 25 Jan 2022 14:44:06 +0800 From: Jammy Huang To: , , , , , , , , Subject: [PATCH v4 1/3] media: aspeed: Correct value for h-total-pixels Date: Tue, 25 Jan 2022 14:44:07 +0800 Message-ID: <20220125064409.5502-2-jammy_huang@aspeedtech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220125064409.5502-1-jammy_huang@aspeedtech.com> References: <20220125064409.5502-1-jammy_huang@aspeedtech.com> MIME-Version: 1.0 X-Originating-IP: [192.168.2.115] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 20P6akpG078228 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Previous reg-field, 0x98[11:0], stands for the period of the detected hsync signal. Use the correct reg, 0xa0, to get h-total in pixels. Fixes: d2b4387f3bdf ("media: platform: Add Aspeed Video Engine driver") Signed-off-by: Jammy Huang Reviewed-by: Joel Stanley --- v4: - no update v3: - no update v2: - no update --- drivers/media/platform/aspeed-video.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c index b388bc56ce81..d5f77b205175 100644 --- a/drivers/media/platform/aspeed-video.c +++ b/drivers/media/platform/aspeed-video.c @@ -166,7 +166,7 @@ #define VE_SRC_TB_EDGE_DET_BOT GENMASK(28, VE_SRC_TB_EDGE_DET_BOT_SHF) #define VE_MODE_DETECT_STATUS 0x098 -#define VE_MODE_DETECT_H_PIXELS GENMASK(11, 0) +#define VE_MODE_DETECT_H_PERIOD GENMASK(11, 0) #define VE_MODE_DETECT_V_LINES_SHF 16 #define VE_MODE_DETECT_V_LINES GENMASK(27, VE_MODE_DETECT_V_LINES_SHF) #define VE_MODE_DETECT_STATUS_VSYNC BIT(28) @@ -177,6 +177,8 @@ #define VE_SYNC_STATUS_VSYNC_SHF 16 #define VE_SYNC_STATUS_VSYNC GENMASK(27, VE_SYNC_STATUS_VSYNC_SHF) +#define VE_H_TOTAL_PIXELS 0x0A0 + #define VE_INTERRUPT_CTRL 0x304 #define VE_INTERRUPT_STATUS 0x308 #define VE_INTERRUPT_MODE_DETECT_WD BIT(0) @@ -938,6 +940,7 @@ static void aspeed_video_get_resolution(struct aspeed_video *video) u32 src_lr_edge; u32 src_tb_edge; u32 sync; + u32 htotal; struct v4l2_bt_timings *det = &video->detected_timings; det->width = MIN_WIDTH; @@ -983,6 +986,7 @@ static void aspeed_video_get_resolution(struct aspeed_video *video) src_tb_edge = aspeed_video_read(video, VE_SRC_TB_EDGE_DET); mds = aspeed_video_read(video, VE_MODE_DETECT_STATUS); sync = aspeed_video_read(video, VE_SYNC_STATUS); + htotal = aspeed_video_read(video, VE_H_TOTAL_PIXELS); video->frame_bottom = (src_tb_edge & VE_SRC_TB_EDGE_DET_BOT) >> VE_SRC_TB_EDGE_DET_BOT_SHF; @@ -999,8 +1003,7 @@ static void aspeed_video_get_resolution(struct aspeed_video *video) VE_SRC_LR_EDGE_DET_RT_SHF; video->frame_left = src_lr_edge & VE_SRC_LR_EDGE_DET_LEFT; det->hfrontporch = video->frame_left; - det->hbackporch = (mds & VE_MODE_DETECT_H_PIXELS) - - video->frame_right; + det->hbackporch = htotal - video->frame_right; det->hsync = sync & VE_SYNC_STATUS_HSYNC; if (video->frame_left > video->frame_right) continue; From patchwork Tue Jan 25 06:44:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jammy Huang X-Patchwork-Id: 12723332 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6772C433EF for ; Tue, 25 Jan 2022 06:50:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376327AbiAYGt6 (ORCPT ); Tue, 25 Jan 2022 01:49:58 -0500 Received: from twspam01.aspeedtech.com ([211.20.114.71]:37823 "EHLO twspam01.aspeedtech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359023AbiAYGrD (ORCPT ); Tue, 25 Jan 2022 01:47:03 -0500 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 20P6aluv078229; Tue, 25 Jan 2022 14:36:47 +0800 (GMT-8) (envelope-from jammy_huang@aspeedtech.com) Received: from JammyHuang-PC.aspeed.com (192.168.2.115) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 25 Jan 2022 14:44:07 +0800 From: Jammy Huang To: , , , , , , , , Subject: [PATCH v4 2/3] media: aspeed: Use FIELD_GET to improve readability Date: Tue, 25 Jan 2022 14:44:08 +0800 Message-ID: <20220125064409.5502-3-jammy_huang@aspeedtech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220125064409.5502-1-jammy_huang@aspeedtech.com> References: <20220125064409.5502-1-jammy_huang@aspeedtech.com> MIME-Version: 1.0 X-Originating-IP: [192.168.2.115] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 20P6aluv078229 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Use the bitfield macro FIELD_GET, and GENMASK to do the shift and mask in one go for reg values. Signed-off-by: Jammy Huang Reviewed-by: Joel Stanley --- v4: - no update v3: - no update v2: - Put some codes on one line --- drivers/media/platform/aspeed-video.c | 31 +++++++++++---------------- 1 file changed, 12 insertions(+), 19 deletions(-) diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c index d5f77b205175..c241038ee27c 100644 --- a/drivers/media/platform/aspeed-video.c +++ b/drivers/media/platform/aspeed-video.c @@ -156,26 +156,22 @@ #define VE_SRC_LR_EDGE_DET_NO_H BIT(13) #define VE_SRC_LR_EDGE_DET_NO_DISP BIT(14) #define VE_SRC_LR_EDGE_DET_NO_CLK BIT(15) -#define VE_SRC_LR_EDGE_DET_RT_SHF 16 -#define VE_SRC_LR_EDGE_DET_RT GENMASK(27, VE_SRC_LR_EDGE_DET_RT_SHF) +#define VE_SRC_LR_EDGE_DET_RT GENMASK(27, 16) #define VE_SRC_LR_EDGE_DET_INTERLACE BIT(31) #define VE_SRC_TB_EDGE_DET 0x094 #define VE_SRC_TB_EDGE_DET_TOP GENMASK(12, 0) -#define VE_SRC_TB_EDGE_DET_BOT_SHF 16 -#define VE_SRC_TB_EDGE_DET_BOT GENMASK(28, VE_SRC_TB_EDGE_DET_BOT_SHF) +#define VE_SRC_TB_EDGE_DET_BOT GENMASK(28, 16) #define VE_MODE_DETECT_STATUS 0x098 #define VE_MODE_DETECT_H_PERIOD GENMASK(11, 0) -#define VE_MODE_DETECT_V_LINES_SHF 16 -#define VE_MODE_DETECT_V_LINES GENMASK(27, VE_MODE_DETECT_V_LINES_SHF) +#define VE_MODE_DETECT_V_LINES GENMASK(27, 16) #define VE_MODE_DETECT_STATUS_VSYNC BIT(28) #define VE_MODE_DETECT_STATUS_HSYNC BIT(29) #define VE_SYNC_STATUS 0x09c #define VE_SYNC_STATUS_HSYNC GENMASK(11, 0) -#define VE_SYNC_STATUS_VSYNC_SHF 16 -#define VE_SYNC_STATUS_VSYNC GENMASK(27, VE_SYNC_STATUS_VSYNC_SHF) +#define VE_SYNC_STATUS_VSYNC GENMASK(27, 16) #define VE_H_TOTAL_PIXELS 0x0A0 @@ -988,23 +984,20 @@ static void aspeed_video_get_resolution(struct aspeed_video *video) sync = aspeed_video_read(video, VE_SYNC_STATUS); htotal = aspeed_video_read(video, VE_H_TOTAL_PIXELS); - video->frame_bottom = (src_tb_edge & VE_SRC_TB_EDGE_DET_BOT) >> - VE_SRC_TB_EDGE_DET_BOT_SHF; - video->frame_top = src_tb_edge & VE_SRC_TB_EDGE_DET_TOP; + video->frame_bottom = FIELD_GET(VE_SRC_TB_EDGE_DET_BOT, src_tb_edge); + video->frame_top = FIELD_GET(VE_SRC_TB_EDGE_DET_TOP, src_tb_edge); det->vfrontporch = video->frame_top; - det->vbackporch = ((mds & VE_MODE_DETECT_V_LINES) >> - VE_MODE_DETECT_V_LINES_SHF) - video->frame_bottom; - det->vsync = (sync & VE_SYNC_STATUS_VSYNC) >> - VE_SYNC_STATUS_VSYNC_SHF; + det->vbackporch = FIELD_GET(VE_MODE_DETECT_V_LINES, mds) - + video->frame_bottom; + det->vsync = FIELD_GET(VE_SYNC_STATUS_VSYNC, sync); if (video->frame_top > video->frame_bottom) continue; - video->frame_right = (src_lr_edge & VE_SRC_LR_EDGE_DET_RT) >> - VE_SRC_LR_EDGE_DET_RT_SHF; - video->frame_left = src_lr_edge & VE_SRC_LR_EDGE_DET_LEFT; + video->frame_right = FIELD_GET(VE_SRC_LR_EDGE_DET_RT, src_lr_edge); + video->frame_left = FIELD_GET(VE_SRC_LR_EDGE_DET_LEFT, src_lr_edge); det->hfrontporch = video->frame_left; det->hbackporch = htotal - video->frame_right; - det->hsync = sync & VE_SYNC_STATUS_HSYNC; + det->hsync = FIELD_GET(VE_SYNC_STATUS_HSYNC, sync); if (video->frame_left > video->frame_right) continue; From patchwork Tue Jan 25 06:44:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jammy Huang X-Patchwork-Id: 12723331 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29BDFC433FE for ; Tue, 25 Jan 2022 06:50:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376320AbiAYGt5 (ORCPT ); Tue, 25 Jan 2022 01:49:57 -0500 Received: from twspam01.aspeedtech.com ([211.20.114.71]:30140 "EHLO twspam01.aspeedtech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358991AbiAYGrD (ORCPT ); Tue, 25 Jan 2022 01:47:03 -0500 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 20P6aluw078229; Tue, 25 Jan 2022 14:36:47 +0800 (GMT-8) (envelope-from jammy_huang@aspeedtech.com) Received: from JammyHuang-PC.aspeed.com (192.168.2.115) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 25 Jan 2022 14:44:07 +0800 From: Jammy Huang To: , , , , , , , , Subject: [PATCH v4 3/3] media: aspeed: Correct values for detected timing Date: Tue, 25 Jan 2022 14:44:09 +0800 Message-ID: <20220125064409.5502-4-jammy_huang@aspeedtech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220125064409.5502-1-jammy_huang@aspeedtech.com> References: <20220125064409.5502-1-jammy_huang@aspeedtech.com> MIME-Version: 1.0 X-Originating-IP: [192.168.2.115] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 20P6aluw078229 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Correct timing's fp/sync/bp value based on the information below. It should be noticed that the calculation formula should be changed per sync polarity. The sequence of signal: sync - backporch - video data - frontporch The following registers start counting from sync's rising edge: 1. VR090: frame edge's left and right 2. VR094: frame edge's top and bottom 3. VR09C: counting from sync's rising edge to falling edge [Vertical timing] +--+ +-------------------+ +--+ | | | v i d e o | | | +--+ +-----+ +-----+ +---+ vsync+--+ frame_top+--------+ frame_bottom+----------------------------+ +-------------------+ | v i d e o | +--+ +-----+ +-----+ +---+ | | | | +--+ +--+ vsync+-------------------------------+ frame_top+-----+ frame_bottom+-------------------------+ [Horizontal timing] +--+ +-------------------+ +--+ | | | v i d e o | | | +--+ +-----+ +-----+ +---+ hsync+--+ frame_left+--------+ frame_right+----------------------------+ +-------------------+ | v i d e o | +--+ +-----+ +-----+ +---+ | | | | +--+ +--+ hsync+-------------------------------+ frame_left+-----+ frame_right+-------------------------+ Ex. 1920x1200@60 whose vsync polarity is negative VR098: c4d3efff, VR09C: 04cc001f v-total = 0x4D3 (VR098[27:16]) = 1235 v-sync = 0x4CC (VR09C[27:16]) = 1228 Signed-off-by: Jammy Huang --- v4: - Combine this one with patch 4 v3: - Add API, aspeed_video_get_timings(), to handle the calculation of timings. v2: - Code refined per Joel's suggestion - Update commit message to have name matching variable --- drivers/media/platform/aspeed-video.c | 109 +++++++++++++++++++++++--- 1 file changed, 97 insertions(+), 12 deletions(-) diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c index c241038ee27c..90cdc6fe0caa 100644 --- a/drivers/media/platform/aspeed-video.c +++ b/drivers/media/platform/aspeed-video.c @@ -925,6 +925,99 @@ static void aspeed_video_calc_compressed_size(struct aspeed_video *video, video->max_compressed_size); } +/* + * Update v4l2_bt_timings per current status. + * frame_top/frame_bottom/frame_left/frame_right need to be ready. + * + * The following registers start counting from sync's rising edge: + * 1. VR090: frame edge's left and right + * 2. VR094: frame edge's top and bottom + * 3. VR09C: counting from sync's rising edge to falling edge + * + * [Vertical timing] + * +--+ +-------------------+ +--+ + * | | | v i d e o | | | + * +--+ +-----+ +-----+ +---+ + * vsync+--+ + * frame_top+--------+ + * frame_bottom+----------------------------+ + * + * +-------------------+ + * | v i d e o | + * +--+ +-----+ +-----+ +---+ + * | | | | + * +--+ +--+ + * vsync+-------------------------------+ + * frame_top+-----+ + * frame_bottom+-------------------------+ + * + * [Horizontal timing] + * +--+ +-------------------+ +--+ + * | | | v i d e o | | | + * +--+ +-----+ +-----+ +---+ + * hsync+--+ + * frame_left+--------+ + * frame_right+----------------------------+ + * + * +-------------------+ + * | v i d e o | + * +--+ +-----+ +-----+ +---+ + * | | | | + * +--+ +--+ + * hsync+-------------------------------+ + * frame_left+-----+ + * frame_right+-------------------------+ + * + * @v: the struct of aspeed_video + * @det: v4l2_bt_timings to be updated. + */ +static void aspeed_video_get_timings(struct aspeed_video *v, + struct v4l2_bt_timings *det) +{ + u32 mds, sync, htotal, vtotal, vsync, hsync; + + mds = aspeed_video_read(v, VE_MODE_DETECT_STATUS); + sync = aspeed_video_read(v, VE_SYNC_STATUS); + htotal = aspeed_video_read(v, VE_H_TOTAL_PIXELS); + vtotal = FIELD_GET(VE_MODE_DETECT_V_LINES, mds); + vsync = FIELD_GET(VE_SYNC_STATUS_VSYNC, sync); + hsync = FIELD_GET(VE_SYNC_STATUS_HSYNC, sync); + + /* + * This is a workaround for polarity detection. + * Because ast-soc counts sync from sync's rising edge, the reg value + * of sync would be larger than video's active area if negative. + */ + if (vsync > det->height) + det->polarities &= ~V4L2_DV_VSYNC_POS_POL; + else + det->polarities |= V4L2_DV_VSYNC_POS_POL; + if (hsync > det->width) + det->polarities &= ~V4L2_DV_HSYNC_POS_POL; + else + det->polarities |= V4L2_DV_HSYNC_POS_POL; + + if (det->polarities & V4L2_DV_VSYNC_POS_POL) { + det->vbackporch = v->frame_top - vsync; + det->vfrontporch = vtotal - v->frame_bottom; + det->vsync = vsync; + } else { + det->vbackporch = v->frame_top; + det->vfrontporch = vsync - v->frame_bottom; + det->vsync = vtotal - vsync; + } + + if (det->polarities & V4L2_DV_HSYNC_POS_POL) { + det->hbackporch = v->frame_left - hsync; + det->hfrontporch = htotal - v->frame_right; + det->hsync = hsync; + } else { + det->hbackporch = v->frame_left; + det->hfrontporch = hsync - v->frame_right; + det->hsync = htotal - hsync; + } +} + #define res_check(v) test_and_clear_bit(VIDEO_MODE_DETECT_DONE, &(v)->flags) static void aspeed_video_get_resolution(struct aspeed_video *video) @@ -935,8 +1028,6 @@ static void aspeed_video_get_resolution(struct aspeed_video *video) u32 mds; u32 src_lr_edge; u32 src_tb_edge; - u32 sync; - u32 htotal; struct v4l2_bt_timings *det = &video->detected_timings; det->width = MIN_WIDTH; @@ -980,24 +1071,16 @@ static void aspeed_video_get_resolution(struct aspeed_video *video) src_lr_edge = aspeed_video_read(video, VE_SRC_LR_EDGE_DET); src_tb_edge = aspeed_video_read(video, VE_SRC_TB_EDGE_DET); - mds = aspeed_video_read(video, VE_MODE_DETECT_STATUS); - sync = aspeed_video_read(video, VE_SYNC_STATUS); - htotal = aspeed_video_read(video, VE_H_TOTAL_PIXELS); video->frame_bottom = FIELD_GET(VE_SRC_TB_EDGE_DET_BOT, src_tb_edge); video->frame_top = FIELD_GET(VE_SRC_TB_EDGE_DET_TOP, src_tb_edge); - det->vfrontporch = video->frame_top; - det->vbackporch = FIELD_GET(VE_MODE_DETECT_V_LINES, mds) - - video->frame_bottom; - det->vsync = FIELD_GET(VE_SYNC_STATUS_VSYNC, sync); + if (video->frame_top > video->frame_bottom) continue; video->frame_right = FIELD_GET(VE_SRC_LR_EDGE_DET_RT, src_lr_edge); video->frame_left = FIELD_GET(VE_SRC_LR_EDGE_DET_LEFT, src_lr_edge); - det->hfrontporch = video->frame_left; - det->hbackporch = htotal - video->frame_right; - det->hsync = FIELD_GET(VE_SYNC_STATUS_HSYNC, sync); + if (video->frame_left > video->frame_right) continue; @@ -1013,6 +1096,8 @@ static void aspeed_video_get_resolution(struct aspeed_video *video) det->width = (video->frame_right - video->frame_left) + 1; video->v4l2_input_status = 0; + aspeed_video_get_timings(video, det); + /* * Enable mode-detect watchdog, resolution-change watchdog and * automatic compression after frame capture.