From patchwork Sun Jan 30 14:51:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felix Fietkau X-Patchwork-Id: 12729821 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 284C6C433EF for ; Sun, 30 Jan 2022 14:52:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=8x1ywiZy79i+dc9o7IPruj5GcrCN3DdRrnkIpP++blg=; b=0KVditxwm2RkUc /R8/fxTedr3oTH9cDun3bcaBJdmej9398npwQ/zeTi/SFsQf+P49+sJRq1REYmyuYqb/z+f0JN7H+ Zw17iBz4FTIba7kYaR09BKvi+OXbZI/H4AHPLjMazJRc8nGNJ6xUBgz+se4ntjtNvX5dY9XWWJKFP Aynls1krEgIkhSdyqA2WA9VIFlgpDWR19X9EY5dUmO0tiFzOY86fnVEvKQuvG3zN7+/kpOBRHZqVw j9l2jVUKqbqobfww3/clIYRTEceyOAs+L+0CaeQlig4EIJr4bAN/czSS4VxnpszUzo2cIO5nbWi4r huRUJZlYeOceMlEVxSRQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEBYJ-006j5E-Mm; Sun, 30 Jan 2022 14:51:39 +0000 Received: from nbd.name ([2a01:4f8:221:3d45::2]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEBYA-006izC-Lo; Sun, 30 Jan 2022 14:51:32 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nbd.name; s=20160729; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=zuMwAtKwAKhJ6tXZBjnRsIGNnEtjFz5TcgOQeseaIuU=; b=TpGpl+qIhYbRJ8YgeIL99jdLaD 978oeCUO2qrlfL0ky06yQ84S2IpANUgN+pSAclofFi06hZc8MwPO0SUCtyVA4O275Ikc9VKmWK/jj 0asZ+KNcWbihH9xgs4JY57P521xgy5OFopVSVynroTkJArMX5uQ0J9vWEjDOrT+xqfgY=; Received: from p200300daa716f900d40f7dfd86c385e0.dip0.t-ipconnect.de ([2003:da:a716:f900:d40f:7dfd:86c3:85e0] helo=Maecks.lan) by ds12 with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.89) (envelope-from ) id 1nEBY5-0002if-Do; Sun, 30 Jan 2022 15:51:25 +0100 From: Felix Fietkau To: Rob Herring Cc: soc@kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, john@phrozen.org, Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 01/13] dt-bindings: Add vendor prefix for Airoha Date: Sun, 30 Jan 2022 15:51:04 +0100 Message-Id: <20220130145116.88406-2-nbd@nbd.name> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20220130145116.88406-1-nbd@nbd.name> References: <20220130145116.88406-1-nbd@nbd.name> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220130_065130_960527_DD4CF530 X-CRM114-Status: UNSURE ( 7.41 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: John Crispin Add vendor prefix "airoha" for Airoha, a subsidiary of MediaTek Acked-by: Rob Herring Signed-off-by: John Crispin Signed-off-by: Bert Vermeulen Signed-off-by: Felix Fietkau --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index eb8ab0d82198..d2f9fd7654bc 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -59,6 +59,8 @@ patternProperties: description: Aeroflex Gaisler AB "^aesop,.*": description: AESOP Embedded Forum + "^airoha,.*": + description: Airoha "^al,.*": description: Annapurna Labs "^alcatel,.*": From patchwork Sun Jan 30 14:51:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felix Fietkau X-Patchwork-Id: 12729822 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 524E7C433EF for ; Sun, 30 Jan 2022 14:53:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=aj5JX0+0eFMZRY0DdZNKrD5IwNli8RgumBD1jNowkqI=; b=2y4sxLpIbw8r/Y UsshHacmpcDdD33i5peAyaFRmh7OiNSpH5YSX3T6BchvAYEsqcSR08Klik+W0X4IsrcCZ3YNKVhCN zjZKfloTUu51BM83rL46UyJiVhHSh8GF9HCWwx32MpXN+fIpEEKAOZzE/L4SWkZs2QEsX3xwPNvm3 tYNzrObOSukOUvLUnWjeE2saL+gJweDxod/VyXdETCelLLvfSo4kqAaxHSmfBWqyHTw/5aOfUqJy1 2JhgUc9Wda4ncyQ2gmX9yZdo9qKgAVSMnMdHbmLkdLjy/qu8WedFqNCK+1CjTHQ/F+/qjXNUZ9vf4 nVjFqZBFId19EEmerpTg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEBYU-006jCK-OJ; Sun, 30 Jan 2022 14:51:50 +0000 Received: from nbd.name ([2a01:4f8:221:3d45::2]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEBYA-006izM-Ot; Sun, 30 Jan 2022 14:51:32 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nbd.name; s=20160729; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=/rahaqoBl10mLxjiHHBjaDkLrGMaoWWzxNZlctbd1uQ=; b=PX3110lEoSQ9dsykbvPfcmHvnh x/+XKcyBbGeu/2xbB4PJ3AZd6Jhpm/GfNLjHXUhuMqcDv4JXv1tVNrI0bTTqxPFSRSGBK8lS7BNEN ZcitLNcfpKngdVB+ebfFA4Lg5+m8U0GB76ICNSLfkJJe4sgNSC+E/FqcdnF26gpoeOcE=; Received: from p200300daa716f900d40f7dfd86c385e0.dip0.t-ipconnect.de ([2003:da:a716:f900:d40f:7dfd:86c3:85e0] helo=Maecks.lan) by ds12 with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.89) (envelope-from ) id 1nEBY6-0002if-1F; Sun, 30 Jan 2022 15:51:26 +0100 From: Felix Fietkau To: Rob Herring , John Crispin Cc: soc@kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 02/13] dt-bindings: arm: airoha: Add binding for EN7523 SoC and EVB Date: Sun, 30 Jan 2022 15:51:05 +0100 Message-Id: <20220130145116.88406-3-nbd@nbd.name> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20220130145116.88406-1-nbd@nbd.name> References: <20220130145116.88406-1-nbd@nbd.name> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220130_065131_015211_FA961D44 X-CRM114-Status: GOOD ( 10.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: John Crispin Add devicetree binding for Airoha EN7523 SoC and evaluation board. Reviewed-by: Rob Herring Signed-off-by: John Crispin Signed-off-by: Bert Vermeulen Signed-off-by: Felix Fietkau --- .../devicetree/bindings/arm/airoha.yaml | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/airoha.yaml diff --git a/Documentation/devicetree/bindings/arm/airoha.yaml b/Documentation/devicetree/bindings/arm/airoha.yaml new file mode 100644 index 000000000000..fc19b1a6f37b --- /dev/null +++ b/Documentation/devicetree/bindings/arm/airoha.yaml @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/airoha.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Airoha SoC based Platforms Device Tree Bindings + +maintainers: + - Felix Fietkau + - John Crispin + +description: + Boards with an Airoha SoC shall have the following properties. + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - airoha,en7523-evb + - const: airoha,en7523 + +additionalProperties: true + +... From patchwork Sun Jan 30 14:51:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felix Fietkau X-Patchwork-Id: 12729850 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2A749C433EF for ; Sun, 30 Jan 2022 14:55:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Z/dVYdRs6ybAi2ZOR/rJcXT71v7vru9Pozp7X0UQEtA=; b=blYprMxgYyMyqX VHSAqIEZvjl46dsGPVqmN7f2xbjY90EYfMbA1wnroRgkedhUVSnWOqVHsWDh0WhfXHbD8xNVDQNPG EgikZ9rYDCF3D/n5nHNE47+SQkYJx6zWkYXXQ/dznfzsya1mryqhQxW9nRDHG8OkPRB4StOX0ucCe t/6D6g6uZUf48NnDZzBVlVlV7jr1E91rPc3eHwQXdWz9llGCMObKU6h56QqPOuHrKgsRDXcmhZHe6 jHXmJx5InYo54rM6QT2+zxaC2RuSSEWWgsJMcySkc3yIWfKgBdBRl6xwwX//05YWBx9ronnCs5YE0 dETDktO+obDfOwRPTHdw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEBaf-006kMs-Ad; Sun, 30 Jan 2022 14:54:05 +0000 Received: from nbd.name ([2a01:4f8:221:3d45::2]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEBYE-006j1e-9z; Sun, 30 Jan 2022 14:51:36 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nbd.name; s=20160729; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=OvBhMw6bbt8t09pV2B0Kb8ULJ5bT1lgq8sPAOrF0Cws=; b=TTHaYvHJJgLUE/W0pUjtbYDjx5 1ETRZ72wpwoniYQXNswhsnuLf0gepRjve5rjOIRY3SU960pHwrJ/UQO0o9Gnkj+58tp9VyEiyjGDU PJ2b7zYQQCw70xnORXAAfVYe7vmaQ6Qw0jYvHpsn3U9Tgry+lrkliTYlYDqOuu14OliE=; Received: from p200300daa716f900d40f7dfd86c385e0.dip0.t-ipconnect.de ([2003:da:a716:f900:d40f:7dfd:86c3:85e0] helo=Maecks.lan) by ds12 with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.89) (envelope-from ) id 1nEBY7-0002if-3R; Sun, 30 Jan 2022 15:51:27 +0100 From: Felix Fietkau To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring Cc: linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, john@phrozen.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v9 03/13] ARM: Add basic support for Airoha EN7523 SoC Date: Sun, 30 Jan 2022 15:51:06 +0100 Message-Id: <20220130145116.88406-4-nbd@nbd.name> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20220130145116.88406-1-nbd@nbd.name> References: <20220130145116.88406-1-nbd@nbd.name> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220130_065134_569891_A5D30EE4 X-CRM114-Status: GOOD ( 18.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: John Crispin EN7523 is an armv8 based silicon used inside broadband access type devices such as xPON and xDSL. It shares various silicon blocks with MediaTek silicon such as the MT7622. Add basic support for Airoha EN7523, enough for booting to console. The UART is basically 8250-compatible, except for the clock selection. A clock-frequency value is synthesized to get this to run at 115200 bps. Signed-off-by: John Crispin Signed-off-by: Bert Vermeulen Signed-off-by: Felix Fietkau --- arch/arm/Kconfig | 12 ++++ arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/en7523-evb.dts | 27 +++++++ arch/arm/boot/dts/en7523.dtsi | 117 +++++++++++++++++++++++++++++++ arch/arm/mach-airoha/Makefile | 2 + arch/arm/mach-airoha/airoha.c | 16 +++++ 7 files changed, 177 insertions(+) create mode 100644 arch/arm/boot/dts/en7523-evb.dts create mode 100644 arch/arm/boot/dts/en7523.dtsi create mode 100644 arch/arm/mach-airoha/Makefile create mode 100644 arch/arm/mach-airoha/airoha.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 796fc8017f5d..57ef390d3146 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -572,6 +572,18 @@ config ARCH_VIRT select HAVE_ARM_ARCH_TIMER select ARCH_SUPPORTS_BIG_ENDIAN +config ARCH_AIROHA + bool "Airoha SoC Support" + depends on ARCH_MULTI_V7 + select ARM_AMBA + select ARM_GIC + select ARM_GIC_V3 + select ARM_PSCI + select HAVE_ARM_ARCH_TIMER + select COMMON_CLK + help + Support for Airoha EN7523 SoCs + # # This is sorted alphabetically by mach-* pathname. However, plat-* # Kconfigs may be included either alphabetically (according to the diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 77172d555c7e..34baf885573a 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -160,6 +160,7 @@ textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000 # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. machine-$(CONFIG_ARCH_ACTIONS) += actions +machine-$(CONFIG_ARCH_AIROHA) += airoha machine-$(CONFIG_ARCH_ALPINE) += alpine machine-$(CONFIG_ARCH_ARTPEC) += artpec machine-$(CONFIG_ARCH_ASPEED) += aspeed diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index e41eca79c950..5c2dd47b58b0 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -187,6 +187,8 @@ dtb-$(CONFIG_ARCH_DAVINCI) += \ da850-lego-ev3.dtb dtb-$(CONFIG_ARCH_DIGICOLOR) += \ cx92755_equinox.dtb +dtb-$(CONFIG_ARCH_AIROHA) += \ + en7523-evb.dtb dtb-$(CONFIG_ARCH_EXYNOS3) += \ exynos3250-artik5-eval.dtb \ exynos3250-monk.dtb \ diff --git a/arch/arm/boot/dts/en7523-evb.dts b/arch/arm/boot/dts/en7523-evb.dts new file mode 100644 index 000000000000..69754ef9a628 --- /dev/null +++ b/arch/arm/boot/dts/en7523-evb.dts @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/dts-v1/; + +/* Bootloader installs ATF here */ +/memreserve/ 0x80000000 0x200000; + +#include "en7523.dtsi" + +/ { + model = "Airoha EN7523 Evaluation Board"; + compatible = "airoha,en7523-evb", "airoha,en7523"; + + aliases { + serial0 = &uart1; + }; + + chosen { + bootargs = "console=ttyS0,115200 earlycon"; + stdout-path = "serial0:115200n8"; + linux,usable-memory-range = <0x80200000 0x1fe00000>; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; +}; diff --git a/arch/arm/boot/dts/en7523.dtsi b/arch/arm/boot/dts/en7523.dtsi new file mode 100644 index 000000000000..f1d4c03aad89 --- /dev/null +++ b/arch/arm/boot/dts/en7523.dtsi @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + +#include +#include + +/ { + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + npu_binary@84000000 { + no-map; + reg = <0x84000000 0xA00000>; + }; + + npu_flag@84B0000 { + no-map; + reg = <0x84B00000 0x100000>; + }; + + npu_pkt@85000000 { + no-map; + reg = <0x85000000 0x1A00000>; + }; + + npu_phyaddr@86B00000 { + no-map; + reg = <0x86B00000 0x100000>; + }; + + npu_rxdesc@86D00000 { + no-map; + reg = <0x86D00000 0x100000>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0>; + enable-method = "psci"; + clock-frequency = <80000000>; + next-level-cache = <&L2_0>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1>; + enable-method = "psci"; + clock-frequency = <80000000>; + next-level-cache = <&L2_0>; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + gic: interrupt-controller@9000000 { + compatible = "arm,gic-v3"; + interrupt-controller; + #interrupt-cells = <3>; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x09000000 0x20000>, + <0x09080000 0x80000>, + <0x09400000 0x2000>, + <0x09500000 0x2000>, + <0x09600000 0x20000>; + interrupts = ; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&gic>; + interrupts = , + , + , + ; + }; + + uart1: serial@1fbf0000 { + compatible = "ns16550"; + reg = <0x1fbf0000 0x30>; + reg-io-width = <4>; + reg-shift = <2>; + interrupts = ; + clock-frequency = <1843200>; + status = "okay"; + }; +}; diff --git a/arch/arm/mach-airoha/Makefile b/arch/arm/mach-airoha/Makefile new file mode 100644 index 000000000000..a5857d0d02eb --- /dev/null +++ b/arch/arm/mach-airoha/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-y += airoha.o diff --git a/arch/arm/mach-airoha/airoha.c b/arch/arm/mach-airoha/airoha.c new file mode 100644 index 000000000000..ea23b5abb478 --- /dev/null +++ b/arch/arm/mach-airoha/airoha.c @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Device Tree support for Airoha SoCs + * + * Copyright (c) 2022 Felix Fietkau + */ +#include + +static const char * const airoha_board_dt_compat[] = { + "airoha,en7523", + NULL, +}; + +DT_MACHINE_START(MEDIATEK_DT, "Airoha Cortex-A53 (Device Tree)") + .dt_compat = airoha_board_dt_compat, +MACHINE_END From patchwork Sun Jan 30 14:51:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felix Fietkau X-Patchwork-Id: 12729849 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 73BF9C433F5 for ; Sun, 30 Jan 2022 14:55:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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bh=3Vumq25WNP3Df0zlSA9vs0wGYkSiJD1gefdGJvPtB7I=; b=br3frG6Mce++quRfNbb4TTsSn1 UOm2Ob/3U53NV36dMUOCBwE4Ux3LvWjVKIVC7xwfTd40wXy3IWjDt6KKyQ7uTR2l8aWfm24wFAuNc KemFDUqswL8rXMpzoFPK/nKTGyltFagwccpCH0z73APiyj+MDB/USjG8a3/yCbG1IQpk=; Received: from p200300daa716f900d40f7dfd86c385e0.dip0.t-ipconnect.de ([2003:da:a716:f900:d40f:7dfd:86c3:85e0] helo=Maecks.lan) by ds12 with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.89) (envelope-from ) id 1nEBY7-0002if-J6; Sun, 30 Jan 2022 15:51:27 +0100 From: Felix Fietkau To: Russell King Cc: soc@kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, john@phrozen.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 04/13] ARM: multi_v7_defconfig: Add support for Airoha EN7523 SoC Date: Sun, 30 Jan 2022 15:51:07 +0100 Message-Id: <20220130145116.88406-5-nbd@nbd.name> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20220130145116.88406-1-nbd@nbd.name> References: <20220130145116.88406-1-nbd@nbd.name> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220130_065134_986531_0890B172 X-CRM114-Status: UNSURE ( 8.07 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: John Crispin This enables basic bootup support for the Airoha EN7523 SoC. Signed-off-by: John Crispin Signed-off-by: Felix Fietkau --- arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 1c2c3e9f0e05..3b413635f5bd 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -34,6 +34,7 @@ CONFIG_MACH_BERLIN_BG2=y CONFIG_MACH_BERLIN_BG2CD=y CONFIG_MACH_BERLIN_BG2Q=y CONFIG_ARCH_DIGICOLOR=y +CONFIG_ARCH_AIROHA=y CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_HIGHBANK=y CONFIG_ARCH_HISI=y From patchwork Sun Jan 30 14:51:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felix Fietkau X-Patchwork-Id: 12729847 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E6DF8C433EF for ; Sun, 30 Jan 2022 14:54:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Hucivyf1DugWmTKPDYox/3MekMtfXp7ofMpOy5GiWMk=; b=NSTEQzt79ZbB+V /9dF0zzhawg5tE8b9FFm4xcC18bv+7MnaG2xUzi3kVZ0Pg5yo7oKf/jx8TO8tI6QFhxbC0HNriXQb eU8F+BbqNW2Q9lUoWVh2vEuWha4awkBenqEYkjWk8aZThweS8gtSotOIaUFZroCiNjS3vQu+EJNBk BG7ZCaJ2QKJz0ppGjJUAUSLGXQdnCZ6f3GOqI+ys0EbKpvEB/ZtCLukhB9bL07wOjvDvZQjcJ9tZf xOqsL1YWTu3mi+OZO1E/vS/ZcDYk/wZLQCpDq9PsqqUWJebT5UPX2ZkoLAvdqNeaMaC3e99JJxXQ8 jqEkxRAc2T05/RyUTxdg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEBZZ-006jew-9N; Sun, 30 Jan 2022 14:52:57 +0000 Received: from nbd.name ([2a01:4f8:221:3d45::2]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEBYB-006izh-5L; Sun, 30 Jan 2022 14:51:34 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nbd.name; s=20160729; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=FxdEucy7tA80MoD1Kxf5uiGRrCxiQazHuU2nauOT5/8=; b=GmoHBEoBhYTQZ8EKnhpksQGw6q UODXuyv9wvky8GIxc9GEzT7UBPSg7KCsTP/xGYj/Hrk2QiwDKgCyywxf7Dd2IBOaRF3nNDazSN5bc 0EvKCnTqw00WLzW3QwETOWbDrG5LHpJBMJ6q8fEQOwRaWqXoQBzuvNbFzObjuGlXlYzE=; Received: from p200300daa716f900d40f7dfd86c385e0.dip0.t-ipconnect.de ([2003:da:a716:f900:d40f:7dfd:86c3:85e0] helo=Maecks.lan) by ds12 with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.89) (envelope-from ) id 1nEBY8-0002if-Dl; Sun, 30 Jan 2022 15:51:28 +0100 From: Felix Fietkau To: Michael Turquette , Stephen Boyd , Rob Herring Cc: soc@kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, john@phrozen.org, Rob Herring , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 05/13] dt-bindings: Add en7523-scu device tree binding documentation Date: Sun, 30 Jan 2022 15:51:08 +0100 Message-Id: <20220130145116.88406-6-nbd@nbd.name> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20220130145116.88406-1-nbd@nbd.name> References: <20220130145116.88406-1-nbd@nbd.name> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220130_065131_396484_7EEDE475 X-CRM114-Status: GOOD ( 13.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: John Crispin Adds device tree binding documentation for clocks in the EN7523 SOC. Reviewed-by: Rob Herring Signed-off-by: Felix Fietkau Signed-off-by: John Crispin Signed-off-by: Felix Fietkau --- .../bindings/clock/airoha,en7523-scu.yaml | 58 +++++++++++++++++++ include/dt-bindings/clock/en7523-clk.h | 17 ++++++ 2 files changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml create mode 100644 include/dt-bindings/clock/en7523-clk.h diff --git a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml new file mode 100644 index 000000000000..d60e74654809 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/airoha,en7523-scu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: EN7523 Clock Device Tree Bindings + +maintainers: + - Felix Fietkau + - John Crispin + +description: | + This node defines the System Control Unit of the EN7523 SoC, + a collection of registers configuring many different aspects of the SoC. + + The clock driver uses it to read and configure settings of the + PLL controller, which provides clocks for the CPU, the bus and + other SoC internal peripherals. + + Each clock is assigned an identifier and client nodes use this identifier + to specify which clock they consume. + + All these identifiers can be found in: + [1]: . + + The clocks are provided inside a system controller node. + +properties: + compatible: + items: + - const: airoha,en7523-scu + + reg: + maxItems: 2 + + "#clock-cells": + description: + The first cell indicates the clock number, see [1] for available + clocks. + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include + scu: system-controller@1fa20000 { + compatible = "airoha,en7523-scu"; + reg = <0x1fa20000 0x400>, + <0x1fb00000 0x1000>; + #clock-cells = <1>; + }; diff --git a/include/dt-bindings/clock/en7523-clk.h b/include/dt-bindings/clock/en7523-clk.h new file mode 100644 index 000000000000..717d23a5e5ae --- /dev/null +++ b/include/dt-bindings/clock/en7523-clk.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ + +#ifndef _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ +#define _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ + +#define EN7523_CLK_GSW 0 +#define EN7523_CLK_EMI 1 +#define EN7523_CLK_BUS 2 +#define EN7523_CLK_SLIC 3 +#define EN7523_CLK_SPI 4 +#define EN7523_CLK_NPU 5 +#define EN7523_CLK_CRYPTO 6 +#define EN7523_CLK_PCIE 7 + +#define EN7523_NUM_CLOCKS 8 + +#endif /* _DT_BINDINGS_CLOCK_AIROHA_EN7523_H_ */ From patchwork Sun Jan 30 14:51:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felix Fietkau X-Patchwork-Id: 12729848 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5A0CDC433EF for ; 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Sun, 30 Jan 2022 15:51:29 +0100 From: Felix Fietkau To: Michael Turquette , Stephen Boyd Cc: soc@kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, john@phrozen.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v9 06/13] clk: en7523: Add clock driver for Airoha EN7523 SoC Date: Sun, 30 Jan 2022 15:51:09 +0100 Message-Id: <20220130145116.88406-7-nbd@nbd.name> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20220130145116.88406-1-nbd@nbd.name> References: <20220130145116.88406-1-nbd@nbd.name> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220130_065132_796200_28667200 X-CRM114-Status: GOOD ( 23.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This driver only registers fixed rate clocks, since the clocks are fully initialized by the boot loader and should not be changed later, according to Airoha. Signed-off-by: Felix Fietkau --- drivers/clk/Kconfig | 9 + drivers/clk/Makefile | 1 + drivers/clk/clk-en7523.c | 350 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 360 insertions(+) create mode 100644 drivers/clk/clk-en7523.c diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index c91931c94888..4614d6452fb7 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -192,6 +192,15 @@ config COMMON_CLK_CS2000_CP help If you say yes here you get support for the CS2000 clock multiplier. +config COMMON_CLK_EN7523 + bool "Clock driver for Airoha EN7523 SoC system clocks" + depends on OF + depends on ARCH_AIROHA || COMPILE_TEST + default ARCH_AIROHA + help + This driver provides the fixed clocks and gates present on Airoha + ARM silicon. + config COMMON_CLK_FSL_FLEXSPI tristate "Clock driver for FlexSPI on Layerscape SoCs" depends on ARCH_LAYERSCAPE || COMPILE_TEST diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index a9bb2478fbdd..da1e2ac2dfc1 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -27,6 +27,7 @@ obj-$(CONFIG_COMMON_CLK_CDCE925) += clk-cdce925.o obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o obj-$(CONFIG_COMMON_CLK_CS2000_CP) += clk-cs2000-cp.o obj-$(CONFIG_ARCH_SPARX5) += clk-sparx5.o +obj-$(CONFIG_COMMON_CLK_EN7523) += clk-en7523.o obj-$(CONFIG_COMMON_CLK_FIXED_MMIO) += clk-fixed-mmio.o obj-$(CONFIG_COMMON_CLK_FSL_FLEXSPI) += clk-fsl-flexspi.o obj-$(CONFIG_COMMON_CLK_FSL_SAI) += clk-fsl-sai.o diff --git a/drivers/clk/clk-en7523.c b/drivers/clk/clk-en7523.c new file mode 100644 index 000000000000..137e13520ad9 --- /dev/null +++ b/drivers/clk/clk-en7523.c @@ -0,0 +1,350 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include +#include +#include +#include + +#define REG_PCI_CONTROL 0x88 +#define REG_PCI_CONTROL_PERSTOUT BIT(29) +#define REG_PCI_CONTROL_PERSTOUT1 BIT(26) +#define REG_PCI_CONTROL_REFCLK_EN1 BIT(22) +#define REG_GSW_CLK_DIV_SEL 0x1b4 +#define REG_EMI_CLK_DIV_SEL 0x1b8 +#define REG_BUS_CLK_DIV_SEL 0x1bc +#define REG_SPI_CLK_DIV_SEL 0x1c4 +#define REG_SPI_CLK_FREQ_SEL 0x1c8 +#define REG_NPU_CLK_DIV_SEL 0x1fc +#define REG_CRYPTO_CLKSRC 0x200 +#define REG_RESET_CONTROL 0x834 +#define REG_RESET_CONTROL_PCIEHB BIT(29) +#define REG_RESET_CONTROL_PCIE1 BIT(27) +#define REG_RESET_CONTROL_PCIE2 BIT(26) + +struct en_clk_desc { + int id; + const char *name; + u32 base_reg; + u32 base_bits; + u32 base_shift; + union { + const u32 *base_values; + u32 base_value; + }; + int n_base_values; + + u32 div_reg; + u32 div_bits; + u32 div_shift; + u32 div_val0; + u32 div_step; +}; + +struct en_clk_gate { + void __iomem *base; + struct clk_hw hw; +}; + +static const u32 gsw_base[] = { 400000000, 500000000 }; +static const u32 emi_base[] = { 333000000, 400000000 }; +static const u32 bus_base[] = { 500000000, 540000000 }; +static const u32 slic_base[] = { 100000000, 3125000 }; +static const u32 npu_base[] = { 333000000, 400000000, 500000000 }; + +static const struct en_clk_desc en7523_base_clks[] = { + { + .id = EN7523_CLK_GSW, + .name = "gsw", + + .base_reg = REG_GSW_CLK_DIV_SEL, + .base_bits = 1, + .base_shift = 8, + .base_values = gsw_base, + .n_base_values = ARRAY_SIZE(gsw_base), + + .div_bits = 3, + .div_shift = 0, + .div_step = 1, + }, { + .id = EN7523_CLK_EMI, + .name = "emi", + + .base_reg = REG_EMI_CLK_DIV_SEL, + .base_bits = 1, + .base_shift = 8, + .base_values = emi_base, + .n_base_values = ARRAY_SIZE(emi_base), + + .div_bits = 3, + .div_shift = 0, + .div_step = 1, + }, { + .id = EN7523_CLK_BUS, + .name = "bus", + + .base_reg = REG_BUS_CLK_DIV_SEL, + .base_bits = 1, + .base_shift = 8, + .base_values = bus_base, + .n_base_values = ARRAY_SIZE(bus_base), + + .div_bits = 3, + .div_shift = 0, + .div_step = 1, + }, { + .id = EN7523_CLK_SLIC, + .name = "slic", + + .base_reg = REG_SPI_CLK_FREQ_SEL, + .base_bits = 1, + .base_shift = 0, + .base_values = slic_base, + .n_base_values = ARRAY_SIZE(slic_base), + + .div_reg = REG_SPI_CLK_DIV_SEL, + .div_bits = 5, + .div_shift = 24, + .div_val0 = 20, + .div_step = 2, + }, { + .id = EN7523_CLK_SPI, + .name = "spi", + + .base_reg = REG_SPI_CLK_DIV_SEL, + + .base_value = 400000000, + + .div_bits = 5, + .div_shift = 8, + .div_val0 = 40, + .div_step = 2, + }, { + .id = EN7523_CLK_NPU, + .name = "npu", + + .base_reg = REG_NPU_CLK_DIV_SEL, + .base_bits = 2, + .base_shift = 8, + .base_values = npu_base, + .n_base_values = ARRAY_SIZE(npu_base), + + .div_bits = 3, + .div_shift = 0, + .div_step = 1, + }, { + .id = EN7523_CLK_CRYPTO, + .name = "crypto", + + .base_reg = REG_CRYPTO_CLKSRC, + .base_bits = 1, + .base_shift = 8, + .base_values = emi_base, + .n_base_values = ARRAY_SIZE(emi_base), + } +}; + +static const struct of_device_id of_match_clk_en7523[] = { + { .compatible = "airoha,en7523-scu", }, + { /* sentinel */ } +}; + +static u32 en7523_get_base_rate(void __iomem *base, int i) +{ + const struct en_clk_desc *desc = &en7523_base_clks[i]; + u32 val; + + if (!desc->base_bits) + return desc->base_value; + + val = readl(base + desc->base_reg); + val >>= desc->base_shift; + val &= (1 << desc->base_bits) - 1; + + if (val >= desc->n_base_values) + return 0; + + return desc->base_values[val]; +} + +static u32 en7523_get_div(void __iomem *base, int i) +{ + const struct en_clk_desc *desc = &en7523_base_clks[i]; + u32 reg, val; + + if (!desc->div_bits) + return 1; + + reg = desc->div_reg ? desc->div_reg : desc->base_reg; + val = readl(base + reg); + val >>= desc->div_shift; + val &= (1 << desc->div_bits) - 1; + + if (!val && desc->div_val0) + return desc->div_val0; + + return (val + 1) * desc->div_step; +} + +static int en7523_pci_is_enabled(struct clk_hw *hw) +{ + struct en_clk_gate *cg = container_of(hw, struct en_clk_gate, hw); + + return !!(readl(cg->base + REG_PCI_CONTROL) & REG_PCI_CONTROL_REFCLK_EN1); +} + +static int en7523_pci_prepare(struct clk_hw *hw) +{ + struct en_clk_gate *cg = container_of(hw, struct en_clk_gate, hw); + void __iomem *np_base = cg->base; + u32 val, mask; + + /* Need to pull device low before reset */ + val = readl(np_base + REG_PCI_CONTROL); + val &= ~(REG_PCI_CONTROL_PERSTOUT1 | REG_PCI_CONTROL_PERSTOUT); + writel(val, np_base + REG_PCI_CONTROL); + usleep_range(1000, 2000); + + /* Enable PCIe port 1 */ + val |= REG_PCI_CONTROL_REFCLK_EN1; + writel(val, np_base + REG_PCI_CONTROL); + usleep_range(1000, 2000); + + /* Reset to default */ + val = readl(np_base + REG_RESET_CONTROL); + mask = REG_RESET_CONTROL_PCIE1 | REG_RESET_CONTROL_PCIE2 | + REG_RESET_CONTROL_PCIEHB; + writel(val & ~mask, np_base + REG_RESET_CONTROL); + usleep_range(1000, 2000); + writel(val | mask, np_base + REG_RESET_CONTROL); + msleep(100); + writel(val & ~mask, np_base + REG_RESET_CONTROL); + usleep_range(5000, 10000); + + /* Release device */ + mask = REG_PCI_CONTROL_PERSTOUT1 | REG_PCI_CONTROL_PERSTOUT; + val = readl(np_base + REG_PCI_CONTROL); + writel(val & ~mask, np_base + REG_PCI_CONTROL); + usleep_range(1000, 2000); + writel(val | mask, np_base + REG_PCI_CONTROL); + msleep(250); + + return 0; +} + +static void en7523_pci_unprepare(struct clk_hw *hw) +{ + struct en_clk_gate *cg = container_of(hw, struct en_clk_gate, hw); + void __iomem *np_base = cg->base; + u32 val; + + val = readl(np_base + REG_PCI_CONTROL); + val &= ~REG_PCI_CONTROL_REFCLK_EN1; + writel(val, np_base + REG_PCI_CONTROL); +} + +static struct clk_hw *en7523_register_pcie_clk(struct device *dev, + void __iomem *np_base) +{ + static const struct clk_ops pcie_gate_ops = { + .is_enabled = en7523_pci_is_enabled, + .prepare = en7523_pci_prepare, + .unprepare = en7523_pci_unprepare, + }; + struct clk_init_data init = { + .name = "pcie", + .ops = &pcie_gate_ops, + }; + struct en_clk_gate *cg; + + cg = devm_kzalloc(dev, sizeof(*cg), GFP_KERNEL); + if (!cg) + return NULL; + + cg->base = np_base; + cg->hw.init = &init; + en7523_pci_unprepare(&cg->hw); + + if (clk_hw_register(NULL, &cg->hw)) + return NULL; + + return &cg->hw; +} + +static void en7523_register_clocks(struct device *dev, struct clk_hw_onecell_data *clk_data, + void __iomem *base, void __iomem *np_base) +{ + struct clk_hw *hw; + u32 rate; + int i; + + for (i = 0; i < ARRAY_SIZE(en7523_base_clks); i++) { + const struct en_clk_desc *desc = &en7523_base_clks[i]; + + rate = en7523_get_base_rate(base, i); + rate /= en7523_get_div(base, i); + + hw = clk_hw_register_fixed_rate(dev, desc->name, NULL, 0, rate); + if (IS_ERR(hw)) { + pr_err("Failed to register clk %s: %ld\n", + desc->name, PTR_ERR(hw)); + continue; + } + + clk_data->hws[desc->id] = hw; + } + + hw = en7523_register_pcie_clk(dev, np_base); + clk_data->hws[EN7523_CLK_PCIE] = hw; + + clk_data->num = EN7523_NUM_CLOCKS; +} + +static int en7523_clk_probe(struct platform_device *pdev) +{ + struct device_node *node = pdev->dev.of_node; + struct clk_hw_onecell_data *clk_data; + void __iomem *base, *np_base; + int r; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + np_base = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(base)) + return PTR_ERR(np_base); + + clk_data = devm_kzalloc(&pdev->dev, + struct_size(clk_data, hws, EN7523_NUM_CLOCKS), + GFP_KERNEL); + if (!clk_data) + return -ENOMEM; + + en7523_register_clocks(&pdev->dev, clk_data, base, np_base); + + r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); + if (r) + dev_err(&pdev->dev, + "could not register clock provider: %s: %d\n", + pdev->name, r); + + return r; +} + +static struct platform_driver clk_en7523_drv = { + .probe = en7523_clk_probe, + .driver = { + .name = "clk-en7523", + .of_match_table = of_match_clk_en7523, + }, +}; + +static int __init clk_en7523_init(void) +{ + return platform_driver_register(&clk_en7523_drv); +} + +arch_initcall(clk_en7523_init); From patchwork Sun Jan 30 14:51:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felix Fietkau X-Patchwork-Id: 12729823 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CE96FC433F5 for ; Sun, 30 Jan 2022 14:53:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ue0nJyBHkt9XIWkRXenwuiogHbDTDk2CoeQl1Gb5dh4=; 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bh=SV4r8zfyzAWYlpoI7Y1Q8wKuVWvcxHwic0J49gpohiM=; b=FkKAvFaO8WHU3wozFtFucW9hpT yR0+JBeoAugNGDStkr5+ktpLG2KSvdyQ2/o+qReQSn3nZgS9nrJzzuIhE+wWRKoFNm91wbFBTIaaI XoJ+RpdkBvlIQfLXNKCQOkahK12yv8alTTL2J16f+7VGM1XX/PdRn9mKk/rDd+ijzGbg=; Received: from p200300daa716f900d40f7dfd86c385e0.dip0.t-ipconnect.de ([2003:da:a716:f900:d40f:7dfd:86c3:85e0] helo=Maecks.lan) by ds12 with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.89) (envelope-from ) id 1nEBY9-0002if-Pt; Sun, 30 Jan 2022 15:51:29 +0100 From: Felix Fietkau To: Rob Herring Cc: soc@kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, john@phrozen.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 07/13] ARM: dts: add clock support for Airoha EN7523 Date: Sun, 30 Jan 2022 15:51:10 +0100 Message-Id: <20220130145116.88406-8-nbd@nbd.name> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20220130145116.88406-1-nbd@nbd.name> References: <20220130145116.88406-1-nbd@nbd.name> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220130_065132_678961_FFF957FC X-CRM114-Status: UNSURE ( 9.37 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This driver only registers fixed rate clocks, since the clocks are fully initialized by the boot loader and should not be changed later, according to Airoha. Signed-off-by: Felix Fietkau --- arch/arm/boot/dts/en7523.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/en7523.dtsi b/arch/arm/boot/dts/en7523.dtsi index f1d4c03aad89..1e5280be02ba 100644 --- a/arch/arm/boot/dts/en7523.dtsi +++ b/arch/arm/boot/dts/en7523.dtsi @@ -2,6 +2,7 @@ #include #include +#include / { interrupt-parent = <&gic>; @@ -82,6 +83,13 @@ L2_0: l2-cache0 { }; }; + scu: system-controller@1fa20000 { + compatible = "airoha,en7523-scu"; + reg = <0x1fa20000 0x400>, + <0x1fb00000 0x1000>; + #clock-cells = <1>; + }; + gic: interrupt-controller@9000000 { compatible = "arm,gic-v3"; interrupt-controller; From patchwork Sun Jan 30 14:51:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felix Fietkau X-Patchwork-Id: 12729851 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 228BBC433F5 for ; Sun, 30 Jan 2022 14:56:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=pWVZdowUlHC8zlboKL91urCzW5xsfzD6GpCHvrKZfTs=; b=a2RWCJCngJdpD7 i5I/vhZFJP0yxXg0w6x8ivNtof5FaCgNQI2WxS6GHHv5b8jtdDq3juNn+IFe1EYK5AudcPeZ+IBRX MRwd+s1HOLjy/HBBzKK7wmYS/2RRJ5TU2p2fY+1M4w+NMXSqg725UtuWPcvBs+cAloU3jyLg0u0G2 E9KirLhooiKENTz361xleoctW7R7kXwUr8ioeuK0WKBQz7ARkSKjAapOoEdjy+bJAq4jQtk3XjFa9 GW7jfIx14t6yyT281heBAfWtfKRinWD3vWGLvckqMYQqtyGe4MVZqR0XmOlKMb83zTabmex8GOJuS BvcM4oQ4pcnGjGSjg6XQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEBbc-006ksx-Ek; Sun, 30 Jan 2022 14:55:04 +0000 Received: from nbd.name ([2a01:4f8:221:3d45::2]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEBYG-006j35-7P; Sun, 30 Jan 2022 14:51:37 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nbd.name; s=20160729; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=rO6a7Hov1DT8YCZ0BC66z6nKE3NFtfTVucv70OUu+M0=; b=q96nErUZ3T934E6wic2bry1QA3 yAMgnAaov/Z42N8o3z4D+qFaBW8mLaAKaYaIpHN4K7CtSaFt/55OQQvtnsZRgey8C1dpt1IqDpc8d 38s+hYqT2yUp5od91BVxT232hlS+MfEnL+l5Y6QzulkpRdartylSULvjSWpxi0nuVE3I=; Received: from p200300daa716f900d40f7dfd86c385e0.dip0.t-ipconnect.de ([2003:da:a716:f900:d40f:7dfd:86c3:85e0] helo=Maecks.lan) by ds12 with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.89) (envelope-from ) id 1nEBYA-0002if-FS; Sun, 30 Jan 2022 15:51:30 +0100 From: Felix Fietkau To: Ryder Lee , Jianjun Wang , Bjorn Helgaas , Rob Herring , Matthias Brugger Cc: soc@kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, john@phrozen.org, Rob Herring , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 08/13] dt-bindings: PCI: Add support for Airoha EN7532 Date: Sun, 30 Jan 2022 15:51:11 +0100 Message-Id: <20220130145116.88406-9-nbd@nbd.name> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20220130145116.88406-1-nbd@nbd.name> References: <20220130145116.88406-1-nbd@nbd.name> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220130_065136_481253_14FEEE28 X-CRM114-Status: UNSURE ( 8.39 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: John Crispin EN7532 is an ARM based platform SoC integrating the same PCIe IP as MT7622, add a binding for it. Acked-by: Rob Herring Signed-off-by: John Crispin Signed-off-by: Felix Fietkau --- Documentation/devicetree/bindings/pci/mediatek-pcie.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie.txt b/Documentation/devicetree/bindings/pci/mediatek-pcie.txt index 57ae73462272..684227522267 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie.txt +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie.txt @@ -7,6 +7,7 @@ Required properties: "mediatek,mt7622-pcie" "mediatek,mt7623-pcie" "mediatek,mt7629-pcie" + "airoha,en7523-pcie" - device_type: Must be "pci" - reg: Base addresses and lengths of the root ports. - reg-names: Names of the above areas to use during resource lookup. From patchwork Sun Jan 30 14:51:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felix Fietkau X-Patchwork-Id: 12729852 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E1E76C433F5 for ; Sun, 30 Jan 2022 14:57:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=BDj9jVVX5YAFmFAMsCcGXDoTsrR2v8mBXo40o0b4eX4=; b=TG+Dusv08imzAT oCEvPYfU0wVEIdTJ6HYsPoZfkJNusGklHqu5JLcH06uLPFJzWUdK0DZAmcvGH73U/qZnLQbBj3U98 NYCXKdZZod0aUM5elfltojgU5UCgFPDWUrQ7QjHiLJUkGgB2DlaujJ4V8jjM+S596joeIcZyQDEZI qVYi3ajDx/9rYaEfgdbgI2lXSxUiBCcaT3rkQbWXuCKQizb0aqvu5kA46bdU8GykxffQXzlW36hXI ZZMWmw5tasBZwblXnvZmmzT2VPveiGb23DsDsWFiv+jO5OSE70JMhVmelHclbdyUbdtO+QIn7Uwuy 31Gts0ACFBuMCwWlHShQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEBc8-006lB8-7k; Sun, 30 Jan 2022 14:55:36 +0000 Received: from nbd.name ([2a01:4f8:221:3d45::2]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEBYG-006j3G-Jq; Sun, 30 Jan 2022 14:51:38 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nbd.name; s=20160729; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=FiNUXtP+nUVb4JQHij/1yrBKsZja9IqLtczu+wuoOSI=; b=o+G7w0wH7o4EoOkS4552eOzW/m qMdSZApz15A7FKY+UcYnXt6jVsHgVduMXqlQa11A47QopbHAB7cI6whGO4dl+ZMvuBV1eCgYtVxDK eVbkFexPi9Ol3z8SZv78tcBIViP4ZsOv3SXD7U3wTFPaTuujiyKmYa0Rg55CWbFUOgiY=; Received: from p200300daa716f900d40f7dfd86c385e0.dip0.t-ipconnect.de ([2003:da:a716:f900:d40f:7dfd:86c3:85e0] helo=Maecks.lan) by ds12 with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.89) (envelope-from ) id 1nEBYB-0002if-7M; Sun, 30 Jan 2022 15:51:31 +0100 From: Felix Fietkau To: Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Matthias Brugger Cc: soc@kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, john@phrozen.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 09/13] PCI: mediatek: Allow building for ARCH_AIROHA Date: Sun, 30 Jan 2022 15:51:12 +0100 Message-Id: <20220130145116.88406-10-nbd@nbd.name> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20220130145116.88406-1-nbd@nbd.name> References: <20220130145116.88406-1-nbd@nbd.name> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220130_065136_870435_F593D9F8 X-CRM114-Status: GOOD ( 10.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Allow selecting the pcie-mediatek driver if ARCH_AIROHA is set, because the Airoha EN7523 SoC uses the same controller as MT7622. The driver itself is not modified. The PCIe controller DT node should use mediatek,mt7622-pcie after airoha,en7523-pcie. Acked-by: Lorenzo Pieralisi Signed-off-by: Felix Fietkau --- drivers/pci/controller/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 7fc5135ffbbf..08b0e50dcc12 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -233,7 +233,7 @@ config PCIE_ROCKCHIP_EP config PCIE_MEDIATEK tristate "MediaTek PCIe controller" - depends on ARCH_MEDIATEK || COMPILE_TEST + depends on ARCH_AIROHA || ARCH_MEDIATEK || COMPILE_TEST depends on OF depends on PCI_MSI_IRQ_DOMAIN help From patchwork Sun Jan 30 14:51:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felix Fietkau X-Patchwork-Id: 12729861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 88113C433F5 for ; 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Sun, 30 Jan 2022 15:51:31 +0100 From: Felix Fietkau To: Rob Herring , Matthias Brugger Cc: soc@kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, john@phrozen.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 10/13] ARM: dts: Add PCIe support for Airoha EN7523 Date: Sun, 30 Jan 2022 15:51:13 +0100 Message-Id: <20220130145116.88406-11-nbd@nbd.name> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20220130145116.88406-1-nbd@nbd.name> References: <20220130145116.88406-1-nbd@nbd.name> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220130_065429_444024_D1D99DA5 X-CRM114-Status: GOOD ( 10.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This uses the MediaTek MT7622 PCIe driver, since the PCIe IP block is nearly identical to the one in MT7622 Signed-off-by: Felix Fietkau --- arch/arm/boot/dts/en7523-evb.dts | 8 +++++ arch/arm/boot/dts/en7523.dtsi | 60 ++++++++++++++++++++++++++++++++ 2 files changed, 68 insertions(+) diff --git a/arch/arm/boot/dts/en7523-evb.dts b/arch/arm/boot/dts/en7523-evb.dts index 69754ef9a628..0a79f5f6c311 100644 --- a/arch/arm/boot/dts/en7523-evb.dts +++ b/arch/arm/boot/dts/en7523-evb.dts @@ -25,3 +25,11 @@ memory@80000000 { reg = <0x80000000 0x20000000>; }; }; + +&pcie0 { + status = "okay"; +}; + +&pcie1 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/en7523.dtsi b/arch/arm/boot/dts/en7523.dtsi index 1e5280be02ba..b897fb6cffd2 100644 --- a/arch/arm/boot/dts/en7523.dtsi +++ b/arch/arm/boot/dts/en7523.dtsi @@ -122,4 +122,64 @@ uart1: serial@1fbf0000 { clock-frequency = <1843200>; status = "okay"; }; + + + pcie0: pcie@1fa91000 { + compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie"; + device_type = "pci"; + reg = <0x1fa91000 0x1000>; + reg-names = "port0"; + linux,pci-domain = <0>; + #address-cells = <3>; + #size-cells = <2>; + interrupts = ; + interrupt-names = "pcie_irq"; + clocks = <&scu EN7523_CLK_PCIE>; + clock-names = "sys_ck0"; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x20000000 0x20000000 0 0x8000000>; + status = "disabled"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc0 0>, + <0 0 0 2 &pcie_intc0 1>, + <0 0 0 3 &pcie_intc0 2>, + <0 0 0 4 &pcie_intc0 3>; + pcie_intc0: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + + pcie1: pcie@1fa92000 { + compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie"; + device_type = "pci"; + reg = <0x1fa92000 0x1000>; + reg-names = "port1"; + linux,pci-domain = <1>; + #address-cells = <3>; + #size-cells = <2>; + interrupts = ; + interrupt-names = "pcie_irq"; + clocks = <&scu EN7523_CLK_PCIE>; + clock-names = "sys_ck1"; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x28000000 0x28000000 0 0x8000000>; + status = "disabled"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc1 0>, + <0 0 0 2 &pcie_intc1 1>, + <0 0 0 3 &pcie_intc1 2>, + <0 0 0 4 &pcie_intc1 3>; + pcie_intc1: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + }; From patchwork Sun Jan 30 14:51:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felix Fietkau X-Patchwork-Id: 12729860 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0D03CC433EF for ; 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Sun, 30 Jan 2022 15:51:32 +0100 From: Felix Fietkau To: Linus Walleij , Bartosz Golaszewski , Rob Herring , John Crispin Cc: soc@kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Rob Herring , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 11/13] dt-bindings: arm: airoha: Add binding for Airoha GPIO controller Date: Sun, 30 Jan 2022 15:51:14 +0100 Message-Id: <20220130145116.88406-12-nbd@nbd.name> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20220130145116.88406-1-nbd@nbd.name> References: <20220130145116.88406-1-nbd@nbd.name> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220130_065425_462458_0CA0D085 X-CRM114-Status: GOOD ( 12.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: John Crispin Airoha's GPIO controller on their ARM EN7523 SoCs consists of two banks of 32 GPIOs Reviewed-by: Linus Walleij Reviewed-by: Rob Herring Signed-off-by: John Crispin Signed-off-by: Felix Fietkau --- .../bindings/gpio/airoha,en7523-gpio.yaml | 67 +++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/airoha,en7523-gpio.yaml diff --git a/Documentation/devicetree/bindings/gpio/airoha,en7523-gpio.yaml b/Documentation/devicetree/bindings/gpio/airoha,en7523-gpio.yaml new file mode 100644 index 000000000000..66c00ec85731 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/airoha,en7523-gpio.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/airoha,en7523-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Airoha EN7523 GPIO controller + +maintainers: + - John Crispin + +description: | + Airoha's GPIO controller on their ARM EN7523 SoCs consists of two banks of 32 + GPIOs. + +properties: + $nodename: + pattern: "^gpio@[0-9a-f]+$" + + compatible: + items: + - const: airoha,en7523-gpio + + reg: + description: | + The first tuple points to the input register. + The second and third tuple point to the direction registers + The fourth tuple points to the output register + maxItems: 4 + + "#gpio-cells": + const: 2 + + gpio-controller: true + +required: + - compatible + - reg + - "#gpio-cells" + - gpio-controller + +additionalProperties: false + +examples: + - | + gpio0: gpio@1fbf0200 { + compatible = "airoha,en7523-gpio"; + reg = <0x1fbf0204 0x4>, + <0x1fbf0200 0x4>, + <0x1fbf0220 0x4>, + <0x1fbf0214 0x4>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio1: gpio@1fbf0270 { + compatible = "airoha,en7523-gpio"; + reg = <0x1fbf0270 0x4>, + <0x1fbf0260 0x4>, + <0x1fbf0264 0x4>, + <0x1fbf0278 0x4>; + gpio-controller; + #gpio-cells = <2>; + }; + + +... From patchwork Sun Jan 30 14:51:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felix Fietkau X-Patchwork-Id: 12729862 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1CBE9C433EF for ; Sun, 30 Jan 2022 15:00:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Obilht23Ihf8o1WObJqGKxHWDIRNkucZWNi9LY9kynI=; b=CdVsLE7K4/mdYQ SsFcWUXbKPraUsqlfhx7Qn8vs9u7VfaycV+d5afujR4IblV6UsBSHQrAOlVwOA+55Xk5oqREdwIYn WnTk5AiPtOFoxToXrZiUPaAXIp/4i0llYxUjVE0ILDZ5VZ8vWMpMIcUl5e4n4O4VEJGhG3u+dgWFE 8rT68fLk7xSai+SGedRLAfHtgJLcKfIIia0CdAKqTHDBiKEDROtbHcPjoPKqBLC95c3VUA0ZJt0/t 7flByNMOCRU2pU9J+ijPvEmJ/jR7zJUW5+88TKE23NEYirAmrUW0M9J1cX8QS7cg3EcL5bv3WiRZX S117NFvccFprnqXS5ZuA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEBfJ-006mvc-EY; Sun, 30 Jan 2022 14:58:54 +0000 Received: from nbd.name ([2a01:4f8:221:3d45::2]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEBb9-006kek-Vw; Sun, 30 Jan 2022 14:54:37 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nbd.name; s=20160729; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=u+tl6xie1Wtuy+7sHYDKqjsiAoTKmtTNbyVrWfTLiqc=; b=j7KKBxMXVcKxo1wfN2/uVl7MyG uI/7VvnCY9UQQo5lwJIwTUnZongSaxtBzgzceSfQXQJbzdFuoAwCFdXnyeGKzayNUWoXaPreC51Mt +AaX7fWNXPIBOP5ZumoFm/bQM7y7nRfPxUbBMTXlhlFI2qI/HUNcGivhCJu9X9l4nHYE=; Received: from p200300daa716f900d40f7dfd86c385e0.dip0.t-ipconnect.de ([2003:da:a716:f900:d40f:7dfd:86c3:85e0] helo=Maecks.lan) by ds12 with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.89) (envelope-from ) id 1nEBYD-0002if-G0; Sun, 30 Jan 2022 15:51:33 +0100 From: Felix Fietkau To: Linus Walleij , Bartosz Golaszewski Cc: soc@kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, john@phrozen.org, Andy Shevchenko , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Subject: [PATCH v9 12/13] gpio: Add support for Airoha EN7523 GPIO controller Date: Sun, 30 Jan 2022 15:51:15 +0100 Message-Id: <20220130145116.88406-13-nbd@nbd.name> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20220130145116.88406-1-nbd@nbd.name> References: <20220130145116.88406-1-nbd@nbd.name> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220130_065436_242299_D3EC3C8A X-CRM114-Status: GOOD ( 20.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: John Crispin Airoha's GPIO controller on their ARM EN7523 SoCs consists of two banks of 32 GPIOs. Each instance in DT is for a single bank. Acked-by: Bartosz Golaszewski Reviewed-by: Linus Walleij Reviewed-by: Andy Shevchenko Signed-off-by: John Crispin Signed-off-by: Felix Fietkau --- drivers/gpio/Kconfig | 10 +++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-en7523.c | 137 +++++++++++++++++++++++++++++++++++++ 3 files changed, 148 insertions(+) create mode 100644 drivers/gpio/gpio-en7523.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 60d9374c72c0..0e9aacbcb4bd 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -247,6 +247,16 @@ config GPIO_EM help Say yes here to support GPIO on Renesas Emma Mobile SoCs. +config GPIO_EN7523 + tristate "Airoha GPIO support" + depends on ARCH_AIROHA + default ARCH_AIROHA + select GPIO_GENERIC + select GPIOLIB_IRQCHIP + help + Say Y or M here to support the GPIO controller block on the + Airoha EN7523 SoC. It supports two banks of 32 GPIOs. + config GPIO_EP93XX def_bool y depends on ARCH_EP93XX diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 71ee9fc2ff83..d2269ee0948e 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -56,6 +56,7 @@ obj-$(CONFIG_GPIO_DLN2) += gpio-dln2.o obj-$(CONFIG_GPIO_DWAPB) += gpio-dwapb.o obj-$(CONFIG_GPIO_EIC_SPRD) += gpio-eic-sprd.o obj-$(CONFIG_GPIO_EM) += gpio-em.o +obj-$(CONFIG_GPIO_EN7523) += gpio-en7523.o obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o obj-$(CONFIG_GPIO_EXAR) += gpio-exar.o obj-$(CONFIG_GPIO_F7188X) += gpio-f7188x.o diff --git a/drivers/gpio/gpio-en7523.c b/drivers/gpio/gpio-en7523.c new file mode 100644 index 000000000000..f836a8db4c1d --- /dev/null +++ b/drivers/gpio/gpio-en7523.c @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include +#include +#include +#include +#include + +#define AIROHA_GPIO_MAX 32 + +/** + * airoha_gpio_ctrl - Airoha GPIO driver data + * @gc: Associated gpio_chip instance. + * @data: The data register. + * @dir0: The direction register for the lower 16 pins. + * @dir1: The direction register for the higher 16 pins. + * @output: The output enable register. + */ +struct airoha_gpio_ctrl { + struct gpio_chip gc; + void __iomem *data; + void __iomem *dir[2]; + void __iomem *output; +}; + +static struct airoha_gpio_ctrl *gc_to_ctrl(struct gpio_chip *gc) +{ + return container_of(gc, struct airoha_gpio_ctrl, gc); +} + +static int airoha_dir_set(struct gpio_chip *gc, unsigned int gpio, + int val, int out) +{ + struct airoha_gpio_ctrl *ctrl = gc_to_ctrl(gc); + u32 dir = ioread32(ctrl->dir[gpio / 16]); + u32 output = ioread32(ctrl->output); + u32 mask = BIT((gpio % 16) * 2); + + if (out) { + dir |= mask; + output |= BIT(gpio); + } else { + dir &= ~mask; + output &= ~BIT(gpio); + } + + iowrite32(dir, ctrl->dir[gpio / 16]); + + if (out) + gc->set(gc, gpio, val); + + iowrite32(output, ctrl->output); + + return 0; +} + +static int airoha_dir_out(struct gpio_chip *gc, unsigned int gpio, + int val) +{ + return airoha_dir_set(gc, gpio, val, 1); +} + +static int airoha_dir_in(struct gpio_chip *gc, unsigned int gpio) +{ + return airoha_dir_set(gc, gpio, 0, 0); +} + +static int airoha_get_dir(struct gpio_chip *gc, unsigned int gpio) +{ + struct airoha_gpio_ctrl *ctrl = gc_to_ctrl(gc); + u32 dir = ioread32(ctrl->dir[gpio / 16]); + u32 mask = BIT((gpio % 16) * 2); + + return (dir & mask) ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN; +} + +static int airoha_gpio_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct airoha_gpio_ctrl *ctrl; + int err; + + ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL); + if (!ctrl) + return -ENOMEM; + + ctrl->data = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(ctrl->data)) + return PTR_ERR(ctrl->data); + + ctrl->dir[0] = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(ctrl->dir[0])) + return PTR_ERR(ctrl->dir[0]); + + ctrl->dir[1] = devm_platform_ioremap_resource(pdev, 2); + if (IS_ERR(ctrl->dir[1])) + return PTR_ERR(ctrl->dir[1]); + + ctrl->output = devm_platform_ioremap_resource(pdev, 3); + if (IS_ERR(ctrl->output)) + return PTR_ERR(ctrl->output); + + err = bgpio_init(&ctrl->gc, dev, 4, ctrl->data, NULL, + NULL, NULL, NULL, 0); + if (err) + return dev_err_probe(dev, err, "unable to init generic GPIO"); + + ctrl->gc.ngpio = AIROHA_GPIO_MAX; + ctrl->gc.owner = THIS_MODULE; + ctrl->gc.direction_output = airoha_dir_out; + ctrl->gc.direction_input = airoha_dir_in; + ctrl->gc.get_direction = airoha_get_dir; + + return devm_gpiochip_add_data(dev, &ctrl->gc, ctrl); +} + +static const struct of_device_id airoha_gpio_of_match[] = { + { .compatible = "airoha,en7523-gpio" }, + { } +}; +MODULE_DEVICE_TABLE(of, airoha_gpio_of_match); + +static struct platform_driver airoha_gpio_driver = { + .driver = { + .name = "airoha-gpio", + .of_match_table = airoha_gpio_of_match, + }, + .probe = airoha_gpio_probe, +}; +module_platform_driver(airoha_gpio_driver); + +MODULE_DESCRIPTION("Airoha GPIO support"); +MODULE_AUTHOR("John Crispin "); +MODULE_LICENSE("GPL v2"); From patchwork Sun Jan 30 14:51:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felix Fietkau X-Patchwork-Id: 12729853 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 24625C433EF for ; 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Sun, 30 Jan 2022 15:51:34 +0100 From: Felix Fietkau To: Rob Herring Cc: soc@kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, john@phrozen.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 13/13] ARM: dts: add GPIO support for Airoha EN7523 Date: Sun, 30 Jan 2022 15:51:16 +0100 Message-Id: <20220130145116.88406-14-nbd@nbd.name> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20220130145116.88406-1-nbd@nbd.name> References: <20220130145116.88406-1-nbd@nbd.name> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220130_065421_440192_665C0828 X-CRM114-Status: GOOD ( 10.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: John Crispin Airoha's GPIO controller on their ARM EN7523 SoCs consists of two banks of 32 GPIOs Signed-off-by: John Crispin Signed-off-by: Felix Fietkau --- arch/arm/boot/dts/en7523-evb.dts | 8 ++++++++ arch/arm/boot/dts/en7523.dtsi | 20 ++++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/en7523-evb.dts b/arch/arm/boot/dts/en7523-evb.dts index 0a79f5f6c311..cd9cded5b564 100644 --- a/arch/arm/boot/dts/en7523-evb.dts +++ b/arch/arm/boot/dts/en7523-evb.dts @@ -33,3 +33,11 @@ &pcie0 { &pcie1 { status = "okay"; }; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/en7523.dtsi b/arch/arm/boot/dts/en7523.dtsi index b897fb6cffd2..8932e2ab96b6 100644 --- a/arch/arm/boot/dts/en7523.dtsi +++ b/arch/arm/boot/dts/en7523.dtsi @@ -3,6 +3,7 @@ #include #include #include +#include / { interrupt-parent = <&gic>; @@ -123,6 +124,25 @@ uart1: serial@1fbf0000 { status = "okay"; }; + gpio0: gpio@1fbf0200 { + compatible = "airoha,en7523-gpio"; + reg = <0x1fbf0204 0x4>, + <0x1fbf0200 0x4>, + <0x1fbf0220 0x4>, + <0x1fbf0214 0x4>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio1: gpio@1fbf0270 { + compatible = "airoha,en7523-gpio"; + reg = <0x1fbf0270 0x4>, + <0x1fbf0260 0x4>, + <0x1fbf0264 0x4>, + <0x1fbf0278 0x4>; + gpio-controller; + #gpio-cells = <2>; + }; pcie0: pcie@1fa91000 { compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie";