From patchwork Mon Jan 31 07:24:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrian Hunter X-Patchwork-Id: 12730453 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46B31C433EF for ; Mon, 31 Jan 2022 07:25:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357905AbiAaHZF (ORCPT ); Mon, 31 Jan 2022 02:25:05 -0500 Received: from mga03.intel.com ([134.134.136.65]:60936 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357900AbiAaHZE (ORCPT ); Mon, 31 Jan 2022 02:25:04 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1643613904; x=1675149904; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZDpKgrbbd68DiL0edOPoBO+KnowsRpPIffYdKIWMdTs=; b=fY7QXN+cdkp6P3fpl2xHxDKqSS+m45umM7dqMx971QlH4G6O9FqKbKI5 thlrweiBI5LfuWmhXf2P+0MZMrXPbgRZlIk6a0TZzqAci037UZgvqqJHr 83OG9im+db2fD5KZ/Y9nhNGhKkXQKk+7hyo7ztgm9dCsjBpIdliL2Yc5Y ugtrEs97DpLtZNCMztQSfEeXROs6P3lhzwOoujb2cUs9RcBFFe7cWzL0N gSfMPsTuAYqBv5gt4XAVPvj1JkVBuMBZaQs3NjPu2jFkoCB+16QzemgdF G3/yX0f5DPZOaEuFrhPbzj+SO2qM0U3383xBKUo7WEdXyL4KhtieLvssj g==; X-IronPort-AV: E=McAfee;i="6200,9189,10243"; a="247367026" X-IronPort-AV: E=Sophos;i="5.88,330,1635231600"; d="scan'208";a="247367026" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jan 2022 23:25:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,330,1635231600"; d="scan'208";a="768515179" Received: from ahunter-desktop.fi.intel.com ([10.237.72.92]) by fmsmga006.fm.intel.com with ESMTP; 30 Jan 2022 23:24:59 -0800 From: Adrian Hunter To: Peter Zijlstra , Alexander Shishkin Cc: Arnaldo Carvalho de Melo , Jiri Olsa , linux-kernel@vger.kernel.org, Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, kvm@vger.kernel.org, H Peter Anvin , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Mathieu Poirier , Suzuki K Poulose , Leo Yan Subject: [PATCH 1/5] perf/x86/intel/pt: Relax address filter validation Date: Mon, 31 Jan 2022 09:24:49 +0200 Message-Id: <20220131072453.2839535-2-adrian.hunter@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220131072453.2839535-1-adrian.hunter@intel.com> References: <20220131072453.2839535-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The requirement for 64-bit address filters is that they are canonical addresses. In other respects any address range is allowed which would include user space addresses. That can be useful for tracing virtual machine guests because address filtering can be used to advantage in place of current privilege level (CPL) filtering. Signed-off-by: Adrian Hunter --- arch/x86/events/intel/pt.c | 63 ++++++++++++++++++++++++++++++-------- 1 file changed, 50 insertions(+), 13 deletions(-) diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c index ae396fdfabab..4443de56a2d5 100644 --- a/arch/x86/events/intel/pt.c +++ b/arch/x86/events/intel/pt.c @@ -13,6 +13,8 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include +#include +#include #include #include @@ -1363,11 +1365,37 @@ static void pt_addr_filters_fini(struct perf_event *event) event->hw.addr_filters = NULL; } -static inline bool valid_kernel_ip(unsigned long ip) +#ifdef CONFIG_X86_64 +static u64 canonical_address(u64 vaddr, u8 vaddr_bits) { - return virt_addr_valid(ip) && kernel_ip(ip); + return ((s64)vaddr << (64 - vaddr_bits)) >> (64 - vaddr_bits); } +static u64 is_canonical_address(u64 vaddr, u8 vaddr_bits) +{ + return canonical_address(vaddr, vaddr_bits) == vaddr; +} + +/* Clamp to a canonical address greater-than-or-equal-to the address given */ +static u64 clamp_to_ge_canonical_addr(u64 vaddr, u8 vaddr_bits) +{ + return is_canonical_address(vaddr, vaddr_bits) ? + vaddr : + -BIT_ULL(vaddr_bits - 1); +} + +/* Clamp to a canonical address less-than-or-equal-to the address given */ +static u64 clamp_to_le_canonical_addr(u64 vaddr, u8 vaddr_bits) +{ + return is_canonical_address(vaddr, vaddr_bits) ? + vaddr : + BIT_ULL(vaddr_bits - 1) - 1; +} +#else +#define clamp_to_ge_canonical_addr(x, y) (x) +#define clamp_to_le_canonical_addr(x, y) (x) +#endif + static int pt_event_addr_filters_validate(struct list_head *filters) { struct perf_addr_filter *filter; @@ -1382,14 +1410,6 @@ static int pt_event_addr_filters_validate(struct list_head *filters) filter->action == PERF_ADDR_FILTER_ACTION_START) return -EOPNOTSUPP; - if (!filter->path.dentry) { - if (!valid_kernel_ip(filter->offset)) - return -EINVAL; - - if (!valid_kernel_ip(filter->offset + filter->size)) - return -EINVAL; - } - if (++range > intel_pt_validate_hw_cap(PT_CAP_num_address_ranges)) return -EOPNOTSUPP; } @@ -1413,9 +1433,26 @@ static void pt_event_addr_filters_sync(struct perf_event *event) if (filter->path.dentry && !fr[range].start) { msr_a = msr_b = 0; } else { - /* apply the offset */ - msr_a = fr[range].start; - msr_b = msr_a + fr[range].size - 1; + unsigned long n = fr[range].size - 1; + unsigned long a = fr[range].start; + unsigned long b; + + if (a > ULONG_MAX - n) + b = ULONG_MAX; + else + b = a + n; + /* + * Apply the offset. 64-bit addresses written to the + * MSRs must be canonical, but the range can encompass + * non-canonical addresses. Since software cannot + * execute at non-canonical addresses, adjusting to + * canonical addresses does not affect the result of the + * address filter. + */ + msr_a = clamp_to_ge_canonical_addr(a, boot_cpu_data.x86_virt_bits); + msr_b = clamp_to_le_canonical_addr(b, boot_cpu_data.x86_virt_bits); + if (msr_b < msr_a) + msr_a = msr_b = 0; } filters->filter[range].msr_a = msr_a; From patchwork Mon Jan 31 07:24:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrian Hunter X-Patchwork-Id: 12730454 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5B6EC433EF for ; Mon, 31 Jan 2022 07:25:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357911AbiAaHZR (ORCPT ); Mon, 31 Jan 2022 02:25:17 -0500 Received: from mga03.intel.com ([134.134.136.65]:60936 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229621AbiAaHZI (ORCPT ); Mon, 31 Jan 2022 02:25:08 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1643613908; x=1675149908; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=twoB6SdjOGgoaMl2rsOQ5CCAGv7qBwrmwSxksWBeIHM=; b=IuD0pan+qq4F1CnFyeYF3ro5rZJ8u10kF4W2kXrFIyqO5DRmlpUSIe57 upQ9HNVppBN+Yu+ThDJOnQi7lHOE5HY9HmRfivdWcx5+567b3qt32tX+A uKv29EnCBUyOGJA6HHCusP+K45hM+l17+N9ShTguyF/Nu1W8nAV7WYjC4 WwhA4NxDe+OFbsI3dXPSUA7XakNi+VIsxIqp/CekSNNnSkGvOrDccQU+D vSNA2YP5QsT/4OkVCshLzCU224NThq/mqrahIcn57PI4mFTHE0q9NNJkc iyQsatHv/xElHsjFeBnQ6YE3YjdDOlNpZTGY7b/KzcwLvFEztl0KHcWQ9 g==; X-IronPort-AV: E=McAfee;i="6200,9189,10243"; a="247367032" X-IronPort-AV: E=Sophos;i="5.88,330,1635231600"; d="scan'208";a="247367032" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jan 2022 23:25:08 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,330,1635231600"; d="scan'208";a="768515194" Received: from ahunter-desktop.fi.intel.com ([10.237.72.92]) by fmsmga006.fm.intel.com with ESMTP; 30 Jan 2022 23:25:03 -0800 From: Adrian Hunter To: Peter Zijlstra , Alexander Shishkin Cc: Arnaldo Carvalho de Melo , Jiri Olsa , linux-kernel@vger.kernel.org, Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, kvm@vger.kernel.org, H Peter Anvin , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Mathieu Poirier , Suzuki K Poulose , Leo Yan Subject: [PATCH 2/5] x86: Share definition of __is_canonical_address() Date: Mon, 31 Jan 2022 09:24:50 +0200 Message-Id: <20220131072453.2839535-3-adrian.hunter@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220131072453.2839535-1-adrian.hunter@intel.com> References: <20220131072453.2839535-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Reduce code duplication by moving canonical address code to a common header file. Signed-off-by: Adrian Hunter --- arch/x86/events/intel/pt.c | 14 ++------------ arch/x86/include/asm/page.h | 10 ++++++++++ arch/x86/kvm/emulate.c | 4 ++-- arch/x86/kvm/x86.c | 2 +- arch/x86/kvm/x86.h | 7 +------ arch/x86/mm/maccess.c | 7 +------ 6 files changed, 17 insertions(+), 27 deletions(-) diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c index 4443de56a2d5..4015c1364463 100644 --- a/arch/x86/events/intel/pt.c +++ b/arch/x86/events/intel/pt.c @@ -1366,20 +1366,10 @@ static void pt_addr_filters_fini(struct perf_event *event) } #ifdef CONFIG_X86_64 -static u64 canonical_address(u64 vaddr, u8 vaddr_bits) -{ - return ((s64)vaddr << (64 - vaddr_bits)) >> (64 - vaddr_bits); -} - -static u64 is_canonical_address(u64 vaddr, u8 vaddr_bits) -{ - return canonical_address(vaddr, vaddr_bits) == vaddr; -} - /* Clamp to a canonical address greater-than-or-equal-to the address given */ static u64 clamp_to_ge_canonical_addr(u64 vaddr, u8 vaddr_bits) { - return is_canonical_address(vaddr, vaddr_bits) ? + return __is_canonical_address(vaddr, vaddr_bits) ? vaddr : -BIT_ULL(vaddr_bits - 1); } @@ -1387,7 +1377,7 @@ static u64 clamp_to_ge_canonical_addr(u64 vaddr, u8 vaddr_bits) /* Clamp to a canonical address less-than-or-equal-to the address given */ static u64 clamp_to_le_canonical_addr(u64 vaddr, u8 vaddr_bits) { - return is_canonical_address(vaddr, vaddr_bits) ? + return __is_canonical_address(vaddr, vaddr_bits) ? vaddr : BIT_ULL(vaddr_bits - 1) - 1; } diff --git a/arch/x86/include/asm/page.h b/arch/x86/include/asm/page.h index 4d5810c8fab7..9cc82f305f4b 100644 --- a/arch/x86/include/asm/page.h +++ b/arch/x86/include/asm/page.h @@ -71,6 +71,16 @@ static inline void copy_user_page(void *to, void *from, unsigned long vaddr, extern bool __virt_addr_valid(unsigned long kaddr); #define virt_addr_valid(kaddr) __virt_addr_valid((unsigned long) (kaddr)) +static __always_inline u64 __canonical_address(u64 vaddr, u8 vaddr_bits) +{ + return ((s64)vaddr << (64 - vaddr_bits)) >> (64 - vaddr_bits); +} + +static __always_inline u64 __is_canonical_address(u64 vaddr, u8 vaddr_bits) +{ + return __canonical_address(vaddr, vaddr_bits) == vaddr; +} + #endif /* __ASSEMBLY__ */ #include diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c index 5719d8cfdbd9..40da8c7f3019 100644 --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c @@ -665,7 +665,7 @@ static inline u8 ctxt_virt_addr_bits(struct x86_emulate_ctxt *ctxt) static inline bool emul_is_noncanonical_address(u64 la, struct x86_emulate_ctxt *ctxt) { - return get_canonical(la, ctxt_virt_addr_bits(ctxt)) != la; + return !__is_canonical_address(la, ctxt_virt_addr_bits(ctxt)); } /* @@ -715,7 +715,7 @@ static __always_inline int __linearize(struct x86_emulate_ctxt *ctxt, case X86EMUL_MODE_PROT64: *linear = la; va_bits = ctxt_virt_addr_bits(ctxt); - if (get_canonical(la, va_bits) != la) + if (!__is_canonical_address(la, va_bits)) goto bad; *max_size = min_t(u64, ~0u, (1ull << va_bits) - la); diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 9e43d756312f..af15a7065aa7 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1735,7 +1735,7 @@ static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data, * value, and that something deterministic happens if the guest * invokes 64-bit SYSENTER. */ - data = get_canonical(data, vcpu_virt_addr_bits(vcpu)); + data = __canonical_address(data, vcpu_virt_addr_bits(vcpu)); break; case MSR_TSC_AUX: if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX)) diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h index 635b75f9e145..fc4b68ab8d71 100644 --- a/arch/x86/kvm/x86.h +++ b/arch/x86/kvm/x86.h @@ -211,14 +211,9 @@ static inline u8 vcpu_virt_addr_bits(struct kvm_vcpu *vcpu) return kvm_read_cr4_bits(vcpu, X86_CR4_LA57) ? 57 : 48; } -static inline u64 get_canonical(u64 la, u8 vaddr_bits) -{ - return ((int64_t)la << (64 - vaddr_bits)) >> (64 - vaddr_bits); -} - static inline bool is_noncanonical_address(u64 la, struct kvm_vcpu *vcpu) { - return get_canonical(la, vcpu_virt_addr_bits(vcpu)) != la; + return !__is_canonical_address(la, vcpu_virt_addr_bits(vcpu)); } static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu, diff --git a/arch/x86/mm/maccess.c b/arch/x86/mm/maccess.c index 92ec176a7293..5a53c2cc169c 100644 --- a/arch/x86/mm/maccess.c +++ b/arch/x86/mm/maccess.c @@ -4,11 +4,6 @@ #include #ifdef CONFIG_X86_64 -static __always_inline u64 canonical_address(u64 vaddr, u8 vaddr_bits) -{ - return ((s64)vaddr << (64 - vaddr_bits)) >> (64 - vaddr_bits); -} - bool copy_from_kernel_nofault_allowed(const void *unsafe_src, size_t size) { unsigned long vaddr = (unsigned long)unsafe_src; @@ -19,7 +14,7 @@ bool copy_from_kernel_nofault_allowed(const void *unsafe_src, size_t size) * we also need to include the userspace guard page. */ return vaddr >= TASK_SIZE_MAX + PAGE_SIZE && - canonical_address(vaddr, boot_cpu_data.x86_virt_bits) == vaddr; + __is_canonical_address(vaddr, boot_cpu_data.x86_virt_bits); } #else bool copy_from_kernel_nofault_allowed(const void *unsafe_src, size_t size) From patchwork Mon Jan 31 07:24:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrian Hunter X-Patchwork-Id: 12730455 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 984D1C433F5 for ; Mon, 31 Jan 2022 07:25:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357974AbiAaHZb (ORCPT ); Mon, 31 Jan 2022 02:25:31 -0500 Received: from mga03.intel.com ([134.134.136.65]:60950 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357929AbiAaHZN (ORCPT ); Mon, 31 Jan 2022 02:25:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1643613913; x=1675149913; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7YiqLJH+Y+xZ0VB3H4HRhAWvsbIOgFigXzJmDCkkxus=; b=lriXpmMsAs/Nf8xjH+2M2v5r49HpYzBRsxjdgobXnOE9bJQFHkx00IUC iIBti2PYjyA6xxhtda/O87MB5THirPm5R3pbdv99Ypmb6I2Ws5vZyZjKp eVtIr8Yv+xubQAGUmwzTnKmlv1XmauH0rrFQQn3I9TKvgq8sCaQCX4loa 4ajjtWz1RqRrBvHchgV2fngph/k9vLsaVb2lWMDxScV5HEHH/KIFRdB/v /ba1aSu9zchrKbPyL1riDIX806Hi6ElYTdlS4mxAedUUYYCn8lRCEqvGU Zt1L8/ouPyyw0aX73CrydNeJ7fsTj0baqocRnFdgxv7fee9N4vLMTprjc Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10243"; a="247367046" X-IronPort-AV: E=Sophos;i="5.88,330,1635231600"; d="scan'208";a="247367046" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jan 2022 23:25:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,330,1635231600"; d="scan'208";a="768515228" Received: from ahunter-desktop.fi.intel.com ([10.237.72.92]) by fmsmga006.fm.intel.com with ESMTP; 30 Jan 2022 23:25:08 -0800 From: Adrian Hunter To: Peter Zijlstra , Alexander Shishkin Cc: Arnaldo Carvalho de Melo , Jiri Olsa , linux-kernel@vger.kernel.org, Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, kvm@vger.kernel.org, H Peter Anvin , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Mathieu Poirier , Suzuki K Poulose , Leo Yan Subject: [PATCH 3/5] perf/core: Fix address filter parser for multiple filters Date: Mon, 31 Jan 2022 09:24:51 +0200 Message-Id: <20220131072453.2839535-4-adrian.hunter@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220131072453.2839535-1-adrian.hunter@intel.com> References: <20220131072453.2839535-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Reset appropriate variables in the parser loop between parsing separate filters, so that they do not interfere with parsing the next filter. Fixes: 375637bc524952 ("perf/core: Introduce address range filtering") Signed-off-by: Adrian Hunter --- kernel/events/core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/kernel/events/core.c b/kernel/events/core.c index fc18664f49b0..af043a1a06ca 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -10497,8 +10497,11 @@ perf_event_parse_addr_filter(struct perf_event *event, char *fstr, } /* ready to consume more filters */ + kfree(filename); + filename = NULL; state = IF_STATE_ACTION; filter = NULL; + kernel = 0; } } From patchwork Mon Jan 31 07:24:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrian Hunter X-Patchwork-Id: 12730456 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 331F4C433F5 for ; Mon, 31 Jan 2022 07:26:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357940AbiAaH0C (ORCPT ); Mon, 31 Jan 2022 02:26:02 -0500 Received: from mga03.intel.com ([134.134.136.65]:60936 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357914AbiAaHZS (ORCPT ); Mon, 31 Jan 2022 02:25:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1643613918; x=1675149918; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hwsT2KOST3M8BE5wlBZyKbhIKyHEH6Qfs9nq3qyUsdY=; b=brrD3QB3hBr3EYQCKMNmPY+OOkENmWV2fQ7bvjvS2Ux7JL7n/Hnk/+0a vOzM76zBgIsBC0+wFmyjF26gx8ucJlIpVHV1xzET5n1xU4kfT9wR6ey+e ktL1HW1zNj880MYmaGTN9zPom+kPIYzjUz4iK1M4kkxiEOpp3JiTjZqFN WW5Dyyx1s6q+OKn8oPeuqAU5VPeghfrV7zN6ojivuXxaxqN2wO0W/MVo1 zI62NqagEm/oHGVSvZdvlPDf5dN6LDMV4eAru4pdLqn4WnUtlo8Bnlh7S 3FXeGujAWBzu3ONKzDH/GbbpeUutRzaCCKvK67F8lbq00XsUHtsIKTEsg g==; X-IronPort-AV: E=McAfee;i="6200,9189,10243"; a="247367058" X-IronPort-AV: E=Sophos;i="5.88,330,1635231600"; d="scan'208";a="247367058" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jan 2022 23:25:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,330,1635231600"; d="scan'208";a="768515239" Received: from ahunter-desktop.fi.intel.com ([10.237.72.92]) by fmsmga006.fm.intel.com with ESMTP; 30 Jan 2022 23:25:13 -0800 From: Adrian Hunter To: Peter Zijlstra , Alexander Shishkin Cc: Arnaldo Carvalho de Melo , Jiri Olsa , linux-kernel@vger.kernel.org, Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, kvm@vger.kernel.org, H Peter Anvin , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Mathieu Poirier , Suzuki K Poulose , Leo Yan Subject: [PATCH 4/5] perf/x86/intel/pt: Fix address filter config for 32-bit kernel Date: Mon, 31 Jan 2022 09:24:52 +0200 Message-Id: <20220131072453.2839535-5-adrian.hunter@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220131072453.2839535-1-adrian.hunter@intel.com> References: <20220131072453.2839535-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Change from shifting 'unsigned long' to 'u64' to prevent the config bits being lost on a 32-bit kernel. Fixes: eadf48cab4b6b0 ("perf/x86/intel/pt: Add support for address range filtering in PT") Signed-off-by: Adrian Hunter --- arch/x86/events/intel/pt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c index 4015c1364463..aa66c0c7b18b 100644 --- a/arch/x86/events/intel/pt.c +++ b/arch/x86/events/intel/pt.c @@ -490,7 +490,7 @@ static u64 pt_config_filters(struct perf_event *event) pt->filters.filter[range].msr_b = filter->msr_b; } - rtit_ctl |= filter->config << pt_address_ranges[range].reg_off; + rtit_ctl |= (u64)filter->config << pt_address_ranges[range].reg_off; } return rtit_ctl; From patchwork Mon Jan 31 07:24:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrian Hunter X-Patchwork-Id: 12730457 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E14A6C433EF for ; Mon, 31 Jan 2022 07:26:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244295AbiAaH0G (ORCPT ); Mon, 31 Jan 2022 02:26:06 -0500 Received: from mga03.intel.com ([134.134.136.65]:60957 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357922AbiAaHZX (ORCPT ); Mon, 31 Jan 2022 02:25:23 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1643613923; x=1675149923; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yTXAW0y1bRr1ZhmNMLZeR5QMvjVjpbYSmMclYmfKeNw=; b=atbyxg2K8VWDS12rxbSS0tg7PRor1lMAiYXyvchSMoKudfbGuL6t/mAY wBG72DSQKkZHF8FD9lHgdsDEZvpWsw6DaJX5cWceSmTo3+qsUtcnv4oA+ dBbKan3GLjkSq/vmiuX7Mz7E5KMGO6q8RNesSK8mt21bEYvkWf3OKJSMP Th1GZ9QQxrsOX0+pN9zJG+1KsLP9zEZcyM8t3UsdF9JN62G8oaLpIpPW3 keRv3cLx5gxZz1B/WeffQUnFC1ERZC1PZj3X3O4PEFkcCXov4Gg+yJHpv AEOklj9/23i0aikzsfWTzOTezhl/XQb56uaCyj70hwSabMSRWHFf1Kqby g==; X-IronPort-AV: E=McAfee;i="6200,9189,10243"; a="247367062" X-IronPort-AV: E=Sophos;i="5.88,330,1635231600"; d="scan'208";a="247367062" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jan 2022 23:25:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,330,1635231600"; d="scan'208";a="768515249" Received: from ahunter-desktop.fi.intel.com ([10.237.72.92]) by fmsmga006.fm.intel.com with ESMTP; 30 Jan 2022 23:25:18 -0800 From: Adrian Hunter To: Peter Zijlstra , Alexander Shishkin Cc: Arnaldo Carvalho de Melo , Jiri Olsa , linux-kernel@vger.kernel.org, Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, kvm@vger.kernel.org, H Peter Anvin , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Mathieu Poirier , Suzuki K Poulose , Leo Yan Subject: [PATCH 5/5] perf/core: Allow kernel address filter when not filtering the kernel Date: Mon, 31 Jan 2022 09:24:53 +0200 Message-Id: <20220131072453.2839535-6-adrian.hunter@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220131072453.2839535-1-adrian.hunter@intel.com> References: <20220131072453.2839535-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The so-called 'kernel' address filter can also be useful for filtering fixed addresses in user space. Allow that. Signed-off-by: Adrian Hunter --- kernel/events/core.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/kernel/events/core.c b/kernel/events/core.c index af043a1a06ca..7670b0918e46 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -10454,8 +10454,6 @@ perf_event_parse_addr_filter(struct perf_event *event, char *fstr, */ if (state == IF_STATE_END) { ret = -EINVAL; - if (kernel && event->attr.exclude_kernel) - goto fail; /* * ACTION "filter" must have a non-zero length region